New working clones

------------------
Chess Champion 2150 [hap, Berger]

src/devices/cpu/cops1/cops1base.h

@@ -62,6 +62,9 @@ public:
 	auto &set_option_k_active_high(bool b) { m_option_k_active_high = b; return *this; }
 	auto &set_option_inb_active_high(bool b) { m_option_inb_active_high = b; return *this; }
 
+	// I/O access
+	u8 f_output_r() { return m_f; }
+
 protected:
 	// construction/destruction
 	cops1_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);

src/devices/cpu/pps41/pps41base.h

@@ -42,6 +42,7 @@ public:
 	auto write_sdo() { return m_write_sdo.bind(); }
 	auto write_ssc() { return m_write_ssc.bind(); }
 
+	// I/O access
 	u16 d_output_r() { return m_d_output; }
 	u8 r_output_r() { return m_r_output; }
 	int sdo_r() { return BIT(m_s, 3); }

src/mame/drivers/hh_cops1.cpp

@@ -201,6 +201,7 @@ void mbaskb_state::write_f(u8 data)
 u8 mbaskb_state::read_f()
 {
 	// F1: difficulty switch
+	// F2: N/C
 	return m_inputs[2]->read() | (m_f & 2);
 }
 
@@ -320,7 +321,9 @@ public:
 	void update_display();
 	void write_do(u8 data);
 	void write_s(u8 data);
+	u8 read_f();
 	u8 read_k();
+	int read_si();
 	void qkracerm(machine_config &config);
 };
 
@@ -349,17 +352,32 @@ void qkracerm_state::write_do(u8 data)
 
 void qkracerm_state::write_s(u8 data)
 {
-	// S: digit segment data
+	// Sa-Sg: digit segment data
+	// Sp: link data out
 	m_s = data;
 	update_display();
 }
 
+u8 qkracerm_state::read_f()
+{
+	// F1: N/C
+	// F2: link cable detected
+	// F3: link data in
+	return m_maincpu->f_output_r() & 1;
+}
+
 u8 qkracerm_state::read_k()
 {
 	// K: multiplexed inputs
 	return read_inputs(5);
 }
 
+int qkracerm_state::read_si()
+{
+	// SI: link master(1)/slave(0)
+	return 0;
+}
+
 // config
 
 static INPUT_PORTS_START( qkracerm )
@@ -402,7 +420,9 @@ void qkracerm_state::qkracerm(machine_config &config)
 	m_maincpu->set_option_lb_10(5);
 	m_maincpu->write_do().set(FUNC(qkracerm_state::write_do));
 	m_maincpu->write_s().set(FUNC(qkracerm_state::write_s));
+	m_maincpu->read_f().set(FUNC(qkracerm_state::read_f));
 	m_maincpu->read_k().set(FUNC(qkracerm_state::read_k));
+	m_maincpu->read_si().set(FUNC(qkracerm_state::read_si));
 
 	/* video hardware */
 	DS8874(config, m_ds8874).write_output().set(FUNC(qkracerm_state::ds8874_output_w));

src/mame/drivers/saitek_simultano.cpp

@@ -1,6 +1,6 @@
 // license:BSD-3-Clause
 // copyright-holders:hap
-// thanks-to:Achim, bataais
+// thanks-to:Achim, bataais, Berger
 /***************************************************************************
 
 Saitek Simultano, it is related to Saitek Stratos, see saitek_stratos.cpp
@@ -16,18 +16,21 @@ Hardware notes:
 - Epson SED1502F, LCD screen
 - piezo, 16+3 leds, button sensors chessboard
 
-It also appeared in Tandy's Chess Champion 2150, not as a simple rebrand, but
+It also appeared in Tandy's Chess Champion 2150, still manufactured and
-with hardware differences: 3MHz R65C02, 1 64KB ROM and no EGR socket.
+programmed by Saitek. Not as a simple rebrand, but with hardware differences:
+3MHz R65C02, 1 64KB ROM and no EGR socket.
 
 TODO:
-- where does the IRQ come from? same problem as with stratos
+- IRQ is from HELIOS pin 2, how is the timing determined? same problem as with stratos
 - verify that egr(1) does not work on real chesscomputer
+- is cc2150 the same rom contents as the first simultano?
 
 ***************************************************************************/
 
 #include "emu.h"
 
 #include "cpu/m6502/m65c02.h"
+#include "cpu/m6502/r65c02.h"
 #include "machine/bankdev.h"
 #include "machine/nvram.h"
 #include "machine/sensorboard.h"
@@ -67,6 +70,7 @@ public:
 	DECLARE_INPUT_CHANGED_MEMBER(go_button);
 
 	void simultano(machine_config &config);
+	void cc2150(machine_config &config);
 
 protected:
 	virtual void machine_start() override;
@@ -85,7 +89,8 @@ private:
 	output_finder<16, 34> m_out_lcd;
 
 	void main_map(address_map &map);
-	void rombank_map(address_map &map);
+	void simultano_rombank_map(address_map &map);
+	void cc2150_rombank_map(address_map &map);
 
 	void power_off();
 	void lcd_pwm_w(offs_t offset, u8 data);
@@ -231,10 +236,15 @@ void simultano_state::main_map(address_map &map)
 	map(0x8000, 0xffff).m(m_rombank, FUNC(address_map_bank_device::amap8));
 }
 
-void simultano_state::rombank_map(address_map &map)
+void simultano_state::cc2150_rombank_map(address_map &map)
 {
 	map.unmap_value_high();
 	map(0x00000, 0x0ffff).rom().region("maincpu", 0);
+}
+
+void simultano_state::simultano_rombank_map(address_map &map)
+{
+	cc2150_rombank_map(map);
 	map(0x10000, 0x17fff).r("extrom", FUNC(generic_slot_device::read_rom));
 }
 
@@ -295,20 +305,29 @@ static INPUT_PORTS_START( simultano )
 	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_F1) PORT_CHANGED_MEMBER(DEVICE_SELF, simultano_state, acl_button, 0) PORT_NAME("ACL")
 INPUT_PORTS_END
 
+static INPUT_PORTS_START( cc2150 )
+	PORT_INCLUDE( simultano )
+
+	PORT_MODIFY("IN.5")
+	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_CUSTOM)
+INPUT_PORTS_END
+
 
 
 /******************************************************************************
     Machine Configs
 ******************************************************************************/
 
-void simultano_state::simultano(machine_config &config)
+void simultano_state::cc2150(machine_config &config)
 {
 	/* basic machine hardware */
-	M65C02(config, m_maincpu, 5_MHz_XTAL);
+	R65C02(config, m_maincpu, 3_MHz_XTAL);
 	m_maincpu->set_addrmap(AS_PROGRAM, &simultano_state::main_map);
-	m_maincpu->set_periodic_int(FUNC(simultano_state::irq0_line_hold), attotime::from_hz(76)); // approximation
+	m_maincpu->set_periodic_int(FUNC(simultano_state::irq0_line_hold), attotime::from_hz(91.6)); // measured
 
-	ADDRESS_MAP_BANK(config, "rombank").set_map(&simultano_state::rombank_map).set_options(ENDIANNESS_LITTLE, 8, 17, 0x8000);
+	ADDRESS_MAP_BANK(config, m_rombank);
+	m_rombank->set_map(&simultano_state::cc2150_rombank_map);
+	m_rombank->set_options(ENDIANNESS_LITTLE, 8, 17, 0x8000);
 
 	NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
 
@@ -334,6 +353,18 @@ void simultano_state::simultano(machine_config &config)
 	/* sound hardware */
 	SPEAKER(config, "speaker").front_center();
 	DAC_1BIT(config, m_dac).add_route(ALL_OUTPUTS, "speaker", 0.25);
+}
+
+void simultano_state::simultano(machine_config &config)
+{
+	cc2150(config);
+
+	/* basic machine hardware */
+	M65C02(config.replace(), m_maincpu, 5_MHz_XTAL);
+	m_maincpu->set_addrmap(AS_PROGRAM, &simultano_state::main_map);
+	m_maincpu->set_periodic_int(FUNC(simultano_state::irq0_line_hold), attotime::from_hz(76)); // approximation
+
+	m_rombank->set_map(&simultano_state::simultano_rombank_map);
 
 	/* extension rom */
 	GENERIC_CARTSLOT(config, "extrom", generic_plain_slot, "saitek_egr");
@@ -364,6 +395,15 @@ ROM_START( simultanoa )
 	ROM_LOAD("simultano.svg", 0, 795951, CRC(ac9942bb) SHA1(f9252e5bf7b8af698a403c3f8f5ea9e475e0bf0b) )
 ROM_END
 
+ROM_START( cc2150 )
+	ROM_REGION( 0x10000, "maincpu", 0 )
+	ROM_LOAD("y01g_418_u3.u3",  0x8000, 0x8000, CRC(612dac24) SHA1(ba318f2ba34f9eb3df76a30c455bded76617bb11) ) // AMI 27512
+	ROM_CONTINUE(               0x0000, 0x8000 )
+
+	ROM_REGION( 795951, "screen", 0 )
+	ROM_LOAD("simultano.svg", 0, 795951, CRC(ac9942bb) SHA1(f9252e5bf7b8af698a403c3f8f5ea9e475e0bf0b) )
+ROM_END
+
 } // anonymous namespace
 
 
@@ -375,3 +415,4 @@ ROM_END
 /*    YEAR  NAME        PARENT    CMP MACHINE    INPUT      CLASS            INIT        COMPANY, FULLNAME, FLAGS */
 CONS( 1989, simultano,  0,         0, simultano, simultano, simultano_state, empty_init, "Saitek", "Kasparov Simultano (ver. C)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
 CONS( 1989, simultanoa, simultano, 0, simultano, simultano, simultano_state, empty_init, "Saitek", "Kasparov Simultano (ver. B)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
+CONS( 1988, cc2150,     simultano, 0, cc2150,    cc2150,    simultano_state, empty_init, "Saitek / Tandy Corporation", "Chess Champion 2150", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )

src/mame/drivers/saitek_stratos.cpp

@@ -20,7 +20,8 @@ TODO:
 - LCD status bit handling is guessed. stratos expects it to be high after lcd command 0xf,
   but tking2 won't work if it's done that way, and corona is different too
 - irq timing is derived from the main XTAL, but result should be similar with 5MHz and 5.67MHz,
-  there are a couple of "FREQ. SEL" nodes on the PCB, maybe related (not the ones in input ports)
+  there are a couple of "FREQ. SEL" nodes on the PCB, maybe related (not the ones in input ports).
+  irq source should be from HELIOS pin 2
 - tking(old revisions) and stratos slow responsive buttons, related to irq timing, but if that's changed,
   the led blinking and in-game clock is too fast
 - does nvram.u7 work? it's cleared during boot, but not used after

src/mame/mame.lst

@@ -36304,6 +36304,7 @@ risc2500a
 schess
 
 @source:saitek_simultano.cpp
+cc2150
 simultano
 simultanoa