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https://github.com/holub/mame
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New machines marked as NOT_WORKING
---------------------------------- Chess Champion: Mark V [hap, Berger] Chess Champion: Mark VI/Philidor [hap, Berger]
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hap
parent
b27e5dbd49
commit
0311e621b9
@ -3090,6 +3090,7 @@ files {
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MAME_DIR .. "src/mame/drivers/saitek_chesstrv.cpp",
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MAME_DIR .. "src/mame/drivers/saitek_cp2000.cpp",
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MAME_DIR .. "src/mame/drivers/saitek_delta1.cpp",
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MAME_DIR .. "src/mame/drivers/saitek_mark5.cpp",
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MAME_DIR .. "src/mame/drivers/saitek_risc2500.cpp",
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MAME_DIR .. "src/mame/includes/saitek_stratos.h",
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MAME_DIR .. "src/mame/drivers/saitek_ssystem3.cpp",
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311
src/mame/drivers/saitek_mark5.cpp
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311
src/mame/drivers/saitek_mark5.cpp
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@ -0,0 +1,311 @@
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// license:BSD-3-Clause
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// copyright-holders:hap
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// thanks-to:Berger
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/******************************************************************************
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Chess Champion: Mark V / Mark VI (aka MK V / MK VI)
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Released in late 1981, the chess engine was initially written by David Broughton
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for a Z80 CPU and used in a prototype. It was ported to 6502 by Mark Taylor,
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I/O by Mike Johnson. Support from David Levy and Kevin o'Connell, hardware
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by Nick Toop. These credits are in the ROM data.
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Mark VI/Philidor was released a year later, it was a plug-in module for the Mark V.
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It's not much stronger than Mark V(retroactively called Mark V/Travemunde).
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Hardware notes:
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- x
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TODO:
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- WIP
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******************************************************************************/
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#include "emu.h"
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#include "cpu/m6502/m6502.h"
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#include "machine/nvram.h"
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#include "machine/sensorboard.h"
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#include "sound/dac.h"
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#include "sound/volt_reg.h"
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#include "video/hlcd0538.h"
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#include "video/pwm.h"
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#include "screen.h"
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#include "speaker.h"
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#include <algorithm>
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// internal artwork
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//#include "saitek_mark5.lh" // clickable
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namespace {
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class mark5_state : public driver_device
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{
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public:
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mark5_state(const machine_config &mconfig, device_type type, const char *tag) :
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driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_board(*this, "board"),
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m_display(*this, "display%u", 0),
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m_lcd(*this, "lcd%u", 0),
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m_dac(*this, "dac"),
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m_inputs(*this, "IN.%u", 0),
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m_out_x(*this, "%u.%u.%u", 0U, 0U, 0U)
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{ }
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// machine drivers
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void mark5(machine_config &config);
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protected:
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virtual void machine_start() override;
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virtual void machine_reset() override;
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private:
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// devices/pointers
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required_device<cpu_device> m_maincpu;
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required_device<sensorboard_device> m_board;
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required_device_array<pwm_display_device, 4> m_display;
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required_device_array<hlcd0538_device, 3> m_lcd;
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required_device<dac_bit_interface> m_dac;
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required_ioport_array<2> m_inputs;
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output_finder<3, 8, 34> m_out_x;
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// address maps
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void main_map(address_map &map);
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// I/O handlers
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DECLARE_WRITE8_MEMBER(lcd_data_w);
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DECLARE_READ8_MEMBER(sound_r);
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DECLARE_READ8_MEMBER(reset_irq_r);
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DECLARE_READ8_MEMBER(input_r);
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template<int N> DECLARE_WRITE8_MEMBER(pwm_output_w);
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template<int N> DECLARE_WRITE64_MEMBER(lcd_output_w);
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u8 m_dac_data;
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u8 m_lcd_lcd;
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u64 m_lcd_data[3];
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emu_timer *m_irqtimer;
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TIMER_CALLBACK_MEMBER(interrupt);
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void write_lcd(int state);
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};
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void mark5_state::machine_start()
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{
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m_out_x.resolve();
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m_irqtimer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(mark5_state::interrupt),this));
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// zerofill
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m_dac_data = 0;
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m_lcd_lcd = 0;
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std::fill_n(m_lcd_data, ARRAY_LENGTH(m_lcd_data), 0);
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// register for savestates
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save_item(NAME(m_dac_data));
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save_item(NAME(m_lcd_lcd));
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save_item(NAME(m_lcd_data));
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}
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void mark5_state::machine_reset()
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{
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reset_irq_r(machine().dummy_space(), 0);
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}
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/******************************************************************************
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I/O
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******************************************************************************/
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template<int N>
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WRITE8_MEMBER(mark5_state::pwm_output_w)
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{
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m_out_x[N][offset & 0x3f][offset >> 6] = data;
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}
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template<int N>
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WRITE64_MEMBER(mark5_state::lcd_output_w)
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{
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m_lcd_data[N] = data;
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u8 sel = m_lcd_data[0] & 0xff;
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if (N == 0)
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data >>= 8;
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m_display[N]->matrix(sel, data);
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}
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void mark5_state::write_lcd(int state)
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{
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for (int i = 0; i < 3; i++)
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m_lcd[i]->lcd_w(state);
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m_lcd_lcd = state;
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}
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TIMER_CALLBACK_MEMBER(mark5_state::interrupt)
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{
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// master clock to MC14020, Q12 to IRQ @ 480Hz
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// irq active ~34.61us (470pF, 100K to GND)
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m_irqtimer->adjust(attotime::from_hz(19.6608_MHz_XTAL / 10 / 0x1000));
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m_maincpu->pulse_input_line(0, attotime::from_nsec(34610));
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// MC14020 Q13(1 stage further than IRQ) goes to LCD "LCD" pins
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write_lcd(m_lcd_lcd ^ 1);
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}
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READ8_MEMBER(mark5_state::reset_irq_r)
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{
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if (!machine().side_effects_disabled())
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{
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// MC14020 R
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m_irqtimer->adjust(attotime::from_hz((19.6608_MHz_XTAL / 10 / 0x1000) * 2));
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write_lcd(0);
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}
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return 0xff;
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}
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READ8_MEMBER(mark5_state::sound_r)
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{
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if (!machine().side_effects_disabled())
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{
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// 7474 to speaker out
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m_dac->write(m_dac_data);
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m_dac_data ^= 1;
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}
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return 0xff;
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}
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WRITE8_MEMBER(mark5_state::lcd_data_w)
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{
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// d0,d2,d4: LCD data
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for (int i = 0; i < 3; i++)
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{
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m_lcd[i]->data_w(BIT(data, i*2));
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m_lcd[i]->clk_w(1);
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m_lcd[i]->clk_w(0);
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}
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}
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READ8_MEMBER(mark5_state::input_r)
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{
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// _a6: configuration diodes
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// a0-a5: multiplexed inputs
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return 0xff;
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}
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/******************************************************************************
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Address Maps
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******************************************************************************/
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void mark5_state::main_map(address_map &map)
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{
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map.unmap_value_high();
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map(0x0000, 0x3fff).ram();
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map(0x4000, 0x407f).r(FUNC(mark5_state::input_r));
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map(0x4400, 0x4400).w(FUNC(mark5_state::lcd_data_w));
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map(0x4800, 0x4800).r(FUNC(mark5_state::sound_r));
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map(0x4c00, 0x4c00).r(FUNC(mark5_state::reset_irq_r));
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map(0x5000, 0x50ff).ram();
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map(0x8000, 0xffff).rom();
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}
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/******************************************************************************
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Input Ports
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******************************************************************************/
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static INPUT_PORTS_START( mark5 )
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PORT_START("IN.0")
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PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_1)
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PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_2)
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PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_3)
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PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_4)
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PORT_START("IN.1")
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PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_5)
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PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_6)
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PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_7)
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PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_8)
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INPUT_PORTS_END
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/******************************************************************************
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Machine Drivers
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******************************************************************************/
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void mark5_state::mark5(machine_config &config)
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{
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/* basic machine hardware */
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M6502(config, m_maincpu, 19.6608_MHz_XTAL / 10);
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m_maincpu->set_addrmap(AS_PROGRAM, &mark5_state::main_map);
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SENSORBOARD(config, m_board).set_type(sensorboard_device::MAGNETS);
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m_board->init_cb().set(m_board, FUNC(sensorboard_device::preset_chess));
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/* video hardware */
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HLCD0538(config, m_lcd[0]).write_cols().set(FUNC(mark5_state::lcd_output_w<0>));
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PWM_DISPLAY(config, m_display[0]).set_size(8, 26);
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m_display[0]->output_x().set(FUNC(mark5_state::pwm_output_w<0>));
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HLCD0539(config, m_lcd[1]).write_cols().set(FUNC(mark5_state::lcd_output_w<1>));
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PWM_DISPLAY(config, m_display[1]).set_size(8, 34);
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m_display[1]->output_x().set(FUNC(mark5_state::pwm_output_w<1>));
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HLCD0539(config, m_lcd[2]).write_cols().set(FUNC(mark5_state::lcd_output_w<2>));
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PWM_DISPLAY(config, m_display[2]).set_size(8, 34);
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m_display[2]->output_x().set(FUNC(mark5_state::pwm_output_w<2>));
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PWM_DISPLAY(config, m_display[3]).set_size(8, 8);
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//config.set_default_layout(layout_saitek_mark5);
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/* sound hardware */
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SPEAKER(config, "speaker").front_center();
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DAC_1BIT(config, m_dac).add_route(ALL_OUTPUTS, "speaker", 0.25);
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VOLTAGE_REGULATOR(config, "vref").add_route(0, "dac", 1.0, DAC_VREF_POS_INPUT);
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}
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/******************************************************************************
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ROM Definitions
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******************************************************************************/
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ROM_START( ccmk5 )
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ROM_REGION( 0x10000, "maincpu", 0 )
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ROM_LOAD("c47024_syp_2364-3-y51", 0x8000, 0x2000, CRC(c210f530) SHA1(60ba3809ed3054024508344f654a6846061fafd5) ) // 2364
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ROM_LOAD("c47025_syp_2364-3-y5a", 0xa000, 0x2000, CRC(3239c96b) SHA1(6a23713b30c48546d993a0de8998c8de9044e48c) ) // "
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ROM_LOAD("c47026_syp_2364-3-y5c", 0xc000, 0x2000, CRC(1754ccab) SHA1(d246b6aa2e2a1858dd6608a4dbf496778f79b22e) ) // "
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ROM_LOAD("c47027_syp_2364-3-y5d", 0xe000, 0x2000, CRC(7c0f7bd8) SHA1(68b4566f0501005f6b1739bb24a4bec990421a6f) ) // "
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ROM_END
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ROM_START( ccmk6 )
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ROM_REGION( 0x10000, "maincpu", 0 )
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ROM_LOAD("y6_80", 0x8000, 0x2000, CRC(8144dd71) SHA1(8d6fbb4aa9757149c81d2bf533085dc5203f0751) ) // 2764
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ROM_LOAD("y6_a0", 0xa000, 0x2000, CRC(dd77dd90) SHA1(844aee56e1941f05bdf046d95c5ae687707a2c95) ) // "
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ROM_LOAD("y6_c0", 0xc000, 0x2000, CRC(705e5718) SHA1(513bba3e7344194efaaf022a7934d32d8cba3cb5) ) // "
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ROM_LOAD("y6_e0", 0xe000, 0x2000, CRC(b92c3eb3) SHA1(99a20f5e971b8c4228e0eda0a4c05750d46b95f6) ) // "
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ROM_END
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} // anonymous namespace
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/******************************************************************************
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Drivers
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******************************************************************************/
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// YEAR NAME PARENT CMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS
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CONS( 1981, ccmk5, 0, 0, mark5, mark5, mark5_state, empty_init, "SciSys / Philidor Software", "Chess Champion: Mark V", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING )
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CONS( 1982, ccmk6, 0, 0, mark5, mark5, mark5_state, empty_init, "SciSys / Philidor Software", "Chess Champion: Mark VI/Philidor", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING )
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@ -34235,6 +34235,10 @@ cp2000 //
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@source:saitek_delta1.cpp
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ccdelta1 //
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@source:saitek_mark5.cpp
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ccmk5
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ccmk6
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@source:saitek_risc2500.cpp
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risc2500 //
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montreux //
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@ -709,6 +709,7 @@ saitek_chesstrv.cpp
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saitek_corona.cpp
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saitek_cp2000.cpp
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saitek_delta1.cpp
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saitek_mark5.cpp
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saitek_risc2500.cpp
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saitek_ssystem3.cpp
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saitek_stratos.cpp
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