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removed some legacy code (nw)

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smf- 2012-10-25 13:00:56 +00:00
parent 11445dd35b
commit 036fff9082
6 changed files with 48 additions and 33 deletions
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25
src/emu/cpu/psx/psx.c
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@ -1539,7 +1539,7 @@ static ADDRESS_MAP_START( psxcpu_internal_map, AS_PROGRAM, 32, psxcpu_device )
AM_RANGE(0x1f801080, 0x1f8010ff) AM_DEVREADWRITE( "dma", psxdma_device, read, write )
AM_RANGE(0x1f801100, 0x1f80112f) AM_DEVREADWRITE( "rcnt", psxrcnt_device, read, write )
/* 1f801800-1f801803 cd */
AM_RANGE(0x1f801810, 0x1f801817) AM_READWRITE_LEGACY( psx_gpu_r, psx_gpu_w )
AM_RANGE(0x1f801810, 0x1f801817) AM_READWRITE( gpu_r, gpu_w )
AM_RANGE(0x1f801820, 0x1f801827) AM_DEVREADWRITE( "mdec", psxmdec_device, read, write )
AM_RANGE(0x1f801c00, 0x1f801dff) AM_READWRITE16_LEGACY( spu_r, spu_w, 0xffffffff )
AM_RANGE(0x1f802020, 0x1f802033) AM_RAM /* ?? */
@ -1565,7 +1565,7 @@ static ADDRESS_MAP_START( cxd8661r_internal_map, AS_PROGRAM, 32, psxcpu_device )
AM_RANGE(0x1f801070, 0x1f801077) AM_DEVREADWRITE( "irq", psxirq_device, read, write )
AM_RANGE(0x1f801080, 0x1f8010ff) AM_DEVREADWRITE( "dma", psxdma_device, read, write )
AM_RANGE(0x1f801100, 0x1f80112f) AM_DEVREADWRITE( "rcnt", psxrcnt_device, read, write )
AM_RANGE(0x1f801810, 0x1f801817) AM_READWRITE_LEGACY( psx_gpu_r, psx_gpu_w )
AM_RANGE(0x1f801810, 0x1f801817) AM_READWRITE( gpu_r, gpu_w )
AM_RANGE(0x1f801820, 0x1f801827) AM_DEVREADWRITE( "mdec", psxmdec_device, read, write )
AM_RANGE(0x1f801c00, 0x1f801dff) AM_READWRITE16_LEGACY( spu_r, spu_w, 0xffffffff )
AM_RANGE(0x1f802020, 0x1f802033) AM_RAM /* ?? */
@ -1586,9 +1586,11 @@ ADDRESS_MAP_END
// psxcpu_device - constructor
//-------------------------------------------------
psxcpu_device::psxcpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal_map)
: cpu_device(mconfig, type, name, tag, owner, clock),
m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0, internal_map)
psxcpu_device::psxcpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal_map) :
cpu_device(mconfig, type, name, tag, owner, clock),
m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0, internal_map),
m_gpu_read_handler(*this),
m_gpu_write_handler(*this)
{
}
@ -1772,6 +1774,9 @@ void psxcpu_device::device_start()
// set our instruction counter
m_icountptr = &m_icount;
m_gpu_read_handler.resolve_safe(0);
m_gpu_write_handler.resolve_safe();
}
@ -3178,6 +3183,16 @@ void psxcpu_device::sio_input( device_t &device, const char *cputag, int n_port,
sio->input( n_port, n_mask, n_data );
}
READ32_HANDLER( psxcpu_device::gpu_r )
{
return m_gpu_read_handler( space, offset, mem_mask );
}
WRITE32_HANDLER( psxcpu_device::gpu_w )
{
m_gpu_write_handler( space, offset, data, mem_mask );
}
static MACHINE_CONFIG_FRAGMENT( psx )
MCFG_DEVICE_ADD("irq", PSX_IRQ, 0)
MCFG_DEVICE_ADD("dma", PSX_DMA, 0)

15
src/emu/cpu/psx/psx.h
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@ -110,6 +110,11 @@ enum
#define MCFG_PSX_DMA_CHANNEL_WRITE( cputag, channel, handler ) \
psxcpu_device::getcpu( *owner, cputag )->subdevice<psxdma_device>("dma")->install_write_handler( channel, handler );
#define MCFG_PSX_GPU_READ_HANDLER(_devcb) \
devcb = &psxcpu_device::set_gpu_read_handler(*device, DEVCB2_##_devcb); \
#define MCFG_PSX_GPU_WRITE_HANDLER(_devcb) \
devcb = &psxcpu_device::set_gpu_write_handler(*device, DEVCB2_##_devcb); \
//**************************************************************************
@ -124,12 +129,19 @@ public:
// construction/destruction
psxcpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// static configuration helpers
template<class _Object> static devcb2_base &set_gpu_read_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_gpu_read_handler.set_callback(object); }
template<class _Object> static devcb2_base &set_gpu_write_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_gpu_write_handler.set_callback(object); }
// public interfaces
DECLARE_WRITE32_MEMBER( biu_w );
DECLARE_READ32_MEMBER( biu_r );
DECLARE_WRITE32_MEMBER( berr_w );
DECLARE_READ32_MEMBER( berr_r );
DECLARE_WRITE32_MEMBER( gpu_w );
DECLARE_READ32_MEMBER( gpu_r );
static psxcpu_device *getcpu( device_t &device, const char *cputag );
static void install_sio_handler( device_t &device, const char *cputag, int n_port, psx_sio_handler p_f_sio_handler );
static void sio_input( device_t &device, const char *cputag, int n_port, int n_mask, int n_data );
@ -267,6 +279,9 @@ protected:
void setcp3cr( int reg, UINT32 value );
gte m_gte;
devcb2_read32 m_gpu_read_handler;
devcb2_write32 m_gpu_write_handler;
};
class cxd8530aq_device : public psxcpu_device

6
src/emu/video/psx.h
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@ -13,12 +13,18 @@
#include "emu.h"
#define MCFG_PSXGPU_ADD( cputag, tag, type, _vramSize, clock ) \
MCFG_DEVICE_MODIFY( cputag ) \
MCFG_PSX_GPU_READ_HANDLER(DEVREAD32(tag, psxgpu_device, read)) \
MCFG_PSX_GPU_WRITE_HANDLER(DEVWRITE32(tag, psxgpu_device, write)) \
MCFG_DEVICE_ADD( tag, type, clock ) \
((psxgpu_device *) device)->vramSize = _vramSize; \
MCFG_PSX_DMA_CHANNEL_READ( cputag, 2, psx_dma_write_delegate( FUNC( psxgpu_device::dma_read ), (psxgpu_device *) device ) ) \
MCFG_PSX_DMA_CHANNEL_WRITE( cputag, 2, psx_dma_read_delegate( FUNC( psxgpu_device::dma_write ), (psxgpu_device *) device ) )
#define MCFG_PSXGPU_REPLACE( cputag, tag, type, _vramSize, clock ) \
MCFG_DEVICE_MODIFY( cputag ) \
MCFG_PSX_GPU_READ_HANDLER(DEVREAD32(tag, psxgpu_device, read)) \
MCFG_PSX_GPU_WRITE_HANDLER(DEVWRITE32(tag, psxgpu_device, write)) \
MCFG_DEVICE_REPLACE( tag, type, clock ) \
((psxgpu_device *) device)->vramSize = _vramSize; \
MCFG_PSX_DMA_CHANNEL_READ( cputag, 2, psx_dma_write_delegate( FUNC( psxgpu_device::dma_read ), (psxgpu_device *) device ) ) \

10
src/mame/drivers/zn.c
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@ -32,9 +32,13 @@
class zn_state : public psx_state
{
public:
zn_state(const machine_config &mconfig, device_type type, const char *tag)
: psx_state(mconfig, type, tag) { }
zn_state(const machine_config &mconfig, device_type type, const char *tag) :
psx_state(mconfig, type, tag),
m_gpu(*this, "gpu")
{
}
required_device<psxgpu_device> m_gpu;
UINT32 m_n_znsecsel;
UINT32 m_b_znsecport;
int m_n_dip_bit;
@ -2134,7 +2138,7 @@ void jdredd_vblank(zn_state *state, screen_device &screen, bool vblank_state)
if( x > 0x393 && x < 0xcb2 &&
y > 0x02d && y < 0x217 )
{
psx_lightgun_set( state->machine(), x, y );
state->m_gpu->lightgun_set( x, y );
}
}
}

4
src/mame/includes/psx.h
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@ -31,10 +31,6 @@ extern void psx_irq_set( running_machine &, UINT32 );
extern void psx_sio_install_handler( running_machine &, int, psx_sio_handler );
extern void psx_sio_input( running_machine &, int, int, int );
DECLARE_READ32_HANDLER( psx_gpu_r );
DECLARE_WRITE32_HANDLER( psx_gpu_w );
extern void psx_lightgun_set( running_machine &, int, int );
// emu/video/psx.c
PALETTE_INIT( psx );
SCREEN_UPDATE_IND16( psx );

21
src/mame/machine/psx.c
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@ -67,24 +67,3 @@ void psx_sio_input( running_machine &machine, int n_port, int n_mask, int n_data
{
psxcpu_device::sio_input( *machine.device("maincpu^"), "maincpu", n_port, n_mask, n_data );
}
/* GPU */
READ32_HANDLER( psx_gpu_r )
{
psxgpu_device *gpu = downcast<psxgpu_device *>( space.machine().device("gpu") );
return gpu->read( space, offset, mem_mask );
}
WRITE32_HANDLER( psx_gpu_w )
{
psxgpu_device *gpu = downcast<psxgpu_device *>( space.machine().device("gpu") );
gpu->write( space, offset, data, mem_mask );
}
void psx_lightgun_set( running_machine &machine, int n_x, int n_y )
{
psxgpu_device *gpu = downcast<psxgpu_device *>( machine.device("gpu") );
gpu->lightgun_set( n_x, n_y );
}