hd63450: only halt cpu in max transfer rate mode

This commit is contained in:
cracyc 2023-09-08 16:21:45 -05:00
parent 07ca153ba9
commit 03cb340505

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@ -293,8 +293,9 @@ void hd63450_device::dma_transfer_start(int channel)
// Burst transfers will halt the CPU until the transfer is complete // Burst transfers will halt the CPU until the transfer is complete
// max rate transfer hold the bus // max rate transfer hold the bus
if (((m_reg[channel].dcr & 0xc0) == 0x00) || ((m_reg[channel].ocr & 3) == 1)) // Burst transfer if (((m_reg[channel].dcr & 0xc0) == 0x00)) // Burst transfer
{ {
if((m_reg[channel].ocr & 3) == 1) // TODO: proper cycle stealing
m_cpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); m_cpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
m_timer[channel]->adjust(attotime::zero, channel, m_burst_clock[channel]); m_timer[channel]->adjust(attotime::zero, channel, m_burst_clock[channel]);
} }