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Add preliminary support for big-endian SH-3/SH-4 CPUs. [R. Belmont]

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This commit is contained in:
R. Belmont 2011-08-25 02:31:31 +00:00
parent c3f0a5c6d3
commit 044df7903e
8 changed files with 42 additions and 12 deletions
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32
src/emu/cpu/sh4/sh4.c
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@ -3818,7 +3818,35 @@ CPU_GET_INFO( sh3 )
}
}
DEFINE_LEGACY_CPU_DEVICE(SH3, sh3);
DEFINE_LEGACY_CPU_DEVICE(SH4, sh4);
CPU_GET_INFO( sh3be )
{
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sh3); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case DEVINFO_STR_NAME: strcpy(info->s, "SH-3"); break;
case DEVINFO_STR_FAMILY: strcpy(info->s, "Hitachi SH7700"); break;
case DEVINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
default: CPU_GET_INFO_CALL(sh4); break;
}
}
CPU_GET_INFO( sh4be )
{
switch (state)
{
case DEVINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
default: CPU_GET_INFO_CALL(sh4); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(SH3LE, sh3);
DEFINE_LEGACY_CPU_DEVICE(SH3BE, sh3be);
DEFINE_LEGACY_CPU_DEVICE(SH4LE, sh4);
DEFINE_LEGACY_CPU_DEVICE(SH4BE, sh4be);
#endif // USE_SH4DRC

6
src/emu/cpu/sh4/sh4.h
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@ -99,8 +99,10 @@ struct sh4_ddt_dma
typedef void (*sh4_ftcsr_callback)(UINT32);
DECLARE_LEGACY_CPU_DEVICE(SH3, sh3);
DECLARE_LEGACY_CPU_DEVICE(SH4, sh4);
DECLARE_LEGACY_CPU_DEVICE(SH3LE, sh3);
DECLARE_LEGACY_CPU_DEVICE(SH3BE, sh3be);
DECLARE_LEGACY_CPU_DEVICE(SH4LE, sh4);
DECLARE_LEGACY_CPU_DEVICE(SH4BE, sh4be);
WRITE32_HANDLER( sh4_internal_w );
READ32_HANDLER( sh4_internal_r );

2
src/mame/drivers/alien.c
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@ -63,7 +63,7 @@ static MACHINE_RESET( alien )
static MACHINE_CONFIG_START( alien, alien_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", SH4, MASTER_CLOCK) /* 200MHz */
MCFG_CPU_ADD("maincpu", SH4LE, MASTER_CLOCK) /* 200MHz */
MCFG_CPU_PROGRAM_MAP(alien_map)
/* video hardware */

2
src/mame/drivers/aristmk6.c
View File

@ -127,7 +127,7 @@ static const struct sh4_config sh4cpu_config = { 1, 0, 1, 0, 0, 0, 1, 1,
static MACHINE_CONFIG_START( aristmk6, aristmk6_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", SH4, ARISTMK6_CPU_CLOCK)
MCFG_CPU_ADD("maincpu", SH4LE, ARISTMK6_CPU_CLOCK)
MCFG_CPU_CONFIG(sh4cpu_config)
MCFG_CPU_PROGRAM_MAP(aristmk6_map)
MCFG_CPU_IO_MAP(aristmk6_port)

4
src/mame/drivers/atvtrack.c
View File

@ -374,12 +374,12 @@ static const struct sh4_config sh4cpu_config = { 1, 0, 1, 0, 0, 0, 1, 1,
static MACHINE_CONFIG_START( atvtrack, atvtrack_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", SH4, ATV_CPU_CLOCK)
MCFG_CPU_ADD("maincpu", SH4LE, ATV_CPU_CLOCK)
MCFG_CPU_CONFIG(sh4cpu_config)
MCFG_CPU_PROGRAM_MAP(atvtrack_main_map)
MCFG_CPU_IO_MAP(atvtrack_main_port)
MCFG_CPU_ADD("subcpu", SH4, ATV_CPU_CLOCK)
MCFG_CPU_ADD("subcpu", SH4LE, ATV_CPU_CLOCK)
MCFG_CPU_CONFIG(sh4cpu_config)
MCFG_CPU_PROGRAM_MAP(atvtrack_sub_map)
MCFG_CPU_IO_MAP(atvtrack_sub_port)

2
src/mame/drivers/cavesh3.c
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@ -43,7 +43,7 @@ static const struct sh4_config sh4cpu_config = { 1, 0, 1, 0, 0, 0, 1, 1,
static MACHINE_CONFIG_START( cavesh3, cavesh3_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", SH3, CAVE_CPU_CLOCK)
MCFG_CPU_ADD("maincpu", SH3LE, CAVE_CPU_CLOCK)
MCFG_CPU_CONFIG(sh4cpu_config)
MCFG_CPU_PROGRAM_MAP(cavesh3_map)
MCFG_CPU_IO_MAP(cavesh3_port)

4
src/mame/drivers/hikaru.c
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@ -412,12 +412,12 @@ ADDRESS_MAP_END
static MACHINE_CONFIG_START( hikaru, driver_device )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", SH4, CPU_CLOCK)
MCFG_CPU_ADD("maincpu", SH4LE, CPU_CLOCK)
// MCFG_CPU_CONFIG(sh4cpu_config)
MCFG_CPU_PROGRAM_MAP(hikaru_map)
// MCFG_CPU_IO_MAP(hikaru_port)
// MCFG_CPU_VBLANK_INT("screen", hikaru,vblank)
MCFG_CPU_ADD("slave", SH4, CPU_CLOCK)
MCFG_CPU_ADD("slave", SH4LE, CPU_CLOCK)
MCFG_CPU_PROGRAM_MAP(hikaru_map_slave)
// MCFG_MACHINE_START( hikaru )

2
src/mame/drivers/naomi.c
View File

@ -2489,7 +2489,7 @@ static MACHINE_RESET( naomi )
static MACHINE_CONFIG_START( naomi_aw_base, driver_device )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", SH4, CPU_CLOCK) // SH4!!!
MCFG_CPU_ADD("maincpu", SH4LE, CPU_CLOCK) // SH4!!!
MCFG_CPU_CONFIG(sh4cpu_config)
MCFG_CPU_PROGRAM_MAP(naomi_map)
MCFG_CPU_IO_MAP(naomi_port)