Memory maps merges for the following drivers:

* lkage.c
* lsasquad.c
* lwings.c
* m62.c
* m90.c
* magmax.c
* mainevt.c
* marinedt.c
* markham.c
* mastboy.c
* matmania.c
* megadriv.c
* megazone.c

==============================================================================

There are currently 53 drivers with splitted memory maps as far as I know.
This commit is contained in:
Angelo Salese 2009-05-02 01:14:48 +00:00
parent 97d1735c71
commit 04604bd621
11 changed files with 433 additions and 690 deletions

View File

@ -47,7 +47,6 @@ Notes:
#include "driver.h"
#include "cpu/z80/z80.h"
#include "deprecat.h"
#include "lwings.h"
#include "sound/2203intf.h"
#include "sound/msm5205.h"
@ -268,105 +267,86 @@ static WRITE8_DEVICE_HANDLER( msm5205_w )
msm5205_vclk_w(device,0);
}
static ADDRESS_MAP_START( avengers_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(1))
AM_RANGE(0xc000, 0xf7ff) AM_READ(SMH_RAM)
AM_RANGE(0xf808, 0xf808) AM_READ_PORT("SERVICE")
AM_RANGE(0xf809, 0xf809) AM_READ_PORT("P1")
AM_RANGE(0xf80a, 0xf80a) AM_READ_PORT("P2")
AM_RANGE(0xf80b, 0xf80b) AM_READ_PORT("DSWB")
AM_RANGE(0xf80c, 0xf80c) AM_READ_PORT("DSWA")
AM_RANGE(0xf80d, 0xf80d) AM_READ(avengers_protection_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( avengers_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xddff) AM_WRITE(SMH_RAM)
AM_RANGE(0xde00, 0xdf7f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xdf80, 0xdfff) AM_WRITE(SMH_RAM)
AM_RANGE(0xe000, 0xe7ff) AM_WRITE(lwings_fgvideoram_w) AM_BASE(&lwings_fgvideoram)
AM_RANGE(0xe800, 0xefff) AM_WRITE(lwings_bg1videoram_w) AM_BASE(&lwings_bg1videoram)
AM_RANGE(0xf000, 0xf3ff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split2_w) AM_BASE(&paletteram_2)
AM_RANGE(0xf400, 0xf7ff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split1_w) AM_BASE(&paletteram)
static ADDRESS_MAP_START( avengers_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
AM_RANGE(0xc000, 0xddff) AM_RAM
AM_RANGE(0xde00, 0xdf7f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xdf80, 0xdfff) AM_RAM
AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(lwings_fgvideoram_w) AM_BASE(&lwings_fgvideoram)
AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(lwings_bg1videoram_w) AM_BASE(&lwings_bg1videoram)
AM_RANGE(0xf000, 0xf3ff) AM_RAM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split2_w) AM_BASE(&paletteram_2)
AM_RANGE(0xf400, 0xf7ff) AM_RAM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split1_w) AM_BASE(&paletteram)
AM_RANGE(0xf800, 0xf801) AM_WRITE(lwings_bg1_scrollx_w)
AM_RANGE(0xf802, 0xf803) AM_WRITE(lwings_bg1_scrolly_w)
AM_RANGE(0xf804, 0xf804) AM_WRITE(trojan_bg2_scrollx_w)
AM_RANGE(0xf805, 0xf805) AM_WRITE(trojan_bg2_image_w)
AM_RANGE(0xf808, 0xf808) AM_WRITENOP /* ? */
AM_RANGE(0xf809, 0xf809) AM_WRITE(avengers_protection_w)
AM_RANGE(0xf80c, 0xf80c) AM_WRITE(avengers_prot_bank_w)
AM_RANGE(0xf80d, 0xf80d) AM_WRITE(avengers_adpcm_w)
AM_RANGE(0xf808, 0xf808) AM_READ_PORT("SERVICE") AM_WRITENOP /* ? */
AM_RANGE(0xf809, 0xf809) AM_READ_PORT("P1") AM_WRITE(avengers_protection_w)
AM_RANGE(0xf80a, 0xf80a) AM_READ_PORT("P2")
AM_RANGE(0xf80b, 0xf80b) AM_READ_PORT("DSWB")
AM_RANGE(0xf80c, 0xf80c) AM_READ_PORT("DSWA") AM_WRITE(avengers_prot_bank_w)
AM_RANGE(0xf80d, 0xf80d) AM_READWRITE(avengers_protection_r,avengers_adpcm_w)
AM_RANGE(0xf80e, 0xf80e) AM_WRITE(lwings_bankswitch_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 ) /* common to trojan and lwings */
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(1))
AM_RANGE(0xc000, 0xf7ff) AM_READ(SMH_RAM)
static ADDRESS_MAP_START( lwings_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
AM_RANGE(0xc000, 0xddff) AM_RAM
AM_RANGE(0xde00, 0xdfff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(lwings_fgvideoram_w) AM_BASE(&lwings_fgvideoram)
AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(lwings_bg1videoram_w) AM_BASE(&lwings_bg1videoram)
AM_RANGE(0xf000, 0xf3ff) AM_RAM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split2_w) AM_BASE(&paletteram_2)
AM_RANGE(0xf400, 0xf7ff) AM_RAM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split1_w) AM_BASE(&paletteram)
AM_RANGE(0xf808, 0xf808) AM_READ_PORT("SERVICE")
AM_RANGE(0xf809, 0xf809) AM_READ_PORT("P1") AM_WRITE(lwings_bg1_scrollx_w)
AM_RANGE(0xf80a, 0xf80a) AM_READ_PORT("P2")
AM_RANGE(0xf80b, 0xf80b) AM_READ_PORT("DSWA") AM_WRITE(lwings_bg1_scrolly_w)
AM_RANGE(0xf80c, 0xf80c) AM_READ_PORT("DSWB") AM_WRITE(soundlatch_w)
AM_RANGE(0xf80d, 0xf80d) AM_WRITE(watchdog_reset_w)
AM_RANGE(0xf80e, 0xf80e) AM_WRITE(lwings_bankswitch_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( trojan_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
AM_RANGE(0xc000, 0xddff) AM_RAM
AM_RANGE(0xde00, 0xdf7f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xdf80, 0xdfff) AM_RAM
AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(lwings_fgvideoram_w) AM_BASE(&lwings_fgvideoram)
AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(lwings_bg1videoram_w) AM_BASE(&lwings_bg1videoram)
AM_RANGE(0xf000, 0xf3ff) AM_RAM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split2_w) AM_BASE(&paletteram_2)
AM_RANGE(0xf400, 0xf7ff) AM_RAM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split1_w) AM_BASE(&paletteram)
AM_RANGE(0xf800, 0xf801) AM_WRITE(lwings_bg1_scrollx_w)
AM_RANGE(0xf802, 0xf803) AM_WRITE(lwings_bg1_scrolly_w)
AM_RANGE(0xf804, 0xf804) AM_WRITE(trojan_bg2_scrollx_w)
AM_RANGE(0xf805, 0xf805) AM_WRITE(trojan_bg2_image_w)
AM_RANGE(0xf808, 0xf808) AM_READ_PORT("SERVICE")
AM_RANGE(0xf809, 0xf809) AM_READ_PORT("P1")
AM_RANGE(0xf80a, 0xf80a) AM_READ_PORT("P2")
AM_RANGE(0xf80b, 0xf80b) AM_READ_PORT("DSWA")
AM_RANGE(0xf80c, 0xf80c) AM_READ_PORT("DSWB")
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 ) /* lwings */
AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xddff) AM_WRITE(SMH_RAM)
AM_RANGE(0xde00, 0xdfff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xe000, 0xe7ff) AM_WRITE(lwings_fgvideoram_w) AM_BASE(&lwings_fgvideoram)
AM_RANGE(0xe800, 0xefff) AM_WRITE(lwings_bg1videoram_w) AM_BASE(&lwings_bg1videoram)
AM_RANGE(0xf000, 0xf3ff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split2_w) AM_BASE(&paletteram_2)
AM_RANGE(0xf400, 0xf7ff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split1_w) AM_BASE(&paletteram)
AM_RANGE(0xf808, 0xf809) AM_WRITE(lwings_bg1_scrollx_w)
AM_RANGE(0xf80a, 0xf80b) AM_WRITE(lwings_bg1_scrolly_w)
AM_RANGE(0xf80c, 0xf80c) AM_WRITE(soundlatch_w)
AM_RANGE(0xf80c, 0xf80c) AM_READ_PORT("DSWB") AM_WRITE(soundlatch_w)
AM_RANGE(0xf80d, 0xf80d) AM_WRITE(watchdog_reset_w)
AM_RANGE(0xf80e, 0xf80e) AM_WRITE(lwings_bankswitch_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( trojan_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xddff) AM_WRITE(SMH_RAM)
AM_RANGE(0xde00, 0xdf7f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xdf80, 0xdfff) AM_WRITE(SMH_RAM)
AM_RANGE(0xe000, 0xe7ff) AM_WRITE(lwings_fgvideoram_w) AM_BASE(&lwings_fgvideoram)
AM_RANGE(0xe800, 0xefff) AM_WRITE(lwings_bg1videoram_w) AM_BASE(&lwings_bg1videoram)
AM_RANGE(0xf000, 0xf3ff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split2_w) AM_BASE(&paletteram_2)
AM_RANGE(0xf400, 0xf7ff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split1_w) AM_BASE(&paletteram)
AM_RANGE(0xf800, 0xf801) AM_WRITE(lwings_bg1_scrollx_w)
AM_RANGE(0xf802, 0xf803) AM_WRITE(lwings_bg1_scrolly_w)
AM_RANGE(0xf804, 0xf804) AM_WRITE(trojan_bg2_scrollx_w)
AM_RANGE(0xf805, 0xf805) AM_WRITE(trojan_bg2_image_w)
AM_RANGE(0xf80c, 0xf80c) AM_WRITE(soundlatch_w)
AM_RANGE(0xf80d, 0xf80d) AM_WRITE(watchdog_reset_w)
AM_RANGE(0xf80e, 0xf80e) AM_WRITE(lwings_bankswitch_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
static ADDRESS_MAP_START( lwings_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0xc000, 0xc7ff) AM_RAM
AM_RANGE(0xc800, 0xc800) AM_READ(soundlatch_r)
AM_RANGE(0xe006, 0xe006) AM_READ(avengers_soundlatch2_r) //AT: (avengers061gre)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
AM_RANGE(0xe000, 0xe001) AM_DEVWRITE("2203a", ym2203_w)
AM_RANGE(0xe002, 0xe003) AM_DEVWRITE("2203b", ym2203_w)
AM_RANGE(0xe006, 0xe006) AM_WRITE(SMH_RAM) AM_BASE(&avengers_soundlatch2)
ADDRESS_MAP_END
static ADDRESS_MAP_START( adpcm_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xffff) AM_READ(SMH_ROM)
AM_RANGE(0xe006, 0xe006) AM_READ(avengers_soundlatch2_r) //AT: (avengers061gre)
AM_RANGE(0xe006, 0xe006) AM_WRITEONLY AM_BASE(&avengers_soundlatch2)
ADDRESS_MAP_END
/* Yes, _no_ ram */
static ADDRESS_MAP_START( adpcm_writemem, ADDRESS_SPACE_PROGRAM, 8 )
/* AM_RANGE(0x0000, 0xffff) AM_WRITE(SMH_ROM) avoid cluttering up error.log */
AM_RANGE(0x0000, 0xffff) AM_WRITENOP
static ADDRESS_MAP_START( trojan_adpcm_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xffff) AM_ROM AM_WRITENOP
ADDRESS_MAP_END
static ADDRESS_MAP_START( avengers_adpcm_io_map, ADDRESS_SPACE_IO, 8 )
@ -375,7 +355,7 @@ static ADDRESS_MAP_START( avengers_adpcm_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x01, 0x01) AM_DEVWRITE("5205", msm5205_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( adpcm_io_map, ADDRESS_SPACE_IO, 8 )
static ADDRESS_MAP_START( trojan_adpcm_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READ(soundlatch_r)
AM_RANGE(0x01, 0x01) AM_DEVWRITE("5205", msm5205_w)
@ -754,12 +734,12 @@ static MACHINE_DRIVER_START( lwings )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", Z80, 6000000) /* 4 MHz (?) */
MDRV_CPU_PROGRAM_MAP(readmem,writemem)
MDRV_CPU_PROGRAM_MAP(lwings_map,0)
MDRV_CPU_VBLANK_INT("screen", lwings_interrupt)
MDRV_CPU_ADD("soundcpu", Z80, 4000000)
MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,4)
MDRV_CPU_PROGRAM_MAP(lwings_sound_map,0)
MDRV_CPU_PERIODIC_INT(irq0_line_hold,4*60) /* ??? */
/* video hardware */
MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
@ -798,11 +778,11 @@ static MACHINE_DRIVER_START( trojan )
MDRV_IMPORT_FROM( lwings )
MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_PROGRAM_MAP(readmem,trojan_writemem)
MDRV_CPU_PROGRAM_MAP(trojan_map,0)
MDRV_CPU_ADD("adpcm", Z80, 4000000) // 3.579545 Mhz (?)
MDRV_CPU_PROGRAM_MAP(adpcm_readmem,adpcm_writemem)
MDRV_CPU_IO_MAP(adpcm_io_map,0)
MDRV_CPU_PROGRAM_MAP(trojan_adpcm_map,0)
MDRV_CPU_IO_MAP(trojan_adpcm_io_map,0)
MDRV_CPU_PERIODIC_INT(irq0_line_hold, 4000)
/* video hardware */
@ -821,7 +801,7 @@ static MACHINE_DRIVER_START( avengers )
MDRV_IMPORT_FROM( trojan )
MDRV_CPU_MODIFY("maincpu") //AT: (avengers37b16gre)
MDRV_CPU_PROGRAM_MAP(avengers_readmem,avengers_writemem)
MDRV_CPU_PROGRAM_MAP(avengers_map,0)
MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse) // RST 38h triggered by software
MDRV_CPU_MODIFY("adpcm")

View File

@ -170,188 +170,139 @@ static WRITE8_HANDLER( youjyudn_bankswitch_w )
}
static ADDRESS_MAP_START( kungfum_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0xd000, 0xefff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( kungfum_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
static ADDRESS_MAP_START( kungfum_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0xa000, 0xa000) AM_WRITE(m62_hscroll_low_w)
AM_RANGE(0xb000, 0xb000) AM_WRITE(m62_hscroll_high_w)
AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
/* Kung Fu Master is the only game in this driver to have separated (but */
/* contiguous) videoram and colorram. They are interleaved in all the others. */
AM_RANGE(0xd000, 0xdfff) AM_WRITE(kungfum_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(kungfum_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( kungfum_readport, ADDRESS_SPACE_IO, 8 )
static ADDRESS_MAP_START( kungfum_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM")
AM_RANGE(0x01, 0x01) AM_READ_PORT("P1")
AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM") AM_WRITE(irem_sound_cmd_w)
AM_RANGE(0x01, 0x01) AM_READ_PORT("P1") AM_WRITE(m62_flipscreen_w) /* + coin counters */
AM_RANGE(0x02, 0x02) AM_READ_PORT("P2")
AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1")
AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2")
ADDRESS_MAP_END
static ADDRESS_MAP_START( kungfum_writeport, ADDRESS_SPACE_IO, 8 )
static ADDRESS_MAP_START( battroad_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0xa000, 0xbfff) AM_ROMBANK(1)
AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( battroad_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(irem_sound_cmd_w)
AM_RANGE(0x01, 0x01) AM_WRITE(m62_flipscreen_w) /* + coin counters */
ADDRESS_MAP_END
static ADDRESS_MAP_START( battroad_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0xa000, 0xbfff) AM_READ(SMH_BANK(1))
AM_RANGE(0xc800, 0xefff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( battroad_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xc800, 0xcfff) AM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
AM_RANGE(0xd000, 0xdfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( battroad_writeport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(irem_sound_cmd_w)
AM_RANGE(0x01, 0x01) AM_WRITE(m62_flipscreen_w) /* + coin counters */
AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM") AM_WRITE(irem_sound_cmd_w)
AM_RANGE(0x01, 0x01) AM_READ_PORT("P1") AM_WRITE(m62_flipscreen_w) /* + coin counters */
AM_RANGE(0x02, 0x02) AM_READ_PORT("P2")
AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1")
AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2")
AM_RANGE(0x80, 0x80) AM_WRITE(m62_vscroll_low_w)
AM_RANGE(0x81, 0x81) AM_WRITE(m62_hscroll_high_w)
AM_RANGE(0x82, 0x82) AM_WRITE(m62_hscroll_low_w)
AM_RANGE(0x83, 0x83) AM_WRITE(battroad_bankswitch_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( ldrun_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0xd000, 0xefff) AM_READ(SMH_RAM)
static ADDRESS_MAP_START( ldrun_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( ldrun_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xd000, 0xdfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
static ADDRESS_MAP_START( ldrun2_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(1)
AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( ldrun2_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_BANK(1))
AM_RANGE(0xd000, 0xefff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( ldrun2_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x9fff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xd000, 0xdfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( ldrun2_readport, ADDRESS_SPACE_IO, 8 )
static ADDRESS_MAP_START( ldrun2_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM")
AM_RANGE(0x01, 0x01) AM_READ_PORT("P1")
AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM") AM_WRITE(irem_sound_cmd_w)
AM_RANGE(0x01, 0x01) AM_READ_PORT("P1") AM_WRITE(m62_flipscreen_w) /* + coin counters */
AM_RANGE(0x02, 0x02) AM_READ_PORT("P2")
AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1")
AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2")
AM_RANGE(0x80, 0x80) AM_READ(ldrun2_bankswitch_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( ldrun2_writeport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(irem_sound_cmd_w)
AM_RANGE(0x01, 0x01) AM_WRITE(m62_flipscreen_w) /* + coin counters */
AM_RANGE(0x80, 0x81) AM_WRITE(ldrun2_bankswitch_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( ldrun3_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
static ADDRESS_MAP_START( ldrun3_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_ROM
AM_RANGE(0xc800, 0xc800) AM_READ(ldrun3_prot_5_r)
AM_RANGE(0xcc00, 0xcc00) AM_READ(ldrun3_prot_7_r)
AM_RANGE(0xcfff, 0xcfff) AM_READ(ldrun3_prot_7_r)
AM_RANGE(0xd000, 0xefff) AM_READ(SMH_RAM)
AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xd000, 0xefff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( ldrun3_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xd000, 0xdfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( ldrun3_writeport, ADDRESS_SPACE_IO, 8 )
static ADDRESS_MAP_START( ldrun3_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(irem_sound_cmd_w)
AM_RANGE(0x01, 0x01) AM_WRITE(m62_flipscreen_w) /* + coin counters */
AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM") AM_WRITE(irem_sound_cmd_w)
AM_RANGE(0x01, 0x01) AM_READ_PORT("P1") AM_WRITE(m62_flipscreen_w) /* + coin counters */
AM_RANGE(0x02, 0x02) AM_READ_PORT("P2")
AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1")
AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2")
AM_RANGE(0x80, 0x80) AM_WRITE(m62_vscroll_low_w)
AM_RANGE(0x81, 0x81) AM_WRITE(ldrun3_topbottom_mask_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( ldrun4_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(1))
AM_RANGE(0xd000, 0xefff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( ldrun4_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
static ADDRESS_MAP_START( ldrun4_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xc800, 0xc800) AM_WRITE(ldrun4_bankswitch_w)
AM_RANGE(0xd000, 0xdfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( ldrun4_writeport, ADDRESS_SPACE_IO, 8 )
static ADDRESS_MAP_START( ldrun4_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(irem_sound_cmd_w)
AM_RANGE(0x01, 0x01) AM_WRITE(m62_flipscreen_w) /* + coin counters */
AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM") AM_WRITE(irem_sound_cmd_w)
AM_RANGE(0x01, 0x01) AM_READ_PORT("P1") AM_WRITE(m62_flipscreen_w) /* + coin counters */
AM_RANGE(0x02, 0x02) AM_READ_PORT("P2")
AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1")
AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2")
AM_RANGE(0x82, 0x82) AM_WRITE(m62_hscroll_high_w)
AM_RANGE(0x83, 0x83) AM_WRITE(m62_hscroll_low_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( lotlot_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0xa000, 0xafff) AM_READ(SMH_RAM)
AM_RANGE(0xd000, 0xefff) AM_READ(SMH_RAM)
static ADDRESS_MAP_START( lotlot_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0xa000, 0xafff) AM_RAM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( lotlot_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0xa000, 0xafff) AM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xd000, 0xdfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
static ADDRESS_MAP_START( kidniki_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(1)
AM_RANGE(0xa000, 0xafff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
AM_RANGE(0xe000, 0xefff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( kidniki_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_BANK(1))
AM_RANGE(0xa000, 0xafff) AM_READ(SMH_RAM)
AM_RANGE(0xd000, 0xefff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( kidniki_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x9fff) AM_WRITE(SMH_ROM)
AM_RANGE(0xa000, 0xafff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xd000, 0xdfff) AM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( kidniki_writeport, ADDRESS_SPACE_IO, 8 )
static ADDRESS_MAP_START( kidniki_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(irem_sound_cmd_w)
AM_RANGE(0x01, 0x01) AM_WRITE(m62_flipscreen_w) /* + coin counters */
AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM") AM_WRITE(irem_sound_cmd_w)
AM_RANGE(0x01, 0x01) AM_READ_PORT("P1") AM_WRITE(m62_flipscreen_w) /* + coin counters */
AM_RANGE(0x02, 0x02) AM_READ_PORT("P2")
AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1")
AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2")
AM_RANGE(0x80, 0x80) AM_WRITE(m62_hscroll_low_w)
AM_RANGE(0x81, 0x81) AM_WRITE(m62_hscroll_high_w)
AM_RANGE(0x82, 0x82) AM_WRITE(kidniki_text_vscroll_low_w)
@ -360,92 +311,62 @@ static ADDRESS_MAP_START( kidniki_writeport, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x85, 0x85) AM_WRITE(kidniki_bankswitch_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( spelunkr_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_BANK(1))
AM_RANGE(0xa000, 0xbfff) AM_READ(SMH_RAM)
AM_RANGE(0xc800, 0xcfff) AM_READ(SMH_RAM)
AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( spelunkr_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x9fff) AM_WRITE(SMH_ROM)
AM_RANGE(0xa000, 0xbfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xc800, 0xcfff) AM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
static ADDRESS_MAP_START( spelunkr_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(1)
AM_RANGE(0xa000, 0xbfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
AM_RANGE(0xd000, 0xd000) AM_WRITE(m62_vscroll_low_w)
AM_RANGE(0xd001, 0xd001) AM_WRITE(m62_vscroll_high_w)
AM_RANGE(0xd002, 0xd002) AM_WRITE(m62_hscroll_low_w)
AM_RANGE(0xd003, 0xd003) AM_WRITE(m62_hscroll_high_w)
AM_RANGE(0xd004, 0xd004) AM_WRITE(spelunkr_bankswitch_w)
AM_RANGE(0xd005, 0xd005) AM_WRITE(spelunkr_palbank_w)
AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
AM_RANGE(0xe000, 0xefff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( spelunk2_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x8fff) AM_READ(SMH_BANK(1))
AM_RANGE(0x9000, 0x9fff) AM_READ(SMH_BANK(2))
AM_RANGE(0xa000, 0xbfff) AM_READ(SMH_RAM)
AM_RANGE(0xc800, 0xcfff) AM_READ(SMH_RAM)
AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( spelunk2_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x9fff) AM_WRITE(SMH_ROM)
AM_RANGE(0xa000, 0xbfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xc800, 0xcfff) AM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
static ADDRESS_MAP_START( spelunk2_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x8fff) AM_ROMBANK(1)
AM_RANGE(0x9000, 0x9fff) AM_ROMBANK(2)
AM_RANGE(0xa000, 0xbfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
AM_RANGE(0xd000, 0xd000) AM_WRITE(m62_vscroll_low_w)
AM_RANGE(0xd001, 0xd001) AM_WRITE(m62_hscroll_low_w)
AM_RANGE(0xd002, 0xd002) AM_WRITE(spelunk2_gfxport_w)
AM_RANGE(0xd003, 0xd003) AM_WRITE(spelunk2_bankswitch_w)
AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
AM_RANGE(0xe000, 0xefff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( youjyudn_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(1))
AM_RANGE(0xc800, 0xcfff) AM_READ(SMH_RAM)
AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)
static ADDRESS_MAP_START( youjyudn_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( youjyudn_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xc800, 0xcfff) AM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
AM_RANGE(0xd000, 0xd7ff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( youjyudn_writeport, ADDRESS_SPACE_IO, 8 )
static ADDRESS_MAP_START( youjyudn_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(irem_sound_cmd_w)
AM_RANGE(0x01, 0x01) AM_WRITE(m62_flipscreen_w) /* + coin counters */
AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM") AM_WRITE(irem_sound_cmd_w)
AM_RANGE(0x01, 0x01) AM_READ_PORT("P1") AM_WRITE(m62_flipscreen_w) /* + coin counters */
AM_RANGE(0x02, 0x02) AM_READ_PORT("P2")
AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1")
AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2")
AM_RANGE(0x80, 0x80) AM_WRITE(m62_hscroll_high_w)
AM_RANGE(0x81, 0x81) AM_WRITE(m62_hscroll_low_w)
AM_RANGE(0x83, 0x83) AM_WRITE(youjyudn_bankswitch_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( horizon_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
AM_RANGE(0xc000, 0xc1ff) AM_READ(SMH_RAM)
AM_RANGE(0xc800, 0xc83f) AM_READ(SMH_RAM)
AM_RANGE(0xd000, 0xdfff) AM_READ(SMH_RAM)
AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( horizon_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xc1ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xc800, 0xc83f) AM_WRITE(horizon_scrollram_w) AM_BASE(&horizon_scrollram)
AM_RANGE(0xd000, 0xdfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
static ADDRESS_MAP_START( horizon_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_ROM
AM_RANGE(0xc000, 0xc1ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xc800, 0xc83f) AM_RAM_WRITE(horizon_scrollram_w) AM_BASE(&horizon_scrollram)
AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
AM_RANGE(0xe000, 0xefff) AM_RAM
ADDRESS_MAP_END
@ -1013,8 +934,8 @@ static MACHINE_DRIVER_START( ldrun )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", Z80, 24000000/6)
MDRV_CPU_PROGRAM_MAP(ldrun_readmem,ldrun_writemem)
MDRV_CPU_IO_MAP(kungfum_readport,kungfum_writeport)
MDRV_CPU_PROGRAM_MAP(ldrun_map,0)
MDRV_CPU_IO_MAP(kungfum_io_map,0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
/* video hardware */
@ -1042,8 +963,8 @@ static MACHINE_DRIVER_START( kungfum )
/* basic machine hardware */
MDRV_IMPORT_FROM(ldrun)
MDRV_CPU_REPLACE("maincpu", Z80, 18432000/6)
MDRV_CPU_PROGRAM_MAP(kungfum_readmem,kungfum_writemem)
MDRV_CPU_IO_MAP(kungfum_readport,kungfum_writeport)
MDRV_CPU_PROGRAM_MAP(kungfum_map,0)
MDRV_CPU_IO_MAP(kungfum_io_map,0)
/* video hardware */
MDRV_SCREEN_MODIFY("screen")
@ -1059,8 +980,8 @@ static MACHINE_DRIVER_START( battroad )
/* basic machine hardware */
MDRV_IMPORT_FROM(ldrun)
MDRV_CPU_REPLACE("maincpu", Z80, 18432000/6)
MDRV_CPU_PROGRAM_MAP(battroad_readmem,battroad_writemem)
MDRV_CPU_IO_MAP(kungfum_readport,battroad_writeport)
MDRV_CPU_PROGRAM_MAP(battroad_map,0)
MDRV_CPU_IO_MAP(battroad_io_map,0)
/* video hardware */
MDRV_SCREEN_MODIFY("screen")
@ -1079,8 +1000,8 @@ static MACHINE_DRIVER_START( ldrun2 )
/* basic machine hardware */
MDRV_IMPORT_FROM(ldrun)
MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_PROGRAM_MAP(ldrun2_readmem,ldrun2_writemem)
MDRV_CPU_IO_MAP(ldrun2_readport,ldrun2_writeport)
MDRV_CPU_PROGRAM_MAP(ldrun2_map,0)
MDRV_CPU_IO_MAP(ldrun2_io_map,0)
MDRV_VIDEO_START(ldrun2)
MDRV_VIDEO_UPDATE(ldrun)
@ -1092,8 +1013,8 @@ static MACHINE_DRIVER_START( ldrun3 )
/* basic machine hardware */
MDRV_IMPORT_FROM(ldrun)
MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_PROGRAM_MAP(ldrun3_readmem,ldrun3_writemem)
MDRV_CPU_IO_MAP(kungfum_readport,ldrun3_writeport)
MDRV_CPU_PROGRAM_MAP(ldrun3_map,0)
MDRV_CPU_IO_MAP(ldrun3_io_map,0)
/* video hardware */
MDRV_GFXDECODE(ldrun3)
@ -1107,8 +1028,8 @@ static MACHINE_DRIVER_START( ldrun4 )
/* basic machine hardware */
MDRV_IMPORT_FROM(ldrun)
MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_PROGRAM_MAP(ldrun4_readmem,ldrun4_writemem)
MDRV_CPU_IO_MAP(kungfum_readport,ldrun4_writeport)
MDRV_CPU_PROGRAM_MAP(ldrun4_map,0)
MDRV_CPU_IO_MAP(ldrun4_io_map,0)
/* video hardware */
MDRV_GFXDECODE(ldrun3)
@ -1122,7 +1043,7 @@ static MACHINE_DRIVER_START( lotlot )
/* basic machine hardware */
MDRV_IMPORT_FROM(ldrun)
MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_PROGRAM_MAP(lotlot_readmem,lotlot_writemem)
MDRV_CPU_PROGRAM_MAP(lotlot_map,0)
/* video hardware */
MDRV_GFXDECODE(lotlot)
@ -1139,8 +1060,8 @@ static MACHINE_DRIVER_START( kidniki )
/* basic machine hardware */
MDRV_IMPORT_FROM(ldrun)
MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_PROGRAM_MAP(kidniki_readmem,kidniki_writemem)
MDRV_CPU_IO_MAP(kungfum_readport,kidniki_writeport)
MDRV_CPU_PROGRAM_MAP(kidniki_map,0)
MDRV_CPU_IO_MAP(kidniki_io_map,0)
/* video hardware */
MDRV_GFXDECODE(kidniki)
@ -1155,7 +1076,7 @@ static MACHINE_DRIVER_START( spelunkr )
/* basic machine hardware */
MDRV_IMPORT_FROM(ldrun)
MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_PROGRAM_MAP(spelunkr_readmem,spelunkr_writemem)
MDRV_CPU_PROGRAM_MAP(spelunkr_map,0)
/* video hardware */
MDRV_GFXDECODE(spelunkr)
@ -1170,7 +1091,7 @@ static MACHINE_DRIVER_START( spelunk2 )
/* basic machine hardware */
MDRV_IMPORT_FROM(ldrun)
MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_PROGRAM_MAP(spelunk2_readmem,spelunk2_writemem)
MDRV_CPU_PROGRAM_MAP(spelunk2_map,0)
/* video hardware */
MDRV_GFXDECODE(spelunk2)
@ -1187,8 +1108,8 @@ static MACHINE_DRIVER_START( youjyudn )
/* basic machine hardware */
MDRV_IMPORT_FROM(ldrun)
MDRV_CPU_REPLACE("maincpu", Z80, 18432000/6)
MDRV_CPU_PROGRAM_MAP(youjyudn_readmem,youjyudn_writemem)
MDRV_CPU_IO_MAP(kungfum_readport,youjyudn_writeport)
MDRV_CPU_PROGRAM_MAP(youjyudn_map,0)
MDRV_CPU_IO_MAP(youjyudn_io_map,0)
/* video hardware */
MDRV_SCREEN_MODIFY("screen")
@ -1205,7 +1126,7 @@ static MACHINE_DRIVER_START( horizon )
/* basic machine hardware */
MDRV_IMPORT_FROM(ldrun)
MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_PROGRAM_MAP(horizon_readmem,horizon_writemem)
MDRV_CPU_PROGRAM_MAP(horizon_map,0)
/* video hardware */
MDRV_SCREEN_MODIFY("screen")

View File

@ -90,7 +90,7 @@ static WRITE16_HANDLER( unknown_w )
/***************************************************************************/
static ADDRESS_MAP_START( main_cpu, ADDRESS_SPACE_PROGRAM, 16 )
static ADDRESS_MAP_START( m90_main_cpu_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x00000, 0x7ffff) AM_ROM
AM_RANGE(0x80000, 0x8ffff) AM_ROMBANK(1) /* Quiz F1 only */
AM_RANGE(0xa0000, 0xa3fff) AM_RAM
@ -99,7 +99,7 @@ static ADDRESS_MAP_START( main_cpu, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xffff0, 0xfffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( dynablsb_main_cpu, ADDRESS_SPACE_PROGRAM, 16 )
static ADDRESS_MAP_START( dynablsb_main_cpu_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x00000, 0x3ffff) AM_ROM
AM_RANGE(0x6000e, 0x60fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0xa0000, 0xa3fff) AM_RAM
@ -108,7 +108,7 @@ static ADDRESS_MAP_START( dynablsb_main_cpu, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xffff0, 0xfffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( bomblord_main_cpu, ADDRESS_SPACE_PROGRAM, 16 )
static ADDRESS_MAP_START( bomblord_main_cpu_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x00000, 0x7ffff) AM_ROM
AM_RANGE(0xa0000, 0xa3fff) AM_RAM
AM_RANGE(0xc000e, 0xc0fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
@ -117,7 +117,7 @@ static ADDRESS_MAP_START( bomblord_main_cpu, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xffff0, 0xfffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( main_cpu_io_map, ADDRESS_SPACE_IO, 16 )
static ADDRESS_MAP_START( m90_main_cpu_io_map, ADDRESS_SPACE_IO, 16 )
AM_RANGE(0x00, 0x01) AM_WRITE(m72_sound_command_w)
AM_RANGE(0x00, 0x01) AM_READ_PORT("P1_P2")
AM_RANGE(0x02, 0x03) AM_WRITE(m90_coincounter_w)
@ -128,7 +128,7 @@ static ADDRESS_MAP_START( main_cpu_io_map, ADDRESS_SPACE_IO, 16 )
AM_RANGE(0x80, 0x8f) AM_WRITE(m90_video_control_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( dynablsb_cpu_io, ADDRESS_SPACE_IO, 16 )
static ADDRESS_MAP_START( dynablsb_cpu_io_map, ADDRESS_SPACE_IO, 16 )
AM_RANGE(0x00, 0x01) AM_WRITE(m72_sound_command_w)
AM_RANGE(0x00, 0x01) AM_READ_PORT("P1_P2")
AM_RANGE(0x02, 0x03) AM_WRITE(m90_coincounter_w)
@ -142,17 +142,12 @@ ADDRESS_MAP_END
/*****************************************************************************/
static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
AM_RANGE(0xf000, 0xffff) AM_READ(SMH_RAM)
static ADDRESS_MAP_START( m90_sound_cpu_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xefff) AM_ROM
AM_RANGE(0xf000, 0xffff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
static ADDRESS_MAP_START( m90_sound_cpu_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
AM_RANGE(0x80, 0x80) AM_READ(soundlatch_r)
@ -705,13 +700,13 @@ static INTERRUPT_GEN( bomblord_interrupt )
static MACHINE_DRIVER_START( m90 )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", V30,XTAL_32MHz/2/2) /* verified clock on cpu is 16Mhz but probably divided internally by 2 */
MDRV_CPU_PROGRAM_MAP(main_cpu,0)
MDRV_CPU_IO_MAP(main_cpu_io_map,0)
MDRV_CPU_PROGRAM_MAP(m90_main_cpu_map,0)
MDRV_CPU_IO_MAP(m90_main_cpu_io_map,0)
MDRV_CPU_VBLANK_INT("screen", m90_interrupt)
MDRV_CPU_ADD("soundcpu", Z80, XTAL_3_579545MHz) /* verified on pcb */
MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
MDRV_CPU_IO_MAP(sound_io_map,0)
MDRV_CPU_PROGRAM_MAP(m90_sound_cpu_map,0)
MDRV_CPU_IO_MAP(m90_sound_cpu_io_map,0)
MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128) /* clocked by V1? (Vigilante) */
/* IRQs are generated by main Z80 and YM2151 */
@ -786,14 +781,13 @@ static MACHINE_DRIVER_START( bombrman )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", V30,XTAL_32MHz/2/2) /* verified clock on cpu is 16Mhz but probably divided internally by 2 */
MDRV_CPU_CONFIG(bomberman_config)
MDRV_CPU_PROGRAM_MAP(main_cpu,0)
MDRV_CPU_IO_MAP(main_cpu_io_map,0)
MDRV_CPU_PROGRAM_MAP(m90_main_cpu_map,0)
MDRV_CPU_IO_MAP(m90_main_cpu_io_map,0)
MDRV_CPU_VBLANK_INT("screen", m90_interrupt)
MDRV_CPU_ADD("soundcpu", Z80, XTAL_3_579545MHz) /* verified on pcb */
MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
MDRV_CPU_IO_MAP(sound_io_map,0)
MDRV_CPU_PROGRAM_MAP(m90_sound_cpu_map,0)
MDRV_CPU_IO_MAP(m90_sound_cpu_io_map,0)
MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128) /* clocked by V1? (Vigilante) */
/* IRQs are generated by main Z80 and YM2151 */
MDRV_MACHINE_RESET(m72_sound)
@ -831,13 +825,12 @@ static MACHINE_DRIVER_START( bbmanw )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", V30,XTAL_32MHz/2/2) /* verified clock on cpu is 16Mhz but probably divided internally by 2 */
MDRV_CPU_CONFIG(dynablaster_config)
MDRV_CPU_PROGRAM_MAP(main_cpu,0)
MDRV_CPU_IO_MAP(main_cpu_io_map,0)
MDRV_CPU_PROGRAM_MAP(m90_main_cpu_map,0)
MDRV_CPU_IO_MAP(m90_main_cpu_io_map,0)
MDRV_CPU_VBLANK_INT("screen", m90_interrupt)
MDRV_CPU_ADD("soundcpu", Z80, XTAL_3_579545MHz) /* verified on pcb */
MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
MDRV_CPU_PROGRAM_MAP(m90_sound_cpu_map,0)
MDRV_CPU_IO_MAP(bbmanw_sound_io_map,0)
MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128) /* clocked by V1? (Vigilante) */
/* IRQs are generated by main Z80 and YM2151 */
@ -875,8 +868,8 @@ static MACHINE_DRIVER_START( bbmanwj )
MDRV_IMPORT_FROM( bbmanw )
MDRV_CPU_MODIFY("soundcpu")
MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
MDRV_CPU_IO_MAP(sound_io_map,0)
MDRV_CPU_PROGRAM_MAP(m90_sound_cpu_map,0)
MDRV_CPU_IO_MAP(m90_sound_cpu_io_map,0)
MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128) /* clocked by V1? (Vigilante) */
/* IRQs are generated by main Z80 and YM2151 */
@ -887,8 +880,8 @@ static MACHINE_DRIVER_START( bomblord )
MDRV_IMPORT_FROM( bbmanw )
MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_CONFIG(no_table)
MDRV_CPU_PROGRAM_MAP(bomblord_main_cpu,0)
MDRV_CPU_IO_MAP(dynablsb_cpu_io,0)
MDRV_CPU_PROGRAM_MAP(bomblord_main_cpu_map,0)
MDRV_CPU_IO_MAP(dynablsb_cpu_io_map,0)
MDRV_VIDEO_START(bomblord)
MDRV_VIDEO_UPDATE(bomblord)
@ -901,13 +894,13 @@ static MACHINE_DRIVER_START( dynablsb )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", V30,32000000/4)
MDRV_CPU_PROGRAM_MAP(dynablsb_main_cpu,0)
MDRV_CPU_IO_MAP(dynablsb_cpu_io,0)
MDRV_CPU_PROGRAM_MAP(dynablsb_main_cpu_map,0)
MDRV_CPU_IO_MAP(dynablsb_cpu_io_map,0)
MDRV_CPU_VBLANK_INT("screen", m90_interrupt)
MDRV_CPU_ADD("soundcpu", Z80, XTAL_3_579545MHz) /* 3.579545 MHz */
MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
MDRV_CPU_IO_MAP(sound_io_map,0)
MDRV_CPU_PROGRAM_MAP(m90_sound_cpu_map,0)
MDRV_CPU_IO_MAP(m90_sound_cpu_io_map,0)
MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128) /* clocked by V1? (Vigilante) */
/* IRQs are generated by main Z80 and YM2151 */
MDRV_MACHINE_RESET(m72_sound)

View File

@ -210,38 +210,26 @@ static WRITE16_HANDLER( magmax_vreg_w )
static ADDRESS_MAP_START( magmax_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x013fff) AM_READ(SMH_ROM)
AM_RANGE(0x018000, 0x018fff) AM_READ(SMH_RAM)
AM_RANGE(0x020000, 0x0207ff) AM_READ(SMH_RAM)
AM_RANGE(0x028000, 0x0281ff) AM_READ(SMH_RAM)
static ADDRESS_MAP_START( magmax_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x013fff) AM_ROM
AM_RANGE(0x018000, 0x018fff) AM_RAM
AM_RANGE(0x020000, 0x0207ff) AM_RAM AM_BASE(&videoram16) AM_SIZE(&videoram_size)
AM_RANGE(0x028000, 0x0281ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x030000, 0x030001) AM_READ_PORT("P1")
AM_RANGE(0x030002, 0x030003) AM_READ_PORT("P2")
AM_RANGE(0x030004, 0x030005) AM_READ_PORT("SYSTEM")
AM_RANGE(0x030006, 0x030007) AM_READ_PORT("DSW")
ADDRESS_MAP_END
static ADDRESS_MAP_START( magmax_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x013fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x018000, 0x018fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x020000, 0x0207ff) AM_WRITE(SMH_RAM) AM_BASE(&videoram16) AM_SIZE(&videoram_size)
AM_RANGE(0x028000, 0x0281ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x030010, 0x030011) AM_WRITE(magmax_vreg_w) AM_BASE(&magmax_vreg)
AM_RANGE(0x030012, 0x030013) AM_WRITE(SMH_RAM) AM_BASE(&magmax_scroll_x)
AM_RANGE(0x030014, 0x030015) AM_WRITE(SMH_RAM) AM_BASE(&magmax_scroll_y)
AM_RANGE(0x030012, 0x030013) AM_WRITEONLY AM_BASE(&magmax_scroll_x)
AM_RANGE(0x030014, 0x030015) AM_WRITEONLY AM_BASE(&magmax_scroll_y)
AM_RANGE(0x03001c, 0x03001d) AM_WRITE(magmax_sound_w)
AM_RANGE(0x03001e, 0x03001f) AM_WRITENOP /* IRQ ack */
ADDRESS_MAP_END
static ADDRESS_MAP_START( magmax_soundreadmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
static ADDRESS_MAP_START( magmax_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x4000) AM_READ(magmax_sound_irq_ack)
AM_RANGE(0x6000, 0x67ff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( magmax_soundwritemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x6000, 0x67ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x6000, 0x67ff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( magmax_sound_io_map, ADDRESS_SPACE_IO, 8 )
@ -371,11 +359,11 @@ static MACHINE_DRIVER_START( magmax )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) /* verified on pcb */
MDRV_CPU_PROGRAM_MAP(magmax_readmem,magmax_writemem)
MDRV_CPU_PROGRAM_MAP(magmax_map,0)
MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
MDRV_CPU_ADD("audiocpu", Z80,XTAL_20MHz/8) /* verified on pcb */
MDRV_CPU_PROGRAM_MAP(magmax_soundreadmem,magmax_soundwritemem)
MDRV_CPU_PROGRAM_MAP(magmax_sound_map,0)
MDRV_CPU_IO_MAP(magmax_sound_io_map,0)
MDRV_QUANTUM_TIME(HZ(600))

View File

@ -23,7 +23,6 @@ Notes:
#include "driver.h"
#include "cpu/z80/z80.h"
#include "cpu/hd6309/hd6309.h"
#include "deprecat.h"
#include "video/konamiic.h"
#include "cpu/m6809/m6809.h"
#include "sound/2151intf.h"
@ -141,7 +140,13 @@ static WRITE8_DEVICE_HANDLER( dv_sh_bankswitch_w )
}
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
static ADDRESS_MAP_START( mainevt_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1f80, 0x1f80) AM_WRITE(mainevt_bankswitch_w)
AM_RANGE(0x1f84, 0x1f84) AM_WRITE(soundlatch_w) /* probably */
AM_RANGE(0x1f88, 0x1f88) AM_WRITE(mainevt_sh_irqtrigger_w) /* probably */
AM_RANGE(0x1f8c, 0x1f8d) AM_WRITENOP /* ??? */
AM_RANGE(0x1f90, 0x1f90) AM_WRITE(mainevt_coin_w) /* coin counters + lamps */
AM_RANGE(0x1f94, 0x1f94) AM_READ_PORT("SYSTEM")
AM_RANGE(0x1f95, 0x1f95) AM_READ_PORT("P1")
AM_RANGE(0x1f96, 0x1f96) AM_READ_PORT("P2")
@ -151,92 +156,61 @@ static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1f9a, 0x1f9a) AM_READ_PORT("P4")
AM_RANGE(0x1f9b, 0x1f9b) AM_READ_PORT("DSW2")
AM_RANGE(0x0000, 0x3fff) AM_READ(K052109_051960_r)
AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_RAM)
AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK(1))
AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r,K052109_051960_w)
AM_RANGE(0x4000, 0x5dff) AM_RAM
AM_RANGE(0x5e00, 0x5fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram)
AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(1)
AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
static ADDRESS_MAP_START( devstors_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1f80, 0x1f80) AM_WRITE(mainevt_bankswitch_w)
AM_RANGE(0x1f84, 0x1f84) AM_WRITE(soundlatch_w) /* probably */
AM_RANGE(0x1f88, 0x1f88) AM_WRITE(mainevt_sh_irqtrigger_w) /* probably */
AM_RANGE(0x1f8c, 0x1f8d) AM_WRITENOP /* ??? */
AM_RANGE(0x1f90, 0x1f90) AM_WRITE(mainevt_coin_w) /* coin counters + lamps */
AM_RANGE(0x1fb2, 0x1fb2) AM_WRITE(dv_nmienable_w)
AM_RANGE(0x0000, 0x3fff) AM_WRITE(K052109_051960_w)
AM_RANGE(0x4000, 0x5dff) AM_WRITE(SMH_RAM)
AM_RANGE(0x5e00, 0x5fff) AM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram)
AM_RANGE(0x6000, 0xffff) AM_WRITE(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( dv_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1f94, 0x1f94) AM_READ_PORT("SYSTEM")
AM_RANGE(0x1f95, 0x1f95) AM_READ_PORT("P1")
AM_RANGE(0x1f96, 0x1f96) AM_READ_PORT("P2")
AM_RANGE(0x1f97, 0x1f97) AM_READ_PORT("DSW1")
AM_RANGE(0x1f98, 0x1f98) AM_READ_PORT("DSW3")
AM_RANGE(0x1f9b, 0x1f9b) AM_READ_PORT("DSW2")
AM_RANGE(0x1fa0, 0x1fbf) AM_READ(K051733_r)
AM_RANGE(0x1fa0, 0x1fbf) AM_READWRITE(K051733_r,K051733_w)
AM_RANGE(0x0000, 0x3fff) AM_READ(K052109_051960_r)
AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_RAM)
AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK(1))
AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r,K052109_051960_w)
static ADDRESS_MAP_START( dv_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1f80, 0x1f80) AM_WRITE(mainevt_bankswitch_w)
AM_RANGE(0x1f84, 0x1f84) AM_WRITE(soundlatch_w) /* probably */
AM_RANGE(0x1f88, 0x1f88) AM_WRITE(mainevt_sh_irqtrigger_w) /* probably */
AM_RANGE(0x1f90, 0x1f90) AM_WRITE(mainevt_coin_w) /* coin counters + lamps */
AM_RANGE(0x1fb2, 0x1fb2) AM_WRITE(dv_nmienable_w)
AM_RANGE(0x1fa0, 0x1fbf) AM_WRITE(K051733_w)
AM_RANGE(0x0000, 0x3fff) AM_WRITE(K052109_051960_w)
AM_RANGE(0x4000, 0x5dff) AM_WRITE(SMH_RAM)
AM_RANGE(0x5e00, 0x5fff) AM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram)
AM_RANGE(0x6000, 0xffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x4000, 0x5dff) AM_RAM
AM_RANGE(0x5e00, 0x5fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram)
AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(1)
AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x83ff) AM_READ(SMH_RAM)
AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
AM_RANGE(0xb000, 0xb00d) AM_DEVREAD("konami", k007232_r)
AM_RANGE(0xd000, 0xd000) AM_DEVREAD("upd", mainevt_sh_busy_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0x83ff) AM_WRITE(SMH_RAM)
AM_RANGE(0xb000, 0xb00d) AM_DEVWRITE("konami", k007232_w)
static ADDRESS_MAP_START( mainevt_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x83ff) AM_RAM
AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("upd", upd7759_port_w)
AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
AM_RANGE(0xb000, 0xb00d) AM_DEVREADWRITE("konami", k007232_r,k007232_w)
AM_RANGE(0xd000, 0xd000) AM_DEVREAD("upd", mainevt_sh_busy_r)
AM_RANGE(0xe000, 0xe000) AM_WRITE(mainevt_sh_irqcontrol_w)
AM_RANGE(0xf000, 0xf000) AM_WRITE(mainevt_sh_bankswitch_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( dv_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x83ff) AM_READ(SMH_RAM)
static ADDRESS_MAP_START( devstors_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x83ff) AM_RAM
AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
AM_RANGE(0xb000, 0xb00d) AM_DEVREAD("konami", k007232_r)
AM_RANGE(0xc000, 0xc001) AM_DEVREAD("ym", ym2151_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( dv_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0x83ff) AM_WRITE(SMH_RAM)
AM_RANGE(0xb000, 0xb00d) AM_DEVWRITE("konami", k007232_w)
AM_RANGE(0xc000, 0xc001) AM_DEVWRITE("ym", ym2151_w)
AM_RANGE(0xb000, 0xb00d) AM_DEVREADWRITE("konami", k007232_r,k007232_w)
AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ym", ym2151_r,ym2151_w)
AM_RANGE(0xe000, 0xe000) AM_WRITE(devstor_sh_irqcontrol_w)
AM_RANGE(0xf000, 0xf000) AM_DEVWRITE("konami", dv_sh_bankswitch_w)
ADDRESS_MAP_END
/*****************************************************************************/
static INPUT_PORTS_START( mainevt )
@ -423,12 +397,12 @@ static MACHINE_DRIVER_START( mainevt )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", HD6309, 3000000*4) /* ?? */
MDRV_CPU_PROGRAM_MAP(readmem,writemem)
MDRV_CPU_PROGRAM_MAP(mainevt_map,0)
MDRV_CPU_VBLANK_INT("screen", mainevt_interrupt)
MDRV_CPU_ADD("audiocpu", Z80, 3579545) /* 3.579545 MHz */
MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,8) /* ??? */
MDRV_CPU_PROGRAM_MAP(mainevt_sound_map,0)
MDRV_CPU_PERIODIC_INT(nmi_line_pulse,8*60) /* ??? */
/* video hardware */
MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS)
@ -462,12 +436,12 @@ static MACHINE_DRIVER_START( devstors )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", HD6309, 3000000*4) /* ?? */
MDRV_CPU_PROGRAM_MAP(dv_readmem,dv_writemem)
MDRV_CPU_PROGRAM_MAP(devstors_map,0)
MDRV_CPU_VBLANK_INT("screen", dv_interrupt)
MDRV_CPU_ADD("audiocpu", Z80, 3579545) /* 3.579545 MHz */
MDRV_CPU_PROGRAM_MAP(dv_sound_readmem,dv_sound_writemem)
MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,4)
MDRV_CPU_PROGRAM_MAP(devstors_sound_map,0)
MDRV_CPU_PERIODIC_INT(irq0_line_hold,4*60) /* ??? */
/* video hardware */
MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS)

View File

@ -115,20 +115,6 @@ static WRITE8_HANDLER( tx_tileram_w )
tilemap_mark_tile_dirty(tx_tilemap, offset);
}
static ADDRESS_MAP_START( marinedt_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x37ff) AM_READ(SMH_ROM)
AM_RANGE(0x4000, 0x43ff) AM_READ(SMH_RAM)
AM_RANGE(0x4400, 0x47ff) AM_READ(SMH_RAM) //unused, vram mirror?
AM_RANGE(0x4000, 0x4bff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( marinedt_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x37ff) AM_WRITE(SMH_ROM)
AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x4800, 0x4bff) AM_WRITE(tx_tileram_w) AM_BASE(&tx_tileram)
AM_RANGE(0x4c00, 0x4c00) AM_WRITENOP //?? maybe off by one error
ADDRESS_MAP_END
static READ8_HANDLER( marinedt_port1_r )
{
//might need to be reversed for cocktail stuff
@ -270,6 +256,13 @@ static WRITE8_HANDLER( marinedt_pf_w )
}
static ADDRESS_MAP_START( marinedt_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x37ff) AM_ROM
AM_RANGE(0x4000, 0x43ff) AM_RAM
AM_RANGE(0x4400, 0x47ff) AM_RAM //unused, vram mirror?
AM_RANGE(0x4800, 0x4bff) AM_RAM_WRITE(tx_tileram_w) AM_BASE(&tx_tileram)
AM_RANGE(0x4c00, 0x4c00) AM_WRITENOP //?? maybe off by one error
ADDRESS_MAP_END
static ADDRESS_MAP_START( marinedt_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
@ -577,7 +570,7 @@ static MACHINE_DRIVER_START( marinedt )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", Z80,10000000/4)
MDRV_CPU_PROGRAM_MAP(marinedt_readmem,marinedt_writemem)
MDRV_CPU_PROGRAM_MAP(marinedt_map,0)
MDRV_CPU_IO_MAP(marinedt_io_map,0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)

View File

@ -29,13 +29,13 @@ static READ8_HANDLER( markham_e004_r )
/****************************************************************************/
static ADDRESS_MAP_START( readmem1, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
static ADDRESS_MAP_START( markham_master_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROM
AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
AM_RANGE(0xc800, 0xcfff) AM_READ(SMH_RAM)
AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
AM_RANGE(0xd800, 0xdfff) AM_READ(SMH_RAM) AM_SHARE(1)
AM_RANGE(0xc000, 0xc7ff) AM_RAM
AM_RANGE(0xc800, 0xcfff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(markham_videoram_w) AM_BASE(&videoram)
AM_RANGE(0xd800, 0xdfff) AM_RAM AM_SHARE(1)
AM_RANGE(0xe000, 0xe000) AM_READ_PORT("DSW2")
AM_RANGE(0xe001, 0xe001) AM_READ_PORT("DSW1")
@ -46,32 +46,16 @@ static ADDRESS_MAP_START( readmem1, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xe005, 0xe005) AM_READ_PORT("SYSTEM")
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem1, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
AM_RANGE(0xc800, 0xcfff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xd000, 0xd7ff) AM_WRITE(markham_videoram_w) AM_BASE(&videoram)
AM_RANGE(0xd800, 0xdfff) AM_WRITE(SMH_RAM) AM_SHARE(1)
AM_RANGE(0xe008, 0xe008) AM_WRITENOP /* coin counter? */
AM_RANGE(0xe009, 0xe009) AM_WRITENOP /* to CPU2 busreq */
AM_RANGE(0xe00c, 0xe00d) AM_WRITE(SMH_RAM) AM_BASE(&markham_xscroll)
AM_RANGE(0xe00c, 0xe00d) AM_WRITEONLY AM_BASE(&markham_xscroll)
AM_RANGE(0xe00e, 0xe00e) AM_WRITE(markham_flipscreen_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( readmem2, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM) AM_SHARE(1)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem2, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM) AM_SHARE(1)
static ADDRESS_MAP_START( markham_slave_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROM
AM_RANGE(0x8000, 0x87ff) AM_RAM AM_SHARE(1)
AM_RANGE(0xc000, 0xc000) AM_DEVWRITE("sn1", sn76496_w)
AM_RANGE(0xc001, 0xc001) AM_DEVWRITE("sn2", sn76496_w)
@ -200,11 +184,11 @@ static MACHINE_DRIVER_START( markham )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", Z80,8000000/2) /* 4.000MHz */
MDRV_CPU_PROGRAM_MAP(readmem1,writemem1)
MDRV_CPU_PROGRAM_MAP(markham_master_map,0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
MDRV_CPU_ADD("sub", Z80,8000000/2) /* 4.000MHz */
MDRV_CPU_PROGRAM_MAP(readmem2,writemem2)
MDRV_CPU_PROGRAM_MAP(markham_slave_map,0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
MDRV_QUANTUM_TIME(HZ(6000))

View File

@ -661,7 +661,7 @@ static const msm5205_interface msm5205_config =
static WRITE8_HANDLER( mastboy_irq0_ack_w )
{
mastboy_irq0_ack = data;
if ((data & 1) == 1)
if ((data & 1) == 1)
cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
}
@ -675,32 +675,23 @@ static INTERRUPT_GEN( mastboy_interrupt )
/* Memory Maps */
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM) // Internal ROM
AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_ROM) // External ROM
AM_RANGE(0x8000, 0x8fff) AM_READ(SMH_RAM) // worl ram
AM_RANGE(0x9000, 0x9fff) AM_READ(SMH_RAM) // tilemap ram
AM_RANGE(0xa000, 0xa1ff) AM_READ(SMH_RAM) AM_MIRROR(0x0e00) // colour ram
AM_RANGE(0xc000, 0xffff) AM_READ(banked_ram_r) // mastboy bank area read
static ADDRESS_MAP_START( mastboy_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM // Internal ROM
AM_RANGE(0x4000, 0x7fff) AM_ROM // External ROM
AM_RANGE(0x8000, 0x8fff) AM_RAM AM_BASE(&mastboy_workram)// work ram
AM_RANGE(0x9000, 0x9fff) AM_RAM AM_BASE(&mastboy_tileram)// tilemap ram
AM_RANGE(0xa000, 0xa1ff) AM_RAM AM_BASE(&mastboy_colram) AM_MIRROR(0x0e00) // colour ram
AM_RANGE(0xc000, 0xffff) AM_READWRITE(banked_ram_r,banked_ram_w) // mastboy bank area read / write
AM_RANGE(0xff000, 0xff7ff) AM_READWRITE(mastboy_backupram_r,mastboy_backupram_w) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0xff000, 0xff7ff) AM_READ(mastboy_backupram_r)
AM_RANGE(0xff800, 0xff807) AM_READ_PORT("P1")
AM_RANGE(0xff808, 0xff80f) AM_READ_PORT("P2")
AM_RANGE(0xff810, 0xff817) AM_READ_PORT("DSW1")
AM_RANGE(0xff818, 0xff81f) AM_READ_PORT("DSW2")
AM_RANGE(0xffc00, 0xfffff) AM_READ(SMH_RAM) // Internal RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
//ADDRESS_MAP_GLOBAL_MASK(0xffff)
AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM) // Internal ROM
AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM) // External ROM
AM_RANGE(0x8000, 0x8fff) AM_WRITE(SMH_RAM) AM_BASE(&mastboy_workram)// work ram
AM_RANGE(0x9000, 0x9fff) AM_WRITE(SMH_RAM) AM_BASE(&mastboy_tileram)// tilemap ram
AM_RANGE(0xa000, 0xa1ff) AM_WRITE(SMH_RAM) AM_BASE(&mastboy_colram) AM_MIRROR(0x0e00) // colour ram
AM_RANGE(0xc000, 0xffff) AM_WRITE(banked_ram_w) // mastboy bank area write
AM_RANGE(0xff000, 0xff7ff) AM_WRITE(mastboy_backupram_w) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0xff820, 0xff827) AM_WRITE(mastboy_bank_w)
AM_RANGE(0xff828, 0xff828) AM_DEVWRITE("saa", saa1099_data_w)
AM_RANGE(0xff829, 0xff829) AM_DEVWRITE("saa", saa1099_control_w)
@ -710,7 +701,8 @@ static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xff83a, 0xff83a) AM_WRITE(msm5205_mastboy_m5205_sambit1_w)
AM_RANGE(0xff83b, 0xff83b) AM_DEVWRITE("msm", mastboy_msm5205_reset_w)
AM_RANGE(0xff83c, 0xff83c) AM_WRITE(backupram_enable_w)
AM_RANGE(0xffc00, 0xfffff) AM_WRITE(SMH_RAM) // Internal RAM
AM_RANGE(0xffc00, 0xfffff) AM_RAM // Internal RAM
ADDRESS_MAP_END
/* Ports */
@ -726,7 +718,7 @@ static READ8_HANDLER( mastboy_nmi_read )
return 0x00;
}
static ADDRESS_MAP_START( port_readmem, ADDRESS_SPACE_IO, 8 )
static ADDRESS_MAP_START( mastboy_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x38, 0x38) AM_READ(mastboy_port_38_read)
AM_RANGE(0x39, 0x39) AM_READ(mastboy_nmi_read)
ADDRESS_MAP_END
@ -865,8 +857,8 @@ static MACHINE_RESET( mastboy )
static MACHINE_DRIVER_START( mastboy )
MDRV_CPU_ADD("maincpu", Z180, 12000000/2) /* HD647180X0CP6-1M1R */
MDRV_CPU_PROGRAM_MAP(readmem,writemem)
MDRV_CPU_IO_MAP(port_readmem,0)
MDRV_CPU_PROGRAM_MAP(mastboy_map,0)
MDRV_CPU_IO_MAP(mastboy_io_map,0)
MDRV_CPU_VBLANK_INT("screen", mastboy_interrupt)
MDRV_NVRAM_HANDLER(generic_1fill)

View File

@ -53,115 +53,74 @@ static WRITE8_HANDLER( maniach_sh_command_w )
static ADDRESS_MAP_START( matmania_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x077f) AM_READ(SMH_RAM)
AM_RANGE(0x1000, 0x17ff) AM_READ(SMH_RAM)
AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
AM_RANGE(0x3000, 0x3000) AM_READ_PORT("IN0")
AM_RANGE(0x3010, 0x3010) AM_READ_PORT("IN1")
AM_RANGE(0x3020, 0x3020) AM_READ_PORT("DSW2")
AM_RANGE(0x3030, 0x3030) AM_READ_PORT("DSW1")
AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( matmania_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x077f) AM_WRITE(SMH_RAM)
AM_RANGE(0x0780, 0x07df) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x1000, 0x13ff) AM_WRITE(SMH_RAM) AM_BASE(&matmania_videoram2) AM_SIZE(&matmania_videoram2_size)
AM_RANGE(0x1400, 0x17ff) AM_WRITE(SMH_RAM) AM_BASE(&matmania_colorram2)
AM_RANGE(0x2000, 0x21ff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x2200, 0x23ff) AM_WRITE(SMH_RAM) AM_BASE(&colorram)
AM_RANGE(0x2400, 0x25ff) AM_WRITE(SMH_RAM) AM_BASE(&matmania_videoram3) AM_SIZE(&matmania_videoram3_size)
AM_RANGE(0x2600, 0x27ff) AM_WRITE(SMH_RAM) AM_BASE(&matmania_colorram3)
AM_RANGE(0x3000, 0x3000) AM_WRITE(SMH_RAM) AM_BASE(&matmania_pageselect)
AM_RANGE(0x3010, 0x3010) AM_WRITE(matmania_sh_command_w)
AM_RANGE(0x3020, 0x3020) AM_WRITE(SMH_RAM) AM_BASE(&matmania_scroll)
// AM_RANGE(0x3030, 0x3030) AM_WRITENOP /* ?? */
static ADDRESS_MAP_START( matmania_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x077f) AM_RAM
AM_RANGE(0x0780, 0x07df) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x1000, 0x13ff) AM_RAM AM_BASE(&matmania_videoram2) AM_SIZE(&matmania_videoram2_size)
AM_RANGE(0x1400, 0x17ff) AM_RAM AM_BASE(&matmania_colorram2)
AM_RANGE(0x2000, 0x21ff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x2200, 0x23ff) AM_RAM AM_BASE(&colorram)
AM_RANGE(0x2400, 0x25ff) AM_RAM AM_BASE(&matmania_videoram3) AM_SIZE(&matmania_videoram3_size)
AM_RANGE(0x2600, 0x27ff) AM_RAM AM_BASE(&matmania_colorram3)
AM_RANGE(0x3000, 0x3000) AM_READ_PORT("IN0") AM_WRITEONLY AM_BASE(&matmania_pageselect)
AM_RANGE(0x3010, 0x3010) AM_READ_PORT("IN1") AM_WRITE(matmania_sh_command_w)
AM_RANGE(0x3020, 0x3020) AM_READ_PORT("DSW2") AM_WRITEONLY AM_BASE(&matmania_scroll)
AM_RANGE(0x3030, 0x3030) AM_READ_PORT("DSW1") AM_WRITENOP /* ?? */
AM_RANGE(0x3050, 0x307f) AM_WRITE(matmania_paletteram_w) AM_BASE(&paletteram)
AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x4000, 0xffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( maniach_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x077f) AM_READ(SMH_RAM)
AM_RANGE(0x1000, 0x17ff) AM_READ(SMH_RAM)
AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
AM_RANGE(0x3000, 0x3000) AM_READ_PORT("IN0")
AM_RANGE(0x3010, 0x3010) AM_READ_PORT("IN1")
AM_RANGE(0x3020, 0x3020) AM_READ_PORT("DSW2")
AM_RANGE(0x3030, 0x3030) AM_READ_PORT("DSW1")
AM_RANGE(0x3040, 0x3040) AM_READ(maniach_mcu_r)
static ADDRESS_MAP_START( maniach_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x077f) AM_RAM
AM_RANGE(0x0780, 0x07df) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x1000, 0x13ff) AM_RAM AM_BASE(&matmania_videoram2) AM_SIZE(&matmania_videoram2_size)
AM_RANGE(0x1400, 0x17ff) AM_RAM AM_BASE(&matmania_colorram2)
AM_RANGE(0x2000, 0x21ff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x2200, 0x23ff) AM_RAM AM_BASE(&colorram)
AM_RANGE(0x2400, 0x25ff) AM_RAM AM_BASE(&matmania_videoram3) AM_SIZE(&matmania_videoram3_size)
AM_RANGE(0x2600, 0x27ff) AM_RAM AM_BASE(&matmania_colorram3)
AM_RANGE(0x3000, 0x3000) AM_READ_PORT("IN0") AM_WRITEONLY AM_BASE(&matmania_pageselect)
AM_RANGE(0x3010, 0x3010) AM_READ_PORT("IN1") AM_WRITE(maniach_sh_command_w)
AM_RANGE(0x3020, 0x3020) AM_READ_PORT("DSW2") AM_WRITEONLY AM_BASE(&matmania_scroll)
AM_RANGE(0x3030, 0x3030) AM_READ_PORT("DSW1") AM_WRITENOP /* ?? */
AM_RANGE(0x3040, 0x3040) AM_READWRITE(maniach_mcu_r,maniach_mcu_w)
AM_RANGE(0x3041, 0x3041) AM_READ(maniach_mcu_status_r)
AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( maniach_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x077f) AM_WRITE(SMH_RAM)
AM_RANGE(0x0780, 0x07df) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x1000, 0x13ff) AM_WRITE(SMH_RAM) AM_BASE(&matmania_videoram2) AM_SIZE(&matmania_videoram2_size)
AM_RANGE(0x1400, 0x17ff) AM_WRITE(SMH_RAM) AM_BASE(&matmania_colorram2)
AM_RANGE(0x2000, 0x21ff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x2200, 0x23ff) AM_WRITE(SMH_RAM) AM_BASE(&colorram)
AM_RANGE(0x2400, 0x25ff) AM_WRITE(SMH_RAM) AM_BASE(&matmania_videoram3) AM_SIZE(&matmania_videoram3_size)
AM_RANGE(0x2600, 0x27ff) AM_WRITE(SMH_RAM) AM_BASE(&matmania_colorram3)
AM_RANGE(0x3000, 0x3000) AM_WRITE(SMH_RAM) AM_BASE(&matmania_pageselect)
AM_RANGE(0x3010, 0x3010) AM_WRITE(maniach_sh_command_w)
AM_RANGE(0x3020, 0x3020) AM_WRITE(SMH_RAM) AM_BASE(&matmania_scroll)
AM_RANGE(0x3030, 0x3030) AM_WRITENOP /* ?? */
AM_RANGE(0x3040, 0x3040) AM_WRITE(maniach_mcu_w)
AM_RANGE(0x3050, 0x307f) AM_WRITE(matmania_paletteram_w) AM_BASE(&paletteram)
AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x4000, 0xffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x01ff) AM_READ(SMH_RAM)
AM_RANGE(0x2007, 0x2007) AM_READ(soundlatch_r)
AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x01ff) AM_WRITE(SMH_RAM)
static ADDRESS_MAP_START( matmania_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x01ff) AM_RAM
AM_RANGE(0x2000, 0x2001) AM_DEVWRITE("ay1", ay8910_data_address_w)
AM_RANGE(0x2002, 0x2003) AM_DEVWRITE("ay2", ay8910_data_address_w)
AM_RANGE(0x2004, 0x2004) AM_DEVWRITE("dac", dac_signed_w)
AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x2007, 0x2007) AM_READ(soundlatch_r)
AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( maniach_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM)
AM_RANGE(0x2004, 0x2004) AM_READ(soundlatch_r)
AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( maniach_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)
static ADDRESS_MAP_START( maniach_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_RAM
AM_RANGE(0x2000, 0x2001) AM_DEVWRITE("ym", ym3526_w)
AM_RANGE(0x2002, 0x2002) AM_DEVWRITE("dac", dac_signed_w)
AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x2004, 0x2004) AM_READ(soundlatch_r)
AM_RANGE(0x4000, 0xffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( mcu_readmem, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_GLOBAL_MASK(0x7ff)
AM_RANGE(0x0000, 0x0000) AM_READ(maniach_68705_portA_r)
AM_RANGE(0x0001, 0x0001) AM_READ(maniach_68705_portB_r)
AM_RANGE(0x0002, 0x0002) AM_READ(maniach_68705_portC_r)
AM_RANGE(0x0010, 0x007f) AM_READ(SMH_RAM)
AM_RANGE(0x0080, 0x07ff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( mcu_writemem, ADDRESS_SPACE_PROGRAM, 8 )
static ADDRESS_MAP_START( maniach_mcu_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_GLOBAL_MASK(0x7ff)
AM_RANGE(0x0000, 0x0000) AM_WRITE(maniach_68705_portA_w)
AM_RANGE(0x0001, 0x0001) AM_WRITE(maniach_68705_portB_w)
AM_RANGE(0x0002, 0x0002) AM_WRITE(maniach_68705_portC_w)
AM_RANGE(0x0000, 0x0000) AM_READWRITE(maniach_68705_portA_r,maniach_68705_portA_w)
AM_RANGE(0x0001, 0x0001) AM_READWRITE(maniach_68705_portB_r,maniach_68705_portB_w)
AM_RANGE(0x0002, 0x0002) AM_READWRITE(maniach_68705_portC_r,maniach_68705_portC_w)
AM_RANGE(0x0004, 0x0004) AM_WRITE(maniach_68705_ddrA_w)
AM_RANGE(0x0005, 0x0005) AM_WRITE(maniach_68705_ddrB_w)
AM_RANGE(0x0006, 0x0006) AM_WRITE(maniach_68705_ddrC_w)
AM_RANGE(0x0010, 0x007f) AM_WRITE(SMH_RAM)
AM_RANGE(0x0080, 0x07ff) AM_WRITE(SMH_ROM)
AM_RANGE(0x0010, 0x007f) AM_RAM
AM_RANGE(0x0080, 0x07ff) AM_ROM
ADDRESS_MAP_END
static INPUT_PORTS_START( matmania )
PORT_START("IN0")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
@ -313,11 +272,11 @@ static MACHINE_DRIVER_START( matmania )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", M6502, 1500000) /* 1.5 MHz ???? */
MDRV_CPU_PROGRAM_MAP(matmania_readmem,matmania_writemem)
MDRV_CPU_PROGRAM_MAP(matmania_map,0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
MDRV_CPU_ADD("audiocpu", M6502, 1200000) /* 1.2 MHz ???? */
MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
MDRV_CPU_PROGRAM_MAP(matmania_sound_map,0)
MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,15) /* ???? */
/* IRQs are caused by the main CPU */
MDRV_QUANTUM_TIME(HZ(600))
@ -368,14 +327,15 @@ static MACHINE_DRIVER_START( maniach )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", M6502, 1500000) /* 1.5 MHz ???? */
MDRV_CPU_PROGRAM_MAP(maniach_readmem,maniach_writemem)
MDRV_CPU_PROGRAM_MAP(maniach_map,0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
MDRV_CPU_ADD("audiocpu", M6809, 1500000) /* 1.5 MHz ???? */
MDRV_CPU_PROGRAM_MAP(maniach_sound_readmem,maniach_sound_writemem)
MDRV_CPU_PROGRAM_MAP(maniach_sound_map,0)
/* IRQs are caused by the main CPU */
MDRV_CPU_ADD("mcu", M68705, 1500000*2) /* (don't know really how fast, but it doesn't need to even be this fast) */
MDRV_CPU_PROGRAM_MAP(mcu_readmem,mcu_writemem)
MDRV_CPU_PROGRAM_MAP(maniach_mcu_map,0)
MDRV_QUANTUM_TIME(HZ(6000)) /* 100 CPU slice per frame - high interleaving to sync main and mcu */

View File

@ -2140,53 +2140,35 @@ static WRITE16_HANDLER( megadriv_68k_io_write )
static ADDRESS_MAP_START( megadriv_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000 , 0x3fffff) AM_READ(SMH_ROM)
static ADDRESS_MAP_START( megadriv_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000 , 0x3fffff) AM_ROM
/* (0x000000 - 0x3fffff) == GAME ROM (4Meg Max, Some games have special banking too) */
AM_RANGE(0xa00000 , 0xa01fff) AM_READ(megadriv_68k_read_z80_ram)
AM_RANGE(0xa04000 , 0xa04003) AM_DEVREAD8("ym", megadriv_68k_YM2612_read, 0xffff)
AM_RANGE(0xa10000 , 0xa1001f) AM_READ(megadriv_68k_io_read)
AM_RANGE(0xa11100 , 0xa11101) AM_READ(megadriv_68k_check_z80_bus)
AM_RANGE(0xc00000 , 0xc0001f) AM_READ(megadriv_vdp_r)
AM_RANGE(0xd00000 , 0xd0001f) AM_READ(megadriv_vdp_r) // the earth defend
/* these are fake - remove allocs in VIDEO_START to use these to view ram instead */
// AM_RANGE(0xb00000 , 0xb0ffff) AM_READ(SMH_RAM) AM_BASE(&megadrive_vdp_vram)
// AM_RANGE(0xb10000 , 0xb1007f) AM_READ(SMH_RAM) AM_BASE(&megadrive_vdp_vsram)
// AM_RANGE(0xb10100 , 0xb1017f) AM_READ(SMH_RAM) AM_BASE(&megadrive_vdp_cram)
AM_RANGE(0xe00000 , 0xe0ffff) AM_READ(SMH_RAM) AM_MIRROR(0x1f0000)
// AM_RANGE(0xff0000 , 0xffffff) AM_READ(SMH_RAM)
/* 0xe00000 - 0xffffff) == MAIN RAM (64kb, Mirrored, most games use ff0000 - ffffff) */
ADDRESS_MAP_END
static ADDRESS_MAP_START( megadriv_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000 , 0x3fffff) AM_WRITE(SMH_ROM)
AM_RANGE(0xa00000 , 0xa01fff) AM_WRITE(megadriv_68k_write_z80_ram)
AM_RANGE(0xa00000 , 0xa01fff) AM_READWRITE(megadriv_68k_read_z80_ram,megadriv_68k_write_z80_ram)
AM_RANGE(0xa02000 , 0xa03fff) AM_WRITE(megadriv_68k_write_z80_ram)
AM_RANGE(0xa04000 , 0xa04003) AM_DEVWRITE8("ym", megadriv_68k_YM2612_write, 0xffff)
AM_RANGE(0xa04000 , 0xa04003) AM_DEVREADWRITE8("ym", megadriv_68k_YM2612_read,megadriv_68k_YM2612_write, 0xffff)
AM_RANGE(0xa06000 , 0xa06001) AM_WRITE(megadriv_68k_z80_bank_write)
AM_RANGE(0xa10000 , 0xa1001f) AM_WRITE(megadriv_68k_io_write)
AM_RANGE(0xa10000 , 0xa1001f) AM_READWRITE(megadriv_68k_io_read,megadriv_68k_io_write)
AM_RANGE(0xa11100 , 0xa11101) AM_WRITE(megadriv_68k_req_z80_bus)
AM_RANGE(0xa11100 , 0xa11101) AM_READWRITE(megadriv_68k_check_z80_bus,megadriv_68k_req_z80_bus)
AM_RANGE(0xa11200 , 0xa11201) AM_WRITE(megadriv_68k_req_z80_reset)
AM_RANGE(0xc00000 , 0xc0001f) AM_WRITE(megadriv_vdp_w)
AM_RANGE(0xd00000 , 0xd0001f) AM_WRITE(megadriv_vdp_w) // the earth defend
/* these are fake - remove allocs in VIDEO_START to use these to view ram instead */
// AM_RANGE(0xb00000 , 0xb0ffff) AM_RAM AM_BASE(&megadrive_vdp_vram)
// AM_RANGE(0xb10000 , 0xb1007f) AM_RAM AM_BASE(&megadrive_vdp_vsram)
// AM_RANGE(0xb10100 , 0xb1017f) AM_RAM AM_BASE(&megadrive_vdp_cram)
AM_RANGE(0xe00000 , 0xe0ffff) AM_WRITE(SMH_RAM) AM_MIRROR(0x1f0000) AM_BASE(&megadrive_ram)
AM_RANGE(0xc00000 , 0xc0001f) AM_READWRITE(megadriv_vdp_r,megadriv_vdp_w)
AM_RANGE(0xd00000 , 0xd0001f) AM_READWRITE(megadriv_vdp_r,megadriv_vdp_w) // the earth defend
AM_RANGE(0xe00000 , 0xe0ffff) AM_RAM AM_MIRROR(0x1f0000) AM_BASE(&megadrive_ram)
// AM_RANGE(0xff0000 , 0xffffff) AM_READ(SMH_RAM)
/* 0xe00000 - 0xffffff) == MAIN RAM (64kb, Mirrored, most games use ff0000 - ffffff) */
ADDRESS_MAP_END
/* z80 sounds/sub CPU */
@ -2490,33 +2472,23 @@ static READ8_HANDLER( megadriv_z80_unmapped_read )
return 0xff;
}
static ADDRESS_MAP_START( z80_portmap, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x0000 , 0xff) AM_NOP
ADDRESS_MAP_END
static ADDRESS_MAP_START( z80_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000 , 0x1fff) AM_READ(SMH_BANK(1)) AM_MIRROR(0x2000) // RAM can be accessed by the 68k
AM_RANGE(0x4000 , 0x4003) AM_DEVREAD("ym", ym2612_r)
AM_RANGE(0x6100 , 0x7eff) AM_READ(megadriv_z80_unmapped_read)
AM_RANGE(0x7f00 , 0x7fff) AM_READ(megadriv_z80_vdp_read)
AM_RANGE(0x8000 , 0xffff) AM_READ(z80_read_68k_banked_data) // The Z80 can read the 68k address space this way
ADDRESS_MAP_END
static ADDRESS_MAP_START( z80_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000 , 0x1fff) AM_WRITE(SMH_BANK(1)) AM_MIRROR(0x2000)
AM_RANGE(0x4000 , 0x4003) AM_DEVWRITE("ym", ym2612_w)
AM_RANGE(0x7f00 , 0x7fff) AM_WRITE(megadriv_z80_vdp_write)
static ADDRESS_MAP_START( megadriv_z80_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000 , 0x1fff) AM_RAMBANK(1) AM_MIRROR(0x2000) // RAM can be accessed by the 68k
AM_RANGE(0x4000 , 0x4003) AM_DEVREADWRITE("ym", ym2612_r,ym2612_w)
AM_RANGE(0x6000 , 0x6000) AM_WRITE(megadriv_z80_z80_bank_w)
AM_RANGE(0x6001 , 0x6001) AM_WRITE(megadriv_z80_z80_bank_w) // wacky races uses this address
AM_RANGE(0x8000 , 0xffff) AM_WRITE(z80_write_68k_banked_data)
AM_RANGE(0x6100 , 0x7eff) AM_READ(megadriv_z80_unmapped_read)
AM_RANGE(0x7f00 , 0x7fff) AM_READWRITE(megadriv_z80_vdp_read,megadriv_z80_vdp_write)
AM_RANGE(0x8000 , 0xffff) AM_READWRITE(z80_read_68k_banked_data,z80_write_68k_banked_data) // The Z80 can read the 68k address space this way
ADDRESS_MAP_END
static ADDRESS_MAP_START( megadriv_z80_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x0000 , 0xff) AM_NOP
ADDRESS_MAP_END
/****************************************** 32X related ******************************************/
@ -3827,8 +3799,8 @@ static READ16_HANDLER( svp_68k_cell2_r )
}
static ADDRESS_MAP_START( svp_ssp_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x0000 , 0x03ff) AM_READ(SMH_BANK(3))
AM_RANGE(0x0400 , 0xffff) AM_READ(SMH_BANK(4))
AM_RANGE(0x0000 , 0x03ff) AM_ROMBANK(3)
AM_RANGE(0x0400 , 0xffff) AM_ROMBANK(4)
ADDRESS_MAP_END
static ADDRESS_MAP_START( svp_ext_map, ADDRESS_SPACE_IO, 16 )
@ -5935,7 +5907,7 @@ static TIMER_CALLBACK( scanline_timer_callback )
{
if (genesis_scanline_counter == megadrive_z80irq_scanline)
{
if ((genz80.z80_has_bus == 1) && (genz80.z80_is_reset == 0))
if ((genz80.z80_has_bus == 1) && (genz80.z80_is_reset == 0))
cputag_set_input_line(machine, "genesis_snd_z80", 0, HOLD_LINE);
}
if (genesis_scanline_counter == megadrive_z80irq_scanline + 1)
@ -5958,7 +5930,7 @@ static TIMER_CALLBACK( irq6_on_callback )
{
// megadrive_irq6_pending = 1;
if (MEGADRIVE_REG01_IRQ6_ENABLE || genesis_always_irq6)
if (MEGADRIVE_REG01_IRQ6_ENABLE || genesis_always_irq6)
cputag_set_input_line(machine, "maincpu", 6, HOLD_LINE);
}
}
@ -6229,12 +6201,12 @@ static NVRAM_HANDLER( megadriv )
MACHINE_DRIVER_START( megadriv )
MDRV_CPU_ADD("maincpu", M68000, MASTER_CLOCK_NTSC / 7) /* 7.67 MHz */
MDRV_CPU_PROGRAM_MAP(megadriv_readmem,megadriv_writemem)
MDRV_CPU_PROGRAM_MAP(megadriv_map,0)
/* IRQs are handled via the timers */
MDRV_CPU_ADD("genesis_snd_z80", Z80, MASTER_CLOCK_NTSC / 15) /* 3.58 MHz */
MDRV_CPU_PROGRAM_MAP(z80_readmem,z80_writemem)
MDRV_CPU_IO_MAP(z80_portmap,0)
MDRV_CPU_PROGRAM_MAP(megadriv_z80_map,0)
MDRV_CPU_IO_MAP(megadriv_z80_io_map,0)
/* IRQ handled via the timers */
MDRV_MACHINE_RESET(megadriv)
@ -6273,12 +6245,12 @@ MACHINE_DRIVER_END
MACHINE_DRIVER_START( megadpal )
MDRV_CPU_ADD("maincpu", M68000, MASTER_CLOCK_PAL / 7) /* 7.67 MHz */
MDRV_CPU_PROGRAM_MAP(megadriv_readmem,megadriv_writemem)
MDRV_CPU_PROGRAM_MAP(megadriv_map,0)
/* IRQs are handled via the timers */
MDRV_CPU_ADD("genesis_snd_z80", Z80, MASTER_CLOCK_PAL / 15) /* 3.58 MHz */
MDRV_CPU_PROGRAM_MAP(z80_readmem,z80_writemem)
MDRV_CPU_IO_MAP(z80_portmap,0)
MDRV_CPU_PROGRAM_MAP(megadriv_z80_map,0)
MDRV_CPU_IO_MAP(megadriv_z80_io_map,0)
/* IRQ handled via the timers */
MDRV_MACHINE_RESET(megadriv)

View File

@ -92,63 +92,49 @@ static WRITE8_HANDLER( megazone_coin_counter_w )
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2000, 0x2fff) AM_READ(SMH_RAM)
AM_RANGE(0x3000, 0x33ff) AM_READ(SMH_RAM)
AM_RANGE(0x3800, 0x3fff) AM_RAM AM_SHARE(1)
AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM) /* 4000->5FFF is a debug rom */
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
static ADDRESS_MAP_START( megazone_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0001) AM_WRITE(megazone_coin_counter_w) /* coin counter 2, coin counter 1 */
AM_RANGE(0x0005, 0x0005) AM_WRITE(megazone_flipscreen_w)
AM_RANGE(0x0007, 0x0007) AM_WRITE(interrupt_enable_w)
AM_RANGE(0x0800, 0x0800) AM_WRITE(watchdog_reset_w)
AM_RANGE(0x1800, 0x1800) AM_WRITE(SMH_RAM) AM_BASE(&megazone_scrollx)
AM_RANGE(0x1000, 0x1000) AM_WRITE(SMH_RAM) AM_BASE(&megazone_scrolly)
AM_RANGE(0x2000, 0x23ff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x2400, 0x27ff) AM_WRITE(SMH_RAM) AM_BASE(&megazone_videoram2) AM_SIZE(&megazone_videoram2_size)
AM_RANGE(0x2800, 0x2bff) AM_WRITE(SMH_RAM) AM_BASE(&colorram)
AM_RANGE(0x2c00, 0x2fff) AM_WRITE(SMH_RAM) AM_BASE(&megazone_colorram2)
AM_RANGE(0x3000, 0x33ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x1000, 0x1000) AM_WRITEONLY AM_BASE(&megazone_scrolly)
AM_RANGE(0x1800, 0x1800) AM_WRITEONLY AM_BASE(&megazone_scrollx)
AM_RANGE(0x2000, 0x23ff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x2400, 0x27ff) AM_RAM AM_BASE(&megazone_videoram2) AM_SIZE(&megazone_videoram2_size)
AM_RANGE(0x2800, 0x2bff) AM_RAM AM_BASE(&colorram)
AM_RANGE(0x2c00, 0x2fff) AM_RAM AM_BASE(&megazone_colorram2)
AM_RANGE(0x3000, 0x33ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x3800, 0x3fff) AM_RAM AM_SHARE(1)
AM_RANGE(0x4000, 0xffff) AM_ROM /* 4000->5FFF is a debug rom */
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
AM_RANGE(0x6000, 0x6000) AM_READ_PORT("IN0") /* IO Coin */
AM_RANGE(0x6001, 0x6001) AM_READ_PORT("IN1") /* P1 IO */
AM_RANGE(0x6002, 0x6002) AM_READ_PORT("IN2") /* P2 IO */
static ADDRESS_MAP_START( megazone_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x2000, 0x2000) AM_WRITE(megazone_i8039_irq_w) /* START line. Interrupts 8039 */
AM_RANGE(0x4000, 0x4000) AM_WRITE(soundlatch_w) /* CODE line. Command Interrupts 8039 */
AM_RANGE(0x6000, 0x6000) AM_READ_PORT("IN0") /* IO Coin */
AM_RANGE(0x6001, 0x6001) AM_READ_PORT("IN1") /* P1 IO */
AM_RANGE(0x6002, 0x6002) AM_READ_PORT("IN2") /* P2 IO */
AM_RANGE(0x8000, 0x8000) AM_READ_PORT("DSW1")
AM_RANGE(0x8001, 0x8001) AM_READ_PORT("DSW2")
AM_RANGE(0xa000, 0xa000) AM_WRITENOP /* INTMAIN - Interrupts main CPU (unused) */
AM_RANGE(0xc000, 0xc000) AM_WRITENOP /* INT (Actually is NMI) enable/disable (unused)*/
AM_RANGE(0xc001, 0xc001) AM_WRITE(watchdog_reset_w)
AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_SHARE(1)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x2000, 0x2000) AM_WRITE(megazone_i8039_irq_w) /* START line. Interrupts 8039 */
AM_RANGE(0x4000, 0x4000) AM_WRITE(soundlatch_w) /* CODE line. Command Interrupts 8039 */
AM_RANGE(0xa000, 0xa000) AM_WRITE(SMH_RAM) /* INTMAIN - Interrupts main CPU (unused) */
AM_RANGE(0xc000, 0xc000) AM_WRITE(SMH_RAM) /* INT (Actually is NMI) enable/disable (unused)*/
AM_RANGE(0xc001, 0xc001) AM_WRITE(watchdog_reset_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
static ADDRESS_MAP_START( megazone_sound_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_DEVWRITE("ay", ay8910_address_w)
AM_RANGE(0x00, 0x02) AM_DEVREAD("ay", ay8910_r)
AM_RANGE(0x02, 0x02) AM_DEVWRITE("ay", ay8910_data_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( i8039_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM)
static ADDRESS_MAP_START( megazone_i8039_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( i8039_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( i8039_io_map, ADDRESS_SPACE_IO, 8 )
static ADDRESS_MAP_START( megazone_i8039_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x00, 0xff) AM_READ(soundlatch_r)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("dac", dac_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(i8039_irqen_and_status_w)
@ -256,17 +242,17 @@ static MACHINE_DRIVER_START( megazone )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", M6809, 18432000/9) /* 2 MHz */
MDRV_CPU_PROGRAM_MAP(readmem,writemem)
MDRV_CPU_PROGRAM_MAP(megazone_map,0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
MDRV_CPU_ADD("audiocpu", Z80,18432000/6) /* Z80 Clock is derived from the H1 signal */
MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
MDRV_CPU_IO_MAP(sound_io_map,0)
MDRV_CPU_PROGRAM_MAP(megazone_sound_map,0)
MDRV_CPU_IO_MAP(megazone_sound_io_map,0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
MDRV_CPU_ADD("daccpu", I8039,14318000/2) /* 1/2 14MHz crystal */
MDRV_CPU_PROGRAM_MAP(i8039_readmem,i8039_writemem)
MDRV_CPU_IO_MAP(i8039_io_map,0)
MDRV_CPU_PROGRAM_MAP(megazone_i8039_map,0)
MDRV_CPU_IO_MAP(megazone_i8039_io_map,0)
MDRV_QUANTUM_TIME(HZ(900))