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Hooked up Epson 62423 RTC device to Hyper Neo Geo 64 [Angelo Salese]

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Made 24/12h bit register to be correctly activated in Epson 62423 RTC device [Angelo Salese]
This commit is contained in:
Angelo Salese 2012-08-17 14:53:54 +00:00
parent 9120af1c1b
commit 04afcc0837
3 changed files with 72 additions and 49 deletions
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69
src/emu/machine/msm6242.c
View File

@ -1,11 +1,12 @@
/***************************************************************************
MSM6242 Real Time Clock
MSM6242 / Epson RTC 62421 / 62423 Real Time Clock
TODO:
- HOLD mechanism
- IRQ ACK
- why skns tries to read uninitialized registers?
- IRQs are grossly mapped
- STOP / RESET mechanism
- why skns.c games try to read uninitialized registers?
***************************************************************************/
@ -250,6 +251,13 @@ WRITE8_MEMBER( msm6242_device::write )
{
case MSM6242_REG_CD:
{
/*
x--- 30s ADJ
-x-- IRQ FLAG
--x- BUSY
---x HOLD
*/
m_reg[0] = data & 0x0f;
#if 0
@ -269,36 +277,45 @@ WRITE8_MEMBER( msm6242_device::write )
}
case MSM6242_REG_CE:
m_reg[1] = data & 0x0f;
if((data & 3) == 0) // MASK & STD = 0
{
m_irq_flag = 1;
m_irq_type = (data & 0xc) >> 2;
//m_std_timer->adjust(attotime::from_msec(timer_param[(data & 0xc) >> 2]), 0, attotime::from_msec(timer_param[(data & 0xc) >> 2]));
}
else
{
m_irq_flag = 0;
if ( !m_out_int_func.isnull() )
m_out_int_func( CLEAR_LINE );
}
/*
xx-- t0,t1 (timing irq)
--x- STD
---x MASK
*/
return;
case MSM6242_REG_CF:
{
/* the 12/24 mode bit can only be changed while REST is 1 */
if ((data ^ m_reg[2]) & 0x04)
m_reg[1] = data & 0x0f;
if((data & 3) == 0) // MASK & STD = 0
{
m_reg[2] = (m_reg[2] & 0x04) | (data & ~0x04);
if (m_reg[2] & 1)
m_reg[2] = (m_reg[2] & ~0x04) | (data & 0x04);
m_irq_flag = 1;
m_irq_type = (data & 0xc) >> 2;
//m_std_timer->adjust(attotime::from_msec(timer_param[(data & 0xc) >> 2]), 0, attotime::from_msec(timer_param[(data & 0xc) >> 2]));
}
else
{
m_reg[2] = data & 0x0f;
m_irq_flag = 0;
if ( !m_out_int_func.isnull() )
m_out_int_func( CLEAR_LINE );
}
return;
}
case MSM6242_REG_CF:
{
/*
x--- TEST
-x-- 24/12
--x- STOP
---x RESET
*/
/* the 12/24 mode bit can only be changed when RESET does a 1 -> 0 transition */
if (((data & 0x01) == 0x00) && (m_reg[2] & 0x01))
m_reg[2] = (m_reg[2] & ~0x04) | (data & 0x04);
else
m_reg[2] = (data & 0x0b) | (m_reg[2] & 4);
return;
}
}

48
src/mame/drivers/hng64.c
View File

@ -525,15 +525,23 @@ WRITE32_MEMBER(hng64_state::hng64_pal_w)
READ32_MEMBER(hng64_state::hng64_sysregs_r)
{
system_time systime;
machine().base_datetime(systime);
UINT16 rtc_addr;
#if 0
if((offset*4) != 0x1084)
printf("HNG64 port read (PC=%08x) 0x%08x\n", cpu_get_pc(&space.device()), offset*4);
#endif
rtc_addr = offset >> 1;
if((rtc_addr & 0xff0) == 0x420)
{
if((rtc_addr & 0xf) == 0xd)
return m_rtc->read(space, (rtc_addr) & 0xf) | 0x10; // bit 4 disables "system log reader"
return m_rtc->read(space, (rtc_addr) & 0xf);
}
switch(offset*4)
{
case 0x001c: return machine().rand(); // hng64 hangs on start-up if zero.
@ -543,24 +551,6 @@ READ32_MEMBER(hng64_state::hng64_sysregs_r)
//case 0x108c:
case 0x1104: return m_interrupt_level_request;
case 0x1254: return 0x00000000; //dma status, 0x800
/* 4-bit RTC */
case 0x2104: return (systime.local_time.second % 10);
case 0x210c: return (systime.local_time.second / 10);
case 0x2114: return (systime.local_time.minute % 10);
case 0x211c: return (systime.local_time.minute / 10);
case 0x2124: return (systime.local_time.hour % 10);
case 0x212c: return (systime.local_time.hour / 10);
case 0x2134: return (systime.local_time.mday % 10);
case 0x213c: return (systime.local_time.mday / 10);
case 0x2144: return ((systime.local_time.month+1) % 10);
case 0x214c: return ((systime.local_time.month+1) / 10);
case 0x2154: return (systime.local_time.year%10);
case 0x215c: return ((systime.local_time.year%100)/10);
case 0x2164: return (systime.local_time.weekday);
case 0x216c: return 0x00000010; //disables "system log reader"
case 0x217c: return 0; //RTC status?
}
// printf("%08x\n",offset*4);
@ -602,9 +592,14 @@ static void hng64_do_dma(address_space *space)
WRITE32_MEMBER(hng64_state::hng64_sysregs_w)
{
COMBINE_DATA (&m_sysregs[offset]);
if(((offset >> 1) & 0xff0) == 0x420)
{
m_rtc->write(space, (offset >> 1) & 0xf,data);
return;
}
#if 0
if(((offset*4) & 0x1200) == 0x1200)
printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, m_sysregs[offset], cpu_get_pc(&space.device()));
@ -626,7 +621,7 @@ WRITE32_MEMBER(hng64_state::hng64_sysregs_w)
hng64_do_dma(&space);
break;
//default:
//printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, m_sysregs[offset], cpu_get_pc(&space.device()));
// printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, m_sysregs[offset], cpu_get_pc(&space.device()));
}
}
@ -1791,6 +1786,12 @@ static MACHINE_RESET(hyperneo)
state->m_mcu_en = 0;
}
static MSM6242_INTERFACE( hng64_rtc_intf )
{
DEVCB_NULL
};
static MACHINE_CONFIG_START( hng64, hng64_state )
/* basic machine hardware */
@ -1807,6 +1808,7 @@ static MACHINE_CONFIG_START( hng64, hng64_state )
MCFG_CPU_IO_MAP(hng_comm_io_map)
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_MSM6242_ADD("rtc", hng64_rtc_intf)
MCFG_GFXDECODE(hng64)
MCFG_MACHINE_START(hyperneo)

4
src/mame/includes/hng64.h
View File

@ -1,3 +1,5 @@
#include "machine/msm6242.h"
#define FIGHT_MCU 1
#define SHOOT_MCU 2
#define RACING_MCU 3
@ -9,6 +11,7 @@ public:
hng64_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_rtc(*this, "rtc"),
m_mainram(*this, "mainram"),
m_cart(*this, "cart"),
m_sysregs(*this, "sysregs"),
@ -27,6 +30,7 @@ public:
m_com_mmu_mem(*this, "com_mmu_mem"){ }
required_device<cpu_device> m_maincpu;
required_device<msm6242_device> m_rtc;
required_shared_ptr<UINT32> m_mainram;
required_shared_ptr<UINT32> m_cart;
required_shared_ptr<UINT32> m_sysregs;