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https://github.com/holub/mame
synced 2025-04-24 01:11:11 +03:00
Yet another system 11 irq speed fix: Correct the E clock frequency used for the IRQ generation. Hopefully more games will pass their IRQ self-test now. [Lord Nightmare, Barry Rodewald]
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@ -22,6 +22,10 @@ ToDo:
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#include "sound/dac.h"
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#include "s11.lh"
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// 6802/8 CPU's input clock is 4MHz
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// but because it has an internal /4 divider, its E clock runs at 1/4 that frequency
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#define E_CLOCK (XTAL_4MHz/4)
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// Length of time in cycles between IRQs on the main 6808 CPU
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// This length is determined by the settings of the W14 and W15 jumpers
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// It can be 0x300, 0x380, 0x700 or 0x780 cycles long.
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@ -235,7 +239,7 @@ void s11_state::device_timer(emu_timer &timer, device_timer_id id, int param, vo
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if(param == 1)
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{
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m_maincpu->set_input_line(M6800_IRQ_LINE,ASSERT_LINE);
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m_irq_timer->adjust(attotime::from_ticks(32,XTAL_4MHz),0);
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m_irq_timer->adjust(attotime::from_ticks(32,E_CLOCK),0);
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m_pias->cb1_w(0);
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m_irq_active = true;
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m_pia28->ca1_w(BIT(ioport("DIAGS")->read(), 2)); // Advance
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@ -244,7 +248,7 @@ void s11_state::device_timer(emu_timer &timer, device_timer_id id, int param, vo
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else
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{
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m_maincpu->set_input_line(M6800_IRQ_LINE,CLEAR_LINE);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1);
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m_pias->cb1_w(1);
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m_irq_active = false;
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m_pia28->ca1_w(1);
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@ -279,7 +283,7 @@ WRITE_LINE_MEMBER( s11_state::pia_irq )
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if(state == CLEAR_LINE)
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{
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// restart IRQ timer
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1);
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m_irq_active = false;
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}
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else
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@ -591,7 +595,7 @@ DRIVER_INIT_MEMBER( s11_state, s11 )
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membank("bank0")->set_entry(0);
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membank("bank1")->set_entry(0);
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m_irq_timer = timer_alloc(TIMER_IRQ);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1);
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m_irq_active = false;
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}
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@ -27,11 +27,15 @@ Note: To start a game, certain switches need to be activated. You must first pr
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#include "sound/dac.h"
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#include "s11a.lh"
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// 6802/8 CPU's input clock is 4MHz
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// but because it has an internal /4 divider, its E clock runs at 1/4 that frequency
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#define E_CLOCK (XTAL_4MHz/4)
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// Length of time in cycles between IRQs on the main 6808 CPU
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// This length is determined by the settings of the W14 and W15 jumpers
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// It can be 0x300, 0x380, 0x700 or 0x780 cycles long.
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// IRQ length is always 32 cycles
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#define S11_IRQ_CYCLES 0x700
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#define S11_IRQ_CYCLES 0x380
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class s11a_state : public genpin_class
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{
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@ -245,7 +249,7 @@ void s11a_state::device_timer(emu_timer &timer, device_timer_id id, int param, v
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if(param == 1)
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{
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m_maincpu->set_input_line(M6800_IRQ_LINE,ASSERT_LINE);
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m_irq_timer->adjust(attotime::from_ticks(32,XTAL_4MHz),0);
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m_irq_timer->adjust(attotime::from_ticks(32,E_CLOCK),0);
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m_pias->cb1_w(0);
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m_irq_active = true;
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m_pia28->ca1_w(BIT(ioport("DIAGS")->read(), 2)); // Advance
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@ -254,7 +258,7 @@ void s11a_state::device_timer(emu_timer &timer, device_timer_id id, int param, v
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else
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{
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m_maincpu->set_input_line(M6800_IRQ_LINE,CLEAR_LINE);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1);
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m_pias->cb1_w(1);
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m_irq_active = false;
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m_pia28->ca1_w(1);
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@ -290,7 +294,7 @@ WRITE_LINE_MEMBER( s11a_state::pia_irq )
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if(state == CLEAR_LINE)
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{
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// restart IRQ timer
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1);
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m_irq_active = false;
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}
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else
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@ -616,7 +620,7 @@ DRIVER_INIT_MEMBER( s11a_state, s11a )
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membank("bank1")->set_entry(0);
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membank("bgbank")->set_entry(0);
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m_irq_timer = timer_alloc(TIMER_IRQ);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1);
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m_irq_active = false;
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}
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@ -17,6 +17,10 @@
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#include "sound/dac.h"
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#include "s11b.lh"
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// 6802/8 CPU's input clock is 4MHz
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// but because it has an internal /4 divider, its E clock runs at 1/4 that frequency
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#define E_CLOCK (XTAL_4MHz/4)
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// Length of time in cycles between IRQs on the main 6808 CPU
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// This length is determined by the settings of the W14 and W15 jumpers
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// It can be 0x300, 0x380, 0x700 or 0x780 cycles long.
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@ -243,7 +247,7 @@ void s11b_state::device_timer(emu_timer &timer, device_timer_id id, int param, v
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if(param == 1)
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{
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m_maincpu->set_input_line(M6800_IRQ_LINE,ASSERT_LINE);
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m_irq_timer->adjust(attotime::from_ticks(32,XTAL_4MHz),0);
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m_irq_timer->adjust(attotime::from_ticks(32,E_CLOCK),0);
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m_pias->cb1_w(0);
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m_irq_active = true;
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m_pia28->ca1_w(BIT(ioport("DIAGS")->read(), 2)); // Advance
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@ -252,7 +256,7 @@ void s11b_state::device_timer(emu_timer &timer, device_timer_id id, int param, v
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else
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{
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m_maincpu->set_input_line(M6800_IRQ_LINE,CLEAR_LINE);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1);
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m_pias->cb1_w(1);
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m_irq_active = false;
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m_pia28->ca1_w(1);
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@ -291,7 +295,7 @@ WRITE_LINE_MEMBER( s11b_state::pia_irq )
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if(state == CLEAR_LINE)
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{
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// restart IRQ timer
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1);
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m_irq_active = false;
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}
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else
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@ -651,7 +655,7 @@ DRIVER_INIT_MEMBER( s11b_state, s11b )
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membank("bgbank")->set_entry(0);
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m_invert = false;
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m_irq_timer = timer_alloc(TIMER_IRQ);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1);
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m_irq_active = false;
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}
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@ -667,7 +671,7 @@ DRIVER_INIT_MEMBER( s11b_state, s11b_invert )
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membank("bgbank")->set_entry(0);
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m_invert = true;
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m_irq_timer = timer_alloc(TIMER_IRQ);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1);
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m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1);
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m_irq_active = false;
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}
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