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m68k: throw F-line trap correctly when PMMU instructions are hit on non-equipped CPUs.

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This commit is contained in:
R. Belmont 2009-10-05 04:26:11 +00:00
parent 1945a6b4cb
commit 0585b0a309
1 changed files with 6 additions and 7 deletions
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13
src/emu/cpu/m68000/m68k_in.c
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@ -7997,13 +7997,12 @@ M68KMAKE_OP(pea, 32, ., .)
M68KMAKE_OP(pflush, 32, ., .) M68KMAKE_OP(pflush, 32, ., .)
{ {
if ((CPU_TYPE_IS_040_PLUS(m68k->cpu_type)) && (m68k->has_pmmu)) if ((CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type)) && (m68k->has_pmmu))
{ {
// Nothing to do, unless address translation cache is emulated
logerror("680x0: unhandled PFLUSH\n"); logerror("680x0: unhandled PFLUSH\n");
return; return;
} }
m68ki_exception_illegal(m68k); m68ki_exception_1111(m68k);
} }
M68KMAKE_OP(pmove, 32, ., .) M68KMAKE_OP(pmove, 32, ., .)
@ -8011,16 +8010,16 @@ M68KMAKE_OP(pmove, 32, ., .)
UINT16 modes; UINT16 modes;
UINT32 ea; UINT32 ea;
modes = m68ki_read_imm_16(m68k);
ea = M68KMAKE_GET_EA_AY_32;
if ((CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type)) && (m68k->has_pmmu)) if ((CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type)) && (m68k->has_pmmu))
{ {
modes = m68ki_read_imm_16(m68k);
ea = M68KMAKE_GET_EA_AY_32;
logerror("680x0: unhandled PMOVE modes %x ea %x\n", modes, ea); logerror("680x0: unhandled PMOVE modes %x ea %x\n", modes, ea);
} }
else else
{ {
m68ki_exception_illegal(m68k); m68ki_exception_1111(m68k);
} }
} }