diff --git a/src/devices/cpu/m6805/6805ops.hxx b/src/devices/cpu/m6805/6805ops.hxx index e8c0a5b0fc0..b00e5181b93 100644 --- a/src/devices/cpu/m6805/6805ops.hxx +++ b/src/devices/cpu/m6805/6805ops.hxx @@ -27,841 +27,815 @@ OP_HANDLER( illegal ) logerror("M6805: illegal opcode\n"); } -/* $00/$02/$04/$06/$08/$0A/$0C/$0E BRSET direct,relative ---- */ +// $00/$02/$04/$06/$08/$0A/$0C/$0E BRSET direct,relative ---* OP_HANDLER_BIT( brset ) { u8 t, r; DIRBYTE(r); - IMMBYTE(t); - + immbyte(t); CLC; if (BIT(r, B)) { SEC; PC += SIGNED(t); } } -/* $01/$03/$05/$07/$09/$0B/$0D/$0F BRCLR direct,relative ---- */ +// $01/$03/$05/$07/$09/$0B/$0D/$0F BRCLR direct,relative ---* OP_HANDLER_BIT( brclr ) { u8 t, r; DIRBYTE(r); - IMMBYTE(t); - + immbyte(t); SEC; if (!BIT(r, B)) { CLC; PC += SIGNED(t); } } -/* $10/$12/$14/$16/$18/$1A/$1C/$1E BSET direct ---- */ +// $10/$12/$14/$16/$18/$1A/$1C/$1E BSET direct ---- OP_HANDLER_BIT( bset ) { u8 t; DIRBYTE(t); - WM(EAD, t | (u8(1) << B)); + wm(EAD, t | (u8(1) << B)); } -/* $11/$13/$15/$17/$19/$1B/$1D/$1F BCLR direct ---- */ +// $11/$13/$15/$17/$19/$1B/$1D/$1F BCLR direct ---- OP_HANDLER_BIT( bclr ) { u8 t; DIRBYTE(t); - WM(EAD, t & ~(u8(1) << B)); + wm(EAD, t & ~(u8(1) << B)); } -/* $20 BRA relative ---- */ -/* $21 BRN relative ---- */ +// $20 BRA relative ---- +// $21 BRN relative ---- OP_HANDLER_BRA( bra ) { BRANCH( true ); } -/* $22 BHI relative ---- */ -/* $23 BLS relative ---- */ +// $22 BHI relative ---- +// $23 BLS relative ---- OP_HANDLER_BRA( bhi ) { BRANCH( !(CC & (CFLAG | ZFLAG)) ); } -/* $24 BCC relative ---- */ -/* $25 BCS relative ---- */ +// $24 BCC relative ---- +// $25 BCS relative ---- OP_HANDLER_BRA( bcc ) { BRANCH( !(CC & CFLAG) ); } -/* $26 BNE relative ---- */ -/* $27 BEQ relative ---- */ +// $26 BNE relative ---- +// $27 BEQ relative ---- OP_HANDLER_BRA( bne ) { BRANCH( !(CC & ZFLAG) ); } -/* $28 BHCC relative ---- */ -/* $29 BHCS relative ---- */ +// $28 BHCC relative ---- +// $29 BHCS relative ---- OP_HANDLER_BRA( bhcc ) { BRANCH( !(CC & HFLAG) ); } -/* $2a BPL relative ---- */ -/* $2b BMI relative ---- */ +// $2a BPL relative ---- +// $2b BMI relative ---- OP_HANDLER_BRA( bpl ) { BRANCH( !(CC & NFLAG) ); } -/* $2c BMC relative ---- */ -/* $2d BMS relative ---- */ +// $2c BMC relative ---- +// $2d BMS relative ---- OP_HANDLER_BRA( bmc ) { BRANCH( !(CC & IFLAG) ); } -/* $2e BIL relative ---- */ +// $2e BIL relative ---- OP_HANDLER( bil ) { bool const C = true; BRANCH( m_irq_state[M6805_IRQ_LINE] != CLEAR_LINE ); } -/* $2f BIH relative ---- */ -OP_HANDLER( bih ) -{ - bool const C = false; - BRANCH( m_irq_state[M6805_IRQ_LINE] != CLEAR_LINE ); -} - DERIVED_OP_HANDLER( hd63705, bil ) { bool const C = true; BRANCH( m_nmi_state != CLEAR_LINE ); } +// $2f BIH relative ---- +OP_HANDLER( bih ) +{ + bool const C = false; + BRANCH( m_irq_state[M6805_IRQ_LINE] != CLEAR_LINE ); +} + DERIVED_OP_HANDLER( hd63705, bih ) { bool const C = false; BRANCH( m_nmi_state != CLEAR_LINE ); } -/* $30 NEG direct -*** */ -/* $60 NEG indexed, 1 byte offset -*** */ -/* $70 NEG indexed -*** */ +// $30 NEG direct -*** +// $60 NEG indexed, 1 byte offset -*** +// $70 NEG indexed -*** OP_HANDLER_MODE( neg ) { u8 t; ARGBYTE(t); u16 const r = -t; - CLR_NZC; - SET_FLAGS8(0, t, r); - WM(EAD, r); + clr_nzc(); + set_nzc8(r); + wm(EAD, r); } -/* $31 ILLEGAL */ -/* $61 ILLEGAL */ -/* $71 ILLEGAL */ +// $31 ILLEGAL +// $61 ILLEGAL +// $71 ILLEGAL -/* $32 ILLEGAL */ -/* $62 ILLEGAL */ -/* $72 ILLEGAL */ +// $32 ILLEGAL +// $62 ILLEGAL +// $72 ILLEGAL -/* $33 COM direct -**1 */ -/* $63 COM indexed, 1 byte offset -**1 */ -/* $73 COM indexed -**1 */ +// $33 COM direct -**1 +// $63 COM indexed, 1 byte offset -**1 +// $73 COM indexed -**1 OP_HANDLER_MODE( com ) { u8 t; ARGBYTE(t); t = ~t; - CLR_NZ; - SET_NZ8(t); + clr_nz(); + set_nz8(t); SEC; - WM(EAD, t); + wm(EAD, t); } -/* $34 LSR direct -0** */ -/* $64 LSR indexed, 1 byte offset -0** */ -/* $74 LSR indexed -0** */ +// $34 LSR direct -0** +// $64 LSR indexed, 1 byte offset -0** +// $74 LSR indexed -0** OP_HANDLER_MODE( lsr ) { u8 t; ARGBYTE(t); - CLR_NZC; + clr_nzc(); CC |= BIT(t, 0); t >>= 1; - SET_Z8(t); - WM(EAD, t); + set_z8(t); + wm(EAD, t); } -/* $35 ILLEGAL */ -/* $65 ILLEGAL */ -/* $75 ILLEGAL */ +// $35 ILLEGAL +// $65 ILLEGAL +// $75 ILLEGAL -/* $36 ROR direct -*** */ -/* $66 ROR indexed, 1 byte offset -*** */ -/* $76 ROR indexed -*** */ +// $36 ROR direct -*** +// $66 ROR indexed, 1 byte offset -*** +// $76 ROR indexed -*** OP_HANDLER_MODE( ror ) { u8 t; ARGBYTE(t); u8 r = BIT(CC, 0) << 7; - CLR_NZC; + clr_nzc(); CC |= BIT(t, 0); r |= t >> 1; - SET_NZ8(r); - WM(EAD, r); + set_nz8(r); + wm(EAD, r); } -/* $37 ASR direct ?*** */ -/* $67 ASR indexed, 1 byte offset ?*** */ -/* $77 ASR indexed ?*** */ +// $37 ASR direct -*** +// $67 ASR indexed, 1 byte offset -*** +// $77 ASR indexed -*** OP_HANDLER_MODE( asr ) { u8 t; ARGBYTE(t); - CLR_NZC; + clr_nzc(); CC |= BIT(t, 0); t = (t >> 1) | (t & 0x80); - SET_NZ8(t); - WM(EAD, t); + set_nz8(t); + wm(EAD, t); } -/* $38 LSL direct ?*** */ -/* $68 LSL indexed, 1 byte offset ?*** */ -/* $78 LSL indexed ?*** */ +// $38 LSL direct -*** +// $68 LSL indexed, 1 byte offset -*** +// $78 LSL indexed -*** OP_HANDLER_MODE( lsl ) { u8 t; ARGBYTE(t); - u16 const r = t << 1; - CLR_NZC; - SET_FLAGS8(t, t, r); - WM(EAD, r); + u16 const r = u16(t) << 1; + clr_nzc(); + set_nzc8(r); + wm(EAD, r); } -/* $39 ROL direct -*** */ -/* $69 ROL indexed, 1 byte offset -*** */ -/* $79 ROL indexed -*** */ +// $39 ROL direct -*** +// $69 ROL indexed, 1 byte offset -*** +// $79 ROL indexed -*** OP_HANDLER_MODE( rol ) { u16 t; ARGBYTE(t); u16 const r = BIT(CC, 0) | (t << 1); - CLR_NZC; - SET_FLAGS8(t, t, r); - WM(EAD, r); + clr_nzc(); + set_nzc8(r); + wm(EAD, r); } -/* $3a DEC direct -**- */ -/* $6a DEC indexed, 1 byte offset -**- */ +// $3a DEC direct -**- +// $6a DEC indexed, 1 byte offset -**- OP_HANDLER_MODE( dec ) { u8 t; ARGBYTE(t); --t; - CLR_NZ; - SET_FLAGS8D(t); - WM(EAD, t); + clr_nz(); + set_nz8(t); + wm(EAD, t); } -/* $3b ILLEGAL */ -/* $6b ILLEGAL */ -/* $7b ILLEGAL */ +// $3b ILLEGAL +// $6b ILLEGAL +// $7b ILLEGAL -/* $3c INC direct -**- */ -/* $6c INC indexed, 1 byte offset -**- */ -/* $7c INC indexed -**- */ +// $3c INC direct -**- +// $6c INC indexed, 1 byte offset -**- +// $7c INC indexed -**- OP_HANDLER_MODE( inc ) { u8 t; ARGBYTE(t); ++t; - CLR_NZ; - SET_FLAGS8I(t); - WM(EAD, t); + clr_nz(); + set_nz8(t); + wm(EAD, t); } -/* $3d TST direct -**- */ -/* $6d TST indexed, 1 byte offset -**- */ -/* $7d TST indexed -**- */ +// $3d TST direct -**- +// $6d TST indexed, 1 byte offset -**- +// $7d TST indexed -**- OP_HANDLER_MODE( tst ) { u8 t; ARGBYTE(t); - CLR_NZ; - SET_NZ8(t); + clr_nz(); + set_nz8(t); } -/* $3e ILLEGAL */ -/* $6e ILLEGAL */ -/* $7e ILLEGAL */ +// $3e ILLEGAL +// $6e ILLEGAL +// $7e ILLEGAL -/* $3f CLR direct -0100 */ -/* $6f CLR indexed, 1 byte offset -0100 */ -/* $7f CLR indexed -0100 */ +// $3f CLR direct -01- +// $6f CLR indexed, 1 byte offset -01- +// $7f CLR indexed -01- OP_HANDLER_MODE( clr ) { ARGADDR; - CLR_NZ; + clr_nz(); SEZ; - WM(EAD, 0); + wm(EAD, 0); } -/* $40 NEGA inherent ?*** */ +// $40 NEGA inherent -*** OP_HANDLER( nega ) { - u16 r; - r = -A; - CLR_NZC; SET_FLAGS8(0,A,r); + u16 const r = -A; + clr_nzc(); + set_nzc8(r); A = r; } -/* $41 ILLEGAL */ +// $41 ILLEGAL -/* $42 ILLEGAL */ +// $42 ILLEGAL -/* $43 COMA inherent -**1 */ +// $43 COMA inherent -**1 OP_HANDLER( coma ) { A = ~A; - CLR_NZ; - SET_NZ8(A); + clr_nz(); + set_nz8(A); SEC; } -/* $44 LSRA inherent -0** */ +// $44 LSRA inherent -0** OP_HANDLER( lsra ) { - CLR_NZC; - CC |= (A & 0x01); + clr_nzc(); + CC |= BIT(A, 0); A >>= 1; - SET_Z8(A); + set_z8(A); } -/* $45 ILLEGAL */ +// $45 ILLEGAL -/* $46 RORA inherent -*** */ +// $46 RORA inherent -*** OP_HANDLER( rora ) { - u8 r; - r = (CC & 0x01) << 7; - CLR_NZC; - CC |= (A & 0x01); + u8 r = BIT(CC, 0) << 7; + clr_nzc(); + CC |= BIT(A, 0); r |= A >> 1; - SET_NZ8(r); + set_nz8(r); A = r; } -/* $47 ASRA inherent ?*** */ +// $47 ASRA inherent -*** OP_HANDLER( asra ) { - CLR_NZC; - CC |= (A & 0x01); + clr_nzc(); + CC |= BIT(A, 0); A = (A & 0x80) | (A >> 1); - SET_NZ8(A); + set_nz8(A); } -/* $48 LSLA inherent ?*** */ +// $48 LSLA inherent -*** OP_HANDLER( lsla ) { - u16 r; - r = A << 1; - CLR_NZC; - SET_FLAGS8(A,A,r); + u16 const r = u16(A) << 1; + clr_nzc(); + set_nzc8(r); A = r; } -/* $49 ROLA inherent -*** */ +// $49 ROLA inherent -*** OP_HANDLER( rola ) { - u16 t,r; - t = A; - r = CC & 0x01; - r |= t << 1; - CLR_NZC; - SET_FLAGS8(t,t,r); + u16 const t = A; + u16 const r = BIT(CC, 0) | (t << 1); + clr_nzc(); + set_nzc8(r); A = r; } -/* $4a DECA inherent -**- */ +// $4a DECA inherent -**- OP_HANDLER( deca ) { --A; - CLR_NZ; - SET_FLAGS8D(A); + clr_nz(); + set_nz8(A); } -/* $4b ILLEGAL */ +// $4b ILLEGAL -/* $4c INCA inherent -**- */ +// $4c INCA inherent -**- OP_HANDLER( inca ) { ++A; - CLR_NZ; - SET_FLAGS8I(A); + clr_nz(); + set_nz8(A); } -/* $4d TSTA inherent -**- */ +// $4d TSTA inherent -**- OP_HANDLER( tsta ) { - CLR_NZ; - SET_NZ8(A); + clr_nz(); + set_nz8(A); } -/* $4e ILLEGAL */ +// $4e ILLEGAL -/* $4f CLRA inherent -010 */ +// $4f CLRA inherent -01- OP_HANDLER( clra ) { A = 0; - CLR_NZ; + clr_nz(); SEZ; } -/* $50 NEGX inherent ?*** */ +// $50 NEGX inherent -*** OP_HANDLER( negx ) { - u16 r; - r = -X; - CLR_NZC; - SET_FLAGS8(0,X,r); + u16 const r = -X; + clr_nzc(); + set_nzc8(r); X = r; } -/* $51 ILLEGAL */ +// $51 ILLEGAL -/* $52 ILLEGAL */ +// $52 ILLEGAL -/* $53 COMX inherent -**1 */ +// $53 COMX inherent -**1 OP_HANDLER( comx ) { X = ~X; - CLR_NZ; - SET_NZ8(X); + clr_nz(); + set_nz8(X); SEC; } -/* $54 LSRX inherent -0** */ +// $54 LSRX inherent -0** OP_HANDLER( lsrx ) { - CLR_NZC; - CC |= (X & 0x01); + clr_nzc(); + CC |= BIT(X, 0); X >>= 1; - SET_Z8(X); + set_z8(X); } -/* $55 ILLEGAL */ +// $55 ILLEGAL -/* $56 RORX inherent -*** */ +// $56 RORX inherent -*** OP_HANDLER( rorx ) { - u8 r; - r = (CC & 0x01) << 7; - CLR_NZC; - CC |= (X & 0x01); - r |= X>>1; - SET_NZ8(r); + u8 r = BIT(CC, 0) << 7; + clr_nzc(); + CC |= BIT(X, 0); + r |= X >> 1; + set_nz8(r); X = r; } -/* $57 ASRX inherent ?*** */ +// $57 ASRX inherent -*** OP_HANDLER( asrx ) { - CLR_NZC; - CC |= (X & 0x01); + clr_nzc(); + CC |= BIT(X, 0); X = (X & 0x80) | (X >> 1); - SET_NZ8(X); + set_nz8(X); } -/* $58 LSLX inherent ?*** */ +// $58 LSLX inherent -*** OP_HANDLER( lslx ) { - u16 r; - r = X << 1; - CLR_NZC; - SET_FLAGS8(X,X,r); + u16 r = u16(X) << 1; + clr_nzc(); + set_nzc8(r); X = r; } -/* $59 ROLX inherent -*** */ +// $59 ROLX inherent -*** OP_HANDLER( rolx ) { - u16 t,r; - t = X; - r = CC & 0x01; - r |= t<<1; - CLR_NZC; - SET_FLAGS8(t,t,r); + u16 const t = X; + u16 const r = BIT(CC, 0) | (t << 1); + clr_nzc(); + set_nzc8(r); X = r; } -/* $5a DECX inherent -**- */ +// $5a DECX inherent -**- OP_HANDLER( decx ) { --X; - CLR_NZ; - SET_FLAGS8D(X); + clr_nz(); + set_nz8(X); } -/* $5b ILLEGAL */ +// $5b ILLEGAL -/* $5c INCX inherent -**- */ +// $5c INCX inherent -**- OP_HANDLER( incx ) { ++X; - CLR_NZ; - SET_FLAGS8I(X); + clr_nz(); + set_nz8(X); } -/* $5d TSTX inherent -**- */ +// $5d TSTX inherent -**- OP_HANDLER( tstx ) { - CLR_NZ; - SET_NZ8(X); + clr_nz(); + set_nz8(X); } -/* $5e ILLEGAL */ +// $5e ILLEGAL -/* $5f CLRX inherent -010 */ +// $5f CLRX inherent -01- OP_HANDLER( clrx ) { X = 0; - CLR_NZC; + clr_nzc(); SEZ; } -/* $80 RTI inherent #### */ +// $80 RTI inherent #### OP_HANDLER( rti ) { - PULLBYTE(CC); - PULLBYTE(A); - PULLBYTE(X); - PULLWORD(m_pc); -#if IRQ_LEVEL_DETECT - if( m_irq_state != CLEAR_LINE && (CC & IFLAG) == 0 ) - { - m_pending_interrupts |= M6805_INT_IRQ; - } -#endif + pullbyte(CC); + pullbyte(A); + pullbyte(X); + pullword(m_pc); } -/* $81 RTS inherent ---- */ +// $81 RTS inherent ---- OP_HANDLER( rts ) { - PULLWORD(m_pc); + pullword(m_pc); } -/* $82 ILLEGAL */ +// $82 ILLEGAL -/* $83 SWI absolute indirect ---- */ +// $83 SWI absolute indirect ---- OP_HANDLER( swi ) { - PUSHWORD(m_pc); - PUSHBYTE(m_x); - PUSHBYTE(m_a); - PUSHBYTE(m_cc); + pushword(m_pc); + pushbyte(m_x); + pushbyte(m_a); + pushbyte(m_cc); SEI; - RM16(0xfffc, &m_pc); + rm16(0xfffc, m_pc); } DERIVED_OP_HANDLER( hd63705, swi ) { - PUSHWORD(m_pc); - PUSHBYTE(m_x); - PUSHBYTE(m_a); - PUSHBYTE(m_cc); + pushword(m_pc); + pushbyte(m_x); + pushbyte(m_a); + pushbyte(m_cc); SEI; - RM16(0x1ffa, &m_pc); + rm16(0x1ffa, m_pc); } -/* $84 ILLEGAL */ +// $84 ILLEGAL -/* $85 ILLEGAL */ +// $85 ILLEGAL -/* $86 ILLEGAL */ +// $86 ILLEGAL -/* $87 ILLEGAL */ +// $87 ILLEGAL -/* $88 ILLEGAL */ +// $88 ILLEGAL -/* $89 ILLEGAL */ +// $89 ILLEGAL -/* $8A ILLEGAL */ +// $8A ILLEGAL -/* $8B ILLEGAL */ +// $8B ILLEGAL -/* $8C ILLEGAL */ +// $8C ILLEGAL -/* $8D ILLEGAL */ +// $8D ILLEGAL -/* $8E ILLEGAL */ +// $8E ILLEGAL -/* $8F ILLEGAL */ +// $8F ILLEGAL -/* $90 ILLEGAL */ +// $90 ILLEGAL -/* $91 ILLEGAL */ +// $91 ILLEGAL -/* $92 ILLEGAL */ +// $92 ILLEGAL -/* $93 ILLEGAL */ +// $93 ILLEGAL -/* $94 ILLEGAL */ +// $94 ILLEGAL -/* $95 ILLEGAL */ +// $95 ILLEGAL -/* $96 ILLEGAL */ +// $96 ILLEGAL -/* $97 TAX inherent ---- */ +// $97 TAX inherent ---- OP_HANDLER( tax ) { X = A; } -/* $98 CLC */ +// $98 CLC OP_HANDLER( clc ) { CLC; } -/* $99 SEC */ +// $99 SEC OP_HANDLER( sec ) { SEC; } -/* $9A CLI */ -OP_HANDLER( cli ) -{ -#if IRQ_LEVEL_DETECT - if (m_irq_state != CLEAR_LINE) m_pending_interrupts |= 1 << M6805_IRQ_LINE; -#else - CLI; -#endif -} +// $9A CLI +OP_HANDLER( cli ) { CLI; } -/* $9B SEI */ -OP_HANDLER( sei ) { SEI; } +// $9B SEI +OP_HANDLER( sei ) { SEI; } // TODO: check behaviour if edge-triggered interrupt was pending when this happens -/* $9C RSP inherent ---- */ +// $9C RSP inherent ---- OP_HANDLER( rsp ) { S = SP_MASK; } -/* $9D NOP inherent ---- */ +// $9D NOP inherent ---- OP_HANDLER( nop ) { } -/* $9E ILLEGAL */ +// $9E ILLEGAL -/* $9F TXA inherent ---- */ +// $9F TXA inherent ---- OP_HANDLER( txa ) { A = X; } -/* $a0 SUBA immediate ?*** */ -/* $b0 SUBA direct ?*** */ -/* $c0 SUBA extended ?*** */ -/* $d0 SUBA indexed, 2 byte offset ?*** */ -/* $e0 SUBA indexed, 1 byte offset ?*** */ -/* $f0 SUBA indexed ?*** */ +// $a0 SUBA immediate -*** +// $b0 SUBA direct -*** +// $c0 SUBA extended -*** +// $d0 SUBA indexed, 2 byte offset -*** +// $e0 SUBA indexed, 1 byte offset -*** +// $f0 SUBA indexed -*** OP_HANDLER_MODE( suba ) { u16 t; ARGBYTE(t); u16 const r = A - t; - CLR_NZC; - SET_FLAGS8(A, t, r); + clr_nzc(); + set_nzc8(r); A = r; } -/* $a1 CMPA immediate ?*** */ -/* $b1 CMPA direct ?*** */ -/* $c1 CMPA extended ?*** */ -/* $d1 CMPA indexed, 2 byte offset ?*** */ -/* $e1 CMPA indexed, 1 byte offset ?*** */ -/* $f1 CMPA indexed ?*** */ +// $a1 CMPA immediate -*** +// $b1 CMPA direct -*** +// $c1 CMPA extended -*** +// $d1 CMPA indexed, 2 byte offset -*** +// $e1 CMPA indexed, 1 byte offset -*** +// $f1 CMPA indexed -*** OP_HANDLER_MODE( cmpa ) { u16 t; ARGBYTE(t); u16 const r = A - t; - CLR_NZC; - SET_FLAGS8(A, t, r); + clr_nzc(); + set_nzc8(r); } -/* $a2 SBCA immediate ?*** */ -/* $b2 SBCA direct ?*** */ -/* $c2 SBCA extended ?*** */ -/* $d2 SBCA indexed, 2 byte offset ?*** */ -/* $e2 SBCA indexed, 1 byte offset ?*** */ -/* $f2 SBCA indexed ?*** */ +// $a2 SBCA immediate -*** +// $b2 SBCA direct -*** +// $c2 SBCA extended -*** +// $d2 SBCA indexed, 2 byte offset -*** +// $e2 SBCA indexed, 1 byte offset -*** +// $f2 SBCA indexed -*** OP_HANDLER_MODE( sbca ) { u16 t; ARGBYTE(t); u16 const r = A - t - BIT(CC, 0); - CLR_NZC; - SET_FLAGS8(A, t, r); + clr_nzc(); + set_nzc8(r); A = r; } -/* $a3 CPX immediate -*** */ -/* $b3 CPX direct -*** */ -/* $c3 CPX extended -*** */ -/* $d3 CPX indexed, 2 byte offset -*** */ -/* $e3 CPX indexed, 1 byte offset -*** */ -/* $f3 CPX indexed -*** */ +// $a3 CPX immediate -*** +// $b3 CPX direct -*** +// $c3 CPX extended -*** +// $d3 CPX indexed, 2 byte offset -*** +// $e3 CPX indexed, 1 byte offset -*** +// $f3 CPX indexed -*** OP_HANDLER_MODE( cpx ) { u16 t; ARGBYTE(t); u16 const r = X - t; - CLR_NZC; - SET_FLAGS8(X, t, r); + clr_nzc(); + set_nzc8(r); } -/* $a4 ANDA immediate -**- */ -/* $b4 ANDA direct -**- */ -/* $c4 ANDA extended -**- */ -/* $d4 ANDA indexed, 2 byte offset -**- */ -/* $e4 ANDA indexed, 1 byte offset -**- */ -/* $f4 ANDA indexed -**- */ +// $a4 ANDA immediate -**- +// $b4 ANDA direct -**- +// $c4 ANDA extended -**- +// $d4 ANDA indexed, 2 byte offset -**- +// $e4 ANDA indexed, 1 byte offset -**- +// $f4 ANDA indexed -**- OP_HANDLER_MODE( anda ) { u8 t; ARGBYTE(t); A &= t; - CLR_NZ; - SET_NZ8(A); + clr_nz(); + set_nz8(A); } -/* $a5 BITA immediate -**- */ -/* $b5 BITA direct -**- */ -/* $c5 BITA extended -**- */ -/* $d5 BITA indexed, 2 byte offset -**- */ -/* $e5 BITA indexed, 1 byte offset -**- */ -/* $f5 BITA indexed -**- */ +// $a5 BITA immediate -**- +// $b5 BITA direct -**- +// $c5 BITA extended -**- +// $d5 BITA indexed, 2 byte offset -**- +// $e5 BITA indexed, 1 byte offset -**- +// $f5 BITA indexed -**- OP_HANDLER_MODE( bita ) { u8 t; ARGBYTE(t); u8 const r = A & t; - CLR_NZ; - SET_NZ8(r); + clr_nz(); + set_nz8(r); } -/* $a6 LDA immediate -**- */ -/* $b6 LDA direct -**- */ -/* $c6 LDA extended -**- */ -/* $d6 LDA indexed, 2 byte offset -**- */ -/* $e6 LDA indexed, 1 byte offset -**- */ -/* $f6 LDA indexed -**- */ +// $a6 LDA immediate -**- +// $b6 LDA direct -**- +// $c6 LDA extended -**- +// $d6 LDA indexed, 2 byte offset -**- +// $e6 LDA indexed, 1 byte offset -**- +// $f6 LDA indexed -**- OP_HANDLER_MODE( lda ) { ARGBYTE(A); - CLR_NZ; - SET_NZ8(A); + clr_nz(); + set_nz8(A); } -/* $a7 ILLEGAL */ -/* $b7 STA direct -**- */ -/* $c7 STA extended -**- */ -/* $d7 STA indexed, 2 byte offset -**- */ -/* $e7 STA indexed, 1 byte offset -**- */ -/* $f7 STA indexed -**- */ +// $a7 ILLEGAL +// $b7 STA direct -**- +// $c7 STA extended -**- +// $d7 STA indexed, 2 byte offset -**- +// $e7 STA indexed, 1 byte offset -**- +// $f7 STA indexed -**- OP_HANDLER_MODE( sta ) { - CLR_NZ; - SET_NZ8(A); + clr_nz(); + set_nz8(A); ARGADDR; - WM(EAD, A); + wm(EAD, A); } -/* $a8 EORA immediate -**- */ -/* $b8 EORA direct -**- */ -/* $c8 EORA extended -**- */ -/* $d8 EORA indexed, 2 byte offset -**- */ -/* $e8 EORA indexed, 1 byte offset -**- */ -/* $f8 EORA indexed -**- */ +// $a8 EORA immediate -**- +// $b8 EORA direct -**- +// $c8 EORA extended -**- +// $d8 EORA indexed, 2 byte offset -**- +// $e8 EORA indexed, 1 byte offset -**- +// $f8 EORA indexed -**- OP_HANDLER_MODE( eora ) { u8 t; ARGBYTE(t); A ^= t; - CLR_NZ; - SET_NZ8(A); + clr_nz(); + set_nz8(A); } -/* $a9 ADCA immediate **** */ -/* $b9 ADCA direct **** */ -/* $c9 ADCA extended **** */ -/* $d9 ADCA indexed, 2 byte offset **** */ -/* $e9 ADCA indexed, 1 byte offset **** */ -/* $f9 ADCA indexed **** */ +// $a9 ADCA immediate **** +// $b9 ADCA direct **** +// $c9 ADCA extended **** +// $d9 ADCA indexed, 2 byte offset **** +// $e9 ADCA indexed, 1 byte offset **** +// $f9 ADCA indexed **** OP_HANDLER_MODE( adca ) { u16 t; ARGBYTE(t); u16 const r = A + t + BIT(CC, 0); - CLR_HNZC; - SET_FLAGS8(A, t, r); - SET_H(A, t, r); + clr_hnzc(); + set_hnzc8(A, t, r); A = r; } -/* $aa ORA immediate -**- */ -/* $ba ORA direct -**- */ -/* $ca ORA extended -**- */ -/* $da ORA indexed, 2 byte offset -**- */ -/* $ea ORA indexed, 1 byte offset -**- */ -/* $fa ORA indexed -**- */ +// $aa ORA immediate -**- +// $ba ORA direct -**- +// $ca ORA extended -**- +// $da ORA indexed, 2 byte offset -**- +// $ea ORA indexed, 1 byte offset -**- +// $fa ORA indexed -**- OP_HANDLER_MODE( ora ) { u8 t; ARGBYTE(t); A |= t; - CLR_NZ; - SET_NZ8(A); + clr_nz(); + set_nz8(A); } -/* $ab ADDA immediate **** */ -/* $bb ADDA direct **** */ -/* $cb ADDA extended **** */ -/* $db ADDA indexed, 2 byte offset **** */ -/* $eb ADDA indexed, 1 byte offset **** */ -/* $fb ADDA indexed **** */ +// $ab ADDA immediate **** +// $bb ADDA direct **** +// $cb ADDA extended **** +// $db ADDA indexed, 2 byte offset **** +// $eb ADDA indexed, 1 byte offset **** +// $fb ADDA indexed **** OP_HANDLER_MODE( adda ) { u16 t; ARGBYTE(t); u16 const r = A + t; - CLR_HNZC; - SET_FLAGS8(A, t, r); - SET_H(A, t, r); + clr_hnzc(); + set_hnzc8(A, t, r); A = r; } -/* $ac ILLEGAL */ -/* $bc JMP direct -*** */ -/* $cc JMP extended -*** */ -/* $dc JMP indexed, 2 byte offset -*** */ -/* $ec JMP indexed, 1 byte offset -*** */ -/* $fc JMP indexed -*** */ +// $ac ILLEGAL +// $bc JMP direct -*** +// $cc JMP extended -*** +// $dc JMP indexed, 2 byte offset -*** +// $ec JMP indexed, 1 byte offset -*** +// $fc JMP indexed -*** OP_HANDLER_MODE( jmp ) { ARGADDR; PC = EA; } -/* $ad BSR ---- */ +// $ad BSR ---- OP_HANDLER( bsr ) { u8 t; - IMMBYTE(t); - PUSHWORD(m_pc); + immbyte(t); + pushword(m_pc); PC += SIGNED(t); } -/* $bd JSR direct ---- */ -/* $cd JSR extended ---- */ -/* $dd JSR indexed, 2 byte offset ---- */ -/* $ed JSR indexed, 1 byte offset ---- */ -/* $fd JSR indexed ---- */ +// $bd JSR direct ---- +// $cd JSR extended ---- +// $dd JSR indexed, 2 byte offset ---- +// $ed JSR indexed, 1 byte offset ---- +// $fd JSR indexed ---- OP_HANDLER_MODE( jsr ) { ARGADDR; - PUSHWORD(m_pc); + pushword(m_pc); PC = EA; } -/* $ae LDX immediate -**- */ -/* $be LDX direct -**- */ -/* $ce LDX extended -**- */ -/* $de LDX indexed, 2 byte offset -**- */ -/* $ee LDX indexed, 1 byte offset -**- */ -/* $fe LDX indexed -**- */ +// $ae LDX immediate -**- +// $be LDX direct -**- +// $ce LDX extended -**- +// $de LDX indexed, 2 byte offset -**- +// $ee LDX indexed, 1 byte offset -**- +// $fe LDX indexed -**- OP_HANDLER_MODE( ldx ) { ARGBYTE(X); - CLR_NZ; - SET_NZ8(X); + clr_nz(); + set_nz8(X); } -/* $af ILLEGAL */ -/* $bf STX direct -**- */ -/* $cf STX extended -**- */ -/* $df STX indexed, 2 byte offset -**- */ -/* $ef STX indexed, 1 byte offset -**- */ -/* $ff STX indexed -**- */ +// $af ILLEGAL +// $bf STX direct -**- +// $cf STX extended -**- +// $df STX indexed, 2 byte offset -**- +// $ef STX indexed, 1 byte offset -**- +// $ff STX indexed -**- OP_HANDLER_MODE( stx ) { - CLR_NZ; - SET_NZ8(X); + clr_nz(); + set_nz8(X); ARGADDR; - WM(EAD, X); + wm(EAD, X); } diff --git a/src/devices/cpu/m6805/m6805.cpp b/src/devices/cpu/m6805/m6805.cpp index f07a1249244..1fb5ecbbeed 100644 --- a/src/devices/cpu/m6805/m6805.cpp +++ b/src/devices/cpu/m6805/m6805.cpp @@ -40,8 +40,6 @@ #include -#define IRQ_LEVEL_DETECT 0 - #define OP(name) (&m6805_base_device::name) #define OP_T(name) (&m6805_base_device::name) #define OP_F(name) (&m6805_base_device::name) @@ -51,7 +49,7 @@ #define OP_IX(name) (&m6805_base_device::name) #define OP_IX1(name) (&m6805_base_device::name) #define OP_IX2(name) (&m6805_base_device::name) -const m6805_base_device::op_handler_func m6805_base_device::m_ophndlr[256] = +const m6805_base_device::op_handler_func m6805_base_device::m_hmos_ops[256] = { /* 0/8 1/9 2/A 3/B 4/C 5/D 6/E 7/F */ /* 0 */ OP(brset<0>),OP(brclr<0>),OP(brset<1>),OP(brclr<1>),OP(brset<2>),OP(brclr<2>),OP(brset<3>),OP(brclr<3>), @@ -88,50 +86,8 @@ const m6805_base_device::op_handler_func m6805_base_device::m_ophndlr[256] = OP_IX(eora), OP_IX(adca), OP_IX(ora), OP_IX(adda), OP_IX(jmp), OP_IX(jsr), OP_IX(ldx), OP_IX(stx) }; -const uint8_t m6805_base_device::m_flags8i[256] = /* increment */ -{ - /* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ - /*0*/ 0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - /*1*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - /*2*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - /*3*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - /*4*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - /*5*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - /*6*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - /*7*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - /*8*/ 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04, - /*9*/ 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04, - /*A*/ 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04, - /*B*/ 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04, - /*C*/ 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04, - /*D*/ 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04, - /*E*/ 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04, - /*F*/ 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04 -}; -const uint8_t m6805_base_device::m_flags8d[256] = /* decrement */ -{ - /* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ - /*0*/ 0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - /*1*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - /*2*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - /*3*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - /*4*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - /*5*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - /*6*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - /*7*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - /*8*/ 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04, - /*9*/ 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04, - /*A*/ 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04, - /*B*/ 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04, - /*C*/ 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04, - /*D*/ 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04, - /*E*/ 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04, - /*F*/ 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04 -}; - -/* what they say it is ... */ -const uint8_t m6805_base_device::m_cycles1[] = +const uint8_t m6805_base_device::m_hmos_cycles[] = { /* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ /*0*/ 10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10, @@ -152,48 +108,31 @@ const uint8_t m6805_base_device::m_cycles1[] = /*F*/ 4, 4, 4, 4, 4, 4, 4, 5, 4, 4, 4, 4, 3, 7, 4, 5 }; - -void m6805_base_device::rd_s_handler_b(uint8_t *b) +const uint8_t m6805_base_device::m_cmos_cycles[] = { - SP_INC; - *b = RM( S ); -} + /* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ + /*0*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, + /*1*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, + /*2*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + /*3*/ 5, 0, 0, 5, 5, 0, 5, 5, 5, 5, 5, 0, 5, 4, 0, 5, + /*4*/ 3, 0,11, 3, 3, 0, 3, 3, 3, 3, 3, 0, 3, 3, 0, 3, + /*5*/ 3, 0, 0, 3, 3, 0, 3, 3, 3, 3, 3, 0, 3, 3, 0, 3, + /*6*/ 6, 0, 0, 6, 6, 0, 6, 6, 6, 6, 6, 0, 6, 5, 0, 6, + /*7*/ 5, 0, 0, 5, 5, 0, 5, 5, 5, 5, 5, 0, 5, 4, 0, 5, + /*8*/ 9, 6, 0,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, + /*9*/ 0, 0, 0, 0, 0, 0, 0, 2, 2, 2, 2, 2, 2, 2, 0, 2, + /*A*/ 2, 2, 2, 2, 2, 2, 2, 0, 2, 2, 2, 2, 0, 6, 2, 0, + /*B*/ 3, 3, 3, 3, 3, 3, 3, 4, 3, 3, 3, 3, 2, 5, 3, 4, + /*C*/ 4, 4, 4, 4, 4, 4, 4, 5, 4, 4, 4, 4, 3, 6, 4, 5, + /*D*/ 5, 5, 5, 5, 5, 5, 5, 6, 5, 5, 5, 5, 4, 7, 5, 6, + /*E*/ 4, 4, 4, 4, 4, 4, 4, 5, 4, 4, 4, 4, 3, 6, 4, 5, + /*F*/ 3, 3, 3, 3, 3, 3, 3, 4, 3, 3, 3, 3, 2, 5, 3, 4 +}; -void m6805_base_device::rd_s_handler_w(PAIR *p) -{ - CLEAR_PAIR(p); - SP_INC; - p->b.h = RM( S ); - SP_INC; - p->b.l = RM( S ); -} - -void m6805_base_device::wr_s_handler_b(uint8_t *b) -{ - WM( S, *b ); - SP_DEC; -} - -void m6805_base_device::wr_s_handler_w(PAIR *p) -{ - WM( S, p->b.l ); - SP_DEC; - WM( S, p->b.h ); - SP_DEC; -} - -void m6805_base_device::RM16(uint32_t addr, PAIR *p) -{ - CLEAR_PAIR(p); - p->b.h = RM(addr); - ++addr; -// if( ++addr > AMASK ) addr = 0; - p->b.l = RM(addr); -} void m6805_base_device::interrupt_vector() { - RM16(0xffff - 5, &m_pc); + rm16(0xfffa, m_pc); } void m68hc05eg_device::interrupt_vector() @@ -201,17 +140,17 @@ void m68hc05eg_device::interrupt_vector() if ((m_pending_interrupts & (1 << M68HC05EG_INT_IRQ)) != 0) { m_pending_interrupts &= ~(1 << M68HC05EG_INT_IRQ); - RM16(0x1ffa, &m_pc); + rm16(0x1ffa, m_pc); } else if((m_pending_interrupts & (1 << M68HC05EG_INT_TIMER)) != 0) { m_pending_interrupts &= ~(1 << M68HC05EG_INT_TIMER); - RM16(0x1ff8, &m_pc); + rm16(0x1ff8, m_pc); } else if((m_pending_interrupts & (1 << M68HC05EG_INT_CPI)) != 0) { m_pending_interrupts &= ~(1 << M68HC05EG_INT_CPI); - RM16(0x1ff6, &m_pc); + rm16(0x1ff6, m_pc); } } @@ -223,42 +162,42 @@ void hd63705_device::interrupt_vector() if ((m_pending_interrupts & (1 << HD63705_INT_IRQ1)) != 0) { m_pending_interrupts &= ~(1 << HD63705_INT_IRQ1); - RM16(0x1ff8, &m_pc); + rm16(0x1ff8, m_pc); } else if ((m_pending_interrupts & (1 << HD63705_INT_IRQ2)) != 0) { m_pending_interrupts &= ~(1 << HD63705_INT_IRQ2); - RM16(0x1fec, &m_pc); + rm16(0x1fec, m_pc); } else if ((m_pending_interrupts & (1 << HD63705_INT_ADCONV)) != 0) { m_pending_interrupts &= ~(1 << HD63705_INT_ADCONV); - RM16(0x1fea, &m_pc); + rm16(0x1fea, m_pc); } else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER1)) != 0) { m_pending_interrupts &= ~(1 << HD63705_INT_TIMER1); - RM16(0x1ff6, &m_pc); + rm16(0x1ff6, m_pc); } else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER2)) != 0) { m_pending_interrupts &= ~(1 << HD63705_INT_TIMER2); - RM16(0x1ff4, &m_pc); + rm16(0x1ff4, m_pc); } else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER3)) != 0) { m_pending_interrupts &= ~(1<*m_ophndlr[ireg])(); - m_icount -= m_cycles1[ireg]; - burn_cycles(m_cycles1[ireg]); + (this->*m_hmos_ops[ireg])(); + m_icount -= m_hmos_cycles[ireg]; + burn_cycles(m_hmos_cycles[ireg]); } while (m_icount > 0); } @@ -565,7 +504,7 @@ void m68hc05eg_device::device_reset() m_sp_mask = 0xff; m_sp_low = 0xc0; - RM16(0x1ffe, &m_pc); + rm16(0x1ffe, m_pc); } void m68hc05eg_device::execute_set_input(int inputnum, int state) @@ -593,7 +532,7 @@ void hd63705_device::device_reset() m_sp_low = 0x100; m_s.w.l = SP_MASK; - RM16(0x1ffe, &m_pc); + rm16(0x1ffe, m_pc); } void hd63705_device::execute_set_input(int inputnum, int state) diff --git a/src/devices/cpu/m6805/m6805.h b/src/devices/cpu/m6805/m6805.h index d60bc5bcec2..cdcff22604c 100644 --- a/src/devices/cpu/m6805/m6805.h +++ b/src/devices/cpu/m6805/m6805.h @@ -26,8 +26,10 @@ public: m6805_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, const char *name, uint32_t addr_width, const char *shortname, const char *source); protected: + // addressing mode selector for opcode handler templates enum class addr_mode { IM, DI, EX, IX, IX1, IX2 }; + // state index constants enum { M6805_PC = 1, @@ -38,6 +40,24 @@ protected: M6805_IRQ_STATE }; + // CC masks H INZC + // 7654 3210 + enum + { + CFLAG = 0x01, + ZFLAG = 0x02, + NFLAG = 0x04, + IFLAG = 0x08, + HFLAG = 0x10 + }; + + typedef void (m6805_base_device::*op_handler_func)(); + + // opcode tables + static op_handler_func const m_hmos_ops[256]; + static u8 const m_hmos_cycles[256]; + static u8 const m_cmos_cycles[256]; + m6805_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, const char *name, uint32_t addr_width, address_map_delegate internal_map, const char *shortname, const char *source); // device-level overrides @@ -67,11 +87,38 @@ protected: // for devices with timing-sensitive peripherals virtual void burn_cycles(unsigned count) { } - void rd_s_handler_b(uint8_t *b); - void rd_s_handler_w(PAIR *p); - void wr_s_handler_b(uint8_t *b); - void wr_s_handler_w(PAIR *p); - void RM16(uint32_t addr, PAIR *p); + void clr_nz() { m_cc &= ~(NFLAG | ZFLAG); } + void clr_nzc() { m_cc &= ~(NFLAG | ZFLAG | CFLAG); } + void clr_hnzc() { m_cc &= ~(HFLAG | NFLAG | ZFLAG | CFLAG); } + + // macros for CC -- CC bits affected should be reset before calling + void set_z8(u8 a) { if (!a) m_cc |= ZFLAG; } + void set_n8(u8 a) { m_cc |= (a & 0x80) >> 5; } + void set_h(u8 a, u8 b, u8 r) { m_cc |= (a ^ b ^ r) & 0x10; } + void set_c8(u16 a) { m_cc |= BIT(a, 8); } + + // combos + void set_nz8(u8 a) { set_n8(a); set_z8(a); } + void set_nzc8(u16 a) { set_nz8(a); set_c8(a); } + void set_hnzc8(u8 a, u8 b, u16 r) { set_h(a, b, r); set_nzc8(r); } + + unsigned rdmem(u32 addr) { return unsigned(m_program->read_byte(addr)); } + void wrmem(u32 addr, u8 value) { m_program->write_byte(addr, value); } + unsigned rdop(u32 addr) { return unsigned(m_direct->read_byte(addr)); } + unsigned rdop_arg(u32 addr) { return unsigned(m_direct->read_byte(addr)); } + + unsigned rm(u32 addr) { return rdmem(addr); } + void rm16(u32 addr, PAIR &p); + void wm(u32 addr, u8 value) { wrmem(addr, value); } + + void pushbyte(u8 b); + void pushword(PAIR const &p); + void pullbyte(u8 &b); + void pullword(PAIR &p); + + template void immbyte(T &b); + void immword(PAIR &w); + void skipbyte(); template void brset(); template void brclr(); @@ -168,15 +215,15 @@ protected: const address_space_config m_program_config; // CPU registers - PAIR m_ea; /* effective address */ + PAIR m_ea; // effective address (should really be a temporary in opcode handlers) - uint32_t m_sp_mask; /* Stack pointer address mask */ - uint32_t m_sp_low; /* Stack pointer low water mark (or floor) */ - PAIR m_pc; /* Program counter */ - PAIR m_s; /* Stack pointer */ - uint8_t m_a; /* Accumulator */ - uint8_t m_x; /* Index register */ - uint8_t m_cc; /* Condition codes */ + u32 m_sp_mask; // Stack pointer address mask + u32 m_sp_low; // Stack pointer low water mark (or floor) + PAIR m_pc; // Program counter + PAIR m_s; // Stack pointer + u8 m_a; // Accumulator + u8 m_x; // Index register + u8 m_cc; // Condition codes uint16_t m_pending_interrupts; /* MB */ @@ -189,15 +236,6 @@ protected: // address spaces address_space *m_program; direct_read_data *m_direct; - -private: - typedef void (m6805_base_device::*op_handler_func)(); - - // opcode/condition tables - static const op_handler_func m_ophndlr[256]; - static const uint8_t m_flags8i[256]; - static const uint8_t m_flags8d[256]; - static const uint8_t m_cycles1[256]; }; diff --git a/src/devices/cpu/m6805/m6805defs.h b/src/devices/cpu/m6805/m6805defs.h index 3fd338817e6..84b1c941fc0 100644 --- a/src/devices/cpu/m6805/m6805defs.h +++ b/src/devices/cpu/m6805/m6805defs.h @@ -5,101 +5,72 @@ #pragma once -/****************************************************************************/ -/* Read a byte from given memory location */ -/****************************************************************************/ -#define M6805_RDMEM(addr) ((unsigned)m_program->read_byte(addr)) +#define SP_MASK m_sp_mask // stack pointer mask +#define SP_LOW m_sp_low // stack pointer low water mark +#define PC m_pc.w.l // program counter lower word +#define S m_s.w.l // stack pointer lower word +#define A m_a // accumulator +#define X m_x // index register +#define CC m_cc // condition codes -/****************************************************************************/ -/* Write a byte to given memory location */ -/****************************************************************************/ -#define M6805_WRMEM(addr, value) (m_program->write_byte(addr, value)) +#define EAD m_ea.d +#define EA m_ea.w.l -/****************************************************************************/ -/* M6805_RDOP() is identical to M6805_RDMEM() except it is used for reading */ -/* opcodes. In case of system with memory mapped I/O, this function can be */ -/* used to greatly speed up emulation */ -/****************************************************************************/ -#define M6805_RDOP(addr) ((unsigned)m_direct->read_byte(addr)) - -/****************************************************************************/ -/* M6805_RDOP_ARG() is identical to M6805_RDOP() but it's used for reading */ -/* opcode arguments. This difference can be used to support systems that */ -/* use different encoding mechanisms for opcodes and opcode arguments */ -/****************************************************************************/ -#define M6805_RDOP_ARG(addr) ((unsigned)m_direct->read_byte(addr)) - -#define SP_MASK m_sp_mask /* stack pointer mask */ -#define SP_LOW m_sp_low /* stack pointer low water mark */ -#define PC m_pc.w.l /* program counter lower word */ -#define S m_s.w.l /* stack pointer lower word */ -#define A m_a /* accumulator */ -#define X m_x /* index register */ -#define CC m_cc /* condition codes */ - -#define EAD m_ea.d -#define EA m_ea.w.l - - -/* DS -- THESE ARE RE-DEFINED IN m6805.h TO RAM, ROM or FUNCTIONS IN cpuintrf.c */ -#define RM(addr) M6805_RDMEM(addr) -#define WM(addr, value) M6805_WRMEM(addr, value) -#define M_RDOP(addr) M6805_RDOP(addr) -#define M_RDOP_ARG(addr) M6805_RDOP_ARG(addr) +// pre-clear a PAIR union; clearing h2 and h3 only might be faster? +inline void clear_pair(PAIR &p) { p.d = 0; } /* macros to tweak the PC and SP */ -#define SP_INC if( ++S > SP_MASK) S = SP_LOW -#define SP_DEC if( --S < SP_LOW) S = SP_MASK -#define SP_ADJUST(s) ( ( (s) & SP_MASK ) | SP_LOW ) +#define SP_INC if (++S > SP_MASK) S = SP_LOW +#define SP_DEC if (--S < SP_LOW) S = SP_MASK +#define SP_ADJUST(s) (((s) & SP_MASK) | SP_LOW) + +inline void m6805_base_device::rm16(u32 addr, PAIR &p) +{ + clear_pair(p); + p.b.h = rm(addr); + p.b.l = rm(addr + 1); +} + +inline void m6805_base_device::pushbyte(u8 b) +{ + wm(S, b); + SP_DEC; +} + +inline void m6805_base_device::pushword(PAIR const &p) +{ + pushbyte(p.b.l); + pushbyte(p.b.h); +} + +inline void m6805_base_device::pullbyte(u8 &b) +{ + SP_INC; + b = rm(S); +} + +inline void m6805_base_device::pullword(PAIR &p) +{ + clear_pair(p); + pullbyte(p.b.h); + pullbyte(p.b.l); +} /* macros to access memory */ -#define IMMBYTE(b) do { b = M_RDOP_ARG(PC++); } while (false) -#define IMMWORD(w) do { w.d = 0; w.b.h = M_RDOP_ARG(PC); w.b.l = M_RDOP_ARG(PC+1); PC+=2; } while (false) -#define SKIPBYTE() do { M_RDOP_ARG(PC++); } while (false) - -#define PUSHBYTE(b) wr_s_handler_b(&b) -#define PUSHWORD(w) wr_s_handler_w(&w) -#define PULLBYTE(b) rd_s_handler_b(&b) -#define PULLWORD(w) rd_s_handler_w(&w) - -/* CC masks H INZC - 7654 3210 */ -#define CFLAG 0x01 -#define ZFLAG 0x02 -#define NFLAG 0x04 -#define IFLAG 0x08 -#define HFLAG 0x10 - -#define CLR_NZ CC&=~(NFLAG|ZFLAG) -#define CLR_HNZC CC&=~(HFLAG|NFLAG|ZFLAG|CFLAG) -#define CLR_Z CC&=~(ZFLAG) -#define CLR_NZC CC&=~(NFLAG|ZFLAG|CFLAG) -#define CLR_ZC CC&=~(ZFLAG|CFLAG) - -/* macros for CC -- CC bits affected should be reset before calling */ -#define SET_Z(a) if(!a)SEZ -#define SET_Z8(a) SET_Z((uint8_t)a) -#define SET_N8(a) CC|=((a&0x80)>>5) -#define SET_H(a,b,r) CC|=((a^b^r)&0x10) -#define SET_C8(a) CC|=((a&0x100)>>8) - -#define SET_FLAGS8I(a) {CC |= m_flags8i[(a) & 0xff];} -#define SET_FLAGS8D(a) {CC |= m_flags8d[(a) & 0xff];} - -/* combos */ -#define SET_NZ8(a) {SET_N8(a); SET_Z(a);} -#define SET_FLAGS8(a,b,r) {SET_N8(r); SET_Z8(r); SET_C8(r);} +template inline void m6805_base_device::immbyte(T &b) { b = rdop_arg(PC++); } +inline void m6805_base_device::immword(PAIR &w) { w.d = 0; immbyte(w.b.h); immbyte(w.b.l); } +inline void m6805_base_device::skipbyte() { rdop_arg(PC++); } /* for treating an unsigned uint8_t as a signed int16_t */ #define SIGNED(b) (int16_t(b & 0x80 ? b | 0xff00 : b)) /* Macros for addressing modes */ -#define DIRECT do { EAD=0; IMMBYTE(m_ea.b.l); } while (false) +#define DIRECT do { EAD=0; immbyte(m_ea.b.l); } while (false) #define IMM8 do { EA = PC++; } while (false) -#define EXTENDED IMMWORD(m_ea) +#define EXTENDED immword(m_ea) #define INDEXED do { EA = X; } while (false) -#define INDEXED1 do { EAD = 0; IMMBYTE(m_ea.b.l); EA += X; } while (false) -#define INDEXED2 do { IMMWORD(m_ea); EA += X;} while (false) +#define INDEXED1 do { EAD = 0; immbyte(m_ea.b.l); EA += X; } while (false) +#define INDEXED2 do { immword(m_ea); EA += X;} while (false) /* macros to set status flags */ #if defined(SEC) @@ -126,14 +97,14 @@ case addr_mode::IX1: INDEXED1; break; \ case addr_mode::IX2: INDEXED2; break; \ } } while (false) -#define DIRBYTE(b) do { DIRECT; b = RM(EAD); } while (false) -#define EXTBYTE(b) do { EXTENDED; b = RM(EAD); } while (false) -#define IDXBYTE(b) do { INDEXED; b = RM(EAD); } while (false) -#define IDX1BYTE(b) do { INDEXED1; b = RM(EAD); } while (false) -#define IDX2BYTE(b) do { INDEXED2; b = RM(EAD); } while (false) +#define DIRBYTE(b) do { DIRECT; b = rm(EAD); } while (false) +#define EXTBYTE(b) do { EXTENDED; b = rm(EAD); } while (false) +#define IDXBYTE(b) do { INDEXED; b = rm(EAD); } while (false) +#define IDX1BYTE(b) do { INDEXED1; b = rm(EAD); } while (false) +#define IDX2BYTE(b) do { INDEXED2; b = rm(EAD); } while (false) #define ARGBYTE(b) \ do { switch (M) { \ - case addr_mode::IM: IMMBYTE(b); break; \ + case addr_mode::IM: immbyte(b); break; \ case addr_mode::DI: DIRBYTE(b); break; \ case addr_mode::EX: EXTBYTE(b); break; \ case addr_mode::IX: IDXBYTE(b); break; \ @@ -143,10 +114,7 @@ } } while (false) /* Macros for branch instructions */ -#define BRANCH(f) do { uint8_t t; IMMBYTE(t); if (bool(f) == bool(C)) PC += SIGNED(t); } while (false) - -/* pre-clear a PAIR union; clearing h2 and h3 only might be faster? */ -#define CLEAR_PAIR(p) p->d = 0 +#define BRANCH(f) do { u8 t; immbyte(t); if (bool(f) == bool(C)) PC += SIGNED(t); } while (false) offs_t CPU_DISASSEMBLE_NAME(m6805)( cpu_device *device, diff --git a/src/devices/cpu/m6805/m68705.cpp b/src/devices/cpu/m6805/m68705.cpp index 52734e0500a..7dd89585ed1 100644 --- a/src/devices/cpu/m6805/m68705.cpp +++ b/src/devices/cpu/m6805/m68705.cpp @@ -69,6 +69,13 @@ ROM_START( m68705u3 ) ROM_LOAD("bootstrap.bin", 0x0000, 0x0078, CRC(5946479b) SHA1(834ea00aef5de12dbcd6421a6e21d5ea96cfbf37)) ROM_END +constexpr u16 M68705_VECTOR_BOOTSTRAP = 0xfff6; +constexpr u16 M68705_VECTOR_TIMER = 0xfff8; +//constexpr u16 M68705_VECTOR_INT2 = 0xfff8; +constexpr u16 M68705_VECTOR_INT = 0xfffa; +//constexpr u16 M68705_VECTOR_SWI = 0xfffc; +constexpr u16 M68705_VECTOR_RESET = 0xfffe; + } // anonymous namespace @@ -500,7 +507,12 @@ void m68705_device::device_reset() if (CLEAR_LINE != m_vihtp) { LOG("loading bootstrap vector\n"); - RM16(0xfff6, &m_pc); + rm16(M68705_VECTOR_BOOTSTRAP, m_pc); + } + else + { + LOG("loading reset vector\n"); + rm16(M68705_VECTOR_RESET, m_pc); } } @@ -548,10 +560,10 @@ void m68705_device::interrupt() { if ((CC & IFLAG) == 0) { - PUSHWORD(m_pc); - PUSHBYTE(m_x); - PUSHBYTE(m_a); - PUSHBYTE(m_cc); + pushword(m_pc); + pushbyte(m_x); + pushbyte(m_a); + pushbyte(m_cc); SEI; standard_irq_callback(0); @@ -559,12 +571,12 @@ void m68705_device::interrupt() { LOGINT("servicing /INT interrupt\n"); m_pending_interrupts &= ~(1 << M68705_IRQ_LINE); - RM16(0xfffa, &m_pc); + rm16(M68705_VECTOR_INT, m_pc); } else if (BIT(m_pending_interrupts, M68705_INT_TIMER)) { LOGINT("servicing timer/counter interrupt\n"); - RM16(0xfff8, &m_pc); + rm16(M68705_VECTOR_TIMER, m_pc); } else { diff --git a/src/devices/cpu/m6805/m68705.h b/src/devices/cpu/m6805/m68705.h index 0f7896c8d19..6a3ada15c44 100644 --- a/src/devices/cpu/m6805/m68705.h +++ b/src/devices/cpu/m6805/m68705.h @@ -56,6 +56,7 @@ public: { return downcast(device).m_port_cb_w[N].set_callback(std::forward(obj)); } protected: + // state index constants enum { M68705_A = M6805_A,