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https://github.com/holub/mame
synced 2025-04-20 15:32:45 +03:00
seta/hanadojo.cpp: hookup NVRAM, identify a couple service inputs
This commit is contained in:
angelosa
parent
7009e4f676
commit
05c4e6d3a9
@ -98,7 +98,7 @@ private:
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tilemap_t *m_tilemap = nullptr;
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uint8_t m_port_select = 0;
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uint8_t m_prot_lock = 0;
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uint8_t m_prot_unlock = 0;
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required_device<cpu_device> m_maincpu;
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required_shared_ptr<uint8_t> m_custom_ram;
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@ -165,7 +165,7 @@ uint8_t albazg_state::custom_ram_r(offs_t offset)
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void albazg_state::custom_ram_w(offs_t offset, uint8_t data)
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{
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LOGPROTRAM("Custom RAM write at %02x : %02x PC = %x\n", offset + 0xaf80, data, m_maincpu->pc());
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if (m_prot_lock)
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if (m_prot_unlock)
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m_custom_ram[offset] = data;
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}
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@ -173,7 +173,7 @@ void albazg_state::custom_ram_w(offs_t offset, uint8_t data)
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void albazg_state::prot_lock_w(uint8_t data)
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{
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LOGPROTRAM("PC %04x Prot lock value written %02x\n", m_maincpu->pc(), data);
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m_prot_lock = data;
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m_prot_unlock = data;
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}
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uint8_t albazg_state::key_matrix_r()
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@ -348,13 +348,13 @@ void albazg_state::machine_start()
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m_rombank->configure_entries(0, 4, memregion("maincpu")->base() + 0x8000, 0x2000);
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save_item(NAME(m_port_select));
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save_item(NAME(m_prot_lock));
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save_item(NAME(m_prot_unlock));
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}
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void albazg_state::machine_reset()
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{
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m_port_select = 0;
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m_prot_lock = 0;
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m_prot_unlock = 0;
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}
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void albazg_state::yumefuda(machine_config &config)
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@ -4,17 +4,19 @@
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花道場 (Hana Doujou) - Alba 1984
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AAJ-11 PCB
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Test Mode tests a "N-Board I/O"
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TODO:
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- Resets itself in attract sequence, NVRAM thrash protection?
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- Uses a form of NVRAM thrash protection, not completely understood:
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\- bp b6e sub-routine: loops with ld hl,$8f14 de,$0005 expecting all values to be 0x55 or 0xaa;
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\- writes a 0 to $8f28 the 3rd time around, expecting one of the IOX to prevent that;
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\- some code uploaded in RAM at $8c00, including an IOX data_w 0x60;
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\- wpset 0x8f00,0x100,r,PC!=0xb91
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\- program and I/O accesses to $b8xx / $bcxx areas;
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\- second reset: bp 1a3,1,{a=4;g} for gameplay and attract;
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- Resets itself at the end of first attract hand & coin-in sequences
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\- bp 1a3,1,{a=4;g} to bypass;
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- Hookup NMI for coin chutes;
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- Eventually uses hopper;
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- Hopper plus other bits and bobs ("noise detection" antenna?);
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- CRTC processes params as 1088x224 with char width 8;
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- hanadojoa: slightly more protected, keeps resetting at IOX tests;
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@ -36,6 +38,11 @@ unknown 40-pin chip (stickered AN-003)
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2x AX-014 epoxy covered chips
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AX-013 epoxy covered chip
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===================================================================================================
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CN1 connects to hopper drive NS-01
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CN2/CN3 connects to 1P/2P control panels
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**************************************************************************************************/
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#include "emu.h"
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@ -63,6 +70,7 @@ public:
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_iox(*this, "iox_%u", 1U)
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, m_nvram(*this, "nvram")
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, m_dswb(*this, "DSWB")
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, m_dswc(*this, "DSWC")
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, m_patsw(*this, "PATSW")
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@ -75,10 +83,13 @@ public:
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protected:
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virtual void video_start() override ATTR_COLD;
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virtual void machine_start() override ATTR_COLD;
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virtual void machine_reset() override ATTR_COLD;
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private:
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required_device<cpu_device> m_maincpu;
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required_device_array<iox_hle_device, 2> m_iox;
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required_device<nvram_device> m_nvram;
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required_ioport m_dswb;
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required_ioport m_dswc;
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required_ioport m_patsw;
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@ -92,6 +103,9 @@ private:
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void program_map(address_map &map) ATTR_COLD;
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void io_map(address_map &map) ATTR_COLD;
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bool m_nvram_lock;
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std::unique_ptr<uint8_t[]> m_nvram_ptr;
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};
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void hanadojo_state::palette_init(palette_device &palette) const
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@ -162,8 +176,15 @@ void hanadojo_state::program_map(address_map &map)
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{
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// ldir 0-0x1ff at POST
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map(0x0000, 0x7fff).rom().nopw();
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map(0x8800, 0x8fff).ram();
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map(0x8f28, 0x8f28).lr8(NAME([] (offs_t offset) { return 0x55; }));
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map(0x8800, 0x8eff).ram();
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map(0x8f00, 0x8fff).lrw8(
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NAME([this] (offs_t offset) { return m_nvram_ptr[offset]; }),
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NAME([this] (offs_t offset, u8 data) {
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// NOTE: not all of it, would otherwise never decrease coin counter in-game
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if (!m_nvram_lock || (offset & 0x28) != 0x28)
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m_nvram_ptr[offset] = data;
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})
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);
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map(0x9000, 0x97ff).ram().share(m_videoram);
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}
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@ -197,6 +218,7 @@ void hanadojo_state::io_map(address_map &map)
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}
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// TODO: may make more sense to just use IPT_POKER_HOLD* instead.
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static INPUT_PORTS_START( hanadojo )
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PORT_START("P1_KEY0")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
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@ -228,7 +250,7 @@ static INPUT_PORTS_START( hanadojo )
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_HANAFUDA_A ) PORT_PLAYER(2)
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_HANAFUDA_D ) PORT_PLAYER(2)
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_HANAFUDA_F ) PORT_PLAYER(2) PORT_NAME("P2 Cancel")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_PLAYER(2) PORT_NAME("P2 Cancel")
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_HANAFUDA_B ) PORT_PLAYER(2)
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@ -283,18 +305,14 @@ static INPUT_PORTS_START( hanadojo )
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// NOTE: DSWD is 4 bit banks, near AY on board.
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// Game has no clear bank display compared to the others, assume one is SW2 nearby.
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PORT_START("DSWD")
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PORT_DIPNAME( 0x01, 0x00, "ARS" )
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PORT_DIPNAME( 0x01, 0x00, "ARS" ) // Credit Clear
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x00, "RES" ) // RST?
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x00, "M M" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x00, "CLR" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SERVICE1 ) // "M M" -> Memory Mode
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PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_MEMORY_RESET ) // "CLR"
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PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_GAMBLE_KEYIN )
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PORT_DIPNAME( 0x20, 0x00, "MDL" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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@ -311,6 +329,21 @@ static GFXDECODE_START( gfx_hanadojo )
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GFXDECODE_ENTRY( "tiles", 0, gfx_8x8x3_planar, 0, 32 * 2 )
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GFXDECODE_END
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void hanadojo_state::machine_start()
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{
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save_item(NAME(m_nvram_lock));
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const u32 nvram_size = 0x100;
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m_nvram_ptr = std::make_unique<uint8_t[]>(nvram_size);
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m_nvram->set_base(m_nvram_ptr.get(), nvram_size);
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save_pointer(NAME(m_nvram_ptr), nvram_size);
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}
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void hanadojo_state::machine_reset()
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{
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m_nvram_lock = false;
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}
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void hanadojo_state::hanadojo(machine_config &config)
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{
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@ -331,6 +364,8 @@ void hanadojo_state::hanadojo(machine_config &config)
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// TODO: looks latch inverted compared to the $a0-$a1 version
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m_iox[1]->p2_direct_input_cb().set([this] () { return (m_dswb->read() & 0x3f) ^ 0x3f; });
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NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
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hd6845s_device &crtc(HD6845S(config, "crtc", 12_MHz_XTAL / 4)); // divider guessed
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crtc.set_screen("screen");
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crtc.set_show_border_area(false);
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@ -353,7 +388,14 @@ void hanadojo_state::hanadojo(machine_config &config)
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SPEAKER(config, "speaker").front_center();
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ay8910_device &ay(AY8910(config, "ay", 12_MHz_XTAL / 16)); // divider guessed
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// ay.port_a_read_callback()
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ay.port_a_write_callback().set([this] (u8 data) {
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// avoid locking the NVRAM on device startup
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if (data == 0xff)
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return;
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m_nvram_lock = !!BIT(data, 7);
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// bit 5 is flip screen, others unknown
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logerror("AY Port A: %02x\n", data);
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});
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ay.port_b_read_callback().set_ioport("DSWA");
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ay.add_route(ALL_OUTPUTS, "speaker", 0.33);
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}
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