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Fixed a fatal bug in MEMC handling and removed the mapping kludge for Aristocrat MK-5 [Angelo Salese]
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ac6c07a019
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0634470398
@ -69,16 +69,19 @@ static VIDEO_UPDATE(aristmk5)
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UINT32 *vram = archimedes_memc_physmem;
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UINT32 *vram = archimedes_memc_physmem;
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// sets video DMA to 0x400 - 0x400 - 0xfe00
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// sets video DMA to 0x400 - 0x400 - 0xfe00
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count = 0x800/4; // 0x400 text is offset???
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count = 0x380/4; // 0x400 text is offset???
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for(y=0;y<400;y+=2)
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for(y=0;y<480;y++)
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{
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{
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for(x=0;x<640;x+=4)
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for(x=0;x<640;x+=4)
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{
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{
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for(xi=0;xi<4;xi++)
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for(xi=0;xi<4;xi++)
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{
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if ((x+xi) <= screen->visible_area().max_x && (y) <= screen->visible_area().max_y)
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if ((x+xi) <= screen->visible_area().max_x && (y) <= screen->visible_area().max_y)
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*BITMAP_ADDR32(bitmap, y, x+xi) = screen->machine->pens[(vram[count]>>(xi*8))&0xff];
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*BITMAP_ADDR32(bitmap, y, x+xi) = screen->machine->pens[(vram[count]>>(xi*8))&0xff];
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if ((x+xi) <= screen->visible_area().max_x && (y+1) <= screen->visible_area().max_y)
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*BITMAP_ADDR32(bitmap, y+1, x+xi) = screen->machine->pens[(vram[count]>>(xi*8))&0xff];
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}
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count++;
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count++;
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}
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}
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@ -116,9 +119,9 @@ static ADDRESS_MAP_START( aristmk5_map, ADDRESS_SPACE_PROGRAM, 32 )
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AM_RANGE(0x03010420, 0x03010423) AM_WRITE(mk5_i2c_w)
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AM_RANGE(0x03010420, 0x03010423) AM_WRITE(mk5_i2c_w)
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AM_RANGE(0x03010810, 0x03010813) AM_READNOP //MK-5 specific, watchdog
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AM_RANGE(0x03010810, 0x03010813) AM_READNOP //MK-5 specific, watchdog
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AM_RANGE(0x03000000, 0x033fffff) AM_READWRITE(mk5_ioc_r, archimedes_ioc_w)
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AM_RANGE(0x03000000, 0x033fffff) AM_READWRITE(mk5_ioc_r, archimedes_ioc_w)
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AM_RANGE(0x03400000, 0x035fffff) AM_ROM AM_REGION("maincpu", 0) AM_WRITE(archimedes_memc_page_w)
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AM_RANGE(0x03400000, 0x035fffff) AM_ROM AM_REGION("maincpu", 0) AM_WRITE(archimedes_vidc_w)
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AM_RANGE(0x03600000, 0x037fffff) AM_READWRITE(archimedes_memc_r, archimedes_memc_w)
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AM_RANGE(0x03600000, 0x037fffff) AM_READWRITE(archimedes_memc_r, archimedes_memc_w)
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AM_RANGE(0x03800000, 0x039fffff) AM_READWRITE(archimedes_vidc_r, archimedes_vidc_w) //TODO: this is different here, it appears to contain palette data only
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AM_RANGE(0x03800000, 0x039fffff) AM_WRITE(archimedes_memc_page_w)
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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@ -151,15 +154,6 @@ static MACHINE_RESET( aristmk5 )
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{
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{
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archimedes_reset(machine);
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archimedes_reset(machine);
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timer_adjust_oneshot(mk5_2KHz_timer, ATTOTIME_IN_HZ(2000), 0);
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timer_adjust_oneshot(mk5_2KHz_timer, ATTOTIME_IN_HZ(2000), 0);
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{
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int i;
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// kludge, set up MMU pages to a normal value, in order to draw all of the vram
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for (i = 0; i < (32*1024*1024)/(4096); i++)
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{
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memc_pages[i] = i;
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}
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}
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}
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}
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#define NVRAM_SIZE 1024
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#define NVRAM_SIZE 1024
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@ -492,6 +492,7 @@ WRITE32_HANDLER(archimedes_ioc_w)
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// if that did it, clear the IRQ
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// if that did it, clear the IRQ
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if (ioc_regs[IRQ_STATUS_A] == 0)
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if (ioc_regs[IRQ_STATUS_A] == 0)
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{
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{
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printf("IRQ clear A\n");
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cputag_set_input_line(space->machine, "maincpu", ARM_IRQ_LINE, CLEAR_LINE);
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cputag_set_input_line(space->machine, "maincpu", ARM_IRQ_LINE, CLEAR_LINE);
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}
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}
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break;
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break;
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@ -837,6 +838,7 @@ WRITE32_HANDLER(archimedes_memc_page_w)
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log <<= 23;
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log <<= 23;
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log |= (data & 0x7f8000);
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log |= (data & 0x7f8000);
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memc = ((data & 0x80) ? 1 : 0) | ((data & 0x1000) ? 2 : 0);
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memc = ((data & 0x80) ? 1 : 0) | ((data & 0x1000) ? 2 : 0);
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//printf("Mapping %08X to %08X\n",0x2000000+(phys*32768),(((data >> 15)&0xff)|((data >> 2)&0x300)));
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break;
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break;
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}
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}
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@ -846,7 +848,7 @@ WRITE32_HANDLER(archimedes_memc_page_w)
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memc_latchrom = 0;
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memc_latchrom = 0;
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// now go ahead and set the mapping in the page table
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// now go ahead and set the mapping in the page table
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memc_pages[log] = phys * memc;
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memc_pages[log] = phys + (memc*0x80);
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// printf("MEMC_PAGE(%d): W %08x: log %x to phys %x, MEMC %d, perms %d\n", memc_pagesize, data, log, phys, memc, perms);
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// printf("MEMC_PAGE(%d): W %08x: log %x to phys %x, MEMC %d, perms %d\n", memc_pagesize, data, log, phys, memc, perms);
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}
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}
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