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https://github.com/holub/mame
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cxd1185: fixes (nw)
* handle phase change during transfer * fix completion test during transfer in
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2c9cce590f
commit
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@ -9,7 +9,6 @@
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*
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* TODO:
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* - target mode
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* - pio mode testing
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* - cq/aq variants
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* - synchronous mode
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*/
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@ -595,7 +594,7 @@ int cxd1185_device::state_step()
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break;
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case XFR_INFO:
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LOGMASKED(LOG_STATE, "transfer: count %d waiting for REQ\n", m_count);
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LOGMASKED(LOG_STATE, "transfer: count %d waiting for REQ\n", (m_command & TRBE) ? m_count : 1);
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if (scsi_bus->ctrl_r() & S_REQ)
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m_state = scsi_bus->ctrl_r() & S_INP ? XFR_IN : XFR_OUT;
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break;
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@ -625,10 +624,12 @@ int cxd1185_device::state_step()
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case XFR_IN_NEXT:
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if (!(scsi_bus->ctrl_r() & S_REQ))
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{
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LOGMASKED(LOG_STATE, "transfer in: count %d\n", m_count);
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if (!m_count)
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LOGMASKED(LOG_STATE, "transfer in: count %d\n", (m_command & TRBE) ? m_count : 0);
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if (!(m_command & TRBE) || !m_count)
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{
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m_status |= TRBZ;
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if (m_command & TRBE)
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m_status |= TRBZ;
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m_state = XFR_IN_DRAIN;
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}
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else
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@ -641,24 +642,23 @@ int cxd1185_device::state_step()
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break;
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case XFR_IN_REQ:
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if (scsi_bus->ctrl_r() & S_REQ)
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m_state = XFR_IN;
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{
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// check if target changed phase
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if (m_int_req[1] & PHC)
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{
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if (m_command & DMA)
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set_drq(false);
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m_state = XFR_INFO_DONE;
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}
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else
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m_state = XFR_IN;
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}
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break;
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case XFR_IN_DRAIN:
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// TODO: not sure whether commands complete before fifo is empty
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#if 0
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if (!m_fifo.empty())
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{
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delay = -1;
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if (m_command & DMA)
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set_drq(true);
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}
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else
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m_state = XFR_INFO_DONE;
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#else
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if (!m_fifo.empty() && (m_command & DMA))
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set_drq(true);
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m_state = XFR_INFO_DONE;
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#endif
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break;
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case XFR_OUT:
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if (!m_fifo.empty() || (m_command & CMD) == (CMD_XFR_PAD & CMD))
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@ -682,7 +682,7 @@ int cxd1185_device::state_step()
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case XFR_OUT_NEXT:
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if (!(scsi_bus->ctrl_r() & S_REQ))
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{
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LOGMASKED(LOG_STATE, "transfer out: data accepted\n");
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LOGMASKED(LOG_STATE, "transfer out: data ACK\n");
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if (m_command & TRBE)
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{
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if (!--m_count)
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@ -702,9 +702,20 @@ int cxd1185_device::state_step()
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}
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break;
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case XFR_OUT_REQ:
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LOGMASKED(LOG_STATE, "transfer out: waiting for REQ\n");
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LOGMASKED(LOG_STATE, "transfer out: count %d waiting for REQ\n", m_count);
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if (scsi_bus->ctrl_r() & S_REQ)
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m_state = XFR_OUT;
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{
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// check if target changed phase
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if (m_int_req[1] & PHC)
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{
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if (m_command & DMA)
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set_drq(false);
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m_state = XFR_INFO_DONE;
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}
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else
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m_state = XFR_OUT;
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}
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break;
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case XFR_INFO_DONE:
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LOGMASKED(LOG_STATE, "transfer: complete\n");
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