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https://github.com/holub/mame
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rx01_cpu: Add sector data space in place of scratchpad space (nw)
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AJR
parent
5c90a13cee
commit
0709c3fe27
@ -8,7 +8,8 @@
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the rather brisk rate of 200 ns per machine cycle. However, it has no
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ALU or general-purpose data bus, so most of its operations amount to
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simple manipulations of an assortment of synchronous up counters, shift
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registers and flip-flops.
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registers and flip-flops, plus a 16-location scratchpad made up of two
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7489 16x4 register files.
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The instruction memory is organized as a series of 256-byte "fields"
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which limit the extent of conditional branches. The architecture allows
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@ -37,9 +38,9 @@ DEFINE_DEVICE_TYPE(RX01_CPU, rx01_cpu_device, "rx01_cpu", "DEC RX01 CPU")
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rx01_cpu_device::rx01_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: cpu_device(mconfig, RX01_CPU, tag, owner, clock)
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, m_inst_config("program", ENDIANNESS_LITTLE, 8, 12, 0)
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, m_sp_config("scratchpad", ENDIANNESS_LITTLE, 8, 4, 0, address_map_constructor(FUNC(rx01_cpu_device::scratchpad_map), this))
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, m_data_config("sector data", ENDIANNESS_LITTLE, 8, 10, 0) // actually 1 bit wide
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, m_inst_cache(nullptr)
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, m_sp_cache(nullptr)
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, m_data_cache(nullptr)
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, m_pc(0)
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, m_ppc(0)
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, m_mb(0)
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@ -56,8 +57,8 @@ rx01_cpu_device::rx01_cpu_device(const machine_config &mconfig, const char *tag,
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, m_load_head(false)
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, m_icount(0)
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{
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std::fill(std::begin(m_sp), std::end(m_sp), 0);
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m_inst_config.m_is_octal = true;
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m_sp_config.m_is_octal = true;
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}
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std::unique_ptr<util::disasm_interface> rx01_cpu_device::create_disassembler()
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@ -65,23 +66,18 @@ std::unique_ptr<util::disasm_interface> rx01_cpu_device::create_disassembler()
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return std::make_unique<rx01_disassembler>();
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}
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void rx01_cpu_device::scratchpad_map(address_map &map)
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{
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map(0, 15).ram().share("scratchpad"); // two 7489 16x4 register files
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}
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device_memory_interface::space_config_vector rx01_cpu_device::memory_space_config() const
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{
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return space_config_vector {
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std::make_pair(AS_PROGRAM, &m_inst_config),
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std::make_pair(AS_DATA, &m_sp_config)
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std::make_pair(AS_DATA, &m_data_config)
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};
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}
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void rx01_cpu_device::device_start()
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{
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m_inst_cache = space(AS_PROGRAM).cache<0, 0, ENDIANNESS_LITTLE>();
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m_sp_cache = space(AS_DATA).cache<0, 0, ENDIANNESS_LITTLE>();
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m_data_cache = space(AS_DATA).cache<0, 0, ENDIANNESS_LITTLE>();
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set_icountptr(m_icount);
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@ -93,9 +89,8 @@ void rx01_cpu_device::device_start()
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state_add(RX01_CNTR, "CNTR", m_cntr).formatstr("%03O");
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state_add(RX01_SR, "SR", m_sr).formatstr("%03O");
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state_add(RX01_SPAR, "SPAR", m_spar).mask(15).formatstr("%3s");
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u8 *sp = static_cast<u8 *>(memshare("scratchpad")->ptr());
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for (int r = 0; r < 16; r++)
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state_add(RX01_R0 + r, string_format("R%d", r).c_str(), sp[r]).formatstr("%03O");
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state_add(RX01_R0 + r, string_format("R%d", r).c_str(), m_sp[r]).formatstr("%03O");
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state_add(RX01_BAR, "BAR", m_bar).mask(07777).formatstr("%04O");
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state_add(RX01_CRC, "CRC", m_crc).formatstr("%06O");
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state_add(RX01_UNIT, "UNIT", m_unit);
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@ -125,7 +120,7 @@ void rx01_cpu_device::device_reset()
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m_mb = 0;
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m_inst_disable = false;
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m_inst_repeat = false;
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m_bar = 0;
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set_bar(0);
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m_cntr = 0;
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m_sr = 0;
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m_spar = 0;
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@ -137,11 +132,17 @@ void rx01_cpu_device::device_reset()
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u8 rx01_cpu_device::mux_out()
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{
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if (BIT(m_mb, 0))
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return m_sp_cache->read_byte(m_spar);
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return m_sp[m_spar];
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else
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return m_inst_cache->read_byte(m_pc);
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}
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bool rx01_cpu_device::data_in()
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{
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// TODO
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return false;
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}
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bool rx01_cpu_device::sep_data()
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{
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// TODO
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@ -160,6 +161,14 @@ bool rx01_cpu_device::drv_sel_trk0()
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return false;
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}
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bool rx01_cpu_device::sec_buf_in()
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{
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if (m_flags & FF_IOB0)
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return sep_data();
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else
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return data_in();
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}
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bool rx01_cpu_device::test_condition()
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{
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switch (m_mb & 074)
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@ -172,6 +181,10 @@ bool rx01_cpu_device::test_condition()
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// Output buffer bit 3
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return (m_flags & FF_IOB3) != 0;
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case 010:
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// Serial data from interface
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return data_in();
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case 020:
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// MSB of shift register
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return BIT(m_sr, 7);
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@ -200,6 +213,13 @@ bool rx01_cpu_device::test_condition()
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// Missing clock equals shift register MSB
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return BIT(m_sr, 7) == missing_clk();
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case 070:
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// Sector buffer output
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if (m_flags & FF_WRTBUF)
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return sec_buf_in();
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else
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return m_data_cache->read_byte(m_bar) & 1;
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case 074:
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// Flag state equals one
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return (m_flags & FF_FLAG) != 0;
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@ -210,6 +230,13 @@ bool rx01_cpu_device::test_condition()
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}
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}
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void rx01_cpu_device::set_bar(u16 bar)
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{
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if (m_bar != bar && (m_flags & FF_WRTBUF))
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m_data_cache->write_byte(m_bar, sec_buf_in());
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m_bar = bar;
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}
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void rx01_cpu_device::shift_crc(bool data)
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{
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// TODO: double-check algorithm
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@ -334,16 +361,19 @@ void rx01_cpu_device::execute_run()
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case 044:
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if (BIT(m_mb, 1))
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m_bar = (m_bar + 1) & 07777;
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set_bar((m_bar + 1) & 07777);
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else
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m_bar = BIT(m_mb, 0) ? 0 : 06000;
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set_bar(BIT(m_mb, 0) ? 0 : 06000);
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break;
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case 050:
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if (BIT(m_mb, 0))
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m_flags |= FF_WRTBUF;
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else
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else if (m_flags & FF_WRTBUF)
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{
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m_data_cache->write_byte(m_bar, sec_buf_in());
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m_flags &= ~FF_WRTBUF;
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}
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break;
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case 054:
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@ -360,7 +390,7 @@ void rx01_cpu_device::execute_run()
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break;
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case 064:
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m_sp_cache->write_byte(m_spar, m_sr);
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m_sp[m_spar] = m_sr;
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break;
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case 070:
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@ -54,22 +54,23 @@ protected:
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virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
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private:
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void scratchpad_map(address_map &map);
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// internal helpers
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u8 mux_out();
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bool data_in();
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bool sep_data();
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bool missing_clk();
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bool drv_sel_trk0();
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bool sec_buf_in();
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bool test_condition();
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void set_bar(u16 bar);
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void shift_crc(bool data);
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void set_flag(bool j, bool k);
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// address spaces
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address_space_config m_inst_config;
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address_space_config m_sp_config;
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address_space_config m_data_config;
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memory_access_cache<0, 0, ENDIANNESS_LITTLE> *m_inst_cache;
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memory_access_cache<0, 0, ENDIANNESS_LITTLE> *m_sp_cache;
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memory_access_cache<0, 0, ENDIANNESS_LITTLE> *m_data_cache;
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// internal state
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u16 m_pc;
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@ -81,6 +82,7 @@ private:
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u8 m_cntr;
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u8 m_sr;
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u8 m_spar;
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u8 m_sp[16];
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u16 m_bar;
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u16 m_crc;
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u16 m_flags;
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@ -56,6 +56,11 @@ void rx01_device::firmware_map(address_map &map)
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map(00000, 02777).rom().region("firmware", 0);
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}
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void rx01_device::secbuf_map(address_map &map)
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{
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map(00000, 01777).ram(); // FIXME: 1-bit
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}
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//-------------------------------------------------
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// device_add_mconfig - add device configuration
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//-------------------------------------------------
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@ -64,6 +69,7 @@ void rx01_device::device_add_mconfig(machine_config &config)
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{
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rx01_cpu_device &cpu(RX01_CPU(config, "rx01cpu", 20_MHz_XTAL));
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cpu.set_addrmap(AS_PROGRAM, &rx01_device::firmware_map);
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cpu.set_addrmap(AS_DATA, &rx01_device::secbuf_map);
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for (auto &floppy : m_image)
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LEGACY_FLOPPY(config, floppy, 0, &rx01_floppy_interface);
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@ -51,6 +51,7 @@ protected:
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private:
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void firmware_map(address_map &map);
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void secbuf_map(address_map &map);
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enum rx01_state {
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RX01_FILL,
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