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bus/snes/st018.cpp: Add primary support of ST018 coprocessor (#13553)
* bus/snes/st018.cpp: Add primary support of ST018 coprocessor moritas2 now boots, but still hangs at in-game. * bus/snes/st018.cpp: Fix CPU latch accessing
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cam900
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da488f5b09
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075fffa097
@ -15397,7 +15397,7 @@ more investigation needed...
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</dataarea>
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<dataarea name="addon" size="163840">
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<rom name="0xf3.u3" size="131072" crc="f73d5e10" sha1="388e3721b94cd074d6ba0eca8616523d2118a6c3" offset="0x000000" />
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<rom name="0xf4.u3" size="32768" crc="b5255459" sha1="b19c0f8f207d62fdabf4bf71442826063bccc626" offset="0x000000" />
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<rom name="0xf4.u3" size="32768" crc="b5255459" sha1="b19c0f8f207d62fdabf4bf71442826063bccc626" offset="0x020000" />
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</dataarea>
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<dataarea name="nvram" size="8192">
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</dataarea>
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@ -3675,6 +3675,8 @@ if (BUSES["SNES"]~=null) then
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MAME_DIR .. "src/devices/bus/snes/sgb.h",
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MAME_DIR .. "src/devices/bus/snes/spc7110.cpp",
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MAME_DIR .. "src/devices/bus/snes/spc7110.h",
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MAME_DIR .. "src/devices/bus/snes/st018.cpp",
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MAME_DIR .. "src/devices/bus/snes/st018.h",
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MAME_DIR .. "src/devices/bus/snes/sufami.cpp",
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MAME_DIR .. "src/devices/bus/snes/sufami.h",
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MAME_DIR .. "src/devices/bus/snes/upd.cpp",
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@ -20,6 +20,7 @@
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#include "sfx.h"
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#include "sgb.h"
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#include "spc7110.h"
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#include "st018.h"
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#include "sufami.h"
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#include "upd.h"
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@ -40,7 +41,7 @@ void snes_cart(device_slot_interface &device)
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device.option_add_internal("lorom_sgb2", SNS_LOROM_SUPERGB2); // SuperGB2 base cart - unsupported
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device.option_add_internal("lorom_st010", SNS_LOROM_SETA10);
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device.option_add_internal("lorom_st011", SNS_LOROM_SETA11);
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device.option_add_internal("lorom_st018", SNS_LOROM); // Cart + ST018 - unsupported
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device.option_add_internal("lorom_st018", SNS_LOROM_ST018);
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device.option_add_internal("lorom_sufami", SNS_LOROM_SUFAMI); // Sufami Turbo base cart
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device.option_add_internal("hirom", SNS_HIROM);
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device.option_add_internal("hirom_bsx", SNS_HIROM_BSX); // HiROM + BS-X slot - unsupported
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161
src/devices/bus/snes/st018.cpp
Normal file
161
src/devices/bus/snes/st018.cpp
Normal file
@ -0,0 +1,161 @@
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// license:BSD-3-Clause
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// copyright-holders:cam900
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/***********************************************************************************************************
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ARMv3 add-on chip emulation (for SNES/SFC)
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used in carts with ST-018 add-on chips
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***********************************************************************************************************/
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#include "emu.h"
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#include "st018.h"
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// helpers
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inline uint32_t get_prg(uint8_t *CPU, uint32_t addr)
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{
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return (CPU[addr * 4] | (CPU[addr * 4 + 1] << 8) | (CPU[addr * 4 + 2] << 16) | (CPU[addr * 4 + 3] << 24));
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}
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//-------------------------------------------------
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// constructor
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//-------------------------------------------------
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DEFINE_DEVICE_TYPE(SNS_LOROM_ST018, sns_rom_st018_device, "sns_rom_st018", "SNES Cart (LoROM) + Seta ST018")
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sns_rom_st018_device::sns_rom_st018_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: sns_rom_device(mconfig, SNS_LOROM_ST018, tag, owner, clock)
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, m_copro(*this, "copro")
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, m_cpu2copro(*this, "cpu2copro")
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, m_copro2cpu(*this, "copro2cpu")
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, m_signal(false)
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, m_copro_reset(false)
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{
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}
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void sns_rom_st018_device::device_start()
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{
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m_copro_prg.resize(0x20000/sizeof(uint32_t));
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m_copro_data.resize(0x8000/sizeof(uint32_t));
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save_item(NAME(m_signal));
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save_item(NAME(m_copro_reset));
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}
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void sns_rom_st018_device::device_reset()
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{
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m_signal = false;
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m_copro_reset = false;
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m_copro->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
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}
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/*-------------------------------------------------
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mapper specific handlers
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-------------------------------------------------*/
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//-------------------------------------------------
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// Seta ST018
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//-------------------------------------------------
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// ST018 dump contains prg at offset 0 and data at offset 0x20000
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uint32_t sns_rom_st018_device::copro_prg_r(offs_t offset)
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{
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return get_prg(&m_bios[0], offset);
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}
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uint32_t sns_rom_st018_device::copro_data_r(offs_t offset)
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{
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return get_prg(&m_bios[0], offset + 0x20000/4);
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}
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uint8_t sns_rom_st018_device::status_r()
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{
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return (m_copro2cpu->pending_r() ? 0x01 : 0) |
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(m_signal ? 0x04 : 0) |
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(m_cpu2copro->pending_r() ? 0x08 : 0) |
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(m_copro_reset ? 0 : 0x80);
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}
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void sns_rom_st018_device::signal_w(uint8_t data)
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{
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m_signal = true;
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}
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//-------------------------------------------------
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// copro_map
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//-------------------------------------------------
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void sns_rom_st018_device::copro_map(address_map &map)
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{
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map(0x0000'0000, 0x0001'ffff).r(FUNC(sns_rom_st018_device::copro_prg_r));
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map(0x4000'0000, 0x4000'0000).w(m_copro2cpu, FUNC(generic_latch_8_device::write));
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map(0x4000'0010, 0x4000'0010).r(m_cpu2copro, FUNC(generic_latch_8_device::read)).w(FUNC(sns_rom_st018_device::signal_w));
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map(0x4000'0020, 0x4000'0020).r(FUNC(sns_rom_st018_device::status_r));
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map(0x4000'0020, 0x4000'002f).nopw(); // Unknown write
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map(0xa000'0000, 0xa000'7fff).r(FUNC(sns_rom_st018_device::copro_data_r));
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map(0xe000'0000, 0xe000'3fff).ram();
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}
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//-------------------------------------------------
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// device_add_mconfig - add device configuration
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//-------------------------------------------------
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void sns_rom_st018_device::device_add_mconfig(machine_config &config)
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{
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ARM7(config, m_copro, 21440000); // TODO: ARMv3
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m_copro->set_addrmap(AS_PROGRAM, &sns_rom_st018_device::copro_map);
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GENERIC_LATCH_8(config, m_cpu2copro);
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GENERIC_LATCH_8(config, m_copro2cpu);
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}
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uint8_t sns_rom_st018_device::chip_read(offs_t offset)
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{
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uint8_t ret = 0xff;
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switch (offset & 0x06)
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{
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case 0x00:
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ret = m_copro2cpu->read();
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break;
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case 0x02:
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if (!machine().side_effects_disabled())
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m_signal = false;
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break;
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case 0x04:
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ret = status_r();
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break;
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}
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return ret;
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}
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void sns_rom_st018_device::chip_write(offs_t offset, uint8_t data)
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{
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switch (offset & 0x06)
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{
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case 0x02:
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m_cpu2copro->write(data);
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break;
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case 0x04:
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m_copro_reset = BIT(data, 0);
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m_copro->set_input_line(INPUT_LINE_RESET, m_copro_reset ? ASSERT_LINE : CLEAR_LINE);
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break;
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}
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}
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// To make faster DSP access to its internal rom, let's install read banks and map m_bios there with correct byte order
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void sns_rom_st018_device::speedup_addon_bios_access()
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{
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m_copro->space(AS_PROGRAM).install_rom(0x0000'0000, 0x0001'ffff, &m_copro_prg[0]);
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m_copro->space(AS_PROGRAM).install_rom(0xa000'0000, 0xa000'7fff, &m_copro_data[0]);
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// copy data in the correct format
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for (int x = 0; x < 0x8000; x++)
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m_copro_prg[x] = m_bios[x * 4] | (m_bios[x * 4 + 1] << 8) | (m_bios[x * 4 + 2] << 16) | (m_bios[x * 4 + 3] << 24);
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for (int x = 0; x < 0x2000; x++)
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m_copro_data[x] = m_bios[0x20000 + x * 4] | (m_bios[0x20000 + x * 4 + 1] << 8) | (m_bios[0x20000 + x * 4 + 2] << 16) | (m_bios[0x20000 + x * 4 + 3] << 24);
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}
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56
src/devices/bus/snes/st018.h
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56
src/devices/bus/snes/st018.h
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@ -0,0 +1,56 @@
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// license:BSD-3-Clause
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// copyright-holders:cam900
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#ifndef MAME_BUS_SNES_ST018_H
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#define MAME_BUS_SNES_ST018_H
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#pragma once
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#include "snes_slot.h"
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#include "rom.h"
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#include "cpu/arm7/arm7.h"
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#include "machine/gen_latch.h"
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// ======================> sns_rom_st018_device
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class sns_rom_st018_device : public sns_rom_device
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{
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public:
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// construction/destruction
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sns_rom_st018_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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protected:
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// device-level overrides
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virtual void device_start() override ATTR_COLD;
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virtual void device_reset() override ATTR_COLD;
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virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
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virtual void speedup_addon_bios_access() override;
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// additional reading and writing
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virtual uint8_t chip_read(offs_t offset) override;
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virtual void chip_write(offs_t offset, uint8_t data) override;
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private:
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uint32_t copro_prg_r(offs_t offset);
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uint32_t copro_data_r(offs_t offset);
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uint8_t status_r();
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void signal_w(uint8_t data);
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void copro_map(address_map &map) ATTR_COLD;
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required_device<arm7_cpu_device> m_copro;
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required_device<generic_latch_8_device> m_cpu2copro;
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required_device<generic_latch_8_device> m_copro2cpu;
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std::vector<uint32_t> m_copro_prg;
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std::vector<uint32_t> m_copro_data;
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bool m_signal;
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bool m_copro_reset;
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};
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// device type definition
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DECLARE_DEVICE_TYPE(SNS_LOROM_ST018, sns_rom_st018_device)
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#endif // MAME_BUS_SNES_ST018_H
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@ -1200,7 +1200,10 @@ void snes_console_state::machine_start()
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case SNES_CX4: // this still uses the old simulation instead of emulating the CPU
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case SNES_ST010: // this requires two diff kinds of chip access, so we handle it in snes20_lo/hi_r/w
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case SNES_ST011: // this requires two diff kinds of chip access, so we handle it in snes20_lo/hi_r/w
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case SNES_ST018: // still unemulated
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break;
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case SNES_ST018:
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m_maincpu->space(AS_PROGRAM).install_read_handler(0x003800, 0x0038ff, 0, 0xbf0000, 0, read8sm_delegate(*m_cartslot, FUNC(base_sns_cart_slot_device::chip_read)));
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m_maincpu->space(AS_PROGRAM).install_write_handler(0x003800, 0x0038ff, 0, 0xbf0000, 0, write8sm_delegate(*m_cartslot, FUNC(base_sns_cart_slot_device::chip_write)));
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break;
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case SNES_Z80GB: // skeleton support
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m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8m_delegate(*this, FUNC(snes_console_state::snessgb_lo_r)), write8m_delegate(*this, FUNC(snes_console_state::snessgb_lo_w)));
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