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https://github.com/holub/mame
synced 2025-04-23 08:49:55 +03:00
Merge pull request #1864 from ajrhacker/cedar_magnet_40105
Preliminary work towards improving emulation of Cedar Magnet sound bo…
This commit is contained in:
Jonathan Gevaryahu
GitHub
commit
0768d0b4fd
@ -389,7 +389,7 @@ MACHINES["AY31015"] = true
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MACHINES["BANKDEV"] = true
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MACHINES["CDP1852"] = true
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MACHINES["CDP1871"] = true
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--MACHINES["CMOS40105"] = true
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MACHINES["CMOS40105"] = true
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MACHINES["CDU76S"] = true
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MACHINES["COM8116"] = true
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MACHINES["CR589"] = true
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@ -49,7 +49,7 @@ http://www.stefan-uhlmann.de/cbm/MVM/index.html
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#define T6721A_TAG "u5"
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#define MOS6525_TAG "u2"
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#define CMOS40105_TAG "u1"
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#define CD40105_TAG "u1"
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#define A12 BIT(offset, 12)
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#define A13 BIT(offset, 13)
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@ -226,7 +226,9 @@ static MACHINE_CONFIG_FRAGMENT( c64_magic_voice )
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MCFG_TPI6525_OUT_PB_CB(WRITE8(c64_magic_voice_cartridge_device, tpi_pb_w))
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MCFG_TPI6525_OUT_CA_CB(WRITELINE(c64_magic_voice_cartridge_device, tpi_ca_w))
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MCFG_TPI6525_OUT_CA_CB(WRITELINE(c64_magic_voice_cartridge_device, tpi_cb_w))
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MCFG_40105_ADD(CMOS40105_TAG, DEVWRITELINE(MOS6525_TAG, tpi6525_device, i3_w), NOOP)
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MCFG_DEVICE_ADD(CD40105_TAG, CD40105, 0)
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MCFG_40105_DATA_IN_READY_CB(DEVWRITELINE(MOS6525_TAG, tpi6525_device, i3_w))
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MCFG_SPEAKER_STANDARD_MONO("mono")
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MCFG_SOUND_ADD(T6721A_TAG, T6721A, XTAL_640kHz)
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@ -265,7 +267,7 @@ c64_magic_voice_cartridge_device::c64_magic_voice_cartridge_device(const machine
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device_c64_expansion_card_interface(mconfig, *this),
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m_vslsi(*this, T6721A_TAG),
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m_tpi(*this, MOS6525_TAG),
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m_fifo(*this, CMOS40105_TAG),
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m_fifo(*this, CD40105_TAG),
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m_exp(*this, C64_EXPANSION_SLOT_TAG), m_ca(0),
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m_tpi_pb(0x60),
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m_tpi_pc6(1),
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@ -2,7 +2,16 @@
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// copyright-holders:Curt Coder
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/**********************************************************************
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CMOS 40105 FIFO Register emulation
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CD40105/HC40105 4-bit x 16-word FIFO Register
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Part of the 4000B series of CMOS TTL devices, the 40105 includes
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an asynchronous master reset pin intended to be connected to the
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system bus.
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Word size can be expanded from 4 bits to 8 bits by connecting two
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40105s in parallel, with external AND gates to combine the DIR and
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DOR outputs. They can also be connected in series to extend the
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FIFO capacity, with DOR -> SI and /SO <- DIR.
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**********************************************************************/
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@ -22,8 +31,8 @@
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// DEVICE DEFINITIONS
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//**************************************************************************
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const device_type CMOS_40105 = &device_creator<cmos_40105_device>;
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const device_type CD40105 = &device_creator<cmos_40105_device>;
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const device_type HC40105 = &device_creator<cmos_40105_device>;
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//**************************************************************************
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@ -34,10 +43,17 @@ const device_type CMOS_40105 = &device_creator<cmos_40105_device>;
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// cmos_40105_device - constructor
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//-------------------------------------------------
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cmos_40105_device::cmos_40105_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: device_t(mconfig, CMOS_40105, "40105", tag, owner, clock, "40105", __FILE__),
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cmos_40105_device::cmos_40105_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: device_t(mconfig, CD40105, "40105 FIFO", tag, owner, clock, "cd40105", __FILE__),
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m_write_dir(*this),
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m_write_dor(*this), m_d(0), m_q(0), m_dir(0), m_dor(0), m_si(0), m_so(0)
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m_write_dor(*this),
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m_write_q(*this),
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m_d(0),
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m_q(0),
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m_dir(false),
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m_dor(false),
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m_si(false),
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m_so(false)
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{
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}
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@ -51,6 +67,7 @@ void cmos_40105_device::device_start()
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// resolve callbacks
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m_write_dir.resolve_safe();
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m_write_dor.resolve_safe();
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m_write_q.resolve_safe();
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// state saving
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save_item(NAME(m_d));
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@ -68,36 +85,84 @@ void cmos_40105_device::device_start()
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void cmos_40105_device::device_reset()
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{
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m_fifo = std::queue<uint8_t>();
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// invalidate data in queue
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m_fifo = std::queue<u8>();
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m_dir = 1;
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m_dor = 0;
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m_si = 0;
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m_write_dir(m_dir);
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m_write_dor(m_dor);
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// reset control flip-flops
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m_dir = true;
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m_dor = false;
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m_write_dir(1);
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m_write_dor(0);
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}
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//-------------------------------------------------
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// read - read Q
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// read - read output buffer (Q0 to Q3)
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//-------------------------------------------------
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uint8_t cmos_40105_device::read()
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u8 cmos_40105_device::read()
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{
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return m_q;
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}
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//-------------------------------------------------
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// write - write D
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// write - write input buffer (D0 to D3)
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//-------------------------------------------------
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void cmos_40105_device::write(uint8_t data)
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void cmos_40105_device::write(u8 data)
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{
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m_d = data & 0x0f;
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}
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WRITE8_MEMBER(cmos_40105_device::write)
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{
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write(data);
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}
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//-------------------------------------------------
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// load_input - load new data into FIFO
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//-------------------------------------------------
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void cmos_40105_device::load_input()
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{
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if (m_fifo.size() == 16)
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{
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logerror("Attempt to load data into full FIFO\n");
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return;
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}
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m_fifo.push(m_d);
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// DIR remains low if FIFO is full, or else briefly pulses low
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m_write_dir(0);
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if (m_fifo.size() == 16)
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m_dir = false;
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else
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m_write_dir(1);
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}
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//-------------------------------------------------
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// output_ready - place new data at output
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//-------------------------------------------------
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void cmos_40105_device::output_ready()
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{
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if (m_fifo.size() == 0)
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{
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logerror("Attempt to output data from empty FIFO\n");
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return;
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}
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m_q = m_fifo.front();
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m_write_q(m_q);
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m_dor = true;
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m_write_dor(1);
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}
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//-------------------------------------------------
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// si_w - shift in write
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@ -105,22 +170,16 @@ void cmos_40105_device::write(uint8_t data)
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WRITE_LINE_MEMBER( cmos_40105_device::si_w )
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{
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// load input on rising edge when ready
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if (m_dir && !m_si && state)
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{
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m_fifo.push(m_d);
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if (m_fifo.size() == 16)
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{
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m_dir = 0;
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m_write_dir(m_dir);
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}
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load_input();
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}
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else if (m_si && !state && m_fifo.size() > 0)
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{
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// data propagates through FIFO when SI goes low
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if (!m_dor)
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{
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m_dor = 1;
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m_write_dor(m_dor);
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}
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output_ready();
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}
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m_si = state;
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@ -133,18 +192,26 @@ WRITE_LINE_MEMBER( cmos_40105_device::si_w )
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WRITE_LINE_MEMBER( cmos_40105_device::so_w )
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{
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if (m_dor && m_so && !m_so)
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// shift out on falling edge when ready
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if (m_dor && m_so && !state)
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{
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m_dor = 0;
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m_write_dor(m_dor);
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m_q = m_fifo.front();
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m_fifo.pop();
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m_dor = false;
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m_write_dor(0);
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// DOR remains low if FIFO is now empty, or else briefly pulses low
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if (m_fifo.size() > 0)
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output_ready();
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if (!m_dir)
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{
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m_dor = 1;
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m_write_dor(m_dor);
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// raise DIR since FIFO is no longer full
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m_dir = true;
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m_write_dir(1);
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// load new input immediately if SI is held high
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if (m_si)
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load_input();
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}
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}
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@ -2,7 +2,18 @@
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// copyright-holders:Curt Coder
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/**********************************************************************
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CMOS 40105 FIFO Register emulation
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CD40105/HC40105 4-bit x 16-word FIFO Register
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***********************************************************************
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____ ____
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/OE 1 |* \_/ | 16 Vcc
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DIR 2 | | 15 /SO
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SI 3 | | 14 DOR
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D0 4 | | 13 Q0
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D1 5 | 40105 | 12 Q1
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D2 6 | | 11 Q2
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D3 7 | | 10 Q3
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GND 8 |___________| 9 MR
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**********************************************************************/
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@ -20,11 +31,15 @@
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// INTERFACE CONFIGURATION MACROS
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///*************************************************************************
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#define MCFG_40105_ADD(_tag, _dir, _dor) \
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MCFG_DEVICE_ADD(_tag, CMOS_40105, 0) \
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downcast<cmos_40105_device *>(device)->set_dir_callback(DEVCB_##_dir); \
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#define MCFG_40105_DATA_IN_READY_CB(_dir) \
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downcast<cmos_40105_device *>(device)->set_dir_callback(DEVCB_##_dir);
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#define MCFG_40105_DATA_OUT_READY_CB(_dor) \
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downcast<cmos_40105_device *>(device)->set_dor_callback(DEVCB_##_dor);
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#define MCFG_40105_DATA_OUT_CB(_out) \
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downcast<cmos_40105_device *>(device)->set_data_out_callback(DEVCB_##_out);
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///*************************************************************************
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@ -37,13 +52,15 @@ class cmos_40105_device : public device_t
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{
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public:
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// construction/destruction
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cmos_40105_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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cmos_40105_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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template<class _dir> void set_dir_callback(_dir dir) { m_write_dir.set_callback(dir); }
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template<class _dor> void set_dor_callback(_dor dor) { m_write_dor.set_callback(dor); }
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template<class _out> void set_data_out_callback(_out out) { m_write_q.set_callback(out); }
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uint8_t read();
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void write(uint8_t data);
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u8 read();
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void write(u8 data);
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DECLARE_WRITE8_MEMBER(write);
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DECLARE_WRITE_LINE_MEMBER( si_w );
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DECLARE_WRITE_LINE_MEMBER( so_w );
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@ -57,24 +74,30 @@ protected:
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virtual void device_reset() override;
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private:
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// private helpers
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void load_input();
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void output_ready();
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// callbacks
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devcb_write_line m_write_dir;
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devcb_write_line m_write_dor;
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devcb_write8 m_write_q;
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std::queue<uint8_t> m_fifo;
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std::queue<u8> m_fifo;
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uint8_t m_d;
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uint8_t m_q;
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u8 m_d;
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u8 m_q;
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int m_dir;
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int m_dor;
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int m_si;
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int m_so;
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bool m_dir;
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bool m_dor;
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bool m_si;
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bool m_so;
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};
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// device type definition
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extern const device_type CMOS_40105;
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extern const device_type CD40105;
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extern const device_type HC40105;
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#endif
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@ -2,12 +2,14 @@
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// copyright-holders:David Haywood
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/*
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how should the ctcs hook up properly?
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This is very similar to the ZSU1 Sound Control Unit, also manufactured by
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EFO SA and used in the Playmatic pinballs Skill Flight and Phantom Ship;
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the emulation here is influenced by available schematics for that board.
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irq vectors
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0xe6 - from ctc0? (would need vector of e0?) probably used to drive MSM5205
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0xee - from ctc0? (would need vector of e8?) ^^
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0xe6 - from ctc0 channel 3 (vector = E0) used to drive MSM5205 through FIFO
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0xee - from ctc0 channel 3 (vector = E8) ^^
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0xf6 - drive AY (once per frame?) triggered by ctc1 channel 3? (sets vector to f0, f6 = channel3?)
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0xff - read sound latch (triggered by write from master board)
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@ -29,7 +31,9 @@ extern const device_type CEDAR_MAGNET_SOUND = &device_creator<cedar_magnet_sound
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cedar_magnet_sound_device::cedar_magnet_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: cedar_magnet_board_device(mconfig, CEDAR_MAGNET_SOUND, "Cedar Sound", tag, owner, clock, "cedmag_sound", __FILE__),
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m_ctc0(*this, "ctc0"),
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m_ctc1(*this, "ctc1")
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m_ctc1(*this, "ctc1"),
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m_fifo(*this, "fifo"),
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m_adpcm(*this, "adpcm")
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{
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}
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@ -58,7 +62,7 @@ static ADDRESS_MAP_START( cedar_magnet_sound_io, AS_IO, 8, cedar_magnet_sound_de
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AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("ctc0", z80ctc_device, read, write)
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AM_RANGE(0x04, 0x07) AM_DEVREADWRITE("ctc1", z80ctc_device, read, write)
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AM_RANGE(0x08, 0x08) AM_WRITE(adpcm_latch_w)
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AM_RANGE(0x08, 0x08) AM_WRITE(adpcm_fifo_w)
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AM_RANGE(0x0c, 0x0c) AM_DEVWRITE("aysnd0", ay8910_device, address_w)
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AM_RANGE(0x0d, 0x0d) AM_DEVWRITE("aysnd0", ay8910_device, data_w)
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@ -70,16 +74,28 @@ static ADDRESS_MAP_START( cedar_magnet_sound_io, AS_IO, 8, cedar_magnet_sound_de
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ADDRESS_MAP_END
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WRITE8_MEMBER(cedar_magnet_sound_device::adpcm_latch_w)
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WRITE8_MEMBER(cedar_magnet_sound_device::adpcm_fifo_w)
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{
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// it writes 8-bits of sample data here, to be fed to the msm 4-bits at a time
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// probably via other triggers
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m_adpcm_data = data;
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// Z80 code first unpacks 8 bytes of ADPCM sample data into nibbles
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// and, upon receiving interrupt vector E6, fills FIFO at once using OTIR
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// 4-bit data is shifted out of the FIFO to the MSM5205 by another timer
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m_fifo->write(data & 0x0f); // only low nibble is used here
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m_fifo->si_w(1);
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m_fifo->si_w(0);
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}
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WRITE8_MEMBER(cedar_magnet_sound_device::ay0_porta_w)
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{
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// unknown; 0x80 written on reset
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}
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WRITE8_MEMBER(cedar_magnet_sound_device::ay1_porta_w)
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{
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// unknown but used
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m_adpcm->reset_w(data & 1);
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if (data & 1)
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m_fifo->reset();
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// D4-D6 likely used to select clock for ctc0 channel 2
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// other bits probably used to modulate analog sound output
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}
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WRITE_LINE_MEMBER(cedar_magnet_sound_device::ctc0_z0_w)
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@ -92,9 +108,6 @@ WRITE_LINE_MEMBER(cedar_magnet_sound_device::ctc0_z1_w)
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// printf("USED ctc0_z1_w %d\n", state);
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}
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// I don't think any of the below are used
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WRITE_LINE_MEMBER(cedar_magnet_sound_device::ctc1_z0_w)
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{
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printf("ctc1_z0_w %d\n", state);
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@ -115,14 +128,9 @@ WRITE_LINE_MEMBER(cedar_magnet_sound_device::ctc0_z2_w)
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printf("ctc0_z2_w %d\n", state);
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}
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WRITE_LINE_MEMBER(cedar_magnet_sound_device::ctc0_int_w)
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WRITE_LINE_MEMBER(cedar_magnet_sound_device::fifo_dor_w)
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{
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//printf("ctc0_int_w %d\n", state);
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}
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||||
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||||
WRITE_LINE_MEMBER(cedar_magnet_sound_device::ctc1_int_w)
|
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{
|
||||
|
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// combined with a clock signal and used to drive ctc0 channel 3
|
||||
}
|
||||
|
||||
#if 0
|
||||
@ -158,23 +166,20 @@ INTERRUPT_GEN_MEMBER(cedar_magnet_sound_device::fake_irq)
|
||||
}
|
||||
|
||||
static MACHINE_CONFIG_FRAGMENT( cedar_magnet_sound )
|
||||
MCFG_CPU_ADD("topcpu", Z80,4000000)
|
||||
MCFG_CPU_ADD("topcpu", Z80, 4000000)
|
||||
MCFG_CPU_PROGRAM_MAP(cedar_magnet_sound_map)
|
||||
MCFG_CPU_IO_MAP(cedar_magnet_sound_io)
|
||||
// MCFG_Z80_DAISY_CHAIN(daisy_chain)
|
||||
MCFG_CPU_PERIODIC_INT_DRIVER(cedar_magnet_sound_device, fake_irq, 4*60)
|
||||
|
||||
MCFG_DEVICE_ADD("ctc0", Z80CTC, 4000000/8 )
|
||||
MCFG_DEVICE_ADD("ctc0", Z80CTC, 4000000)
|
||||
// MCFG_Z80CTC_INTR_CB(INPUTLINE("topcpu", INPUT_LINE_IRQ0))
|
||||
MCFG_Z80CTC_INTR_CB(WRITELINE(cedar_magnet_sound_device, ctc0_int_w))
|
||||
MCFG_Z80CTC_ZC0_CB(WRITELINE(cedar_magnet_sound_device, ctc0_z0_w))
|
||||
MCFG_Z80CTC_ZC1_CB(WRITELINE(cedar_magnet_sound_device, ctc0_z1_w))
|
||||
MCFG_Z80CTC_ZC2_CB(WRITELINE(cedar_magnet_sound_device, ctc0_z2_w))
|
||||
|
||||
MCFG_DEVICE_ADD("ctc1", Z80CTC, 4000000/8 )
|
||||
MCFG_DEVICE_ADD("ctc1", Z80CTC, 4000000)
|
||||
// MCFG_Z80CTC_INTR_CB(INPUTLINE("topcpu", INPUT_LINE_IRQ0))
|
||||
// MCFG_Z80CTC_INTR_CB(DEVWRITELINE("ctc0", z80ctc_device, trg0))
|
||||
MCFG_Z80CTC_INTR_CB(WRITELINE(cedar_magnet_sound_device, ctc1_int_w))
|
||||
MCFG_Z80CTC_ZC0_CB(WRITELINE(cedar_magnet_sound_device, ctc1_z0_w))
|
||||
MCFG_Z80CTC_ZC1_CB(WRITELINE(cedar_magnet_sound_device, ctc1_z1_w))
|
||||
MCFG_Z80CTC_ZC2_CB(WRITELINE(cedar_magnet_sound_device, ctc1_z2_w))
|
||||
@ -182,15 +187,19 @@ static MACHINE_CONFIG_FRAGMENT( cedar_magnet_sound )
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
|
||||
MCFG_SOUND_ADD("aysnd0", AY8910, 4000000/2)
|
||||
MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(cedar_magnet_sound_device, ay0_porta_w))
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.5)
|
||||
|
||||
MCFG_SOUND_ADD("aysnd1", AY8910, 4000000/2)
|
||||
MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(cedar_magnet_sound_device, ay1_porta_w))
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.5)
|
||||
|
||||
MCFG_SOUND_ADD("adpcm", MSM5205, 4000000/16)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
|
||||
MCFG_DEVICE_ADD("fifo", HC40105, 0) // HCF40105BE at IC13
|
||||
MCFG_40105_DATA_OUT_READY_CB(WRITELINE(cedar_magnet_sound_device, fifo_dor_w))
|
||||
MCFG_40105_DATA_OUT_CB(DEVWRITELINE("adpcm", msm5205_device, data_w))
|
||||
|
||||
MCFG_SOUND_ADD("adpcm", MSM5205, 4000000/8)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
machine_config_constructor cedar_magnet_sound_device::device_mconfig_additions() const
|
||||
|
||||
@ -9,6 +9,7 @@
|
||||
#include "cpu/z80/z80.h"
|
||||
#include "cpu/z80/z80daisy.h"
|
||||
#include "machine/z80ctc.h"
|
||||
#include "machine/40105.h"
|
||||
#include "sound/ay8910.h"
|
||||
#include "sound/msm5205.h"
|
||||
#include "machine/cedar_magnet_board.h"
|
||||
@ -27,13 +28,14 @@ public:
|
||||
|
||||
required_device<z80ctc_device> m_ctc0;
|
||||
required_device<z80ctc_device> m_ctc1;
|
||||
required_device<cmos_40105_device> m_fifo;
|
||||
required_device<msm5205_device> m_adpcm;
|
||||
|
||||
DECLARE_READ8_MEMBER(soundlatch_r);
|
||||
DECLARE_WRITE8_MEMBER(adpcm_latch_w);
|
||||
DECLARE_WRITE8_MEMBER(adpcm_fifo_w);
|
||||
DECLARE_WRITE8_MEMBER(ay0_porta_w);
|
||||
DECLARE_WRITE8_MEMBER(ay1_porta_w);
|
||||
|
||||
uint8_t m_adpcm_data;
|
||||
|
||||
void write_command(uint8_t data);
|
||||
uint8_t m_command;
|
||||
|
||||
@ -43,8 +45,7 @@ public:
|
||||
DECLARE_WRITE_LINE_MEMBER(ctc0_z0_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(ctc0_z1_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(ctc0_z2_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(ctc0_int_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(ctc1_int_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(fifo_dor_w);
|
||||
|
||||
TIMER_CALLBACK_MEMBER(reset_assert_callback) override;
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user