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8257dma: replace it in dkong and kill it (nw)

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cracyc 2014-04-30 17:31:51 +00:00
parent 6edc224d76
commit 0789025777
18 changed files with 130 additions and 798 deletions
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2
.gitattributes vendored
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@ -2337,8 +2337,6 @@ src/emu/machine/7474.c svneol=native#text/plain
src/emu/machine/7474.h svneol=native#text/plain src/emu/machine/7474.h svneol=native#text/plain
src/emu/machine/8042kbdc.c svneol=native#text/plain src/emu/machine/8042kbdc.c svneol=native#text/plain
src/emu/machine/8042kbdc.h svneol=native#text/plain src/emu/machine/8042kbdc.h svneol=native#text/plain
src/emu/machine/8257dma.c svneol=native#text/plain
src/emu/machine/8257dma.h svneol=native#text/plain
src/emu/machine/8530scc.c svneol=native#text/plain src/emu/machine/8530scc.c svneol=native#text/plain
src/emu/machine/8530scc.h svneol=native#text/plain src/emu/machine/8530scc.h svneol=native#text/plain
src/emu/machine/aakart.c svneol=native#text/plain src/emu/machine/aakart.c svneol=native#text/plain

476
src/emu/machine/8257dma.c
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@ -1,476 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:Couriersud
/**********************************************************************
8257 DMA interface and emulation
For datasheet http://www.threedee.com/jcm/library/index.html
2008/05 Miodrag Milanovic
- added support for autoload mode
- fixed bug in calculating count
2007/11 couriersud
- architecture copied from 8237 DMA
- significant changes to implementation
The DMA works like this:
1. The device asserts the DRQn line
2. The DMA clears the TC (terminal count) line
3. The DMA asserts the CPU's HRQ (halt request) line
4. Upon acknowledgement of the halt, the DMA will let the device
know that it needs to send information by asserting the DACKn
line
5. The DMA will read the byte from the device
6. The device clears the DRQn line
7. The DMA clears the CPU's HRQ line
8. (steps 3-7 are repeated for every byte in the chain)
**********************************************************************/
#include "emu.h"
#include "8257dma.h"
#define I8257_STATUS_UPDATE 0x10
#define I8257_STATUS_TC_CH3 0x08
#define I8257_STATUS_TC_CH2 0x04
#define I8257_STATUS_TC_CH1 0x02
#define I8257_STATUS_TC_CH0 0x01
#define DMA_MODE_AUTOLOAD(mode) ((mode) & 0x80)
#define DMA_MODE_TCSTOP(mode) ((mode) & 0x40)
#define DMA_MODE_EXWRITE(mode) ((mode) & 0x20)
#define DMA_MODE_ROTPRIO(mode) ((mode) & 0x10)
#define DMA_MODE_CH_EN(mode, chan) ((mode) & (1 << (chan)))
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
// device type definition
const device_type I8257 = &device_creator<i8257_device>;
//-------------------------------------------------
// i8257_device - constructor
//-------------------------------------------------
i8257_device::i8257_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, I8257, "8257 DMA", tag, owner, clock, "i8257", __FILE__),
m_out_hrq_cb(*this),
m_out_tc_cb(*this),
m_out_mark_cb(*this),
m_in_memr_cb(*this),
m_out_memw_cb(*this),
m_in_ior_0_cb(*this),
m_in_ior_1_cb(*this),
m_in_ior_2_cb(*this),
m_in_ior_3_cb(*this),
m_out_iow_0_cb(*this),
m_out_iow_1_cb(*this),
m_out_iow_2_cb(*this),
m_out_iow_3_cb(*this),
m_mode(0),
m_rr(0),
m_msb(0),
m_drq(0),
m_status(0x0f)
{
memset(m_registers, 0, sizeof(m_registers));
memset(m_address, 0, sizeof(m_address));
memset(m_count, 0, sizeof(m_count));
memset(m_rwmode, 0, sizeof(m_rwmode));
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void i8257_device::device_start()
{
/* validate arguments */
assert(this != NULL);
/* resolve callbacks */
m_out_hrq_cb.resolve_safe();
m_out_tc_cb.resolve_safe();
m_out_mark_cb.resolve_safe();
m_in_memr_cb.resolve();
m_out_memw_cb.resolve();
m_in_ior_0_cb.resolve();
m_in_ior_1_cb.resolve();
m_in_ior_2_cb.resolve();
m_in_ior_3_cb.resolve();
m_out_iow_0_cb.resolve();
m_out_iow_1_cb.resolve();
m_out_iow_2_cb.resolve();
m_out_iow_3_cb.resolve();
/* set initial values */
m_timer = timer_alloc(TIMER_OPERATION);
m_msbflip_timer = timer_alloc(TIMER_MSBFLIP);
/* register for state saving */
save_item(NAME(m_address));
save_item(NAME(m_count));
save_item(NAME(m_rwmode));
save_item(NAME(m_registers));
save_item(NAME(m_mode));
save_item(NAME(m_rr));
save_item(NAME(m_msb));
save_item(NAME(m_drq));
save_item(NAME(m_status));
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void i8257_device::device_reset()
{
m_status &= 0xf0;
m_mode = 0;
i8257_update_status();
}
int i8257_device::i8257_do_operation(int channel)
{
int done;
UINT8 data = 0;
UINT8 mode = m_rwmode[channel];
if (m_count[channel] == 0x0000)
{
m_status |= (0x01 << channel);
m_out_tc_cb(ASSERT_LINE);
}
switch(mode)
{
case 1:
if (!m_in_memr_cb.isnull())
data = m_in_memr_cb(m_address[channel]);
else
{
data = 0;
logerror("8257: No memory read function defined.\n");
}
switch (channel)
{
case 0:
if (!m_out_iow_0_cb.isnull())
m_out_iow_0_cb((offs_t)m_address[channel], data);
else
logerror("8257: No channel write function for channel %d defined.\n", channel);
break;
case 1:
if (!m_out_iow_1_cb.isnull())
m_out_iow_1_cb((offs_t)m_address[channel], data);
else
logerror("8257: No channel write function for channel %d defined.\n", channel);
break;
case 2:
if (!m_out_iow_2_cb.isnull())
m_out_iow_2_cb((offs_t)m_address[channel], data);
else
logerror("8257: No channel write function for channel %d defined.\n", channel);
break;
case 3:
if (!m_out_iow_3_cb.isnull())
m_out_iow_3_cb((offs_t)m_address[channel], data);
else
logerror("8257: No channel write function for channel %d defined.\n", channel);
break;
}
m_address[channel]++;
m_count[channel]--;
done = (m_count[channel] == 0xFFFF);
break;
case 2:
switch (channel)
{
case 0:
if (!m_in_ior_0_cb.isnull())
data = m_in_ior_0_cb((offs_t)m_address[channel]);
else
{
data = 0;
logerror("8257: No channel read function for channel %d defined.\n", channel);
}
break;
case 1:
if (!m_in_ior_1_cb.isnull())
data = m_in_ior_1_cb((offs_t)m_address[channel]);
else
{
data = 0;
logerror("8257: No channel read function for channel %d defined.\n", channel);
}
break;
case 2:
if (!m_in_ior_2_cb.isnull())
data = m_in_ior_2_cb((offs_t)m_address[channel]);
else
{
data = 0;
logerror("8257: No channel read function for channel %d defined.\n", channel);
}
break;
case 3:
if (!m_in_ior_3_cb.isnull())
data = m_in_ior_3_cb((offs_t)m_address[channel]);
else
{
data = 0;
logerror("8257: No channel read function for channel %d defined.\n", channel);
}
break;
}
if (!m_out_memw_cb.isnull())
m_out_memw_cb((offs_t)m_address[channel], data);
else
logerror("8257: No memory write function defined.\n");
m_address[channel]++;
m_count[channel]--;
done = (m_count[channel] == 0xffff);
break;
case 0: /* verify */
m_address[channel]++;
m_count[channel]--;
done = (m_count[channel] == 0xffff);
break;
default:
fatalerror("i8257_do_operation: invalid mode!\n");
break;
}
if (done)
{
if ((channel==2) && DMA_MODE_AUTOLOAD(m_mode))
{
/* in case of autoload at the end channel 3 info is */
/* copied to channel 2 info */
m_registers[4] = m_registers[6];
m_registers[5] = m_registers[7];
}
m_out_tc_cb(CLEAR_LINE);
}
return done;
}
void i8257_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
switch (id)
{
case TIMER_OPERATION:
{
int i, channel = 0, rr;
int done;
rr = DMA_MODE_ROTPRIO(m_mode) ? m_rr : 0;
for (i = 0; i < I8257_NUM_CHANNELS; i++)
{
channel = (i + rr) % I8257_NUM_CHANNELS;
if ((m_status & (1 << channel)) == 0)
{
if (m_mode & m_drq & (1 << channel))
{
break;
}
}
}
done = i8257_do_operation(channel);
m_rr = (channel + 1) & 0x03;
if (done)
{
m_drq &= ~(0x01 << channel);
i8257_update_status();
if (!(DMA_MODE_AUTOLOAD(m_mode) && channel==2))
{
if (DMA_MODE_TCSTOP(m_mode))
{
m_mode &= ~(0x01 << channel);
}
}
}
break;
}
case TIMER_MSBFLIP:
m_msb ^= 1;
break;
case TIMER_DRQ_SYNC:
{
int channel = param >> 1;
int state = param & 0x01;
/* normalize state */
if (state)
{
m_drq |= 0x01 << channel;
m_address[channel] = m_registers[channel * 2];
m_count[channel] = m_registers[channel * 2 + 1] & 0x3FFF;
m_rwmode[channel] = m_registers[channel * 2 + 1] >> 14;
/* clear channel TC */
m_status &= ~(0x01 << channel);
}
else
m_drq &= ~(0x01 << channel);
i8257_update_status();
break;
}
}
}
void i8257_device::i8257_update_status()
{
UINT16 pending_transfer;
attotime next;
/* no transfer is active right now; is there a transfer pending right now? */
pending_transfer = m_drq & (m_mode & 0x0F);
if (pending_transfer)
{
next = attotime::from_hz(clock() / 4 );
m_timer->adjust(
attotime::zero,
0,
/* 1 byte transferred in 4 clock cycles */
next);
}
else
{
/* no transfers active right now */
m_timer->reset();
}
/* set the halt line */
m_out_hrq_cb(pending_transfer ? ASSERT_LINE : CLEAR_LINE);
}
void i8257_device::i8257_prepare_msb_flip()
{
m_msbflip_timer->adjust(attotime::zero);
}
READ8_MEMBER(i8257_device::i8257_r)
{
UINT8 data = 0xFF;
switch(offset)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
case 6:
case 7:
/* DMA address/count register */
data = ( m_registers[offset] >> (m_msb ? 8 : 0) ) & 0xFF;
i8257_prepare_msb_flip();
break;
case 8:
/* DMA status register */
data = (UINT8) m_status;
/* read resets status ! */
m_status &= 0xF0;
break;
default:
logerror("8257: Read from register %d.\n", offset);
data = 0xFF;
break;
}
return data;
}
WRITE8_MEMBER(i8257_device::i8257_w)
{
switch(offset)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
case 6:
case 7:
/* DMA address/count register */
if (m_msb)
{
m_registers[offset] |= ((UINT16) data) << 8;
}
else
{
m_registers[offset] = data;
}
if (DMA_MODE_AUTOLOAD(m_mode))
{
/* in case of autoload when inserting channel 2 info */
/* it is automaticaly copied to channel 3 info */
switch(offset)
{
case 4:
case 5:
if (m_msb)
{
m_registers[offset+2] |= ((UINT16) data) << 8;
}
else
{
m_registers[offset+2] = data;
}
}
}
i8257_prepare_msb_flip();
break;
case 8:
/* DMA mode register */
m_mode = data;
break;
default:
logerror("8257: Write to register %d.\n", offset);
break;
}
}
void i8257_device::i8257_drq_w(int channel, int state)
{
int param = (channel << 1) | (state ? 1 : 0);
synchronize(TIMER_DRQ_SYNC, param);
}

196
src/emu/machine/8257dma.h
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@ -1,196 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:Couriersud
/***************************************************************************
Intel 8257 Programmable DMA Controller emulation
Copyright Nicola Salmoria and the MAME Team.
Visit http://mamedev.org for licensing and usage restrictions.
****************************************************************************
_____ _____
_I/OR 1 |* \_/ | 40 A7
_I/OW 2 | | 39 A6
_MEMR 3 | | 38 A5
_MEMW 4 | | 37 A4
MARK 5 | | 36 TC
READY 6 | | 35 A3
HLDA 7 | | 34 A2
ADSTB 8 | | 33 A1
AEN 9 | | 32 A0
HRQ 10 | 8257 | 31 Vcc
_CS 11 | | 30 D0
CLK 12 | | 29 D1
RESET 13 | | 28 D2
_DACK2 14 | | 27 D3
_DACK3 15 | | 26 D4
DRQ3 16 | | 25 _DACK0
DRQ2 17 | | 24 _DACK1
DRQ1 18 | | 23 D5
DRQ0 19 | | 22 D6
GND 20 |_____________| 21 D7
***************************************************************************/
#pragma once
#ifndef __I8257__
#define __I8257__
#include "emu.h"
#define I8257_NUM_CHANNELS (4)
/***************************************************************************
DEVICE CONFIGURATION MACROS
***************************************************************************/
#define MCFG_I8257_OUT_HRQ_CB(_devcb) \
devcb = &i8257_device::set_out_hrq_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_TC_CB(_devcb) \
devcb = &i8257_device::set_out_tc_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_MARK_CB(_devcb) \
devcb = &i8257_device::set_out_mark_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_IN_MEMR_CB(_devcb) \
devcb = &i8257_device::set_in_memr_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_MEMW_CB(_devcb) \
devcb = &i8257_device::set_out_memw_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_IN_IOR_0_CB(_devcb) \
devcb = &i8257_device::set_in_ior_0_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_IN_IOR_1_CB(_devcb) \
devcb = &i8257_device::set_in_ior_1_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_IN_IOR_2_CB(_devcb) \
devcb = &i8257_device::set_in_ior_2_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_IN_IOR_3_CB(_devcb) \
devcb = &i8257_device::set_in_ior_3_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_IOW_0_CB(_devcb) \
devcb = &i8257_device::set_out_iow_0_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_IOW_1_CB(_devcb) \
devcb = &i8257_device::set_out_iow_1_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_IOW_2_CB(_devcb) \
devcb = &i8257_device::set_out_iow_2_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_IOW_3_CB(_devcb) \
devcb = &i8257_device::set_out_iow_3_callback(*device, DEVCB2_##_devcb);
/***************************************************************************
TYPE DEFINITIONS
***************************************************************************/
// ======================> i8257_device
class i8257_device : public device_t
{
public:
// construction/destruction
i8257_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
template<class _Object> static devcb2_base &set_out_hrq_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_hrq_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_tc_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_tc_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_mark_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_mark_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_in_memr_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_memr_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_memw_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_memw_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_in_ior_0_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_ior_0_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_in_ior_1_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_ior_1_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_in_ior_2_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_ior_2_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_in_ior_3_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_ior_3_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_iow_0_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_iow_0_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_iow_1_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_iow_1_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_iow_2_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_iow_2_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_iow_3_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_iow_3_cb.set_callback(object); }
/* register access */
DECLARE_READ8_MEMBER( i8257_r );
DECLARE_WRITE8_MEMBER( i8257_w );
/* hold acknowledge */
WRITE_LINE_MEMBER( i8257_hlda_w ) { }
/* ready */
WRITE_LINE_MEMBER( i8257_ready_w ) { }
/* data request */
WRITE_LINE_MEMBER( i8257_drq0_w ) { i8257_drq_w(0, state); }
WRITE_LINE_MEMBER( i8257_drq1_w ) { i8257_drq_w(1, state); }
WRITE_LINE_MEMBER( i8257_drq2_w ) { i8257_drq_w(2, state); }
WRITE_LINE_MEMBER( i8257_drq3_w ) { i8257_drq_w(3, state); }
void i8257_drq_w(int channel, int state);
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
static const device_timer_id TIMER_OPERATION = 0;
static const device_timer_id TIMER_MSBFLIP = 1;
static const device_timer_id TIMER_DRQ_SYNC = 2;
int i8257_do_operation(int channel);
void i8257_update_status();
void i8257_prepare_msb_flip();
devcb2_write_line m_out_hrq_cb;
devcb2_write_line m_out_tc_cb;
devcb2_write_line m_out_mark_cb;
/* accessors to main memory */
devcb2_read8 m_in_memr_cb;
devcb2_write8 m_out_memw_cb;
/* channel accesors */
devcb2_read8 m_in_ior_0_cb;
devcb2_read8 m_in_ior_1_cb;
devcb2_read8 m_in_ior_2_cb;
devcb2_read8 m_in_ior_3_cb;
devcb2_write8 m_out_iow_0_cb;
devcb2_write8 m_out_iow_1_cb;
devcb2_write8 m_out_iow_2_cb;
devcb2_write8 m_out_iow_3_cb;
emu_timer *m_timer;
emu_timer *m_msbflip_timer;
UINT16 m_registers[I8257_NUM_CHANNELS*2];
UINT16 m_address[I8257_NUM_CHANNELS];
UINT16 m_count[I8257_NUM_CHANNELS];
UINT8 m_rwmode[I8257_NUM_CHANNELS];
UINT8 m_mode;
UINT8 m_rr;
UINT8 m_msb;
UINT8 m_drq;
/* bits 0- 3 : Terminal count for channels 0-3 */
UINT8 m_status;
};
// device type definition
extern const device_type I8257;
#endif

58
src/emu/machine/i8257.c
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@ -17,7 +17,7 @@
// DEVICE DEFINITIONS // DEVICE DEFINITIONS
//************************************************************************** //**************************************************************************
const device_type I8257N = &device_creator<i8257n_device>; const device_type I8257 = &device_creator<i8257_device>;
@ -69,9 +69,9 @@ enum
// dma_request - // dma_request -
//------------------------------------------------- //-------------------------------------------------
inline void i8257n_device::dma_request(int channel, int state) inline void i8257_device::dma_request(int channel, int state)
{ {
if (LOG) logerror("I8257N '%s' Channel %u DMA Request: %u\n", tag(), channel, state); if (LOG) logerror("I8257 '%s' Channel %u DMA Request: %u\n", tag(), channel, state);
if (state) if (state)
{ {
@ -89,7 +89,7 @@ inline void i8257n_device::dma_request(int channel, int state)
// is_request_active - // is_request_active -
//------------------------------------------------- //-------------------------------------------------
inline bool i8257n_device::is_request_active(int channel) inline bool i8257_device::is_request_active(int channel)
{ {
return (BIT(m_request, channel) && MODE_CHAN_ENABLE(channel)) ? true : false; return (BIT(m_request, channel) && MODE_CHAN_ENABLE(channel)) ? true : false;
} }
@ -98,7 +98,7 @@ inline bool i8257n_device::is_request_active(int channel)
// set_hreq // set_hreq
//------------------------------------------------- //-------------------------------------------------
inline void i8257n_device::set_hreq(int state) inline void i8257_device::set_hreq(int state)
{ {
if (m_hreq != state) if (m_hreq != state)
{ {
@ -112,7 +112,7 @@ inline void i8257n_device::set_hreq(int state)
// set_tc - // set_tc -
//------------------------------------------------- //-------------------------------------------------
inline void i8257n_device::set_tc(int state) inline void i8257_device::set_tc(int state)
{ {
if (m_tc != state) if (m_tc != state)
{ {
@ -127,7 +127,7 @@ inline void i8257n_device::set_tc(int state)
// set_dack - dack is active low // set_dack - dack is active low
//------------------------------------------------- //-------------------------------------------------
inline void i8257n_device::set_dack() inline void i8257_device::set_dack()
{ {
m_out_dack_0_cb(m_current_channel != 0); m_out_dack_0_cb(m_current_channel != 0);
m_out_dack_1_cb(m_current_channel != 1); m_out_dack_1_cb(m_current_channel != 1);
@ -140,7 +140,7 @@ inline void i8257n_device::set_dack()
// dma_read - // dma_read -
//------------------------------------------------- //-------------------------------------------------
inline void i8257n_device::dma_read() inline void i8257_device::dma_read()
{ {
offs_t offset = m_channel[m_current_channel].m_address; offs_t offset = m_channel[m_current_channel].m_address;
@ -177,7 +177,7 @@ inline void i8257n_device::dma_read()
// dma_write - // dma_write -
//------------------------------------------------- //-------------------------------------------------
inline void i8257n_device::dma_write() inline void i8257_device::dma_write()
{ {
offs_t offset = m_channel[m_current_channel].m_address; offs_t offset = m_channel[m_current_channel].m_address;
@ -219,7 +219,7 @@ inline void i8257n_device::dma_write()
// end_of_process - // end_of_process -
//------------------------------------------------- //-------------------------------------------------
inline void i8257n_device::advance() inline void i8257_device::advance()
{ {
bool tc = (m_channel[m_current_channel].m_count == 0); bool tc = (m_channel[m_current_channel].m_count == 0);
bool al = (MODE_AUTOLOAD && (m_current_channel == 2)); bool al = (MODE_AUTOLOAD && (m_current_channel == 2));
@ -257,11 +257,11 @@ inline void i8257n_device::advance()
//************************************************************************** //**************************************************************************
//------------------------------------------------- //-------------------------------------------------
// i8257n_device - constructor // i8257_device - constructor
//------------------------------------------------- //-------------------------------------------------
i8257n_device::i8257n_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) i8257_device::i8257_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, I8257N, "I8257N", tag, owner, clock, "i8257n", __FILE__), : device_t(mconfig, I8257, "Intel 8257", tag, owner, clock, "i8257", __FILE__),
device_execute_interface(mconfig, *this), device_execute_interface(mconfig, *this),
m_icount(0), m_icount(0),
m_reverse_rw(0), m_reverse_rw(0),
@ -301,7 +301,7 @@ i8257n_device::i8257n_device(const machine_config &mconfig, const char *tag, dev
// device_start - device-specific startup // device_start - device-specific startup
//------------------------------------------------- //-------------------------------------------------
void i8257n_device::device_start() void i8257_device::device_start()
{ {
// set our instruction counter // set our instruction counter
m_icountptr = &m_icount; m_icountptr = &m_icount;
@ -355,7 +355,7 @@ void i8257n_device::device_start()
// device_reset - device-specific reset // device_reset - device-specific reset
//------------------------------------------------- //-------------------------------------------------
void i8257n_device::device_reset() void i8257_device::device_reset()
{ {
m_state = STATE_SI; m_state = STATE_SI;
m_transfer_mode = 0; m_transfer_mode = 0;
@ -377,7 +377,7 @@ void i8257n_device::device_reset()
set_dack(); set_dack();
} }
bool i8257n_device::next_channel() bool i8257_device::next_channel()
{ {
int priority[] = { 0, 1, 2, 3 }; int priority[] = { 0, 1, 2, 3 };
@ -409,7 +409,7 @@ bool i8257n_device::next_channel()
// execute_run - // execute_run -
//------------------------------------------------- //-------------------------------------------------
void i8257n_device::execute_run() void i8257_device::execute_run()
{ {
do do
{ {
@ -492,7 +492,7 @@ void i8257n_device::execute_run()
// read - // read -
//------------------------------------------------- //-------------------------------------------------
READ8_MEMBER( i8257n_device::read ) READ8_MEMBER( i8257_device::read )
{ {
UINT8 data = 0; UINT8 data = 0;
@ -518,7 +518,7 @@ READ8_MEMBER( i8257n_device::read )
{ {
data = (m_channel[channel].m_count >> 8); data = (m_channel[channel].m_count >> 8);
if(m_reverse_rw && m_channel[channel].m_mode) if(m_reverse_rw && m_channel[channel].m_mode)
data |= (m_channel[channel].m_mode == 1) ? 0x2000 : 0x1000; data |= (m_channel[channel].m_mode == 1) ? 0x80 : 0x40;
else else
data |= (m_channel[channel].m_mode << 6); data |= (m_channel[channel].m_mode << 6);
} }
@ -547,7 +547,7 @@ READ8_MEMBER( i8257n_device::read )
// write - // write -
//------------------------------------------------- //-------------------------------------------------
WRITE8_MEMBER( i8257n_device::write ) WRITE8_MEMBER( i8257_device::write )
{ {
if (!BIT(offset, 3)) if (!BIT(offset, 3))
{ {
@ -600,7 +600,7 @@ WRITE8_MEMBER( i8257n_device::write )
{ {
m_transfer_mode = data; m_transfer_mode = data;
if (LOG) logerror("I8257N '%s' Command Register: %02x\n", tag(), m_transfer_mode); if (LOG) logerror("I8257 '%s' Command Register: %02x\n", tag(), m_transfer_mode);
} }
trigger(1); trigger(1);
} }
@ -610,9 +610,9 @@ WRITE8_MEMBER( i8257n_device::write )
// hlda_w - hold acknowledge // hlda_w - hold acknowledge
//------------------------------------------------- //-------------------------------------------------
WRITE_LINE_MEMBER( i8257n_device::hlda_w ) WRITE_LINE_MEMBER( i8257_device::hlda_w )
{ {
if (LOG) logerror("I8257N '%s' Hold Acknowledge: %u\n", tag(), state); if (LOG) logerror("I8257 '%s' Hold Acknowledge: %u\n", tag(), state);
m_hack = state; m_hack = state;
trigger(1); trigger(1);
@ -623,9 +623,9 @@ WRITE_LINE_MEMBER( i8257n_device::hlda_w )
// ready_w - ready // ready_w - ready
//------------------------------------------------- //-------------------------------------------------
WRITE_LINE_MEMBER( i8257n_device::ready_w ) WRITE_LINE_MEMBER( i8257_device::ready_w )
{ {
if (LOG) logerror("I8257N '%s' Ready: %u\n", tag(), state); if (LOG) logerror("I8257 '%s' Ready: %u\n", tag(), state);
m_ready = state; m_ready = state;
} }
@ -635,7 +635,7 @@ WRITE_LINE_MEMBER( i8257n_device::ready_w )
// dreq0_w - DMA request for channel 0 // dreq0_w - DMA request for channel 0
//------------------------------------------------- //-------------------------------------------------
WRITE_LINE_MEMBER( i8257n_device::dreq0_w ) WRITE_LINE_MEMBER( i8257_device::dreq0_w )
{ {
dma_request(0, state); dma_request(0, state);
} }
@ -645,7 +645,7 @@ WRITE_LINE_MEMBER( i8257n_device::dreq0_w )
// dreq0_w - DMA request for channel 1 // dreq0_w - DMA request for channel 1
//------------------------------------------------- //-------------------------------------------------
WRITE_LINE_MEMBER( i8257n_device::dreq1_w ) WRITE_LINE_MEMBER( i8257_device::dreq1_w )
{ {
dma_request(1, state); dma_request(1, state);
} }
@ -655,7 +655,7 @@ WRITE_LINE_MEMBER( i8257n_device::dreq1_w )
// dreq1_w - DMA request for channel 2 // dreq1_w - DMA request for channel 2
//------------------------------------------------- //-------------------------------------------------
WRITE_LINE_MEMBER( i8257n_device::dreq2_w ) WRITE_LINE_MEMBER( i8257_device::dreq2_w )
{ {
dma_request(2, state); dma_request(2, state);
} }
@ -665,7 +665,7 @@ WRITE_LINE_MEMBER( i8257n_device::dreq2_w )
// dreq3_w - DMA request for channel 3 // dreq3_w - DMA request for channel 3
//------------------------------------------------- //-------------------------------------------------
WRITE_LINE_MEMBER( i8257n_device::dreq3_w ) WRITE_LINE_MEMBER( i8257_device::dreq3_w )
{ {
dma_request(3, state); dma_request(3, state);
} }

82
src/emu/machine/i8257.h
View File

@ -34,8 +34,8 @@
#pragma once #pragma once
#ifndef __I8257N__ #ifndef __I8257__
#define __I8257N__ #define __I8257__
#include "emu.h" #include "emu.h"
@ -46,69 +46,69 @@
***************************************************************************/ ***************************************************************************/
#define MCFG_I8257_ADD(_tag, _clock, _config) \ #define MCFG_I8257_ADD(_tag, _clock, _config) \
MCFG_DEVICE_ADD(_tag, I8257N, _clock) \ MCFG_DEVICE_ADD(_tag, I8257, _clock) \
MCFG_DEVICE_CONFIG(_config) MCFG_DEVICE_CONFIG(_config)
#define MCFG_I8257_OUT_HRQ_CB(_devcb) \ #define MCFG_I8257_OUT_HRQ_CB(_devcb) \
devcb = &i8257n_device::set_out_hrq_callback(*device, DEVCB2_##_devcb); devcb = &i8257_device::set_out_hrq_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_TC_CB(_devcb) \ #define MCFG_I8257_OUT_TC_CB(_devcb) \
devcb = &i8257n_device::set_out_tc_callback(*device, DEVCB2_##_devcb); devcb = &i8257_device::set_out_tc_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_IN_MEMR_CB(_devcb) \ #define MCFG_I8257_IN_MEMR_CB(_devcb) \
devcb = &i8257n_device::set_in_memr_callback(*device, DEVCB2_##_devcb); devcb = &i8257_device::set_in_memr_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_MEMW_CB(_devcb) \ #define MCFG_I8257_OUT_MEMW_CB(_devcb) \
devcb = &i8257n_device::set_out_memw_callback(*device, DEVCB2_##_devcb); devcb = &i8257_device::set_out_memw_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_IN_IOR_0_CB(_devcb) \ #define MCFG_I8257_IN_IOR_0_CB(_devcb) \
devcb = &i8257n_device::set_in_ior_0_callback(*device, DEVCB2_##_devcb); devcb = &i8257_device::set_in_ior_0_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_IN_IOR_1_CB(_devcb) \ #define MCFG_I8257_IN_IOR_1_CB(_devcb) \
devcb = &i8257n_device::set_in_ior_1_callback(*device, DEVCB2_##_devcb); devcb = &i8257_device::set_in_ior_1_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_IN_IOR_2_CB(_devcb) \ #define MCFG_I8257_IN_IOR_2_CB(_devcb) \
devcb = &i8257n_device::set_in_ior_2_callback(*device, DEVCB2_##_devcb); devcb = &i8257_device::set_in_ior_2_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_IN_IOR_3_CB(_devcb) \ #define MCFG_I8257_IN_IOR_3_CB(_devcb) \
devcb = &i8257n_device::set_in_ior_3_callback(*device, DEVCB2_##_devcb); devcb = &i8257_device::set_in_ior_3_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_IOW_0_CB(_devcb) \ #define MCFG_I8257_OUT_IOW_0_CB(_devcb) \
devcb = &i8257n_device::set_out_iow_0_callback(*device, DEVCB2_##_devcb); devcb = &i8257_device::set_out_iow_0_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_IOW_1_CB(_devcb) \ #define MCFG_I8257_OUT_IOW_1_CB(_devcb) \
devcb = &i8257n_device::set_out_iow_1_callback(*device, DEVCB2_##_devcb); devcb = &i8257_device::set_out_iow_1_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_IOW_2_CB(_devcb) \ #define MCFG_I8257_OUT_IOW_2_CB(_devcb) \
devcb = &i8257n_device::set_out_iow_2_callback(*device, DEVCB2_##_devcb); devcb = &i8257_device::set_out_iow_2_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_IOW_3_CB(_devcb) \ #define MCFG_I8257_OUT_IOW_3_CB(_devcb) \
devcb = &i8257n_device::set_out_iow_3_callback(*device, DEVCB2_##_devcb); devcb = &i8257_device::set_out_iow_3_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_DACK_0_CB(_devcb) \ #define MCFG_I8257_OUT_DACK_0_CB(_devcb) \
devcb = &i8257n_device::set_out_dack_0_callback(*device, DEVCB2_##_devcb); devcb = &i8257_device::set_out_dack_0_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_DACK_1_CB(_devcb) \ #define MCFG_I8257_OUT_DACK_1_CB(_devcb) \
devcb = &i8257n_device::set_out_dack_1_callback(*device, DEVCB2_##_devcb); devcb = &i8257_device::set_out_dack_1_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_DACK_2_CB(_devcb) \ #define MCFG_I8257_OUT_DACK_2_CB(_devcb) \
devcb = &i8257n_device::set_out_dack_2_callback(*device, DEVCB2_##_devcb); devcb = &i8257_device::set_out_dack_2_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_DACK_3_CB(_devcb) \ #define MCFG_I8257_OUT_DACK_3_CB(_devcb) \
devcb = &i8257n_device::set_out_dack_3_callback(*device, DEVCB2_##_devcb); devcb = &i8257_device::set_out_dack_3_callback(*device, DEVCB2_##_devcb);
// HACK: the radio86 and alikes require this, is it a bug in the soviet clone or is there something else happening? // HACK: the radio86 and alikes require this, is it a bug in the soviet clone or is there something else happening?
#define MCFG_I8257_REVERSE_RW_MODE(_flag) \ #define MCFG_I8257_REVERSE_RW_MODE(_flag) \
i8257n_device::static_set_reverse_rw_mode(*device, _flag); i8257_device::static_set_reverse_rw_mode(*device, _flag);
// ======================> i8257n_device // ======================> i8257_device
class i8257n_device : public device_t, class i8257_device : public device_t,
public device_execute_interface public device_execute_interface
{ {
public: public:
// construction/destruction // construction/destruction
i8257n_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); i8257_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ8_MEMBER( read ); DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write ); DECLARE_WRITE8_MEMBER( write );
@ -121,28 +121,28 @@ public:
DECLARE_WRITE_LINE_MEMBER( dreq2_w ); DECLARE_WRITE_LINE_MEMBER( dreq2_w );
DECLARE_WRITE_LINE_MEMBER( dreq3_w ); DECLARE_WRITE_LINE_MEMBER( dreq3_w );
template<class _Object> static devcb2_base &set_out_hrq_callback(device_t &device, _Object object) { return downcast<i8257n_device &>(device).m_out_hrq_cb.set_callback(object); } template<class _Object> static devcb2_base &set_out_hrq_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_hrq_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_tc_callback(device_t &device, _Object object) { return downcast<i8257n_device &>(device).m_out_tc_cb.set_callback(object); } template<class _Object> static devcb2_base &set_out_tc_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_tc_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_in_memr_callback(device_t &device, _Object object) { return downcast<i8257n_device &>(device).m_in_memr_cb.set_callback(object); } template<class _Object> static devcb2_base &set_in_memr_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_memr_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_memw_callback(device_t &device, _Object object) { return downcast<i8257n_device &>(device).m_out_memw_cb.set_callback(object); } template<class _Object> static devcb2_base &set_out_memw_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_memw_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_in_ior_0_callback(device_t &device, _Object object) { return downcast<i8257n_device &>(device).m_in_ior_0_cb.set_callback(object); } template<class _Object> static devcb2_base &set_in_ior_0_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_ior_0_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_in_ior_1_callback(device_t &device, _Object object) { return downcast<i8257n_device &>(device).m_in_ior_1_cb.set_callback(object); } template<class _Object> static devcb2_base &set_in_ior_1_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_ior_1_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_in_ior_2_callback(device_t &device, _Object object) { return downcast<i8257n_device &>(device).m_in_ior_2_cb.set_callback(object); } template<class _Object> static devcb2_base &set_in_ior_2_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_ior_2_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_in_ior_3_callback(device_t &device, _Object object) { return downcast<i8257n_device &>(device).m_in_ior_3_cb.set_callback(object); } template<class _Object> static devcb2_base &set_in_ior_3_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_ior_3_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_iow_0_callback(device_t &device, _Object object) { return downcast<i8257n_device &>(device).m_out_iow_0_cb.set_callback(object); } template<class _Object> static devcb2_base &set_out_iow_0_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_iow_0_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_iow_1_callback(device_t &device, _Object object) { return downcast<i8257n_device &>(device).m_out_iow_1_cb.set_callback(object); } template<class _Object> static devcb2_base &set_out_iow_1_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_iow_1_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_iow_2_callback(device_t &device, _Object object) { return downcast<i8257n_device &>(device).m_out_iow_2_cb.set_callback(object); } template<class _Object> static devcb2_base &set_out_iow_2_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_iow_2_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_iow_3_callback(device_t &device, _Object object) { return downcast<i8257n_device &>(device).m_out_iow_3_cb.set_callback(object); } template<class _Object> static devcb2_base &set_out_iow_3_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_iow_3_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_dack_0_callback(device_t &device, _Object object) { return downcast<i8257n_device &>(device).m_out_dack_0_cb.set_callback(object); } template<class _Object> static devcb2_base &set_out_dack_0_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_dack_0_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_dack_1_callback(device_t &device, _Object object) { return downcast<i8257n_device &>(device).m_out_dack_1_cb.set_callback(object); } template<class _Object> static devcb2_base &set_out_dack_1_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_dack_1_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_dack_2_callback(device_t &device, _Object object) { return downcast<i8257n_device &>(device).m_out_dack_2_cb.set_callback(object); } template<class _Object> static devcb2_base &set_out_dack_2_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_dack_2_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_dack_3_callback(device_t &device, _Object object) { return downcast<i8257n_device &>(device).m_out_dack_3_cb.set_callback(object); } template<class _Object> static devcb2_base &set_out_dack_3_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_dack_3_cb.set_callback(object); }
static void static_set_reverse_rw_mode(device_t &device, bool flag) { downcast<i8257n_device &>(device).m_reverse_rw = flag; } static void static_set_reverse_rw_mode(device_t &device, bool flag) { downcast<i8257_device &>(device).m_reverse_rw = flag; }
protected: protected:
// device-level overrides // device-level overrides
virtual void device_start(); virtual void device_start();
@ -207,7 +207,7 @@ private:
// device type definition // device type definition
extern const device_type I8257N; extern const device_type I8257;

13
src/emu/machine/machine.mak
View File

@ -197,15 +197,6 @@ ifneq ($(filter KBDC8042,$(MACHINES)),)
MACHINEOBJS += $(MACHINEOBJ)/8042kbdc.o MACHINEOBJS += $(MACHINEOBJ)/8042kbdc.o
endif endif
#-------------------------------------------------
#
#@src/emu/machine/8257dma.h,MACHINES += I8257
#-------------------------------------------------
ifneq ($(filter I8257,$(MACHINES)),)
MACHINEOBJS += $(MACHINEOBJ)/8257dma.o
endif
#------------------------------------------------- #-------------------------------------------------
# #
#@src/emu/machine/8530scc.h,MACHINES += 8530SCC #@src/emu/machine/8530scc.h,MACHINES += 8530SCC
@ -592,10 +583,10 @@ endif
#------------------------------------------------- #-------------------------------------------------
# #
#@src/emu/machine/i8257.h,MACHINES += I8257N #@src/emu/machine/i8257.h,MACHINES += I8257
#------------------------------------------------- #-------------------------------------------------
ifneq ($(filter I8257N,$(MACHINES)),) ifneq ($(filter I8257,$(MACHINES)),)
MACHINEOBJS += $(MACHINEOBJ)/i8257.o MACHINEOBJS += $(MACHINEOBJ)/i8257.o
endif endif

28
src/mame/drivers/dkong.c
View File

@ -326,7 +326,6 @@ this is a legitimate Nintendo Kit.
#include "cpu/s2650/s2650.h" #include "cpu/s2650/s2650.h"
#include "cpu/m6502/m6502.h" #include "cpu/m6502/m6502.h"
#include "includes/dkong.h" #include "includes/dkong.h"
#include "machine/8257dma.h"
#include "machine/eepromser.h" #include "machine/eepromser.h"
/************************************* /*************************************
@ -538,9 +537,10 @@ WRITE8_MEMBER(dkong_state::dkong3_coin_counter_w)
WRITE8_MEMBER(dkong_state::p8257_drq_w) WRITE8_MEMBER(dkong_state::p8257_drq_w)
{ {
i8257_device *device = machine().device<i8257_device>("dma8257"); m_dma8257->dreq0_w(data & 0x01);
device->i8257_drq0_w(data & 0x01); m_dma8257->dreq1_w(data & 0x01);
device->i8257_drq1_w(data & 0x01); machine().scheduler().abort_timeslice(); // transfer occurs immediately
machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(100)); // smooth things out a bit
} }
READ8_MEMBER(dkong_state::dkong_in2_r) READ8_MEMBER(dkong_state::dkong_in2_r)
@ -739,7 +739,7 @@ static ADDRESS_MAP_START( dkong_map, AS_PROGRAM, 8, dkong_state )
AM_RANGE(0x6000, 0x6bff) AM_RAM AM_RANGE(0x6000, 0x6bff) AM_RAM
AM_RANGE(0x7000, 0x73ff) AM_RAM AM_SHARE("sprite_ram") /* sprite set 1 */ AM_RANGE(0x7000, 0x73ff) AM_RAM AM_SHARE("sprite_ram") /* sprite set 1 */
AM_RANGE(0x7400, 0x77ff) AM_RAM_WRITE(dkong_videoram_w) AM_SHARE("video_ram") AM_RANGE(0x7400, 0x77ff) AM_RAM_WRITE(dkong_videoram_w) AM_SHARE("video_ram")
AM_RANGE(0x7800, 0x780f) AM_DEVREADWRITE("dma8257", i8257_device, i8257_r, i8257_w) /* P8257 control registers */ AM_RANGE(0x7800, 0x780f) AM_DEVREADWRITE("dma8257", i8257_device, read, write) /* P8257 control registers */
AM_RANGE(0x7c00, 0x7c00) AM_READ_PORT("IN0") AM_LATCH8_WRITE("ls175.3d") /* IN0, sound CPU intf */ AM_RANGE(0x7c00, 0x7c00) AM_READ_PORT("IN0") AM_LATCH8_WRITE("ls175.3d") /* IN0, sound CPU intf */
AM_RANGE(0x7c80, 0x7c80) AM_READ_PORT("IN1") AM_WRITE(radarscp_grid_color_w)/* IN1 */ AM_RANGE(0x7c80, 0x7c80) AM_READ_PORT("IN1") AM_WRITE(radarscp_grid_color_w)/* IN1 */
@ -761,7 +761,7 @@ static ADDRESS_MAP_START( dkongjr_map, AS_PROGRAM, 8, dkong_state )
AM_RANGE(0x6c00, 0x6fff) AM_RAM /* DK3 bootleg only */ AM_RANGE(0x6c00, 0x6fff) AM_RAM /* DK3 bootleg only */
AM_RANGE(0x7000, 0x73ff) AM_RAM AM_SHARE("sprite_ram") /* sprite set 1 */ AM_RANGE(0x7000, 0x73ff) AM_RAM AM_SHARE("sprite_ram") /* sprite set 1 */
AM_RANGE(0x7400, 0x77ff) AM_RAM_WRITE(dkong_videoram_w) AM_SHARE("video_ram") AM_RANGE(0x7400, 0x77ff) AM_RAM_WRITE(dkong_videoram_w) AM_SHARE("video_ram")
AM_RANGE(0x7800, 0x780f) AM_DEVREADWRITE("dma8257", i8257_device, i8257_r, i8257_w) /* P8257 control registers */ AM_RANGE(0x7800, 0x780f) AM_DEVREADWRITE("dma8257", i8257_device, read, write) /* P8257 control registers */
AM_RANGE(0x7c00, 0x7c00) AM_READ_PORT("IN0") AM_LATCH8_WRITE("ls174.3d") /* IN0, sound interface */ AM_RANGE(0x7c00, 0x7c00) AM_READ_PORT("IN0") AM_LATCH8_WRITE("ls174.3d") /* IN0, sound interface */
@ -834,7 +834,7 @@ static ADDRESS_MAP_START( s2650_map, AS_PROGRAM, 8, dkong_state )
AM_RANGE(0x1600, 0x17ff) AM_RAM /* 0x6400 spriteram location */ AM_RANGE(0x1600, 0x17ff) AM_RAM /* 0x6400 spriteram location */
AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(dkong_videoram_w) AM_SHARE("video_ram") /* 0x7400 */ AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(dkong_videoram_w) AM_SHARE("video_ram") /* 0x7400 */
AM_RANGE(0x1C00, 0x1f7f) AM_RAM /* 0x6000 */ AM_RANGE(0x1C00, 0x1f7f) AM_RAM /* 0x6000 */
AM_RANGE(0x1f80, 0x1f8f) AM_DEVREADWRITE("dma8257", i8257_device, i8257_r, i8257_w) /* P8257 control registers */ AM_RANGE(0x1f80, 0x1f8f) AM_DEVREADWRITE("dma8257", i8257_device, read, write) /* P8257 control registers */
/* 0x6800 not remapped */ /* 0x6800 not remapped */
AM_RANGE(0x2000, 0x2fff) AM_ROM AM_RANGE(0x2000, 0x2fff) AM_ROM
AM_RANGE(0x3000, 0x3fff) AM_READWRITE(s2650_mirror_r, s2650_mirror_w) AM_RANGE(0x3000, 0x3fff) AM_READWRITE(s2650_mirror_r, s2650_mirror_w)
@ -1614,6 +1614,17 @@ INTERRUPT_GEN_MEMBER(dkong_state::vblank_irq)
device.execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE); device.execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
} }
WRITE_LINE_MEMBER(dkong_state::busreq_w )
{
// since our Z80 has no support for BUSACK, we assume it is granted immediately
m_maincpu->set_input_line(Z80_INPUT_LINE_BUSRQ, state);
m_maincpu->set_input_line(INPUT_LINE_HALT, state); // do we need this?
if(m_z80dma)
m_z80dma->bai_w(state); // tell dma that bus has been granted
else if(m_dma8257)
m_dma8257->hlda_w(state);
}
static MACHINE_CONFIG_START( dkong_base, dkong_state ) static MACHINE_CONFIG_START( dkong_base, dkong_state )
/* basic machine hardware */ /* basic machine hardware */
@ -1625,11 +1636,12 @@ static MACHINE_CONFIG_START( dkong_base, dkong_state )
MCFG_MACHINE_RESET_OVERRIDE(dkong_state,dkong) MCFG_MACHINE_RESET_OVERRIDE(dkong_state,dkong)
MCFG_DEVICE_ADD("dma8257", I8257, CLOCK_1H) MCFG_DEVICE_ADD("dma8257", I8257, CLOCK_1H)
MCFG_I8257_OUT_HRQ_CB(INPUTLINE("maincpu", INPUT_LINE_HALT)) MCFG_I8257_OUT_HRQ_CB(WRITELINE(dkong_state, busreq_w))
MCFG_I8257_IN_MEMR_CB(READ8(dkong_state, memory_read_byte)) MCFG_I8257_IN_MEMR_CB(READ8(dkong_state, memory_read_byte))
MCFG_I8257_OUT_MEMW_CB(WRITE8(dkong_state, memory_write_byte)) MCFG_I8257_OUT_MEMW_CB(WRITE8(dkong_state, memory_write_byte))
MCFG_I8257_IN_IOR_1_CB(READ8(dkong_state, p8257_ctl_r)) MCFG_I8257_IN_IOR_1_CB(READ8(dkong_state, p8257_ctl_r))
MCFG_I8257_OUT_IOW_0_CB(WRITE8(dkong_state, p8257_ctl_w)) MCFG_I8257_OUT_IOW_0_CB(WRITE8(dkong_state, p8257_ctl_w))
MCFG_I8257_REVERSE_RW_MODE(1) // why?
/* video hardware */ /* video hardware */
MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_ADD("screen", RASTER)

6
src/mame/includes/dkong.h
View File

@ -4,6 +4,7 @@
#include "cpu/m6502/n2a03.h" #include "cpu/m6502/n2a03.h"
#include "machine/latch8.h" #include "machine/latch8.h"
#include "machine/z80dma.h" #include "machine/z80dma.h"
#include "machine/i8257.h"
/* /*
@ -109,7 +110,8 @@ public:
m_gfxdecode(*this, "gfxdecode"), m_gfxdecode(*this, "gfxdecode"),
m_screen(*this, "screen"), m_screen(*this, "screen"),
m_palette(*this, "palette"), m_palette(*this, "palette"),
m_z80dma(*this, "z80dma") m_z80dma(*this, "z80dma"),
m_dma8257(*this, "dma8257")
{ } { }
/* devices */ /* devices */
@ -189,6 +191,7 @@ public:
required_device<screen_device> m_screen; required_device<screen_device> m_screen;
required_device<palette_device> m_palette; required_device<palette_device> m_palette;
optional_device<z80dma_device> m_z80dma; optional_device<z80dma_device> m_z80dma;
optional_device<i8257_device> m_dma8257;
/* radarscp_scanline */ /* radarscp_scanline */
int m_counter; int m_counter;
@ -260,6 +263,7 @@ public:
INTERRUPT_GEN_MEMBER(s2650_interrupt); INTERRUPT_GEN_MEMBER(s2650_interrupt);
INTERRUPT_GEN_MEMBER(vblank_irq); INTERRUPT_GEN_MEMBER(vblank_irq);
TIMER_CALLBACK_MEMBER(scanline_callback); TIMER_CALLBACK_MEMBER(scanline_callback);
DECLARE_WRITE_LINE_MEMBER(busreq_w);
void braze_decrypt_rom(UINT8 *dest); void braze_decrypt_rom(UINT8 *dest);
void drakton_decrypt_rom(UINT8 mod, int offs, int *bs); void drakton_decrypt_rom(UINT8 mod, int offs, int *bs);

6
src/mess/drivers/apogee.c
View File

@ -45,7 +45,7 @@ static ADDRESS_MAP_START(apogee_mem, AS_PROGRAM, 8, apogee_state )
AM_RANGE( 0xed00, 0xed03 ) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write) AM_MIRROR(0x00fc) AM_RANGE( 0xed00, 0xed03 ) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write) AM_MIRROR(0x00fc)
//AM_RANGE( 0xee00, 0xee03 ) AM_DEVREADWRITE("ppi8255_2", i8255_device, read, write) AM_MIRROR(0x00fc) //AM_RANGE( 0xee00, 0xee03 ) AM_DEVREADWRITE("ppi8255_2", i8255_device, read, write) AM_MIRROR(0x00fc)
AM_RANGE( 0xef00, 0xef01 ) AM_DEVREADWRITE("i8275", i8275_device, read, write) AM_MIRROR(0x00fe) // video AM_RANGE( 0xef00, 0xef01 ) AM_DEVREADWRITE("i8275", i8275_device, read, write) AM_MIRROR(0x00fe) // video
AM_RANGE( 0xf000, 0xf0ff ) AM_DEVWRITE("dma8257", i8257n_device, write) // DMA AM_RANGE( 0xf000, 0xf0ff ) AM_DEVWRITE("dma8257", i8257_device, write) // DMA
AM_RANGE( 0xf000, 0xffff ) AM_ROM // System ROM AM_RANGE( 0xf000, 0xffff ) AM_ROM // System ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -244,7 +244,7 @@ static MACHINE_CONFIG_START( apogee, apogee_state )
MCFG_DEVICE_ADD("i8275", I8275, XTAL_16MHz / 12) MCFG_DEVICE_ADD("i8275", I8275, XTAL_16MHz / 12)
MCFG_I8275_CHARACTER_WIDTH(6) MCFG_I8275_CHARACTER_WIDTH(6)
MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(apogee_state, display_pixels) MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(apogee_state, display_pixels)
MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("dma8257",i8257n_device, dreq2_w)) MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("dma8257",i8257_device, dreq2_w))
/* video hardware */ /* video hardware */
MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_ADD("screen", RASTER)
@ -264,7 +264,7 @@ static MACHINE_CONFIG_START( apogee, apogee_state )
MCFG_SOUND_CONFIG(apogee_speaker_interface) MCFG_SOUND_CONFIG(apogee_speaker_interface)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
MCFG_DEVICE_ADD("dma8257", I8257N, XTAL_16MHz / 9) MCFG_DEVICE_ADD("dma8257", I8257, XTAL_16MHz / 9)
MCFG_I8257_OUT_HRQ_CB(WRITELINE(radio86_state, hrq_w)) MCFG_I8257_OUT_HRQ_CB(WRITELINE(radio86_state, hrq_w))
MCFG_I8257_IN_MEMR_CB(READ8(radio86_state, memory_read_byte)) MCFG_I8257_IN_MEMR_CB(READ8(radio86_state, memory_read_byte))
MCFG_I8257_OUT_MEMW_CB(WRITE8(radio86_state, memory_write_byte)) MCFG_I8257_OUT_MEMW_CB(WRITE8(radio86_state, memory_write_byte))

8
src/mess/drivers/fanucspmg.c
View File

@ -516,7 +516,7 @@ public:
required_device<pit8253_device> m_pit1; required_device<pit8253_device> m_pit1;
required_device<pic8259_device> m_pic0; required_device<pic8259_device> m_pic0;
required_device<pic8259_device> m_pic1; required_device<pic8259_device> m_pic1;
required_device<i8257n_device> m_dmac; required_device<i8257_device> m_dmac;
required_device<mc6845_device> m_crtc; required_device<mc6845_device> m_crtc;
required_device<upd765a_device> m_fdc; required_device<upd765a_device> m_fdc;
required_shared_ptr<UINT8> m_shared; required_shared_ptr<UINT8> m_shared;
@ -641,7 +641,7 @@ static ADDRESS_MAP_START(maincpu_mem, AS_PROGRAM, 16, fanucspmg_state)
AM_RANGE(0xf001a, 0xf001b) AM_DEVREADWRITE8(USART2_TAG, i8251_device, status_r, control_w, 0x00ff) AM_RANGE(0xf001a, 0xf001b) AM_DEVREADWRITE8(USART2_TAG, i8251_device, status_r, control_w, 0x00ff)
AM_RANGE(0xf001c, 0xf001d) AM_DEVREADWRITE8(USART3_TAG, i8251_device, data_r, data_w, 0x00ff) AM_RANGE(0xf001c, 0xf001d) AM_DEVREADWRITE8(USART3_TAG, i8251_device, data_r, data_w, 0x00ff)
AM_RANGE(0xf001e, 0xf001f) AM_DEVREADWRITE8(USART3_TAG, i8251_device, status_r, control_w, 0x00ff) AM_RANGE(0xf001e, 0xf001f) AM_DEVREADWRITE8(USART3_TAG, i8251_device, status_r, control_w, 0x00ff)
AM_RANGE(0xf0020, 0xf0029) AM_DEVREADWRITE8(DMAC_TAG, i8257n_device, read, write, 0xffff) AM_RANGE(0xf0020, 0xf0029) AM_DEVREADWRITE8(DMAC_TAG, i8257_device, read, write, 0xffff)
AM_RANGE(0xf0046, 0xf0047) AM_WRITE8(dma_page_w, 0x00ff) AM_RANGE(0xf0046, 0xf0047) AM_WRITE8(dma_page_w, 0x00ff)
AM_RANGE(0xf0048, 0xf004f) AM_DEVREADWRITE8(PIT1_TAG, pit8253_device, read, write, 0x00ff) AM_RANGE(0xf0048, 0xf004f) AM_DEVREADWRITE8(PIT1_TAG, pit8253_device, read, write, 0x00ff)
AM_RANGE(0xf2000, 0xf2003) AM_DEVREADWRITE8(PIC1_TAG, pic8259_device, read, write, 0x00ff) AM_RANGE(0xf2000, 0xf2003) AM_DEVREADWRITE8(PIC1_TAG, pic8259_device, read, write, 0x00ff)
@ -861,7 +861,7 @@ static MACHINE_CONFIG_START( fanucspmg, fanucspmg_state )
MCFG_PIT8253_CLK1(XTAL_15MHz/12) MCFG_PIT8253_CLK1(XTAL_15MHz/12)
MCFG_PIT8253_CLK2(XTAL_15MHz/12) MCFG_PIT8253_CLK2(XTAL_15MHz/12)
MCFG_DEVICE_ADD(DMAC_TAG, I8257N, XTAL_15MHz / 5) MCFG_DEVICE_ADD(DMAC_TAG, I8257, XTAL_15MHz / 5)
MCFG_I8257_OUT_HRQ_CB(WRITELINE(fanucspmg_state, hrq_w)) MCFG_I8257_OUT_HRQ_CB(WRITELINE(fanucspmg_state, hrq_w))
MCFG_I8257_OUT_TC_CB(WRITELINE(fanucspmg_state, tc_w)) MCFG_I8257_OUT_TC_CB(WRITELINE(fanucspmg_state, tc_w))
MCFG_I8257_IN_MEMR_CB(READ8(fanucspmg_state, memory_read_byte)) MCFG_I8257_IN_MEMR_CB(READ8(fanucspmg_state, memory_read_byte))
@ -874,7 +874,7 @@ static MACHINE_CONFIG_START( fanucspmg, fanucspmg_state )
MCFG_UPD765A_ADD(FDC_TAG, true, true) MCFG_UPD765A_ADD(FDC_TAG, true, true)
MCFG_UPD765_INTRQ_CALLBACK(DEVWRITELINE(PIC0_TAG, pic8259_device, ir3_w)) MCFG_UPD765_INTRQ_CALLBACK(DEVWRITELINE(PIC0_TAG, pic8259_device, ir3_w))
MCFG_UPD765_DRQ_CALLBACK(DEVWRITELINE(DMAC_TAG, i8257n_device, dreq0_w)) MCFG_UPD765_DRQ_CALLBACK(DEVWRITELINE(DMAC_TAG, i8257_device, dreq0_w))
MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":0", fanuc_floppies, "525dd", fanucspmg_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":0", fanuc_floppies, "525dd", fanucspmg_state::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":1", fanuc_floppies, "525dd", fanucspmg_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":1", fanuc_floppies, "525dd", fanucspmg_state::floppy_formats)

6
src/mess/drivers/mikrosha.c
View File

@ -37,7 +37,7 @@ static ADDRESS_MAP_START(mikrosha_mem, AS_PROGRAM, 8, mikrosha_state )
AM_RANGE( 0xd000, 0xd001 ) AM_DEVREADWRITE("i8275", i8275_device, read, write) AM_MIRROR(0x07fe) // video AM_RANGE( 0xd000, 0xd001 ) AM_DEVREADWRITE("i8275", i8275_device, read, write) AM_MIRROR(0x07fe) // video
AM_RANGE( 0xd800, 0xd803 ) AM_DEVREADWRITE("pit8253", pit8253_device, read, write) AM_MIRROR(0x07fc) // Timer AM_RANGE( 0xd800, 0xd803 ) AM_DEVREADWRITE("pit8253", pit8253_device, read, write) AM_MIRROR(0x07fc) // Timer
AM_RANGE( 0xe000, 0xf7ff ) AM_READ(radio_cpu_state_r) // Not connected AM_RANGE( 0xe000, 0xf7ff ) AM_READ(radio_cpu_state_r) // Not connected
AM_RANGE( 0xf800, 0xffff ) AM_DEVWRITE("dma8257", i8257n_device, write) // DMA AM_RANGE( 0xf800, 0xffff ) AM_DEVWRITE("dma8257", i8257_device, write) // DMA
AM_RANGE( 0xf800, 0xffff ) AM_ROM // System ROM AM_RANGE( 0xf800, 0xffff ) AM_ROM // System ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -214,7 +214,7 @@ static MACHINE_CONFIG_START( mikrosha, mikrosha_state )
MCFG_DEVICE_ADD("i8275", I8275, XTAL_16MHz / 12) MCFG_DEVICE_ADD("i8275", I8275, XTAL_16MHz / 12)
MCFG_I8275_CHARACTER_WIDTH(6) MCFG_I8275_CHARACTER_WIDTH(6)
MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(mikrosha_state, display_pixels) MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(mikrosha_state, display_pixels)
MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("dma8257",i8257n_device, dreq2_w)) MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("dma8257",i8257_device, dreq2_w))
MCFG_DEVICE_ADD("pit8253", PIT8253, 0) MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
MCFG_PIT8253_CLK0(0) MCFG_PIT8253_CLK0(0)
@ -237,7 +237,7 @@ static MACHINE_CONFIG_START( mikrosha, mikrosha_state )
MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette") MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MCFG_DEVICE_ADD("dma8257", I8257N, XTAL_16MHz / 9) MCFG_DEVICE_ADD("dma8257", I8257, XTAL_16MHz / 9)
MCFG_I8257_OUT_HRQ_CB(WRITELINE(radio86_state, hrq_w)) MCFG_I8257_OUT_HRQ_CB(WRITELINE(radio86_state, hrq_w))
MCFG_I8257_IN_MEMR_CB(READ8(radio86_state, memory_read_byte)) MCFG_I8257_IN_MEMR_CB(READ8(radio86_state, memory_read_byte))
MCFG_I8257_OUT_MEMW_CB(WRITE8(radio86_state, memory_write_byte)) MCFG_I8257_OUT_MEMW_CB(WRITE8(radio86_state, memory_write_byte))

8
src/mess/drivers/partner.c
View File

@ -33,7 +33,7 @@ static ADDRESS_MAP_START(partner_mem, AS_PROGRAM, 8, partner_state )
AM_RANGE( 0xd800, 0xd8ff ) AM_DEVREADWRITE("i8275", i8275_device, read, write) // video AM_RANGE( 0xd800, 0xd8ff ) AM_DEVREADWRITE("i8275", i8275_device, read, write) // video
AM_RANGE( 0xd900, 0xd9ff ) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write) AM_RANGE( 0xd900, 0xd9ff ) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write)
AM_RANGE( 0xda00, 0xdaff ) AM_WRITE(partner_mem_page_w) AM_RANGE( 0xda00, 0xdaff ) AM_WRITE(partner_mem_page_w)
AM_RANGE( 0xdb00, 0xdbff ) AM_DEVWRITE("dma8257", i8257n_device, write) // DMA AM_RANGE( 0xdb00, 0xdbff ) AM_DEVWRITE("dma8257", i8257_device, write) // DMA
AM_RANGE( 0xdc00, 0xddff ) AM_RAMBANK("bank11") AM_RANGE( 0xdc00, 0xddff ) AM_RAMBANK("bank11")
AM_RANGE( 0xde00, 0xdeff ) AM_WRITE(partner_win_memory_page_w) AM_RANGE( 0xde00, 0xdeff ) AM_WRITE(partner_win_memory_page_w)
AM_RANGE( 0xe000, 0xe7ff ) AM_RAMBANK("bank12") AM_RANGE( 0xe000, 0xe7ff ) AM_RAMBANK("bank12")
@ -186,7 +186,7 @@ static MACHINE_CONFIG_START( partner, partner_state )
MCFG_DEVICE_ADD("i8275", I8275, XTAL_16MHz / 12) MCFG_DEVICE_ADD("i8275", I8275, XTAL_16MHz / 12)
MCFG_I8275_CHARACTER_WIDTH(6) MCFG_I8275_CHARACTER_WIDTH(6)
MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(partner_state, display_pixels) MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(partner_state, display_pixels)
MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("dma8257",i8257n_device, dreq2_w)) MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("dma8257",i8257_device, dreq2_w))
/* video hardware */ /* video hardware */
MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_ADD("screen", RASTER)
@ -203,7 +203,7 @@ static MACHINE_CONFIG_START( partner, partner_state )
MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette") MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MCFG_DEVICE_ADD("dma8257", I8257N, XTAL_16MHz / 9) MCFG_DEVICE_ADD("dma8257", I8257, XTAL_16MHz / 9)
MCFG_I8257_OUT_HRQ_CB(WRITELINE(partner_state, hrq_w)) MCFG_I8257_OUT_HRQ_CB(WRITELINE(partner_state, hrq_w))
MCFG_I8257_IN_MEMR_CB(READ8(radio86_state, memory_read_byte)) MCFG_I8257_IN_MEMR_CB(READ8(radio86_state, memory_read_byte))
MCFG_I8257_OUT_MEMW_CB(WRITE8(radio86_state, memory_write_byte)) MCFG_I8257_OUT_MEMW_CB(WRITE8(radio86_state, memory_write_byte))
@ -216,7 +216,7 @@ static MACHINE_CONFIG_START( partner, partner_state )
MCFG_SOFTWARE_LIST_ADD("cass_list","partner_cass") MCFG_SOFTWARE_LIST_ADD("cass_list","partner_cass")
MCFG_FD1793x_ADD("wd1793", XTAL_16MHz / 16) MCFG_FD1793x_ADD("wd1793", XTAL_16MHz / 16)
MCFG_WD_FDC_DRQ_CALLBACK(DEVWRITELINE("dma8257", i8257n_device, dreq0_w)) MCFG_WD_FDC_DRQ_CALLBACK(DEVWRITELINE("dma8257", i8257_device, dreq0_w))
MCFG_FLOPPY_DRIVE_ADD("wd1793:0", partner_floppies, "525qd", partner_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("wd1793:0", partner_floppies, "525qd", partner_state::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("wd1793:1", partner_floppies, "525qd", partner_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("wd1793:1", partner_floppies, "525qd", partner_state::floppy_formats)

10
src/mess/drivers/pc8001.c
View File

@ -188,7 +188,7 @@ static ADDRESS_MAP_START( pc8001_io, AS_IO, 8, pc8001_state )
AM_RANGE(0x30, 0x30) AM_MIRROR(0x0f) AM_WRITE(port30_w) AM_RANGE(0x30, 0x30) AM_MIRROR(0x0f) AM_WRITE(port30_w)
AM_RANGE(0x40, 0x40) AM_MIRROR(0x0f) AM_READWRITE(port40_r, port40_w) AM_RANGE(0x40, 0x40) AM_MIRROR(0x0f) AM_READWRITE(port40_r, port40_w)
AM_RANGE(0x50, 0x51) AM_DEVREADWRITE(UPD3301_TAG, upd3301_device, read, write) AM_RANGE(0x50, 0x51) AM_DEVREADWRITE(UPD3301_TAG, upd3301_device, read, write)
AM_RANGE(0x60, 0x68) AM_DEVREADWRITE(I8257_TAG, i8257n_device, read, write) AM_RANGE(0x60, 0x68) AM_DEVREADWRITE(I8257_TAG, i8257_device, read, write)
// AM_RANGE(0x70, 0x7f) unused // AM_RANGE(0x70, 0x7f) unused
// AM_RANGE(0x80, 0x80) AM_MIRROR(0x0f) AM_WRITE(pc8011_ext0_w) // AM_RANGE(0x80, 0x80) AM_MIRROR(0x0f) AM_WRITE(pc8011_ext0_w)
// AM_RANGE(0x90, 0x90) AM_MIRROR(0x0f) AM_WRITE(pc8011_ext1_w) // AM_RANGE(0x90, 0x90) AM_MIRROR(0x0f) AM_WRITE(pc8011_ext1_w)
@ -507,7 +507,7 @@ static MACHINE_CONFIG_START( pc8001, pc8001_state )
MCFG_DEVICE_ADD(I8255A_TAG, I8255A, 0) MCFG_DEVICE_ADD(I8255A_TAG, I8255A, 0)
MCFG_DEVICE_ADD(I8257_TAG, I8257N, 4000000) MCFG_DEVICE_ADD(I8257_TAG, I8257, 4000000)
MCFG_I8257_OUT_HRQ_CB(WRITELINE(pc8001_state, hrq_w)) MCFG_I8257_OUT_HRQ_CB(WRITELINE(pc8001_state, hrq_w))
MCFG_I8257_IN_MEMR_CB(READ8(pc8001_state, dma_mem_r)) MCFG_I8257_IN_MEMR_CB(READ8(pc8001_state, dma_mem_r))
MCFG_I8257_OUT_IOW_2_CB(DEVWRITE8(UPD3301_TAG, upd3301_device, dack_w)) MCFG_I8257_OUT_IOW_2_CB(DEVWRITE8(UPD3301_TAG, upd3301_device, dack_w))
@ -517,7 +517,7 @@ static MACHINE_CONFIG_START( pc8001, pc8001_state )
MCFG_DEVICE_ADD(UPD3301_TAG, UPD3301, 14318180) MCFG_DEVICE_ADD(UPD3301_TAG, UPD3301, 14318180)
MCFG_UPD3301_CHARACTER_WIDTH(8) MCFG_UPD3301_CHARACTER_WIDTH(8)
MCFG_UPD3301_DRAW_CHARACTER_CALLBACK_OWNER(pc8001_state, pc8001_display_pixels) MCFG_UPD3301_DRAW_CHARACTER_CALLBACK_OWNER(pc8001_state, pc8001_display_pixels)
MCFG_UPD3301_VRTC_CALLBACK(DEVWRITELINE(I8257_TAG, i8257n_device, dreq2_w)) MCFG_UPD3301_VRTC_CALLBACK(DEVWRITELINE(I8257_TAG, i8257_device, dreq2_w))
MCFG_CENTRONICS_ADD(CENTRONICS_TAG, centronics_printers, "printer") MCFG_CENTRONICS_ADD(CENTRONICS_TAG, centronics_printers, "printer")
MCFG_CENTRONICS_ACK_HANDLER(WRITELINE(pc8001_state, write_centronics_ack)) MCFG_CENTRONICS_ACK_HANDLER(WRITELINE(pc8001_state, write_centronics_ack))
@ -555,7 +555,7 @@ static MACHINE_CONFIG_START( pc8001mk2, pc8001mk2_state )
MCFG_DEVICE_ADD(I8255A_TAG, I8255A, 0) MCFG_DEVICE_ADD(I8255A_TAG, I8255A, 0)
MCFG_DEVICE_ADD(I8257_TAG, I8257N, 4000000) MCFG_DEVICE_ADD(I8257_TAG, I8257, 4000000)
MCFG_I8257_OUT_HRQ_CB(WRITELINE(pc8001_state, hrq_w)) MCFG_I8257_OUT_HRQ_CB(WRITELINE(pc8001_state, hrq_w))
MCFG_I8257_IN_MEMR_CB(READ8(pc8001_state, dma_mem_r)) MCFG_I8257_IN_MEMR_CB(READ8(pc8001_state, dma_mem_r))
MCFG_I8257_OUT_IOW_2_CB(DEVWRITE8(UPD3301_TAG, upd3301_device, dack_w)) MCFG_I8257_OUT_IOW_2_CB(DEVWRITE8(UPD3301_TAG, upd3301_device, dack_w))
@ -565,7 +565,7 @@ static MACHINE_CONFIG_START( pc8001mk2, pc8001mk2_state )
MCFG_DEVICE_ADD(UPD3301_TAG, UPD3301, 14318180) MCFG_DEVICE_ADD(UPD3301_TAG, UPD3301, 14318180)
MCFG_UPD3301_CHARACTER_WIDTH(8) MCFG_UPD3301_CHARACTER_WIDTH(8)
MCFG_UPD3301_DRAW_CHARACTER_CALLBACK_OWNER(pc8001_state, pc8001_display_pixels) MCFG_UPD3301_DRAW_CHARACTER_CALLBACK_OWNER(pc8001_state, pc8001_display_pixels)
MCFG_UPD3301_VRTC_CALLBACK(DEVWRITELINE(I8257_TAG, i8257n_device, dreq2_w)) MCFG_UPD3301_VRTC_CALLBACK(DEVWRITELINE(I8257_TAG, i8257_device, dreq2_w))
MCFG_CENTRONICS_ADD(CENTRONICS_TAG, centronics_printers, "printer") MCFG_CENTRONICS_ADD(CENTRONICS_TAG, centronics_printers, "printer")

16
src/mess/drivers/radio86.c
View File

@ -23,7 +23,7 @@ static ADDRESS_MAP_START(radio86_mem, AS_PROGRAM, 8, radio86_state )
AM_RANGE( 0x8000, 0x8003 ) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write) AM_MIRROR(0x1ffc) AM_RANGE( 0x8000, 0x8003 ) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write) AM_MIRROR(0x1ffc)
//AM_RANGE( 0xa000, 0xa003 ) AM_DEVREADWRITE("ppi8255_2", i8255_device, read, write) AM_MIRROR(0x1ffc) //AM_RANGE( 0xa000, 0xa003 ) AM_DEVREADWRITE("ppi8255_2", i8255_device, read, write) AM_MIRROR(0x1ffc)
AM_RANGE( 0xc000, 0xc001 ) AM_DEVREADWRITE("i8275", i8275_device, read, write) AM_MIRROR(0x1ffe) // video AM_RANGE( 0xc000, 0xc001 ) AM_DEVREADWRITE("i8275", i8275_device, read, write) AM_MIRROR(0x1ffe) // video
AM_RANGE( 0xe000, 0xffff ) AM_DEVWRITE("dma8257", i8257n_device, write) // DMA AM_RANGE( 0xe000, 0xffff ) AM_DEVWRITE("dma8257", i8257_device, write) // DMA
AM_RANGE( 0xf000, 0xffff ) AM_ROM // System ROM AM_RANGE( 0xf000, 0xffff ) AM_ROM // System ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -43,7 +43,7 @@ static ADDRESS_MAP_START(radio86rom_mem, AS_PROGRAM, 8, radio86_state )
AM_RANGE( 0x8000, 0x8003 ) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write) AM_MIRROR(0x1ffc) AM_RANGE( 0x8000, 0x8003 ) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write) AM_MIRROR(0x1ffc)
AM_RANGE( 0xa000, 0xa003 ) AM_DEVREADWRITE("ppi8255_2", i8255_device, read, write) AM_MIRROR(0x1ffc) AM_RANGE( 0xa000, 0xa003 ) AM_DEVREADWRITE("ppi8255_2", i8255_device, read, write) AM_MIRROR(0x1ffc)
AM_RANGE( 0xc000, 0xc001 ) AM_DEVREADWRITE("i8275", i8275_device, read, write) AM_MIRROR(0x1ffe) // video AM_RANGE( 0xc000, 0xc001 ) AM_DEVREADWRITE("i8275", i8275_device, read, write) AM_MIRROR(0x1ffe) // video
AM_RANGE( 0xe000, 0xffff ) AM_DEVWRITE("dma8257", i8257n_device, write) // DMA AM_RANGE( 0xe000, 0xffff ) AM_DEVWRITE("dma8257", i8257_device, write) // DMA
AM_RANGE( 0xf000, 0xffff ) AM_ROM // System ROM AM_RANGE( 0xf000, 0xffff ) AM_ROM // System ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -56,7 +56,7 @@ static ADDRESS_MAP_START(radio86ram_mem, AS_PROGRAM, 8, radio86_state )
AM_RANGE( 0xf780, 0xf7bf ) AM_DEVREADWRITE("i8275", i8275_device, read, write) // video AM_RANGE( 0xf780, 0xf7bf ) AM_DEVREADWRITE("i8275", i8275_device, read, write) // video
AM_RANGE( 0xf684, 0xf687 ) AM_DEVREADWRITE("ppi8255_2", i8255_device, read, write) AM_RANGE( 0xf684, 0xf687 ) AM_DEVREADWRITE("ppi8255_2", i8255_device, read, write)
AM_RANGE( 0xf688, 0xf688 ) AM_WRITE(radio86_pagesel ) AM_RANGE( 0xf688, 0xf688 ) AM_WRITE(radio86_pagesel )
AM_RANGE( 0xf800, 0xffff ) AM_DEVWRITE("dma8257", i8257n_device, write) // DMA AM_RANGE( 0xf800, 0xffff ) AM_DEVWRITE("dma8257", i8257_device, write) // DMA
AM_RANGE( 0xf800, 0xffff ) AM_ROM // System ROM page 1 AM_RANGE( 0xf800, 0xffff ) AM_ROM // System ROM page 1
ADDRESS_MAP_END ADDRESS_MAP_END
@ -68,7 +68,7 @@ static ADDRESS_MAP_START(radio86_16_mem, AS_PROGRAM, 8, radio86_state )
AM_RANGE( 0x8000, 0x8003 ) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write) AM_MIRROR(0x1ffc) AM_RANGE( 0x8000, 0x8003 ) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write) AM_MIRROR(0x1ffc)
//AM_RANGE( 0xa000, 0xa003 ) AM_DEVREADWRITE("ppi8255_2", i8255_device, read, write) AM_MIRROR(0x1ffc) //AM_RANGE( 0xa000, 0xa003 ) AM_DEVREADWRITE("ppi8255_2", i8255_device, read, write) AM_MIRROR(0x1ffc)
AM_RANGE( 0xc000, 0xc001 ) AM_DEVREADWRITE("i8275", i8275_device, read, write) AM_MIRROR(0x1ffe) // video AM_RANGE( 0xc000, 0xc001 ) AM_DEVREADWRITE("i8275", i8275_device, read, write) AM_MIRROR(0x1ffe) // video
AM_RANGE( 0xe000, 0xffff ) AM_DEVWRITE("dma8257", i8257n_device, write) // DMA AM_RANGE( 0xe000, 0xffff ) AM_DEVWRITE("dma8257", i8257_device, write) // DMA
AM_RANGE( 0xf000, 0xffff ) AM_ROM // System ROM AM_RANGE( 0xf000, 0xffff ) AM_ROM // System ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -79,7 +79,7 @@ static ADDRESS_MAP_START(mikron2_mem, AS_PROGRAM, 8, radio86_state )
AM_RANGE( 0xc000, 0xc003 ) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write) AM_MIRROR(0x00fc) AM_RANGE( 0xc000, 0xc003 ) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write) AM_MIRROR(0x00fc)
//AM_RANGE( 0xc100, 0xc103 ) AM_DEVREADWRITE_LEGACY("ppi8255_2", i8255a_r, i8255a_w) AM_MIRROR(0x00fc) //AM_RANGE( 0xc100, 0xc103 ) AM_DEVREADWRITE_LEGACY("ppi8255_2", i8255a_r, i8255a_w) AM_MIRROR(0x00fc)
AM_RANGE( 0xc200, 0xc201 ) AM_DEVREADWRITE("i8275", i8275_device, read, write) AM_MIRROR(0x00fe) // video AM_RANGE( 0xc200, 0xc201 ) AM_DEVREADWRITE("i8275", i8275_device, read, write) AM_MIRROR(0x00fe) // video
AM_RANGE( 0xc300, 0xc3ff ) AM_DEVWRITE("dma8257", i8257n_device, write) // DMA AM_RANGE( 0xc300, 0xc3ff ) AM_DEVWRITE("dma8257", i8257_device, write) // DMA
AM_RANGE( 0xf000, 0xffff ) AM_ROM // System ROM AM_RANGE( 0xf000, 0xffff ) AM_ROM // System ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -89,7 +89,7 @@ static ADDRESS_MAP_START(impuls03_mem, AS_PROGRAM, 8, radio86_state )
AM_RANGE( 0x8000, 0x8003 ) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write) AM_MIRROR(0x1ffc) AM_RANGE( 0x8000, 0x8003 ) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write) AM_MIRROR(0x1ffc)
AM_RANGE( 0xa000, 0xbfff ) AM_ROM // Basic ROM AM_RANGE( 0xa000, 0xbfff ) AM_ROM // Basic ROM
AM_RANGE( 0xc000, 0xc001 ) AM_DEVREADWRITE("i8275", i8275_device, read, write) AM_MIRROR(0x1ffe) // video AM_RANGE( 0xc000, 0xc001 ) AM_DEVREADWRITE("i8275", i8275_device, read, write) AM_MIRROR(0x1ffe) // video
AM_RANGE( 0xe000, 0xffff ) AM_DEVWRITE("dma8257", i8257n_device, write) // DMA AM_RANGE( 0xe000, 0xffff ) AM_DEVWRITE("dma8257", i8257_device, write) // DMA
AM_RANGE( 0xf000, 0xffff ) AM_ROM // System ROM AM_RANGE( 0xf000, 0xffff ) AM_ROM // System ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -361,7 +361,7 @@ static MACHINE_CONFIG_START( radio86, radio86_state )
MCFG_DEVICE_ADD("i8275", I8275, XTAL_16MHz / 12) MCFG_DEVICE_ADD("i8275", I8275, XTAL_16MHz / 12)
MCFG_I8275_CHARACTER_WIDTH(6) MCFG_I8275_CHARACTER_WIDTH(6)
MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(radio86_state, display_pixels) MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(radio86_state, display_pixels)
MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("dma8257",i8257n_device, dreq2_w)) MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("dma8257",i8257_device, dreq2_w))
/* video hardware */ /* video hardware */
MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_ADD("screen", RASTER)
@ -377,7 +377,7 @@ static MACHINE_CONFIG_START( radio86, radio86_state )
MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette") MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MCFG_DEVICE_ADD("dma8257", I8257N, XTAL_16MHz / 9) MCFG_DEVICE_ADD("dma8257", I8257, XTAL_16MHz / 9)
MCFG_I8257_OUT_HRQ_CB(WRITELINE(radio86_state, hrq_w)) MCFG_I8257_OUT_HRQ_CB(WRITELINE(radio86_state, hrq_w))
MCFG_I8257_IN_MEMR_CB(READ8(radio86_state, memory_read_byte)) MCFG_I8257_IN_MEMR_CB(READ8(radio86_state, memory_read_byte))
MCFG_I8257_OUT_MEMW_CB(WRITE8(radio86_state, memory_write_byte)) MCFG_I8257_OUT_MEMW_CB(WRITE8(radio86_state, memory_write_byte))

8
src/mess/drivers/unior.c
View File

@ -83,7 +83,7 @@ private:
virtual void video_start(); virtual void video_start();
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
required_device<pit8253_device> m_pit; required_device<pit8253_device> m_pit;
required_device<i8257n_device> m_dma; required_device<i8257_device> m_dma;
required_device<i8251_device> m_uart; required_device<i8251_device> m_uart;
public: public:
required_device<palette_device> m_palette; required_device<palette_device> m_palette;
@ -98,7 +98,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( unior_io, AS_IO, 8, unior_state ) static ADDRESS_MAP_START( unior_io, AS_IO, 8, unior_state )
ADDRESS_MAP_UNMAP_HIGH ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0xff) ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x30, 0x38) AM_DEVREADWRITE("dma", i8257n_device, read, write) // dma data AM_RANGE(0x30, 0x38) AM_DEVREADWRITE("dma", i8257_device, read, write) // dma data
AM_RANGE(0x3c, 0x3f) AM_DEVREADWRITE("ppi0", i8255_device, read, write) // cassette player control AM_RANGE(0x3c, 0x3f) AM_DEVREADWRITE("ppi0", i8255_device, read, write) // cassette player control
AM_RANGE(0x4c, 0x4f) AM_DEVREADWRITE("ppi1", i8255_device, read, write) AM_RANGE(0x4c, 0x4f) AM_DEVREADWRITE("ppi1", i8255_device, read, write)
AM_RANGE(0x50, 0x50) AM_WRITE(scroll_w) AM_RANGE(0x50, 0x50) AM_WRITE(scroll_w)
@ -432,7 +432,7 @@ static MACHINE_CONFIG_START( unior, unior_state )
MCFG_I8255_IN_PORTC_CB(READ8(unior_state, ppi1_c_r)) MCFG_I8255_IN_PORTC_CB(READ8(unior_state, ppi1_c_r))
MCFG_I8255_OUT_PORTC_CB(WRITE8(unior_state, ppi1_c_w)) MCFG_I8255_OUT_PORTC_CB(WRITE8(unior_state, ppi1_c_w))
MCFG_DEVICE_ADD("dma", I8257N, XTAL_20MHz / 9) MCFG_DEVICE_ADD("dma", I8257, XTAL_20MHz / 9)
MCFG_I8257_OUT_HRQ_CB(WRITELINE(unior_state, hrq_w)) MCFG_I8257_OUT_HRQ_CB(WRITELINE(unior_state, hrq_w))
MCFG_I8257_IN_MEMR_CB(READ8(unior_state, dma_r)) MCFG_I8257_IN_MEMR_CB(READ8(unior_state, dma_r))
MCFG_I8257_OUT_IOW_2_CB(DEVWRITE8("crtc", i8275_device, dack_w)) MCFG_I8257_OUT_IOW_2_CB(DEVWRITE8("crtc", i8275_device, dack_w))
@ -440,7 +440,7 @@ static MACHINE_CONFIG_START( unior, unior_state )
MCFG_DEVICE_ADD("crtc", I8275, XTAL_20MHz / 12) MCFG_DEVICE_ADD("crtc", I8275, XTAL_20MHz / 12)
MCFG_I8275_CHARACTER_WIDTH(6) MCFG_I8275_CHARACTER_WIDTH(6)
MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(unior_state, display_pixels) MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(unior_state, display_pixels)
MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("dma",i8257n_device, dreq2_w)) MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("dma",i8257_device, dreq2_w))
MCFG_VIDEO_SET_SCREEN("screen") MCFG_VIDEO_SET_SCREEN("screen")
MACHINE_CONFIG_END MACHINE_CONFIG_END

2
src/mess/includes/pc8001.h
View File

@ -48,7 +48,7 @@ public:
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
required_device<upd1990a_device> m_rtc; required_device<upd1990a_device> m_rtc;
required_device<i8257n_device> m_dma; required_device<i8257_device> m_dma;
required_device<upd3301_device> m_crtc; required_device<upd3301_device> m_crtc;
required_device<cassette_image_device> m_cassette; required_device<cassette_image_device> m_cassette;
required_device<centronics_device> m_centronics; required_device<centronics_device> m_centronics;

2
src/mess/includes/radio86.h
View File

@ -84,7 +84,7 @@ public:
protected: protected:
required_device<cassette_image_device> m_cassette; required_device<cassette_image_device> m_cassette;
optional_device<i8257n_device> m_dma8257; optional_device<i8257_device> m_dma8257;
required_device<i8255_device> m_ppi8255_1; required_device<i8255_device> m_ppi8255_1;
optional_device<i8255_device> m_ppi8255_2; optional_device<i8255_device> m_ppi8255_2;
required_memory_region m_region_maincpu; required_memory_region m_region_maincpu;

1
src/mess/mess.mak
View File

@ -395,7 +395,6 @@ MACHINES += I8243
MACHINES += I8251 MACHINES += I8251
MACHINES += I8255 MACHINES += I8255
MACHINES += I8257 MACHINES += I8257
MACHINES += I8257N
MACHINES += I8271 MACHINES += I8271
MACHINES += I8279 MACHINES += I8279
MACHINES += I8355 MACHINES += I8355