mirror of
https://github.com/holub/mame
synced 2025-04-26 10:13:37 +03:00
xbox.cpp: add simple superio support and more usb (nw)
Bytes sent to the supoerio's first rs232 port wil be echoed on the console, this way it is possible to see the ouput of the OutputDebugString function.
This commit is contained in:
yz70s
parent
9a9a89c716
commit
0802d60f8a
@ -364,14 +364,11 @@ Thanks to Alex, Mr Mudkips, and Philip Burke for this info.
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#include "emu.h"
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#include "cpu/i386/i386.h"
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#include "machine/lpci.h"
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#include "machine/pic8259.h"
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#include "machine/pit8253.h"
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#include "machine/idectrl.h"
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#include "machine/idehd.h"
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#include "machine/naomigd.h"
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#include "video/poly.h"
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#include "bitmap.h"
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#include "debug/debugcon.h"
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#include "debug/debugcmd.h"
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#include "debug/debugcpu.h"
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@ -39,6 +39,8 @@ struct OHCIIsochronousTransferDescriptor {
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UINT32 nexttd; // NextTD
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UINT32 be; // BufferEnd
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UINT32 offset[8]; // Offset/PacketStatusWord
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UINT32 word0;
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UINT32 word1;
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};
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enum OHCIRegisters {
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@ -193,7 +195,11 @@ public:
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int execute_transfer(int address, int endpoint, int pid, UINT8 *buffer, int size);
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private:
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int address;
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int controldir;
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int newaddress;
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int controldirection;
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int controltype;
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int controlrecipient;
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bool settingaddress;
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int remain;
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UINT8 *position;
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};
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@ -214,6 +220,10 @@ public:
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DECLARE_WRITE32_MEMBER(usbctrl_w);
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DECLARE_READ32_MEMBER(smbus_r);
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DECLARE_WRITE32_MEMBER(smbus_w);
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DECLARE_READ8_MEMBER(superio_read);
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DECLARE_WRITE8_MEMBER(superio_write);
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DECLARE_READ8_MEMBER(superiors232_read);
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DECLARE_WRITE8_MEMBER(superiors232_write);
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DECLARE_READ32_MEMBER(audio_apu_r);
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DECLARE_WRITE32_MEMBER(audio_apu_w);
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DECLARE_READ32_MEMBER(audio_ac93_r);
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@ -232,6 +242,7 @@ public:
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void usb_ohci_read_transfer_descriptor(UINT32 address);
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void usb_ohci_writeback_transfer_descriptor(UINT32 address);
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void usb_ohci_read_isochronous_transfer_descriptor(UINT32 address);
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void usb_ohci_writeback_isochronous_transfer_descriptor(UINT32 address);
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void dword_write_le(UINT8 *addr, UINT32 d);
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void word_write_le(UINT8 *addr, UINT16 d);
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void debug_generate_irq(int irq, bool active);
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@ -309,6 +320,13 @@ public:
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OHCITransferDescriptor transfer_descriptor;
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OHCIIsochronousTransferDescriptor isochronous_transfer_descriptor;
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} ohcist;
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struct superio_state
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{
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bool configuration_mode;
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int index;
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int selected;
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UINT8 registers[16][256]; // 256 registers for up to 16 devices, registers 0-0x2f common to all
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} superiost;
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UINT8 pic16lc_buffer[0xff];
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std::unique_ptr<nv2a_renderer> nvidia_nv2a;
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bool debug_irq_active;
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@ -7,7 +7,6 @@
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#include "machine/pic8259.h"
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#include "machine/pit8253.h"
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#include "machine/idectrl.h"
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#include "machine/idehd.h"
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#include "video/poly.h"
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#include "bitmap.h"
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#include "debug/debugcon.h"
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@ -17,6 +16,7 @@
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#include "includes/xbox.h"
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#define LOG_PCI
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//#define LOG_AUDIO
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//#define LOG_OHCI
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//#define USB_ENABLED
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@ -827,14 +827,17 @@ static USBStandardDeviceDscriptor devdesc = {18,1,0x201,0xff,0x34,0x56,64,0x100,
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ohci_function_device::ohci_function_device()
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{
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address = 0;
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controldir = 0;
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newaddress = 0;
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controldirection = 0;
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remain = 0;
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position = nullptr;
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settingaddress = false;
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}
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void ohci_function_device::execute_reset()
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{
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address = 0;
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newaddress = 0;
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}
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int ohci_function_device::execute_transfer(int address, int endpoint, int pid, UINT8 *buffer, int size)
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@ -842,35 +845,69 @@ int ohci_function_device::execute_transfer(int address, int endpoint, int pid, U
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if (endpoint == 0) {
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if (pid == SetupPid) {
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struct USBSetupPacket *p=(struct USBSetupPacket *)buffer;
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// define direction
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controldir = p->bmRequestType & 128;
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// case !=0, in data stage and out status stage
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// case ==0, out data stage and in status stage
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// define direction 0:host->device 1:device->host
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controldirection = (p->bmRequestType & 128) >> 7;
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// case ==1, IN data stage and OUT status stage
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// case ==0, OUT data stage and IN status stage
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// data stage is optional, IN status stage
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controltype = (p->bmRequestType & 0x60) >> 5;
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controlrecipient = p->bmRequestType & 0x1f;
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position = nullptr;
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remain = p->wLength;
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if ((p->bmRequestType & 0x60) == 0) {
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// if standard
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if (controltype == 0) {
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switch (p->bRequest) {
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case GET_STATUS:
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case CLEAR_FEATURE:
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case SET_FEATURE:
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break;
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case SET_ADDRESS:
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newaddress = p->wValue;
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settingaddress = true;
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break;
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case GET_DESCRIPTOR:
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if ((p->wValue >> 8) == 1) { // device descriptor
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if ((p->wValue >> 8) == DEVICE) { // device descriptor
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//p->wValue & 255;
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position = (UINT8 *)&devdesc;
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remain = sizeof(devdesc);
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}
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else if ((p->wValue >> 8) == CONFIGURATION) { // configuration descriptor
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remain = 0;
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}
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if (remain > p->wLength)
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remain = p->wLength;
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break;
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case SET_ADDRESS:
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//p->wValue;
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break;
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case SET_DESCRIPTOR:
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case GET_CONFIGURATION:
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case SET_CONFIGURATION:
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case GET_INTERFACE:
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case SET_INTERFACE:
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case SYNCH_FRAME:
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default:
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break;
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}
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}
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}
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else if (pid == InPid) {
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// case !=0, give data
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// if no data has been transferred (except for the setup stage)
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// and the lenght of this IN transaction is 0
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// assume this is the status stage
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if (size == 0) {
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if (settingaddress == true)
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{
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// set of address is active at end of status stage
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address = newaddress;
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settingaddress = false;
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}
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return 0;
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}
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// case ==1, give data
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// case ==0, nothing
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if (size > remain)
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size = remain;
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if (controldir != 0) {
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// if device->host
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if (controldirection == 1) {
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// data stage
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if (size > remain)
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size = remain;
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if (position != nullptr)
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memcpy(buffer, position, size);
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position = position + size;
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@ -878,11 +915,13 @@ int ohci_function_device::execute_transfer(int address, int endpoint, int pid, U
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}
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}
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else if (pid == OutPid) {
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// case !=0, nothing
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// case ==1, nothing
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// case ==0, give data
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if (size > remain)
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size = remain;
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if (controldir == 0) {
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// if host->device
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if (controldirection == 0) {
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// data stage
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if (size > remain)
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size = remain;
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if (position != nullptr)
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memcpy(position, buffer, size);
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position = position + size;
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@ -966,11 +1005,14 @@ void xbox_base_state::usb_ohci_read_isochronous_transfer_descriptor(UINT32 addre
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UINT32 w;
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w = ohcist.space->read_dword(address);
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ohcist.isochronous_transfer_descriptor.word0 = w;
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ohcist.isochronous_transfer_descriptor.cc = (w >> 28) & 15;
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ohcist.isochronous_transfer_descriptor.fc = (w >> 24) & 7;
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ohcist.isochronous_transfer_descriptor.di = (w >> 21) & 7;
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ohcist.isochronous_transfer_descriptor.sf = w & 0xffff;
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ohcist.isochronous_transfer_descriptor.bp0 = ohcist.space->read_dword(address + 4) & 0xfffff000;
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w = ohcist.space->read_dword(address + 4);
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ohcist.isochronous_transfer_descriptor.word1 = w;
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ohcist.isochronous_transfer_descriptor.bp0 = w & 0xfffff000;
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ohcist.isochronous_transfer_descriptor.nexttd = ohcist.space->read_dword(address + 8);
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ohcist.isochronous_transfer_descriptor.be = ohcist.space->read_dword(address + 12);
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w = ohcist.space->read_dword(address + 16);
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@ -987,13 +1029,37 @@ void xbox_base_state::usb_ohci_read_isochronous_transfer_descriptor(UINT32 addre
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ohcist.isochronous_transfer_descriptor.offset[7] = (w >> 16) & 0xffff;
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}
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void xbox_base_state::usb_ohci_writeback_isochronous_transfer_descriptor(UINT32 address)
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{
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UINT32 w;
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w = ohcist.isochronous_transfer_descriptor.word0 & 0x1f0000;
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w = w | (ohcist.isochronous_transfer_descriptor.cc << 28) | (ohcist.isochronous_transfer_descriptor.fc << 24) | (ohcist.isochronous_transfer_descriptor.di << 21) | ohcist.isochronous_transfer_descriptor.sf;
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ohcist.space->write_dword(address, w);
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w = ohcist.isochronous_transfer_descriptor.word1 & 0xfff;
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w = w | ohcist.isochronous_transfer_descriptor.bp0;
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ohcist.space->write_dword(address + 4, w);
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ohcist.space->write_dword(address + 8, ohcist.isochronous_transfer_descriptor.nexttd);
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ohcist.space->write_dword(address + 12, ohcist.isochronous_transfer_descriptor.be);
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w = (ohcist.isochronous_transfer_descriptor.offset[1] << 16) | ohcist.isochronous_transfer_descriptor.offset[0];
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ohcist.space->write_dword(address + 16, w);
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w = (ohcist.isochronous_transfer_descriptor.offset[3] << 16) | ohcist.isochronous_transfer_descriptor.offset[2];
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ohcist.space->write_dword(address + 20, w);
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w = (ohcist.isochronous_transfer_descriptor.offset[5] << 16) | ohcist.isochronous_transfer_descriptor.offset[4];
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ohcist.space->write_dword(address + 24, w);
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w = (ohcist.isochronous_transfer_descriptor.offset[7] << 16) | ohcist.isochronous_transfer_descriptor.offset[6];
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ohcist.space->write_dword(address + 28, w);
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}
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/*
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* Audio
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*/
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READ32_MEMBER(xbox_base_state::audio_apu_r)
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{
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#ifdef LOG_AUDIO
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logerror("Audio_APU: read from %08X mask %08X\n", 0xfe800000 + offset * 4, mem_mask);
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#endif
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if (offset == 0x20010 / 4) // some kind of internal counter or state value
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return 0x20 + 4 + 8 + 0x48 + 0x80;
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return apust.memory[offset];
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@ -1004,7 +1070,9 @@ WRITE32_MEMBER(xbox_base_state::audio_apu_w)
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//UINT32 old;
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UINT32 v;
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#ifdef LOG_AUDIO
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logerror("Audio_APU: write at %08X mask %08X value %08X\n", 0xfe800000 + offset * 4, mem_mask, data);
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#endif
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//old = apust.memory[offset];
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apust.memory[offset] = data;
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if (offset == 0x02040 / 4) // address of memory area with scatter-gather info (gpdsp scratch dma)
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@ -1110,7 +1178,9 @@ READ32_MEMBER(xbox_base_state::audio_ac93_r)
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{
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UINT32 ret = 0;
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#ifdef LOG_AUDIO
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logerror("Audio_AC3: read from %08X mask %08X\n", 0xfec00000 + offset * 4, mem_mask);
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#endif
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if (offset < 0x80 / 4)
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{
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ret = ac97st.mixer_regs[offset];
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@ -1137,7 +1207,9 @@ READ32_MEMBER(xbox_base_state::audio_ac93_r)
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WRITE32_MEMBER(xbox_base_state::audio_ac93_w)
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{
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#ifdef LOG_AUDIO
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logerror("Audio_AC3: write at %08X mask %08X value %08X\n", 0xfec00000 + offset * 4, mem_mask, data);
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#endif
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if (offset < 0x80 / 4)
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{
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COMBINE_DATA(ac97st.mixer_regs + offset);
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@ -1421,6 +1493,76 @@ WRITE32_MEMBER(xbox_base_state::smbus_w)
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smbusst.command = data;
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}
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/*
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* SuperIO
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*/
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READ8_MEMBER(xbox_base_state::superio_read)
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{
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if (superiost.configuration_mode == false)
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return 0;
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if (offset == 0) // index port 0x2e
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return superiost.index;
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if (offset == 1)
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{
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// data port 0x2f
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if (superiost.index < 0x30)
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return superiost.registers[0][superiost.index];
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return superiost.registers[superiost.selected][superiost.index];
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}
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return 0;
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}
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WRITE8_MEMBER(xbox_base_state::superio_write)
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{
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if (superiost.configuration_mode == false)
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{
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// config port 0x2e
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if ((offset == 0) && (data == 0x55))
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superiost.configuration_mode = true;
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return;
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}
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if ((offset == 0) && (data == 0xaa))
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{
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// config port 0x2e
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superiost.configuration_mode = false;
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return;
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}
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if (offset == 0)
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{
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// index port 0x2e
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superiost.index = data;
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}
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if (offset == 1)
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{
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// data port 0x2f
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if (superiost.index < 0x30)
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{
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superiost.registers[0][superiost.index] = data;
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superiost.selected = superiost.registers[0][7];
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} else
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{
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superiost.registers[superiost.selected][superiost.index] = data;
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//if ((superiost.selected == 4) && (superiost.index == 0x30) && (data != 0))
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// ; // add handlers 0x3f8- +7
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}
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}
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}
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READ8_MEMBER(xbox_base_state::superiors232_read)
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{
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if (offset == 5)
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return 0x20;
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return 0;
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}
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WRITE8_MEMBER(xbox_base_state::superiors232_write)
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{
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if (offset == 0)
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{
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printf("%c", data);
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}
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}
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ADDRESS_MAP_START(xbox_base_map, AS_PROGRAM, 32, xbox_base_state)
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AM_RANGE(0x00000000, 0x07ffffff) AM_RAM AM_SHARE("nv2a_share") // 128 megabytes
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AM_RANGE(0xf0000000, 0xf7ffffff) AM_RAM AM_SHARE("nv2a_share") // 3d accelerator wants this
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@ -1433,9 +1575,11 @@ ADDRESS_MAP_END
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ADDRESS_MAP_START(xbox_base_map_io, AS_IO, 32, xbox_base_state)
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AM_RANGE(0x0020, 0x0023) AM_DEVREADWRITE8("pic8259_1", pic8259_device, read, write, 0xffffffff)
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AM_RANGE(0x002c, 0x002f) AM_READWRITE8(superio_read, superio_write, 0xffff0000)
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AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE8("pit8254", pit8254_device, read, write, 0xffffffff)
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AM_RANGE(0x00a0, 0x00a3) AM_DEVREADWRITE8("pic8259_2", pic8259_device, read, write, 0xffffffff)
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AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE("ide", bus_master_ide_controller_device, read_cs0, write_cs0)
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AM_RANGE(0x03f8, 0x03ff) AM_READWRITE8(superiors232_read, superiors232_write, 0xffffffff)
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AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
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AM_RANGE(0x8000, 0x80ff) AM_READWRITE(dummy_r, dummy_w)
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AM_RANGE(0xc000, 0xc0ff) AM_READWRITE(smbus_r, smbus_w)
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@ -1472,11 +1616,11 @@ void xbox_base_state::machine_start()
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pic16lc_buffer[0x1d] = 0x0d;
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pic16lc_buffer[0x1e] = 0x0e;
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pic16lc_buffer[0x1f] = 0x0f;
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#ifdef USB_ENABLED
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ohcist.hc_regs[HcRevision] = 0x10;
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ohcist.hc_regs[HcFmInterval] = 0x2edf;
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ohcist.hc_regs[HcLSThreshold] = 0x628;
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ohcist.hc_regs[HcRhDescriptorA] = 4;
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#ifdef USB_ENABLED
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ohcist.interruptbulkratio = 1;
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ohcist.writebackdonehadcounter = 7;
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ohcist.space = &m_maincpu->space();
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@ -1484,6 +1628,9 @@ void xbox_base_state::machine_start()
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ohcist.timer->enable(false);
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usb_ohci_plug(1, new ohci_function_device()); // test connect
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#endif
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memset(&superiost, 0, sizeof(superiost));
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superiost.configuration_mode = false;
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superiost.registers[0][0x26] = 0x2e; // Configuration port address byte 0
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// savestates
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save_item(NAME(debug_irq_active));
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save_item(NAME(debug_irq_number));
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