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CPU M6800: CPX (compare X) instruction, fix behaviour of V flag #2. (nw)

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Previous fix for CPX I posted a year ago was flawed and didn't handle overflow properly.
This commit is contained in:
Quench0 2017-09-24 21:35:51 +10:00
parent d6f96625af
commit 0810a75c23
1 changed files with 16 additions and 12 deletions
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28
src/devices/cpu/m6800/6800ops.hxx
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@ -1085,11 +1085,12 @@ OP_HANDLER( cmpx_im )
PAIR r,d,b; PAIR r,d,b;
IMMWORD(b); IMMWORD(b);
d.d = X; d.d = X;
r.d = d.d - b.d; r.w.l = d.b.h - b.b.h;
CLR_NZV; CLR_NZV;
SET_N8(r.b.l);
SET_V8(d.b.h, b.b.h, r.w.l);
r.d = d.d - b.d;
SET_Z16(r.d); SET_Z16(r.d);
SET_N8(r.b.h);
SET_V8(d.b.h, b.b.h, r.b.h);
} }
/* $8c CPX immediate -**** (6803) */ /* $8c CPX immediate -**** (6803) */
@ -1252,11 +1253,12 @@ OP_HANDLER( cmpx_di )
PAIR r,d,b; PAIR r,d,b;
DIRWORD(b); DIRWORD(b);
d.d = X; d.d = X;
r.d = d.d - b.d; r.w.l = d.b.h - b.b.h;
CLR_NZV; CLR_NZV;
SET_N8(r.b.l);
SET_V8(d.b.h, b.b.h, r.w.l);
r.d = d.d - b.d;
SET_Z16(r.d); SET_Z16(r.d);
SET_N8(r.b.h);
SET_V8(d.b.h, b.b.h, r.b.h);
} }
/* $9c CPX direct -**** (6803) */ /* $9c CPX direct -**** (6803) */
@ -1426,11 +1428,12 @@ OP_HANDLER( cmpx_ix )
PAIR r,d,b; PAIR r,d,b;
IDXWORD(b); IDXWORD(b);
d.d = X; d.d = X;
r.d = d.d - b.d; r.w.l = d.b.h - b.b.h;
CLR_NZV; CLR_NZV;
SET_N8(r.b.l);
SET_V8(d.b.h, b.b.h, r.w.l);
r.d = d.d - b.d;
SET_Z16(r.d); SET_Z16(r.d);
SET_N8(r.b.h);
SET_V8(d.b.h, b.b.h, r.b.h);
} }
/* $ac CPX indexed -**** (6803)*/ /* $ac CPX indexed -**** (6803)*/
@ -1602,11 +1605,12 @@ OP_HANDLER( cmpx_ex )
PAIR r,d,b; PAIR r,d,b;
EXTWORD(b); EXTWORD(b);
d.d = X; d.d = X;
r.d = d.d - b.d; r.w.l = d.b.h - b.b.h;
CLR_NZV; CLR_NZV;
SET_N8(r.b.l);
SET_V8(d.b.h, b.b.h, r.w.l);
r.d = d.d - b.d;
SET_Z16(r.d); SET_Z16(r.d);
SET_N8(r.b.h);
SET_V8(d.b.h, b.b.h, r.b.h);
} }
/* $bc CPX extended -**** (6803) */ /* $bc CPX extended -**** (6803) */