Hooked up RAMDAC to Reality Tennis, added new interface flag for separated read/write registers

src/emu/video/ramdac.c

@@ -39,8 +39,6 @@ const device_type RAMDAC = &device_creator<ramdac_device>;
 ramdac_device::ramdac_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
 	: device_t(mconfig, RAMDAC, "ramdac", tag, owner, clock),
 	  device_memory_interface(mconfig, *this),
-		m_pal_index(0),
-		m_pal_mask(0),
 		m_space_config("videoram", ENDIANNESS_LITTLE, 8, 10, 0, NULL, *ADDRESS_MAP_NAME(ramdac_palram))
 {
 
@@ -75,6 +73,26 @@ inline void ramdac_device::writebyte(offs_t address, UINT8 data)
 	space()->write_byte(address, data);
 }
 
+//-------------------------------------------------
+//  device_config_complete - perform any
+//  operations now that the configuration is
+//  complete
+//-------------------------------------------------
+
+void ramdac_device::device_config_complete()
+{
+	// inherit a copy of the static data
+	const ramdac_interface *intf = reinterpret_cast<const ramdac_interface *>(static_config());
+	if (intf != NULL)
+		*static_cast<ramdac_interface *>(this) = *intf;
+
+	// or initialize to defaults if none provided
+	else
+	{
+		// ...
+	}
+}
+
 
 //-------------------------------------------------
 //  device_validity_check - perform validity checks
@@ -104,49 +122,58 @@ void ramdac_device::device_start()
 
 void ramdac_device::device_reset()
 {
-	m_pal_index = 0;
+	m_pal_index[0] = 0;
-	m_pal_mask = 0;
+	m_int_index[0] = 0;
-	m_int_index = 0;
+	m_pal_index[1] = 0;
+	m_int_index[1] = 0;
+	m_pal_mask = 0xff;
 }
 
 
 //**************************************************************************
 //  READ/WRITE HANDLERS
+//  [0] = W register, [1] = R register
 //**************************************************************************
 
-inline void ramdac_device::reg_increment(void)
+inline void ramdac_device::reg_increment(UINT8 inc_type)
 {
-	m_int_index++;
+	m_int_index[inc_type]++;
-	if(m_int_index == 3)
+	if(m_int_index[inc_type] == 3)
 	{
-		m_int_index = 0;
+		m_int_index[inc_type] = 0;
-		m_pal_index++;
+		m_pal_index[inc_type]++;
 	}
 }
 
 READ8_MEMBER( ramdac_device::index_r )
 {
-	return m_pal_index;
+	return m_pal_index[0];
 }
 
 WRITE8_MEMBER( ramdac_device::index_w )
 {
-	m_pal_index = data;
+	m_pal_index[0] = data;
-	m_int_index = 0;
+	m_int_index[0] = 0;
+}
+
+WRITE8_MEMBER( ramdac_device::index_r_w )
+{
+	m_pal_index[1] = data;
+	m_int_index[1] = 0;
 }
 
 READ8_MEMBER( ramdac_device::pal_r )
 {
 	UINT8 res;
-	res = readbyte(m_pal_index | (m_int_index << 8));
+	res = readbyte(m_pal_index[m_split_read_reg] | (m_int_index[m_split_read_reg] << 8));
-	reg_increment();
+	reg_increment(m_split_read_reg);
 	return res;
 }
 
 WRITE8_MEMBER( ramdac_device::pal_w )
 {
-	writebyte(m_pal_index | (m_int_index << 8),data);
+	writebyte(m_pal_index[0] | (m_int_index[0] << 8),data);
-	reg_increment();
+	reg_increment(0);
 }
 
 WRITE8_MEMBER( ramdac_device::mask_w )
@@ -154,6 +181,7 @@ WRITE8_MEMBER( ramdac_device::mask_w )
 	m_pal_mask = data;
 }
 
+
 //**************************************************************************
 //  Generic bank read/write handlers
 //**************************************************************************

src/emu/video/ramdac.h

@@ -16,19 +16,30 @@
 //  INTERFACE CONFIGURATION MACROS
 //**************************************************************************
 
-#define MCFG_RAMDAC_ADD(_tag,_map) \
+#define MCFG_RAMDAC_ADD(_tag,_config,_map) \
 	MCFG_DEVICE_ADD(_tag, RAMDAC, 0) \
+	MCFG_DEVICE_CONFIG(_config) \
 	MCFG_DEVICE_ADDRESS_MAP(AS_0, _map)
 
+#define RAMDAC_INTERFACE(name) \
+	const ramdac_interface (name) =
+
+// ======================> ramdac_interface
+
+struct ramdac_interface
+{
+	UINT8 m_split_read_reg; // read register index is separated, seen in rltennis
+};
 
 //**************************************************************************
 //  TYPE DEFINITIONS
 //**************************************************************************
 
-// ======================> v3021_device
+// ======================> ramdac_device
 
 class ramdac_device :	public device_t,
-						public device_memory_interface
+						public device_memory_interface,
+						public ramdac_interface
 {
 public:
 	// construction/destruction
@@ -38,6 +49,7 @@ public:
 	DECLARE_READ8_MEMBER( index_r );
 	DECLARE_READ8_MEMBER( pal_r );
 	DECLARE_WRITE8_MEMBER( index_w );
+	DECLARE_WRITE8_MEMBER( index_r_w );
 	DECLARE_WRITE8_MEMBER( pal_w );
 	DECLARE_WRITE8_MEMBER( mask_w );
 
@@ -52,14 +64,15 @@ protected:
 	virtual bool device_validity_check(emu_options &options, const game_driver &driver) const;
 	virtual void device_start();
 	virtual void device_reset();
+	virtual void device_config_complete();
 	inline UINT8 readbyte(offs_t address);
 	inline void writebyte(offs_t address, UINT8 data);
-	inline void reg_increment();
+	inline void reg_increment(UINT8 inc_type);
 
 private:
-	UINT8 m_pal_index;
+	UINT8 m_pal_index[2];
 	UINT8 m_pal_mask;
-	UINT8 m_int_index;
+	UINT8 m_int_index[2];
 	UINT8 *m_palram;
 
 	const address_space_config		m_space_config;

src/mame/drivers/blitz68k.c

@@ -47,8 +47,6 @@ public:
 	optional_shared_ptr<UINT16>	m_nvram;
 	UINT8 *m_blit_buffer;
 	UINT16 *m_frame_buffer;
-	struct { int r,g,b,offs,offs_internal; } m_pal;
-	struct { UINT8 r, g, b, offs, offs_internal, ram[256*3]; } m_btpal;
 	UINT16 *m_blit_romaddr;
 	UINT16 *m_blit_attr1_ram;
 	UINT16 *m_blit_dst_ram_loword;
@@ -1601,6 +1599,11 @@ static ADDRESS_MAP_START( ramdac_map, AS_0, 8 )
 	AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE_MODERN("ramdac",ramdac_device,ramdac_pal_r,ramdac_rgb666_w)
 ADDRESS_MAP_END
 
+static RAMDAC_INTERFACE( ramdac_intf )
+{
+	0
+};
+
 static MACHINE_CONFIG_START( ilpag, blitz68k_state )
 	MCFG_CPU_ADD("maincpu", M68000, 11059200 )	// ?
 	MCFG_CPU_PROGRAM_MAP(ilpag_map)
@@ -1620,7 +1623,7 @@ static MACHINE_CONFIG_START( ilpag, blitz68k_state )
 
 	MCFG_VIDEO_START(blitz68k)
 
-	MCFG_RAMDAC_ADD("ramdac", ramdac_map)
+	MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map)
 
 	MCFG_SPEAKER_STANDARD_MONO("mono")
 	MCFG_SOUND_ADD("dac", DAC, 0)
@@ -1701,7 +1704,7 @@ static MACHINE_CONFIG_START( cjffruit, blitz68k_state )
 	MCFG_PALETTE_LENGTH(0x100)
 
 	MCFG_VIDEO_START(blitz68k)
-	MCFG_RAMDAC_ADD("ramdac", ramdac_map)
+	MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map)
 
 	MCFG_SPEAKER_STANDARD_MONO("mono")
 	MCFG_SOUND_ADD("dac", DAC, 0)
@@ -1734,7 +1737,7 @@ static MACHINE_CONFIG_START( bankrob, blitz68k_state )
 	MCFG_PALETTE_LENGTH(0x100)
 
 	MCFG_VIDEO_START(blitz68k)
-	MCFG_RAMDAC_ADD("ramdac", ramdac_map)
+	MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map)
 
 	MCFG_SPEAKER_STANDARD_MONO("mono")
 	MCFG_SOUND_ADD("dac", DAC, 0)
@@ -1765,7 +1768,7 @@ static MACHINE_CONFIG_START( bankroba, blitz68k_state )
 	MCFG_PALETTE_LENGTH(0x100)
 
 	MCFG_VIDEO_START(blitz68k_addr_factor1)
-	MCFG_RAMDAC_ADD("ramdac", ramdac_map)
+	MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map)
 
 	MCFG_SPEAKER_STANDARD_MONO("mono")
 	MCFG_SOUND_ADD("dac", DAC, 0)
@@ -1795,7 +1798,7 @@ static MACHINE_CONFIG_START( deucesw2, blitz68k_state )
 	MCFG_PALETTE_LENGTH(0x100)
 
 	MCFG_VIDEO_START(blitz68k)
-	MCFG_RAMDAC_ADD("ramdac", ramdac_map)
+	MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map)
 
 	MCFG_SPEAKER_STANDARD_MONO("mono")
 	MCFG_SOUND_ADD("dac", DAC, 0)
@@ -1827,7 +1830,7 @@ static MACHINE_CONFIG_START( dualgame, blitz68k_state )
 	MCFG_PALETTE_LENGTH(0x100)
 
 	MCFG_VIDEO_START(blitz68k)
-	MCFG_RAMDAC_ADD("ramdac", ramdac_map)
+	MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map)
 
 	MCFG_SPEAKER_STANDARD_MONO("mono")
 	MCFG_SOUND_ADD("dac", DAC, 0)
@@ -1857,7 +1860,7 @@ static MACHINE_CONFIG_START( hermit, blitz68k_state )
 	MCFG_PALETTE_LENGTH(0x100)
 
 	MCFG_VIDEO_START(blitz68k)
-	MCFG_RAMDAC_ADD("ramdac", ramdac_map)
+	MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map)
 
 	MCFG_SPEAKER_STANDARD_MONO("mono")
 	MCFG_SOUND_ADD("dac", DAC, 0)
@@ -1890,7 +1893,7 @@ static MACHINE_CONFIG_START( maxidbl, blitz68k_state )
 	MCFG_MC6845_ADD("crtc", H46505, XTAL_11_0592MHz/4, mc6845_intf_irq3)
 
 	MCFG_PALETTE_LENGTH(0x100)
-	MCFG_RAMDAC_ADD("ramdac", ramdac_map)
+	MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map)
 
 	MCFG_SPEAKER_STANDARD_MONO("mono")
 	MCFG_SOUND_ADD("saa", SAA1099, XTAL_8MHz/2)

src/mame/drivers/rltennis.c

@@ -63,6 +63,7 @@ player - when there's nothing to play - first, empty 2k of ROMs are selected.
 #include "cpu/m68000/m68000.h"
 #include "machine/nvram.h"
 #include "sound/dac.h"
+#include "video/ramdac.h"
 
 #define	RLT_REFRESH_RATE   60
 #define RLT_TIMER_FREQ     (RLT_REFRESH_RATE*256)
@@ -92,9 +93,9 @@ static ADDRESS_MAP_START( rltennis_main, AS_PROGRAM, 16 )
 	AM_RANGE(0x100000, 0x10ffff) AM_RAM AM_SHARE("nvram")
 	AM_RANGE(0x200000, 0x20ffff) AM_RAM
 	AM_RANGE(0x700000, 0x70000f) AM_WRITE(rlt_blitter_w)
-	AM_RANGE(0x720000, 0x720001) AM_WRITE(rlt_ramdac_address_wm_w)
+	AM_RANGE(0x720000, 0x720001) AM_DEVWRITE8_MODERN("ramdac",ramdac_device,index_w,0x00ff)
-	AM_RANGE(0x720002, 0x720003) AM_READWRITE(rlt_ramdac_data_r, rlt_ramdac_data_w)
+	AM_RANGE(0x720002, 0x720003) AM_DEVREADWRITE8_MODERN("ramdac",ramdac_device,pal_r,pal_w,0x00ff)
-	AM_RANGE(0x720006, 0x720007) AM_WRITE(rlt_ramdac_address_rm_w)
+	AM_RANGE(0x720006, 0x720007) AM_DEVWRITE8_MODERN("ramdac",ramdac_device,index_r_w,0x00ff)
 	AM_RANGE(0x740000, 0x740001) AM_WRITE(rlt_snd1_w)
 	AM_RANGE(0x760000, 0x760001) AM_WRITE(rlt_snd2_w)
 	AM_RANGE(0x780000, 0x780001) AM_WRITENOP	/* sound control, unknown, usually = 0x0044 */
@@ -177,6 +178,15 @@ static MACHINE_RESET( rltennis )
 	state->m_timer->adjust(attotime::from_hz(RLT_TIMER_FREQ));
 }
 
+static ADDRESS_MAP_START( ramdac_map, AS_0, 8 )
+	AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE_MODERN("ramdac",ramdac_device,ramdac_pal_r,ramdac_rgb888_w)
+ADDRESS_MAP_END
+
+static RAMDAC_INTERFACE( ramdac_intf )
+{
+	1
+};
+
 static MACHINE_CONFIG_START( rltennis, rltennis_state )
 
 	MCFG_CPU_ADD("maincpu", M68000, RLT_XTAL/2) /* 68000P8  ??? */
@@ -197,6 +207,7 @@ static MACHINE_CONFIG_START( rltennis, rltennis_state )
 	MCFG_NVRAM_ADD_0FILL("nvram")
 
 	MCFG_VIDEO_START( rltennis )
+	MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map)
 
 	MCFG_SPEAKER_STANDARD_MONO("mono")
 

src/mame/drivers/sfbonus.c

@@ -301,7 +301,6 @@ public:
 	UINT8* m_3000_regs;
 	UINT8* m_2801_regs;
 	UINT8* m_2c01_regs;
-	struct { int r,g,b,offs,offs_internal; } m_pal;
 };
 
 
@@ -1239,6 +1238,11 @@ static ADDRESS_MAP_START( ramdac_map, AS_0, 8 )
 	AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE_MODERN("ramdac",ramdac_device,ramdac_pal_r,ramdac_rgb666_w)
 ADDRESS_MAP_END
 
+static RAMDAC_INTERFACE( ramdac_intf )
+{
+	0
+};
+
 
 static MACHINE_CONFIG_START( sfbonus, sfbonus_state )
 	MCFG_CPU_ADD("maincpu", Z80, 6000000) // custom packaged z80 CPU ?? Mhz
@@ -1263,7 +1267,7 @@ static MACHINE_CONFIG_START( sfbonus, sfbonus_state )
 
 	MCFG_PALETTE_LENGTH(0x100*2) // *2 for priority workaraound / custom drawing
 
-	MCFG_RAMDAC_ADD("ramdac", ramdac_map)
+	MCFG_RAMDAC_ADD("ramdac", ramdac_intf, ramdac_map)
 
 	MCFG_VIDEO_START(sfbonus)
 

src/mame/includes/rltennis.h

@@ -45,10 +45,6 @@ public:
 
 
 WRITE16_HANDLER( rlt_blitter_w );
-WRITE16_HANDLER( rlt_ramdac_address_wm_w );
-WRITE16_HANDLER( rlt_ramdac_address_rm_w );
-WRITE16_HANDLER( rlt_ramdac_data_w );
-READ16_HANDLER( rlt_ramdac_data_r );
 VIDEO_START( rltennis );
 SCREEN_UPDATE( rltennis );
 

src/mame/video/rltennis.c

@@ -221,44 +221,6 @@ WRITE16_HANDLER(rlt_blitter_w)
 	}
 }
 
-WRITE16_HANDLER(rlt_ramdac_address_wm_w )
-{
-	rltennis_state *state = space->machine().driver_data<rltennis_state>();
-	state->m_palpos_w = data*3;
-}
-
-WRITE16_HANDLER(rlt_ramdac_address_rm_w )
-{
-	rltennis_state *state = space->machine().driver_data<rltennis_state>();
-	state->m_palpos_r = data*3;
-}
-
-WRITE16_HANDLER( rlt_ramdac_data_w )
-{
-	rltennis_state *state = space->machine().driver_data<rltennis_state>();
-	int color=state->m_palpos_w/3;
-	state->m_palette[state->m_palpos_w] = data & 0xff;
-	++state->m_palpos_w;
-
-	state->m_palpos_w %=256*3;
-
-	{
-		int r = state->m_palette[color*3];
-		int g = state->m_palette[color*3+1];
-		int b = state->m_palette[color*3+2];
-		palette_set_color(space->machine(), color, MAKE_RGB(r,g,b));
-	}
-}
-
-READ16_HANDLER( rlt_ramdac_data_r )
-{
-	rltennis_state *state = space->machine().driver_data<rltennis_state>();
-	int data=state->m_palette[state->m_palpos_r];
-	++state->m_palpos_r;
-	state->m_palpos_r %=256*3;
-	return data;
-}
-
 VIDEO_START( rltennis )
 {
 	rltennis_state *state = machine.driver_data<rltennis_state>();