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Replaced the following macros (SMH == static memory handler)

Browse Source 
MRA*_BANK*/MRA*_BANK* -> SMH_BANK*
   MRA*_RAM/MRA*_ROM     -> SMH_RAM
   MRA*_ROM/MWA*_ROM     -> SMH_ROM
   MRA*_NOP/MWA*_NOP     -> SMH_NOP
   MRA*_UNMAP/MWA*_UNMAP -> SMH_UNMAP

This removes the silly need for a bunch of redundant constants
with faux type definitions that didn't buy anything.

Moved some memory system constants into memory.c.
This commit is contained in:
Aaron Giles 2008-03-10 02:29:15 +00:00
parent 198f401cf5
commit 0862cce453
795 changed files with 14487 additions and 14824 deletions
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26
src/emu/cheat.c
View File

@ -8939,7 +8939,7 @@ static UINT8 DefaultEnableRegion(running_machine *machine, SearchRegion * region
}
#endif
if( (handler == MWA8_RAM) && (!region->writeHandler->baseptr))
if( (handler == SMH_RAM) && (!region->writeHandler->baseptr))
return 1;
#ifndef MESS
@ -8947,7 +8947,7 @@ static UINT8 DefaultEnableRegion(running_machine *machine, SearchRegion * region
{
/* ----- for neogeo, search bank one ----- */
if( (!strcmp(machine->gamedrv->parent, "neogeo")) && (info->targetType == kRegionType_CPU) &&
(info->targetIdx == 0) && (handler == MWA8_BANK1))
(info->targetIdx == 0) && (handler == SMH_BANK1))
return 1;
}
@ -8957,28 +8957,28 @@ static UINT8 DefaultEnableRegion(running_machine *machine, SearchRegion * region
/* ----- for exterminator, search bank one ----- */
if( (machine->config->cpu[1].type == CPU_TMS34010) && (info->targetType == kRegionType_CPU) &&
(info->targetIdx == 1) && (handler == MWA8_BANK1))
(info->targetIdx == 1) && (handler == SMH_BANK1))
return 1;
/* ----- for smashtv, search bank two ----- */
if( (machine->config->cpu[0].type == CPU_TMS34010) && (info->targetType == kRegionType_CPU) &&
(info->targetIdx == 0) && (handler == MWA8_BANK2))
(info->targetIdx == 0) && (handler == SMH_BANK2))
return 1;
#endif
return 0;
case kSearchSpeed_Medium:
if( (handlerAddress >= ((FPTR)MWA8_BANK1)) && (handlerAddress <= ((FPTR)MWA8_BANK24)))
if( (handlerAddress >= ((FPTR)SMH_BANK1)) && (handlerAddress <= ((FPTR)SMH_BANK24)))
return 1;
if(handler == MWA8_RAM)
if(handler == SMH_RAM)
return 1;
return 0;
case kSearchSpeed_Slow:
if( (handler == MWA8_NOP) || (handler == MWA8_ROM))
if( (handler == SMH_NOP) || (handler == SMH_ROM))
return 0;
if( (handlerAddress > STATIC_COUNT) && (!region->writeHandler->baseptr))
@ -8987,7 +8987,7 @@ static UINT8 DefaultEnableRegion(running_machine *machine, SearchRegion * region
return 1;
case kSearchSpeed_VerySlow:
if( (handler == MWA8_NOP) || (handler == MWA8_ROM))
if( (handler == SMH_NOP) || (handler == SMH_ROM))
return 0;
return 1;
@ -9013,15 +9013,15 @@ static void SetSearchRegionDefaultName(SearchRegion * region)
genf * handler = region->writeHandler->write.handler;
FPTR handlerAddress = (FPTR)handler;
if( (handlerAddress >= ((FPTR)MWA8_BANK1)) && (handlerAddress <= ((FPTR)MWA8_BANK24)))
sprintf(desc, "BANK%.2d", (int)(handlerAddress - (FPTR)MWA8_BANK1) + 1);
if( (handlerAddress >= ((FPTR)SMH_BANK1)) && (handlerAddress <= ((FPTR)SMH_BANK24)))
sprintf(desc, "BANK%.2d", (int)(handlerAddress - (FPTR)SMH_BANK1) + 1);
else
{
switch(handlerAddress)
{
case (FPTR)MWA8_NOP: strcpy(desc, "NOP "); break;
case (FPTR)MWA8_RAM: strcpy(desc, "RAM "); break;
case (FPTR)MWA8_ROM: strcpy(desc, "ROM "); break;
case (FPTR)SMH_NOP: strcpy(desc, "NOP "); break;
case (FPTR)SMH_RAM: strcpy(desc, "RAM "); break;
case (FPTR)SMH_ROM: strcpy(desc, "ROM "); break;
default: strcpy(desc, "CUSTOM"); break;
}
}

2
src/emu/cpu/tms7000/tms7000.c
View File

@ -156,7 +156,7 @@ static WRITE8_HANDLER( tms70x0_pf_w );
static ADDRESS_MAP_START(tms7000_mem, ADDRESS_SPACE_PROGRAM, 8)
AM_RANGE(0x0000, 0x007f) AM_READWRITE(tms7000_internal_r, tms7000_internal_w) /* tms7000 internal RAM */
AM_RANGE(0x0080, 0x00ff) AM_READWRITE(MRA8_NOP, MWA8_NOP) /* reserved */
AM_RANGE(0x0080, 0x00ff) AM_READWRITE(SMH_NOP, SMH_NOP) /* reserved */
AM_RANGE(0x0100, 0x01ff) AM_READWRITE(tms70x0_pf_r, tms70x0_pf_w) /* tms7000 internal I/O ports */
ADDRESS_MAP_END

8
src/emu/inptport.c
View File

@ -2578,27 +2578,27 @@ int port_tag_to_index(const char *tag)
read8_machine_func port_tag_to_handler8(const char *tag)
{
int port = port_tag_to_index(tag);
return (port == -1) ? MRA8_NOP : port_handler8[port];
return (port == -1) ? SMH_NOP : port_handler8[port];
}
read16_machine_func port_tag_to_handler16(const char *tag)
{
int port = port_tag_to_index(tag);
return (port == -1) ? MRA16_NOP : port_handler16[port];
return (port == -1) ? SMH_NOP : port_handler16[port];
}
read32_machine_func port_tag_to_handler32(const char *tag)
{
int port = port_tag_to_index(tag);
return (port == -1) ? MRA32_NOP : port_handler32[port];
return (port == -1) ? SMH_NOP : port_handler32[port];
}
read64_machine_func port_tag_to_handler64(const char *tag)
{
return MRA64_NOP;
return SMH_NOP;
}

63
src/emu/memory.c
View File

@ -7,6 +7,30 @@
Copyright Nicola Salmoria and the MAME Team.
Visit http://mamedev.org for licensing and usage restrictions.
****************************************************************************
Basic theory of memory handling:
An address with up to 32 bits is passed to a memory handler. First,
an address mask is applied to the address, removing unused bits.
Next, the address is broken into two halves, an upper half and a
lower half. The number of bits in each half can be controlled via
macros in memory.h, but they default to the upper 18 bits and the
lower 14 bits. The upper half is then used as an index into the
base_lookup table.
If the value pulled from the table is within the range 192-255, then
the lower half of the address is needed to resolve the final handler.
The value from the table (192-255) is combined with the lower address
bits to form an index into a subtable.
Table values in the range 0-63 are reserved for internal handling
(such as RAM, ROM, NOP, and banking). Table values between 64 and 192
are assigned dynamically at startup.
****************************************************************************
Caveats:
* If your driver executes an opcode which crosses a bank-switched
@ -98,30 +122,31 @@
#define VPRINTF(x) do { if (VERBOSE) mame_printf_debug x; } while (0)
/* ----- banking constants ----- */
/***************************************************************************
#define MAX_BANKS 66 /* maximum number of banks */
#define MAX_BANK_ENTRIES 256 /* maximum number of possible bank values */
#define MAX_EXPLICIT_BANKS 32 /* maximum number of explicitly-defined banks */
Basic theory of memory handling:
/* ----- address map lookup table definitions ----- */
#define SUBTABLE_COUNT 64 /* number of slots reserved for subtables */
#define SUBTABLE_BASE (256-SUBTABLE_COUNT) /* first index of a subtable */
#define ENTRY_COUNT (SUBTABLE_BASE) /* number of legitimate (non-subtable) entries */
#define SUBTABLE_ALLOC 8 /* number of subtables to allocate at a time */
An address with up to 32 bits is passed to a memory handler. First,
an address mask is applied to the address, removing unused bits.
/* ----- bit counts ----- */
#define LEVEL1_BITS 18 /* number of address bits in the level 1 table */
#define LEVEL2_BITS (32 - LEVEL1_BITS) /* number of address bits in the level 2 table */
Next, the address is broken into two halves, an upper half and a
lower half. The number of bits in each half can be controlled via
macros in memory.h, but they default to the upper 18 bits and the
lower 14 bits. The upper half is then used as an index into the
base_lookup table.
/* ----- other address map constants ----- */
#define MAX_MEMORY_BLOCKS 1024 /* maximum memory blocks we can track */
#define MAX_SHARED_POINTERS 256 /* maximum number of shared pointers in memory maps */
#define MEMORY_BLOCK_SIZE 65536 /* size of allocated memory blocks */
If the value pulled from the table is within the range 192-255, then
the lower half of the address is needed to resolve the final handler.
The value from the table (192-255) is combined with the lower address
bits to form an index into a subtable.
/* ----- table lookup helpers ----- */
#define LEVEL1_INDEX(a) ((a) >> LEVEL2_BITS)
#define LEVEL2_INDEX(e,a) ((1 << LEVEL1_BITS) + (((e) - SUBTABLE_BASE) << LEVEL2_BITS) + ((a) & ((1 << LEVEL2_BITS) - 1)))
Table values in the range 0-63 are reserved for internal handling
(such as RAM, ROM, NOP, and banking). Table values between 64 and 192
are assigned dynamically at startup.
***************************************************************************/
/* macros for the profiler */
#define MEMREADSTART() do { profiler_mark(PROFILER_MEMREAD); } while (0)
@ -1583,7 +1608,7 @@ static void install_mem_handler_private(addrspace_data *space, int iswrite, int
{
/* translate ROM to RAM/UNMAP here */
if (HANDLER_IS_ROM(handler))
handler = iswrite ? (genf *)STATIC_UNMAP : (genf *)MRA8_RAM;
handler = iswrite ? (genf *)STATIC_UNMAP : (genf *)SMH_RAM;
/* assign banks for RAM/ROM areas */
if (HANDLER_IS_RAM(handler))

474
src/emu/memory.h
View File

@ -128,396 +128,63 @@ struct _data_accessors
declared within each driver.
***************************************************************************/
/* ----- definitions for the extended flags in the address maps ----- */
#define AMEF_SPECIFIES_SPACE 0x00000001 /* set if the address space is specified */
#define AMEF_SPECIFIES_ABITS 0x00000002 /* set if the number of address space bits is specified */
#define AMEF_SPECIFIES_DBITS 0x00000004 /* set if the databus width is specified */
#define AMEF_SPECIFIES_UNMAP 0x00000008 /* set if the unmap value is specified */
/* ----- definitions for specifying the address space in the extended flags ----- */
#define AMEF_SPACE_SHIFT 8 /* shift to get at the address space */
#define AMEF_SPACE_MASK (0x0f << AMEF_SPACE_SHIFT) /* mask to get at the address space */
#define AMEF_SPACE(x) (((x) << AMEF_SPACE_SHIFT) | AMEF_SPECIFIES_SPACE) /* specifies a given address space */
/* ----- definitions for specifying the address bus width in the extended flags ----- */
#define AMEF_ABITS_SHIFT 12 /* shift to get the address bits count */
#define AMEF_ABITS_MASK (0x3f << AMEF_ABITS_SHIFT) /* mask to get at the address bits count */
#define AMEF_ABITS(n) (((n) << AMEF_ABITS_SHIFT) | AMEF_SPECIFIES_ABITS) /* specifies a given number of address */
/* ----- definitions for specifying the data bus width in the extended flags ----- */
#define AMEF_DBITS_SHIFT 18 /* shift to get the data bits count */
#define AMEF_DBITS_MASK (0x07 << AMEF_DBITS_SHIFT) /* mask to get at the data bits count */
#define AMEF_DBITS(n) ((((n)/8-1) << AMEF_DBITS_SHIFT) | AMEF_SPECIFIES_DBITS) /* specifies a given data bus width */
/* ----- definitions for specifying the unmap value in the extended flags ----- */
#define AMEF_UNMAP_SHIFT 21 /* shift to get the unmap value */
#define AMEF_UNMAP_MASK (1 << AMEF_UNMAP_SHIFT) /* mask to get at the unmap value */
#define AMEF_UNMAP(x) (((x) << AMEF_UNMAP_SHIFT) | AMEF_SPECIFIES_UNMAP) /* specifies a given unmap value */
/* ----- static data access handler constants ----- */
enum
{
STATIC_INVALID = 0, /* invalid - should never be used */
STATIC_BANK1, /* banked memory */
STATIC_BANK2,
STATIC_BANK3,
STATIC_BANK4,
STATIC_BANK5,
STATIC_BANK6,
STATIC_BANK7,
STATIC_BANK8,
STATIC_BANK9,
STATIC_BANK10,
STATIC_BANK11,
STATIC_BANK12,
STATIC_BANK13,
STATIC_BANK14,
STATIC_BANK15,
STATIC_BANK16,
STATIC_BANK17,
STATIC_BANK18,
STATIC_BANK19,
STATIC_BANK20,
STATIC_BANK21,
STATIC_BANK22,
STATIC_BANK23,
STATIC_BANK24,
STATIC_BANK25,
STATIC_BANK26,
STATIC_BANK27,
STATIC_BANK28,
STATIC_BANK29,
STATIC_BANK30,
STATIC_BANK31,
STATIC_BANK32,
/* entries 33-67 are reserved for dynamically allocated internal banks */
STATIC_BANK1 = 1, /* banked memory */
/* entries 1-32 are for fixed banks specified by the driver */
/* entries 33-67 are for dynamically allocated internal banks */
STATIC_RAM = 68, /* RAM - standard reads/writes */
STATIC_ROM, /* ROM - standard reads, no writes */
STATIC_NOP,
STATIC_ROM, /* ROM - standard reads, no writes */
STATIC_NOP, /* NOP - reads return unmapped value; writes do nothing */
STATIC_UNMAP, /* unmapped - all unmapped memory goes here */
STATIC_COUNT /* total number of static handlers */
};
/* ----- banking constants ----- */
#define MAX_BANKS 66 /* maximum number of banks */
#define MAX_BANK_ENTRIES 256 /* maximum number of possible bank values */
#define MAX_EXPLICIT_BANKS 32 /* maximum number of explicitly-defined banks */
#define STATIC_BANKMAX (STATIC_RAM - 1) /* handler constant of last bank */
/* SMH_* macros are Static Memory Handler definitions with
pre-cast versions of the STATIC_* functions */
#define SMH_RAM ((void *)STATIC_RAM)
#define SMH_ROM ((void *)STATIC_ROM)
#define SMH_NOP ((void *)STATIC_NOP)
#define SMH_UNMAP ((void *)STATIC_UNMAP)
#define SMH_BANK(n) ((void *)(STATIC_BANK1 + (n) - 1))
/***************************************************************************
STATIC ENTRY CONSTANTS
****************************************************************************
The first 32 entries in the address lookup table are reserved for
"static" handlers. These are internal handlers for RAM, ROM, banks,
and unmapped areas in the address space. The following definitions
are the properly-casted versions of the STATIC_ constants above.
***************************************************************************/
/* 8-bit reads */
#define MRA8_BANK1 ((read8_machine_func)STATIC_BANK1)
#define MRA8_BANK2 ((read8_machine_func)STATIC_BANK2)
#define MRA8_BANK3 ((read8_machine_func)STATIC_BANK3)
#define MRA8_BANK4 ((read8_machine_func)STATIC_BANK4)
#define MRA8_BANK5 ((read8_machine_func)STATIC_BANK5)
#define MRA8_BANK6 ((read8_machine_func)STATIC_BANK6)
#define MRA8_BANK7 ((read8_machine_func)STATIC_BANK7)
#define MRA8_BANK8 ((read8_machine_func)STATIC_BANK8)
#define MRA8_BANK9 ((read8_machine_func)STATIC_BANK9)
#define MRA8_BANK10 ((read8_machine_func)STATIC_BANK10)
#define MRA8_BANK11 ((read8_machine_func)STATIC_BANK11)
#define MRA8_BANK12 ((read8_machine_func)STATIC_BANK12)
#define MRA8_BANK13 ((read8_machine_func)STATIC_BANK13)
#define MRA8_BANK14 ((read8_machine_func)STATIC_BANK14)
#define MRA8_BANK15 ((read8_machine_func)STATIC_BANK15)
#define MRA8_BANK16 ((read8_machine_func)STATIC_BANK16)
#define MRA8_BANK17 ((read8_machine_func)STATIC_BANK17)
#define MRA8_BANK18 ((read8_machine_func)STATIC_BANK18)
#define MRA8_BANK19 ((read8_machine_func)STATIC_BANK19)
#define MRA8_BANK20 ((read8_machine_func)STATIC_BANK20)
#define MRA8_BANK21 ((read8_machine_func)STATIC_BANK21)
#define MRA8_BANK22 ((read8_machine_func)STATIC_BANK22)
#define MRA8_BANK23 ((read8_machine_func)STATIC_BANK23)
#define MRA8_BANK24 ((read8_machine_func)STATIC_BANK24)
#define MRA8_BANK25 ((read8_machine_func)STATIC_BANK25)
#define MRA8_BANK26 ((read8_machine_func)STATIC_BANK26)
#define MRA8_BANK27 ((read8_machine_func)STATIC_BANK27)
#define MRA8_BANK28 ((read8_machine_func)STATIC_BANK28)
#define MRA8_BANK29 ((read8_machine_func)STATIC_BANK29)
#define MRA8_BANK30 ((read8_machine_func)STATIC_BANK30)
#define MRA8_BANK31 ((read8_machine_func)STATIC_BANK31)
#define MRA8_BANK32 ((read8_machine_func)STATIC_BANK32)
#define MRA8_RAM ((read8_machine_func)STATIC_RAM)
#define MRA8_ROM ((read8_machine_func)STATIC_ROM)
#define MRA8_NOP ((read8_machine_func)STATIC_NOP)
#define MRA8_UNMAP ((read8_machine_func)STATIC_UNMAP)
/* 8-bit writes */
#define MWA8_BANK1 ((write8_machine_func)STATIC_BANK1)
#define MWA8_BANK2 ((write8_machine_func)STATIC_BANK2)
#define MWA8_BANK3 ((write8_machine_func)STATIC_BANK3)
#define MWA8_BANK4 ((write8_machine_func)STATIC_BANK4)
#define MWA8_BANK5 ((write8_machine_func)STATIC_BANK5)
#define MWA8_BANK6 ((write8_machine_func)STATIC_BANK6)
#define MWA8_BANK7 ((write8_machine_func)STATIC_BANK7)
#define MWA8_BANK8 ((write8_machine_func)STATIC_BANK8)
#define MWA8_BANK9 ((write8_machine_func)STATIC_BANK9)
#define MWA8_BANK10 ((write8_machine_func)STATIC_BANK10)
#define MWA8_BANK11 ((write8_machine_func)STATIC_BANK11)
#define MWA8_BANK12 ((write8_machine_func)STATIC_BANK12)
#define MWA8_BANK13 ((write8_machine_func)STATIC_BANK13)
#define MWA8_BANK14 ((write8_machine_func)STATIC_BANK14)
#define MWA8_BANK15 ((write8_machine_func)STATIC_BANK15)
#define MWA8_BANK16 ((write8_machine_func)STATIC_BANK16)
#define MWA8_BANK17 ((write8_machine_func)STATIC_BANK17)
#define MWA8_BANK18 ((write8_machine_func)STATIC_BANK18)
#define MWA8_BANK19 ((write8_machine_func)STATIC_BANK19)
#define MWA8_BANK20 ((write8_machine_func)STATIC_BANK20)
#define MWA8_BANK21 ((write8_machine_func)STATIC_BANK21)
#define MWA8_BANK22 ((write8_machine_func)STATIC_BANK22)
#define MWA8_BANK23 ((write8_machine_func)STATIC_BANK23)
#define MWA8_BANK24 ((write8_machine_func)STATIC_BANK24)
#define MWA8_BANK25 ((write8_machine_func)STATIC_BANK25)
#define MWA8_BANK26 ((write8_machine_func)STATIC_BANK26)
#define MWA8_BANK27 ((write8_machine_func)STATIC_BANK27)
#define MWA8_BANK28 ((write8_machine_func)STATIC_BANK28)
#define MWA8_BANK29 ((write8_machine_func)STATIC_BANK29)
#define MWA8_BANK30 ((write8_machine_func)STATIC_BANK30)
#define MWA8_BANK31 ((write8_machine_func)STATIC_BANK31)
#define MWA8_BANK32 ((write8_machine_func)STATIC_BANK32)
#define MWA8_RAM ((write8_machine_func)STATIC_RAM)
#define MWA8_ROM ((write8_machine_func)STATIC_ROM)
#define MWA8_NOP ((write8_machine_func)STATIC_NOP)
#define MWA8_UNMAP ((write8_machine_func)STATIC_UNMAP)
/* 16-bit reads */
#define MRA16_BANK1 ((read16_machine_func)STATIC_BANK1)
#define MRA16_BANK2 ((read16_machine_func)STATIC_BANK2)
#define MRA16_BANK3 ((read16_machine_func)STATIC_BANK3)
#define MRA16_BANK4 ((read16_machine_func)STATIC_BANK4)
#define MRA16_BANK5 ((read16_machine_func)STATIC_BANK5)
#define MRA16_BANK6 ((read16_machine_func)STATIC_BANK6)
#define MRA16_BANK7 ((read16_machine_func)STATIC_BANK7)
#define MRA16_BANK8 ((read16_machine_func)STATIC_BANK8)
#define MRA16_BANK9 ((read16_machine_func)STATIC_BANK9)
#define MRA16_BANK10 ((read16_machine_func)STATIC_BANK10)
#define MRA16_BANK11 ((read16_machine_func)STATIC_BANK11)
#define MRA16_BANK12 ((read16_machine_func)STATIC_BANK12)
#define MRA16_BANK13 ((read16_machine_func)STATIC_BANK13)
#define MRA16_BANK14 ((read16_machine_func)STATIC_BANK14)
#define MRA16_BANK15 ((read16_machine_func)STATIC_BANK15)
#define MRA16_BANK16 ((read16_machine_func)STATIC_BANK16)
#define MRA16_BANK17 ((read16_machine_func)STATIC_BANK17)
#define MRA16_BANK18 ((read16_machine_func)STATIC_BANK18)
#define MRA16_BANK19 ((read16_machine_func)STATIC_BANK19)
#define MRA16_BANK20 ((read16_machine_func)STATIC_BANK20)
#define MRA16_BANK21 ((read16_machine_func)STATIC_BANK21)
#define MRA16_BANK22 ((read16_machine_func)STATIC_BANK22)
#define MRA16_BANK23 ((read16_machine_func)STATIC_BANK23)
#define MRA16_BANK24 ((read16_machine_func)STATIC_BANK24)
#define MRA16_BANK25 ((read16_machine_func)STATIC_BANK25)
#define MRA16_BANK26 ((read16_machine_func)STATIC_BANK26)
#define MRA16_BANK27 ((read16_machine_func)STATIC_BANK27)
#define MRA16_BANK28 ((read16_machine_func)STATIC_BANK28)
#define MRA16_BANK29 ((read16_machine_func)STATIC_BANK29)
#define MRA16_BANK30 ((read16_machine_func)STATIC_BANK30)
#define MRA16_BANK31 ((read16_machine_func)STATIC_BANK31)
#define MRA16_BANK32 ((read16_machine_func)STATIC_BANK32)
#define MRA16_RAM ((read16_machine_func)STATIC_RAM)
#define MRA16_ROM ((read16_machine_func)STATIC_ROM)
#define MRA16_NOP ((read16_machine_func)STATIC_NOP)
#define MRA16_UNMAP ((read16_machine_func)STATIC_UNMAP)
/* 16-bit writes */
#define MWA16_BANK1 ((write16_machine_func)STATIC_BANK1)
#define MWA16_BANK2 ((write16_machine_func)STATIC_BANK2)
#define MWA16_BANK3 ((write16_machine_func)STATIC_BANK3)
#define MWA16_BANK4 ((write16_machine_func)STATIC_BANK4)
#define MWA16_BANK5 ((write16_machine_func)STATIC_BANK5)
#define MWA16_BANK6 ((write16_machine_func)STATIC_BANK6)
#define MWA16_BANK7 ((write16_machine_func)STATIC_BANK7)
#define MWA16_BANK8 ((write16_machine_func)STATIC_BANK8)
#define MWA16_BANK9 ((write16_machine_func)STATIC_BANK9)
#define MWA16_BANK10 ((write16_machine_func)STATIC_BANK10)
#define MWA16_BANK11 ((write16_machine_func)STATIC_BANK11)
#define MWA16_BANK12 ((write16_machine_func)STATIC_BANK12)
#define MWA16_BANK13 ((write16_machine_func)STATIC_BANK13)
#define MWA16_BANK14 ((write16_machine_func)STATIC_BANK14)
#define MWA16_BANK15 ((write16_machine_func)STATIC_BANK15)
#define MWA16_BANK16 ((write16_machine_func)STATIC_BANK16)
#define MWA16_BANK17 ((write16_machine_func)STATIC_BANK17)
#define MWA16_BANK18 ((write16_machine_func)STATIC_BANK18)
#define MWA16_BANK19 ((write16_machine_func)STATIC_BANK19)
#define MWA16_BANK20 ((write16_machine_func)STATIC_BANK20)
#define MWA16_BANK21 ((write16_machine_func)STATIC_BANK21)
#define MWA16_BANK22 ((write16_machine_func)STATIC_BANK22)
#define MWA16_BANK23 ((write16_machine_func)STATIC_BANK23)
#define MWA16_BANK24 ((write16_machine_func)STATIC_BANK24)
#define MWA16_BANK25 ((write16_machine_func)STATIC_BANK25)
#define MWA16_BANK26 ((write16_machine_func)STATIC_BANK26)
#define MWA16_BANK27 ((write16_machine_func)STATIC_BANK27)
#define MWA16_BANK28 ((write16_machine_func)STATIC_BANK28)
#define MWA16_BANK29 ((write16_machine_func)STATIC_BANK29)
#define MWA16_BANK30 ((write16_machine_func)STATIC_BANK30)
#define MWA16_BANK31 ((write16_machine_func)STATIC_BANK31)
#define MWA16_BANK32 ((write16_machine_func)STATIC_BANK32)
#define MWA16_RAM ((write16_machine_func)STATIC_RAM)
#define MWA16_ROM ((write16_machine_func)STATIC_ROM)
#define MWA16_NOP ((write16_machine_func)STATIC_NOP)
#define MWA16_UNMAP ((write16_machine_func)STATIC_UNMAP)
/* 32-bit reads */
#define MRA32_BANK1 ((read32_machine_func)STATIC_BANK1)
#define MRA32_BANK2 ((read32_machine_func)STATIC_BANK2)
#define MRA32_BANK3 ((read32_machine_func)STATIC_BANK3)
#define MRA32_BANK4 ((read32_machine_func)STATIC_BANK4)
#define MRA32_BANK5 ((read32_machine_func)STATIC_BANK5)
#define MRA32_BANK6 ((read32_machine_func)STATIC_BANK6)
#define MRA32_BANK7 ((read32_machine_func)STATIC_BANK7)
#define MRA32_BANK8 ((read32_machine_func)STATIC_BANK8)
#define MRA32_BANK9 ((read32_machine_func)STATIC_BANK9)
#define MRA32_BANK10 ((read32_machine_func)STATIC_BANK10)
#define MRA32_BANK11 ((read32_machine_func)STATIC_BANK11)
#define MRA32_BANK12 ((read32_machine_func)STATIC_BANK12)
#define MRA32_BANK13 ((read32_machine_func)STATIC_BANK13)
#define MRA32_BANK14 ((read32_machine_func)STATIC_BANK14)
#define MRA32_BANK15 ((read32_machine_func)STATIC_BANK15)
#define MRA32_BANK16 ((read32_machine_func)STATIC_BANK16)
#define MRA32_BANK17 ((read32_machine_func)STATIC_BANK17)
#define MRA32_BANK18 ((read32_machine_func)STATIC_BANK18)
#define MRA32_BANK19 ((read32_machine_func)STATIC_BANK19)
#define MRA32_BANK20 ((read32_machine_func)STATIC_BANK20)
#define MRA32_BANK21 ((read32_machine_func)STATIC_BANK21)
#define MRA32_BANK22 ((read32_machine_func)STATIC_BANK22)
#define MRA32_BANK23 ((read32_machine_func)STATIC_BANK23)
#define MRA32_BANK24 ((read32_machine_func)STATIC_BANK24)
#define MRA32_BANK25 ((read32_machine_func)STATIC_BANK25)
#define MRA32_BANK26 ((read32_machine_func)STATIC_BANK26)
#define MRA32_BANK27 ((read32_machine_func)STATIC_BANK27)
#define MRA32_BANK28 ((read32_machine_func)STATIC_BANK28)
#define MRA32_BANK29 ((read32_machine_func)STATIC_BANK29)
#define MRA32_BANK30 ((read32_machine_func)STATIC_BANK30)
#define MRA32_BANK31 ((read32_machine_func)STATIC_BANK31)
#define MRA32_BANK32 ((read32_machine_func)STATIC_BANK32)
#define MRA32_RAM ((read32_machine_func)STATIC_RAM)
#define MRA32_ROM ((read32_machine_func)STATIC_ROM)
#define MRA32_NOP ((read32_machine_func)STATIC_NOP)
#define MRA32_UNMAP ((read32_machine_func)STATIC_UNMAP)
/* 32-bit writes */
#define MWA32_BANK1 ((write32_machine_func)STATIC_BANK1)
#define MWA32_BANK2 ((write32_machine_func)STATIC_BANK2)
#define MWA32_BANK3 ((write32_machine_func)STATIC_BANK3)
#define MWA32_BANK4 ((write32_machine_func)STATIC_BANK4)
#define MWA32_BANK5 ((write32_machine_func)STATIC_BANK5)
#define MWA32_BANK6 ((write32_machine_func)STATIC_BANK6)
#define MWA32_BANK7 ((write32_machine_func)STATIC_BANK7)
#define MWA32_BANK8 ((write32_machine_func)STATIC_BANK8)
#define MWA32_BANK9 ((write32_machine_func)STATIC_BANK9)
#define MWA32_BANK10 ((write32_machine_func)STATIC_BANK10)
#define MWA32_BANK11 ((write32_machine_func)STATIC_BANK11)
#define MWA32_BANK12 ((write32_machine_func)STATIC_BANK12)
#define MWA32_BANK13 ((write32_machine_func)STATIC_BANK13)
#define MWA32_BANK14 ((write32_machine_func)STATIC_BANK14)
#define MWA32_BANK15 ((write32_machine_func)STATIC_BANK15)
#define MWA32_BANK16 ((write32_machine_func)STATIC_BANK16)
#define MWA32_BANK17 ((write32_machine_func)STATIC_BANK17)
#define MWA32_BANK18 ((write32_machine_func)STATIC_BANK18)
#define MWA32_BANK19 ((write32_machine_func)STATIC_BANK19)
#define MWA32_BANK20 ((write32_machine_func)STATIC_BANK20)
#define MWA32_BANK21 ((write32_machine_func)STATIC_BANK21)
#define MWA32_BANK22 ((write32_machine_func)STATIC_BANK22)
#define MWA32_BANK23 ((write32_machine_func)STATIC_BANK23)
#define MWA32_BANK24 ((write32_machine_func)STATIC_BANK24)
#define MWA32_BANK25 ((write32_machine_func)STATIC_BANK25)
#define MWA32_BANK26 ((write32_machine_func)STATIC_BANK26)
#define MWA32_BANK27 ((write32_machine_func)STATIC_BANK27)
#define MWA32_BANK28 ((write32_machine_func)STATIC_BANK28)
#define MWA32_BANK29 ((write32_machine_func)STATIC_BANK29)
#define MWA32_BANK30 ((write32_machine_func)STATIC_BANK30)
#define MWA32_BANK31 ((write32_machine_func)STATIC_BANK31)
#define MWA32_BANK32 ((write32_machine_func)STATIC_BANK32)
#define MWA32_RAM ((write32_machine_func)STATIC_RAM)
#define MWA32_ROM ((write32_machine_func)STATIC_ROM)
#define MWA32_NOP ((write32_machine_func)STATIC_NOP)
#define MWA32_UNMAP ((write32_machine_func)STATIC_UNMAP)
/* 64-bit reads */
#define MRA64_BANK1 ((read64_machine_func)STATIC_BANK1)
#define MRA64_BANK2 ((read64_machine_func)STATIC_BANK2)
#define MRA64_BANK3 ((read64_machine_func)STATIC_BANK3)
#define MRA64_BANK4 ((read64_machine_func)STATIC_BANK4)
#define MRA64_BANK5 ((read64_machine_func)STATIC_BANK5)
#define MRA64_BANK6 ((read64_machine_func)STATIC_BANK6)
#define MRA64_BANK7 ((read64_machine_func)STATIC_BANK7)
#define MRA64_BANK8 ((read64_machine_func)STATIC_BANK8)
#define MRA64_BANK9 ((read64_machine_func)STATIC_BANK9)
#define MRA64_BANK10 ((read64_machine_func)STATIC_BANK10)
#define MRA64_BANK11 ((read64_machine_func)STATIC_BANK11)
#define MRA64_BANK12 ((read64_machine_func)STATIC_BANK12)
#define MRA64_BANK13 ((read64_machine_func)STATIC_BANK13)
#define MRA64_BANK14 ((read64_machine_func)STATIC_BANK14)
#define MRA64_BANK15 ((read64_machine_func)STATIC_BANK15)
#define MRA64_BANK16 ((read64_machine_func)STATIC_BANK16)
#define MRA64_BANK17 ((read64_machine_func)STATIC_BANK17)
#define MRA64_BANK18 ((read64_machine_func)STATIC_BANK18)
#define MRA64_BANK19 ((read64_machine_func)STATIC_BANK19)
#define MRA64_BANK20 ((read64_machine_func)STATIC_BANK20)
#define MRA64_BANK21 ((read64_machine_func)STATIC_BANK21)
#define MRA64_BANK22 ((read64_machine_func)STATIC_BANK22)
#define MRA64_BANK23 ((read64_machine_func)STATIC_BANK23)
#define MRA64_BANK24 ((read64_machine_func)STATIC_BANK24)
#define MRA64_BANK25 ((read64_machine_func)STATIC_BANK25)
#define MRA64_BANK26 ((read64_machine_func)STATIC_BANK26)
#define MRA64_BANK27 ((read64_machine_func)STATIC_BANK27)
#define MRA64_BANK28 ((read64_machine_func)STATIC_BANK28)
#define MRA64_BANK29 ((read64_machine_func)STATIC_BANK29)
#define MRA64_BANK30 ((read64_machine_func)STATIC_BANK30)
#define MRA64_BANK31 ((read64_machine_func)STATIC_BANK31)
#define MRA64_BANK32 ((read64_machine_func)STATIC_BANK32)
#define MRA64_RAM ((read64_machine_func)STATIC_RAM)
#define MRA64_ROM ((read64_machine_func)STATIC_ROM)
#define MRA64_NOP ((read64_machine_func)STATIC_NOP)
#define MRA64_UNMAP ((read64_machine_func)STATIC_UNMAP)
/* 64-bit writes */
#define MWA64_BANK1 ((write64_machine_func)STATIC_BANK1)
#define MWA64_BANK2 ((write64_machine_func)STATIC_BANK2)
#define MWA64_BANK3 ((write64_machine_func)STATIC_BANK3)
#define MWA64_BANK4 ((write64_machine_func)STATIC_BANK4)
#define MWA64_BANK5 ((write64_machine_func)STATIC_BANK5)
#define MWA64_BANK6 ((write64_machine_func)STATIC_BANK6)
#define MWA64_BANK7 ((write64_machine_func)STATIC_BANK7)
#define MWA64_BANK8 ((write64_machine_func)STATIC_BANK8)
#define MWA64_BANK9 ((write64_machine_func)STATIC_BANK9)
#define MWA64_BANK10 ((write64_machine_func)STATIC_BANK10)
#define MWA64_BANK11 ((write64_machine_func)STATIC_BANK11)
#define MWA64_BANK12 ((write64_machine_func)STATIC_BANK12)
#define MWA64_BANK13 ((write64_machine_func)STATIC_BANK13)
#define MWA64_BANK14 ((write64_machine_func)STATIC_BANK14)
#define MWA64_BANK15 ((write64_machine_func)STATIC_BANK15)
#define MWA64_BANK16 ((write64_machine_func)STATIC_BANK16)
#define MWA64_BANK17 ((write64_machine_func)STATIC_BANK17)
#define MWA64_BANK18 ((write64_machine_func)STATIC_BANK18)
#define MWA64_BANK19 ((write64_machine_func)STATIC_BANK19)
#define MWA64_BANK20 ((write64_machine_func)STATIC_BANK20)
#define MWA64_BANK21 ((write64_machine_func)STATIC_BANK21)
#define MWA64_BANK22 ((write64_machine_func)STATIC_BANK22)
#define MWA64_BANK23 ((write64_machine_func)STATIC_BANK23)
#define MWA64_BANK24 ((write64_machine_func)STATIC_BANK24)
#define MWA64_BANK25 ((write64_machine_func)STATIC_BANK25)
#define MWA64_BANK26 ((write64_machine_func)STATIC_BANK26)
#define MWA64_BANK27 ((write64_machine_func)STATIC_BANK27)
#define MWA64_BANK28 ((write64_machine_func)STATIC_BANK28)
#define MWA64_BANK29 ((write64_machine_func)STATIC_BANK29)
#define MWA64_BANK30 ((write64_machine_func)STATIC_BANK30)
#define MWA64_BANK31 ((write64_machine_func)STATIC_BANK31)
#define MWA64_BANK32 ((write64_machine_func)STATIC_BANK32)
#define MWA64_RAM ((write64_machine_func)STATIC_RAM)
#define MWA64_ROM ((write64_machine_func)STATIC_ROM)
#define MWA64_NOP ((write64_machine_func)STATIC_NOP)
#define MWA64_UNMAP ((write64_machine_func)STATIC_UNMAP)
#define SMH_BANK1 SMH_BANK(1)
#define SMH_BANK2 SMH_BANK(2)
#define SMH_BANK3 SMH_BANK(3)
#define SMH_BANK4 SMH_BANK(4)
#define SMH_BANK5 SMH_BANK(5)
#define SMH_BANK6 SMH_BANK(6)
#define SMH_BANK7 SMH_BANK(7)
#define SMH_BANK8 SMH_BANK(8)
#define SMH_BANK9 SMH_BANK(9)
#define SMH_BANK10 SMH_BANK(10)
#define SMH_BANK11 SMH_BANK(11)
#define SMH_BANK12 SMH_BANK(12)
#define SMH_BANK13 SMH_BANK(13)
#define SMH_BANK14 SMH_BANK(14)
#define SMH_BANK15 SMH_BANK(15)
#define SMH_BANK16 SMH_BANK(16)
#define SMH_BANK17 SMH_BANK(17)
#define SMH_BANK18 SMH_BANK(18)
#define SMH_BANK19 SMH_BANK(19)
#define SMH_BANK20 SMH_BANK(20)
#define SMH_BANK21 SMH_BANK(21)
#define SMH_BANK22 SMH_BANK(22)
#define SMH_BANK23 SMH_BANK(23)
#define SMH_BANK24 SMH_BANK(24)
#define SMH_BANK25 SMH_BANK(25)
#define SMH_BANK26 SMH_BANK(26)
#define SMH_BANK27 SMH_BANK(27)
#define SMH_BANK28 SMH_BANK(28)
#define SMH_BANK29 SMH_BANK(29)
#define SMH_BANK30 SMH_BANK(30)
#define SMH_BANK31 SMH_BANK(31)
#define SMH_BANK32 SMH_BANK(32)
@ -847,15 +514,15 @@ enum
/* ----- common shortcuts ----- */
#define AM_READWRITE(_read,_write) AM_READ(_read) AM_WRITE(_write)
#define AM_DEVREADWRITE(_type,_tag,_read,_write) AM_DEVREAD(_type,_tag,_read) AM_DEVWRITE(_type,_tag,_write)
#define AM_ROM AM_READ((void *)STATIC_ROM)
#define AM_RAM AM_READWRITE((void *)STATIC_RAM, (void *)STATIC_RAM)
#define AM_WRITEONLY AM_WRITE((void *)STATIC_RAM)
#define AM_UNMAP AM_READWRITE((void *)STATIC_UNMAP, (void *)STATIC_UNMAP)
#define AM_ROMBANK(_bank) AM_READ((void *)(STATIC_BANK1 + (_bank) - 1))
#define AM_RAMBANK(_bank) AM_READWRITE((void *)(STATIC_BANK1 + (_bank) - 1), (void *)(STATIC_BANK1 + (_bank) - 1))
#define AM_NOP AM_READWRITE((void *)STATIC_NOP, (void *)STATIC_NOP)
#define AM_READNOP AM_READ((void *)STATIC_NOP)
#define AM_WRITENOP AM_WRITE((void *)STATIC_NOP)
#define AM_ROM AM_READ(SMH_ROM)
#define AM_RAM AM_READWRITE(SMH_RAM, SMH_RAM)
#define AM_WRITEONLY AM_WRITE(SMH_RAM)
#define AM_UNMAP AM_READWRITE(SMH_UNMAP, SMH_UNMAP)
#define AM_ROMBANK(_bank) AM_READ(SMH_BANK(_bank))
#define AM_RAMBANK(_bank) AM_READWRITE(SMH_BANK(_bank), SMH_BANK(_bank))
#define AM_NOP AM_READWRITE(SMH_NOP, SMH_NOP)
#define AM_READNOP AM_READ(SMH_NOP)
#define AM_WRITENOP AM_WRITE(SMH_NOP)
@ -872,35 +539,6 @@ enum
ADDRESS_SPACES /* maximum number of address spaces */
};
extern const char *const address_space_names[ADDRESS_SPACES];
/* ----- address map lookup table definitions ----- */
#define SUBTABLE_COUNT 64 /* number of slots reserved for subtables */
#define SUBTABLE_BASE (256-SUBTABLE_COUNT) /* first index of a subtable */
#define ENTRY_COUNT (SUBTABLE_BASE) /* number of legitimate (non-subtable) entries */
#define SUBTABLE_ALLOC 8 /* number of subtables to allocate at a time */
/* ----- bit counts ----- */
#define LEVEL1_BITS 18 /* number of address bits in the level 1 table */
#define LEVEL2_BITS (32 - LEVEL1_BITS) /* number of address bits in the level 2 table */
/* ----- other address map constants ----- */
#define MAX_MEMORY_BLOCKS 1024 /* maximum memory blocks we can track */
#define MAX_SHARED_POINTERS 256 /* maximum number of shared pointers in memory maps */
#define MEMORY_BLOCK_SIZE 65536 /* size of allocated memory blocks */
/***************************************************************************
ADDRESS MAP LOOKUP MACROS
***************************************************************************/
/* ----- table lookup helpers ----- */
#define LEVEL1_INDEX(a) ((a) >> LEVEL2_BITS)
#define LEVEL2_INDEX(e,a) ((1 << LEVEL1_BITS) + (((e) - SUBTABLE_BASE) << LEVEL2_BITS) + ((a) & ((1 << LEVEL2_BITS) - 1)))
/***************************************************************************
FUNCTION PROTOTYPES FOR CORE READ/WRITE ROUTINES
***************************************************************************/
@ -1140,8 +778,8 @@ extern offs_t opcode_mask; /* mask to apply to the opcode address */
extern offs_t opcode_memory_min; /* opcode memory minimum */
extern offs_t opcode_memory_max; /* opcode memory maximum */
extern address_space active_address_space[]; /* address spaces */
#define construct_map_0 NULL
extern const char *const address_space_names[ADDRESS_SPACES];
/***************************************************************************
@ -1264,10 +902,10 @@ INLINE UINT32 cpu_readop_arg32(offs_t A) { if (address_is_unsafe(A)) { memory_se
INLINE UINT64 cpu_readop_arg64(offs_t A) { if (address_is_unsafe(A)) { memory_set_opbase(A); } return cpu_readop_arg64_unsafe(A); }
/* ----- bank switching for CPU cores ----- */
#define change_pc(pc) memory_set_opbase(pc);
#define change_pc(pc) do { memory_set_opbase(pc); } while (0)
/* ----- forces the next branch to generate a call to the opbase handler ----- */
#define catch_nextBranch() (opcode_entry = 0xff)
#define catch_nextBranch() do { opcode_entry = 0xff; } while (0)
#endif /* __MEMORY_H__ */

2
src/emu/video/generic.c
View File

@ -368,7 +368,7 @@ equal to the size of normal spriteram.
Spriteram size _must_ be declared in the memory map:
{ 0x120000, 0x1207ff, MWA8_BANK2, &spriteram, &spriteram_size },
{ 0x120000, 0x1207ff, SMH_BANK2, &spriteram, &spriteram_size },
Then the video driver must draw the sprites from the buffered_spriteram
pointer. The function buffer_spriteram_w() is used to simulate hardware

2
src/mame/audio/cinemat.c
View File

@ -1533,7 +1533,7 @@ static ADDRESS_MAP_START( demon_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x6001, 0x6001) AM_READ(AY8910_read_port_2_r)
AM_RANGE(0x6002, 0x6002) AM_WRITE(AY8910_write_port_2_w)
AM_RANGE(0x6003, 0x6003) AM_WRITE(AY8910_control_port_2_w)
AM_RANGE(0x7000, 0x7000) AM_WRITE(MWA8_NOP) /* watchdog? */
AM_RANGE(0x7000, 0x7000) AM_WRITE(SMH_NOP) /* watchdog? */
ADDRESS_MAP_END

42
src/mame/audio/dcs.c
View File

@ -1077,30 +1077,30 @@ static void sdrc_remap_memory(void)
/* if SRAM disabled, clean it out */
if (SDRC_SM_EN == 0)
{
memory_install_read32_handler (dcs.cpunum, ADDRESS_SPACE_PROGRAM, 0x0800, 0x3fff, 0, 0, MRA32_UNMAP);
memory_install_write32_handler(dcs.cpunum, ADDRESS_SPACE_PROGRAM, 0x0800, 0x3fff, 0, 0, MWA32_UNMAP);
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, 0x0800, 0x37ff, 0, 0, MRA16_UNMAP);
memory_install_write16_handler(dcs.cpunum, ADDRESS_SPACE_DATA, 0x0800, 0x37ff, 0, 0, MWA16_UNMAP);
memory_install_read32_handler (dcs.cpunum, ADDRESS_SPACE_PROGRAM, 0x0800, 0x3fff, 0, 0, SMH_UNMAP);
memory_install_write32_handler(dcs.cpunum, ADDRESS_SPACE_PROGRAM, 0x0800, 0x3fff, 0, 0, SMH_UNMAP);
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, 0x0800, 0x37ff, 0, 0, SMH_UNMAP);
memory_install_write16_handler(dcs.cpunum, ADDRESS_SPACE_DATA, 0x0800, 0x37ff, 0, 0, SMH_UNMAP);
}
/* otherwise, map the SRAM */
else
{
/* first start with a clean program map */
memory_install_read32_handler (dcs.cpunum, ADDRESS_SPACE_PROGRAM, 0x0800, 0x3fff, 0, 0, MRA32_BANK21);
memory_install_write32_handler(dcs.cpunum, ADDRESS_SPACE_PROGRAM, 0x0800, 0x3fff, 0, 0, MWA32_BANK21);
memory_install_read32_handler (dcs.cpunum, ADDRESS_SPACE_PROGRAM, 0x0800, 0x3fff, 0, 0, SMH_BANK21);
memory_install_write32_handler(dcs.cpunum, ADDRESS_SPACE_PROGRAM, 0x0800, 0x3fff, 0, 0, SMH_BANK21);
memory_set_bankptr(21, dcs_sram + 0x4800);
/* set up the data map based on the SRAM banking */
/* map 0: ram from 0800-37ff */
if (SDRC_SM_BK == 0)
{
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, 0x0800, 0x17ff, 0, 0, MRA16_BANK22);
memory_install_write16_handler(dcs.cpunum, ADDRESS_SPACE_DATA, 0x0800, 0x17ff, 0, 0, MWA16_BANK22);
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, 0x1800, 0x27ff, 0, 0, MRA16_BANK23);
memory_install_write16_handler(dcs.cpunum, ADDRESS_SPACE_DATA, 0x1800, 0x27ff, 0, 0, MWA16_BANK23);
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, 0x2800, 0x37ff, 0, 0, MRA16_BANK24);
memory_install_write16_handler(dcs.cpunum, ADDRESS_SPACE_DATA, 0x2800, 0x37ff, 0, 0, MWA16_BANK24);
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, 0x0800, 0x17ff, 0, 0, SMH_BANK22);
memory_install_write16_handler(dcs.cpunum, ADDRESS_SPACE_DATA, 0x0800, 0x17ff, 0, 0, SMH_BANK22);
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, 0x1800, 0x27ff, 0, 0, SMH_BANK23);
memory_install_write16_handler(dcs.cpunum, ADDRESS_SPACE_DATA, 0x1800, 0x27ff, 0, 0, SMH_BANK23);
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, 0x2800, 0x37ff, 0, 0, SMH_BANK24);
memory_install_write16_handler(dcs.cpunum, ADDRESS_SPACE_DATA, 0x2800, 0x37ff, 0, 0, SMH_BANK24);
memory_set_bankptr(22, dcs_sram + 0x0000);
memory_set_bankptr(23, dcs_sram + 0x1000);
memory_set_bankptr(24, dcs_sram + 0x2000);
@ -1109,12 +1109,12 @@ static void sdrc_remap_memory(void)
/* map 1: nothing from 0800-17ff, alternate RAM at 1800-27ff, same RAM at 2800-37ff */
else
{
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, 0x0800, 0x17ff, 0, 0, MRA16_UNMAP);
memory_install_write16_handler(dcs.cpunum, ADDRESS_SPACE_DATA, 0x0800, 0x17ff, 0, 0, MWA16_UNMAP);
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, 0x1800, 0x27ff, 0, 0, MRA16_BANK23);
memory_install_write16_handler(dcs.cpunum, ADDRESS_SPACE_DATA, 0x1800, 0x27ff, 0, 0, MWA16_BANK23);
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, 0x2800, 0x37ff, 0, 0, MRA16_BANK24);
memory_install_write16_handler(dcs.cpunum, ADDRESS_SPACE_DATA, 0x2800, 0x37ff, 0, 0, MWA16_BANK24);
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, 0x0800, 0x17ff, 0, 0, SMH_UNMAP);
memory_install_write16_handler(dcs.cpunum, ADDRESS_SPACE_DATA, 0x0800, 0x17ff, 0, 0, SMH_UNMAP);
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, 0x1800, 0x27ff, 0, 0, SMH_BANK23);
memory_install_write16_handler(dcs.cpunum, ADDRESS_SPACE_DATA, 0x1800, 0x27ff, 0, 0, SMH_BANK23);
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, 0x2800, 0x37ff, 0, 0, SMH_BANK24);
memory_install_write16_handler(dcs.cpunum, ADDRESS_SPACE_DATA, 0x2800, 0x37ff, 0, 0, SMH_BANK24);
memory_set_bankptr(23, dcs_sram + 0x3000);
memory_set_bankptr(24, dcs_sram + 0x2000);
}
@ -1125,15 +1125,15 @@ static void sdrc_remap_memory(void)
{
int baseaddr = (SDRC_ROM_ST == 0) ? 0x0000 : (SDRC_ROM_ST == 1) ? 0x3000 : 0x3400;
int pagesize = (SDRC_ROM_SZ == 0 && SDRC_ROM_ST != 0) ? 4096 : 1024;
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, baseaddr, baseaddr + pagesize - 1, 0, 0, MRA16_BANK25);
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, baseaddr, baseaddr + pagesize - 1, 0, 0, SMH_BANK25);
}
/* map the DRAM page as bank 26 */
if (SDRC_DM_ST != 0)
{
int baseaddr = (SDRC_DM_ST == 1) ? 0x0000 : (SDRC_DM_ST == 2) ? 0x3000 : 0x3400;
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, baseaddr, baseaddr + 0x3ff, 0, 0, MRA16_BANK26);
memory_install_write16_handler(dcs.cpunum, ADDRESS_SPACE_DATA, baseaddr, baseaddr + 0x3ff, 0, 0, MWA16_BANK26);
memory_install_read16_handler (dcs.cpunum, ADDRESS_SPACE_DATA, baseaddr, baseaddr + 0x3ff, 0, 0, SMH_BANK26);
memory_install_write16_handler(dcs.cpunum, ADDRESS_SPACE_DATA, baseaddr, baseaddr + 0x3ff, 0, 0, SMH_BANK26);
}
/* update the bank pointers */

8
src/mame/audio/exidy440.c
View File

@ -894,11 +894,11 @@ static void decode_and_filter_cvsd(UINT8 *input, int bytes, int maskbits, int fr
static ADDRESS_MAP_START( exidy440_audio_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_NOP
AM_RANGE(0x8000, 0x801f) AM_MIRROR(0x03e0) AM_READWRITE(m6844_r, m6844_w) AM_BASE(&m6844_data)
AM_RANGE(0x8400, 0x840f) AM_MIRROR(0x03f0) AM_READWRITE(MRA8_RAM, sound_volume_w) AM_BASE(&sound_volume)
AM_RANGE(0x8800, 0x8800) AM_MIRROR(0x03ff) AM_READWRITE(sound_command_r, MWA8_NOP)
AM_RANGE(0x8400, 0x840f) AM_MIRROR(0x03f0) AM_READWRITE(SMH_RAM, sound_volume_w) AM_BASE(&sound_volume)
AM_RANGE(0x8800, 0x8800) AM_MIRROR(0x03ff) AM_READWRITE(sound_command_r, SMH_NOP)
AM_RANGE(0x8c00, 0x93ff) AM_NOP
AM_RANGE(0x9400, 0x9403) AM_MIRROR(0x03fc) AM_READWRITE(MRA8_NOP, MWA8_RAM) AM_BASE(&sound_banks)
AM_RANGE(0x9800, 0x9800) AM_MIRROR(0x03ff) AM_READWRITE(MRA8_NOP, sound_interrupt_clear_w)
AM_RANGE(0x9400, 0x9403) AM_MIRROR(0x03fc) AM_READWRITE(SMH_NOP, SMH_RAM) AM_BASE(&sound_banks)
AM_RANGE(0x9800, 0x9800) AM_MIRROR(0x03ff) AM_READWRITE(SMH_NOP, sound_interrupt_clear_w)
AM_RANGE(0x9c00, 0x9fff) AM_NOP
AM_RANGE(0xa000, 0xbfff) AM_RAM
AM_RANGE(0xc000, 0xdfff) AM_NOP

16
src/mame/audio/jedi.c
View File

@ -177,15 +177,15 @@ static ADDRESS_MAP_START( audio_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0810, 0x081f) AM_MIRROR(0x07c0) AM_READWRITE(pokey2_r, pokey2_w)
AM_RANGE(0x0820, 0x082f) AM_MIRROR(0x07c0) AM_READWRITE(pokey3_r, pokey3_w)
AM_RANGE(0x0830, 0x083f) AM_MIRROR(0x07c0) AM_READWRITE(pokey4_r, pokey4_w)
AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x00ff) AM_READWRITE(MRA8_NOP, irq_ack_w)
AM_RANGE(0x1100, 0x1100) AM_MIRROR(0x00ff) AM_READWRITE(MRA8_NOP, MWA8_RAM) AM_BASE_MEMBER(jedi_state, speech_data)
AM_RANGE(0x1200, 0x13ff) AM_READWRITE(MRA8_NOP, speech_strobe_w)
AM_RANGE(0x1400, 0x1400) AM_MIRROR(0x00ff) AM_READWRITE(MRA8_NOP, audio_ack_latch_w)
AM_RANGE(0x1500, 0x1500) AM_MIRROR(0x00ff) AM_READWRITE(MRA8_NOP, speech_reset_w)
AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x00ff) AM_READWRITE(SMH_NOP, irq_ack_w)
AM_RANGE(0x1100, 0x1100) AM_MIRROR(0x00ff) AM_READWRITE(SMH_NOP, SMH_RAM) AM_BASE_MEMBER(jedi_state, speech_data)
AM_RANGE(0x1200, 0x13ff) AM_READWRITE(SMH_NOP, speech_strobe_w)
AM_RANGE(0x1400, 0x1400) AM_MIRROR(0x00ff) AM_READWRITE(SMH_NOP, audio_ack_latch_w)
AM_RANGE(0x1500, 0x1500) AM_MIRROR(0x00ff) AM_READWRITE(SMH_NOP, speech_reset_w)
AM_RANGE(0x1600, 0x17ff) AM_NOP
AM_RANGE(0x1800, 0x1800) AM_MIRROR(0x03ff) AM_READWRITE(audio_latch_r, MWA8_NOP)
AM_RANGE(0x1c00, 0x1c00) AM_MIRROR(0x03fe) AM_READWRITE(speech_ready_r, MWA8_NOP)
AM_RANGE(0x1c01, 0x1c01) AM_MIRROR(0x03fe) AM_READWRITE(MRA8_RAM, MWA8_NOP) AM_BASE_MEMBER(jedi_state, audio_comm_stat)
AM_RANGE(0x1800, 0x1800) AM_MIRROR(0x03ff) AM_READWRITE(audio_latch_r, SMH_NOP)
AM_RANGE(0x1c00, 0x1c00) AM_MIRROR(0x03fe) AM_READWRITE(speech_ready_r, SMH_NOP)
AM_RANGE(0x1c01, 0x1c01) AM_MIRROR(0x03fe) AM_READWRITE(SMH_RAM, SMH_NOP) AM_BASE_MEMBER(jedi_state, audio_comm_stat)
AM_RANGE(0x2000, 0x7fff) AM_NOP
AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END

2
src/mame/audio/mcr.c
View File

@ -475,7 +475,7 @@ static ADDRESS_MAP_START( ssio_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xb000, 0xb000) AM_MIRROR(0x0ffc) AM_WRITE(AY8910_control_port_1_w)
AM_RANGE(0xb001, 0xb001) AM_MIRROR(0x0ffc) AM_READ(AY8910_read_port_1_r)
AM_RANGE(0xb002, 0xb002) AM_MIRROR(0x0ffc) AM_WRITE(AY8910_write_port_1_w)
AM_RANGE(0xc000, 0xcfff) AM_READWRITE(MRA8_NOP, ssio_status_w)
AM_RANGE(0xc000, 0xcfff) AM_READWRITE(SMH_NOP, ssio_status_w)
AM_RANGE(0xd000, 0xdfff) AM_WRITENOP /* low bit controls yellow LED */
AM_RANGE(0xe000, 0xefff) AM_READ(ssio_irq_clear)
AM_RANGE(0xf000, 0xffff) AM_READ_PORT("SSIO.DIP") /* 6 DIP switches */

4
src/mame/audio/redalert.c
View File

@ -136,7 +136,7 @@ static const struct AY8910interface redalert_ay8910_interface =
static ADDRESS_MAP_START( redalert_audio_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_GLOBAL_MASK(0x7fff)
AM_RANGE(0x0000, 0x03ff) AM_MIRROR(0x0c00) AM_RAM
AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x0ffe) AM_READWRITE(MRA8_NOP, redalert_AY8910_w)
AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x0ffe) AM_READWRITE(SMH_NOP, redalert_AY8910_w)
AM_RANGE(0x1001, 0x1001) AM_MIRROR(0x0ffe) AM_READWRITE(redalert_ay8910_latch_1_r, redalert_ay8910_latch_2_w)
AM_RANGE(0x2000, 0x6fff) AM_NOP
AM_RANGE(0x7000, 0x77ff) AM_MIRROR(0x0800) AM_ROM
@ -187,7 +187,7 @@ static ADDRESS_MAP_START( redalert_voice_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x7fff) AM_NOP
AM_RANGE(0x8000, 0x83ff) AM_MIRROR(0x3c00) AM_RAM
AM_RANGE(0xc000, 0xc000) AM_MIRROR(0x3fff) AM_READWRITE(soundlatch2_r, MWA8_NOP)
AM_RANGE(0xc000, 0xc000) AM_MIRROR(0x3fff) AM_READWRITE(soundlatch2_r, SMH_NOP)
ADDRESS_MAP_END

8
src/mame/drivers/1945kiii.c
View File

@ -130,15 +130,15 @@ static WRITE16_HANDLER( k3_soundbanks_w )
static ADDRESS_MAP_START( k3_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x0009CE, 0x0009CF) AM_WRITE(MWA16_NOP) // bug in code? (clean up log)
AM_RANGE(0x0009D2, 0x0009D3) AM_WRITE(MWA16_NOP) // bug in code? (clean up log)
AM_RANGE(0x0009CE, 0x0009CF) AM_WRITE(SMH_NOP) // bug in code? (clean up log)
AM_RANGE(0x0009D2, 0x0009D3) AM_WRITE(SMH_NOP) // bug in code? (clean up log)
AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
AM_RANGE(0x100000, 0x10ffff) AM_RAM // Main Ram
AM_RANGE(0x200000, 0x200fff) AM_READWRITE(MRA16_RAM, paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16) // palette
AM_RANGE(0x200000, 0x200fff) AM_READWRITE(SMH_RAM, paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16) // palette
AM_RANGE(0x240000, 0x240fff) AM_RAM AM_BASE(&k3_spriteram_1)
AM_RANGE(0x280000, 0x280fff) AM_RAM AM_BASE(&k3_spriteram_2)
AM_RANGE(0x2c0000, 0x2c0fff) AM_READWRITE(MRA16_RAM, k3_bgram_w) AM_BASE(&k3_bgram)
AM_RANGE(0x2c0000, 0x2c0fff) AM_READWRITE(SMH_RAM, k3_bgram_w) AM_BASE(&k3_bgram)
AM_RANGE(0x340000, 0x340001) AM_WRITE(k3_scrollx_w)
AM_RANGE(0x380000, 0x380001) AM_WRITE(k3_scrolly_w)
AM_RANGE(0x3c0000, 0x3c0001) AM_WRITE(k3_soundbanks_w)

18
src/mame/drivers/20pacgal.c
View File

@ -200,12 +200,12 @@ static ADDRESS_MAP_START( 20pacgal_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x45040, 0x4505f) AM_WRITE(pacman_sound_w) AM_BASE(&namco_soundregs)
AM_RANGE(0x44800, 0x45eff) AM_RAM
AM_RANGE(0x45f00, 0x45fff) AM_WRITE(_20pacgal_wavedata_w) AM_BASE(&namco_wavedata)
AM_RANGE(0x46000, 0x46fff) AM_WRITE(MWA8_RAM) AM_BASE_MEMBER(_20pacgal_state, char_gfx_ram)
AM_RANGE(0x46000, 0x46fff) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(_20pacgal_state, char_gfx_ram)
AM_RANGE(0x47100, 0x47100) AM_RAM /* leftover from original Galaga code */
AM_RANGE(0x48000, 0x49fff) AM_READWRITE(MRA8_ROM, rom_48000_w) /* this should be a mirror of 08000-09ffff */
AM_RANGE(0x4c000, 0x4dfff) AM_WRITE(MWA8_RAM) AM_BASE_MEMBER(_20pacgal_state, sprite_gfx_ram)
AM_RANGE(0x4e000, 0x4e17f) AM_WRITE(MWA8_RAM) AM_BASE_MEMBER(_20pacgal_state, sprite_ram)
AM_RANGE(0x4ff00, 0x4ffff) AM_WRITE(MWA8_RAM) AM_BASE_MEMBER(_20pacgal_state, sprite_color_lookup)
AM_RANGE(0x48000, 0x49fff) AM_READWRITE(SMH_ROM, rom_48000_w) /* this should be a mirror of 08000-09ffff */
AM_RANGE(0x4c000, 0x4dfff) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(_20pacgal_state, sprite_gfx_ram)
AM_RANGE(0x4e000, 0x4e17f) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(_20pacgal_state, sprite_ram)
AM_RANGE(0x4ff00, 0x4ffff) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(_20pacgal_state, sprite_color_lookup)
ADDRESS_MAP_END
@ -224,14 +224,14 @@ static ADDRESS_MAP_START( 20pacgal_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x81, 0x81) AM_READ(input_port_1_r)
AM_RANGE(0x82, 0x82) AM_READ(input_port_2_r)
AM_RANGE(0x80, 0x80) AM_WRITE(watchdog_reset_w)
AM_RANGE(0x81, 0x81) AM_WRITE(MWA8_NOP) /* ??? pulsed by the timer irq */
AM_RANGE(0x81, 0x81) AM_WRITE(SMH_NOP) /* ??? pulsed by the timer irq */
AM_RANGE(0x82, 0x82) AM_WRITE(irqack_w)
AM_RANGE(0x85, 0x86) AM_WRITE(MWA8_NOP) /* stars: rng seed (lo/hi) */
AM_RANGE(0x85, 0x86) AM_WRITE(SMH_NOP) /* stars: rng seed (lo/hi) */
AM_RANGE(0x87, 0x87) AM_READWRITE(eeprom_r, eeprom_w)
AM_RANGE(0x88, 0x88) AM_WRITE(rom_bank_select_w)
AM_RANGE(0x89, 0x89) AM_WRITE(_20pacgal_dac_w)
AM_RANGE(0x8a, 0x8a) AM_WRITE(MWA8_NOP) /* stars: bits 3-4 = active set; bit 5 = enable */
AM_RANGE(0x8b, 0x8b) AM_WRITE(MWA8_RAM) AM_BASE_MEMBER(_20pacgal_state, flip)
AM_RANGE(0x8a, 0x8a) AM_WRITE(SMH_NOP) /* stars: bits 3-4 = active set; bit 5 = enable */
AM_RANGE(0x8b, 0x8b) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(_20pacgal_state, flip)
AM_RANGE(0x8f, 0x8f) AM_WRITE(_20pacgal_coin_counter_w)
ADDRESS_MAP_END

6
src/mame/drivers/2mindril.c
View File

@ -135,13 +135,13 @@ static ADDRESS_MAP_START( drill_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x400000, 0x4fffff) AM_RAM AM_BASE(&unkram)// video stuff, 460000 - video regs ?
AM_RANGE(0x500000, 0x501fff) AM_RAM AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x502000, 0x503fff) AM_RAM
AM_RANGE(0x700000, 0x70000f) AM_READ(drill_unk_r) AM_WRITE(MWA16_NOP) // i/o
AM_RANGE(0x700000, 0x70000f) AM_READ(drill_unk_r) AM_WRITE(SMH_NOP) // i/o
AM_RANGE(0x600000, 0x600001) AM_READ(YM2610_status_port_0_A_lsb_r) AM_WRITE(YM2610_control_port_0_A_lsb_w)
AM_RANGE(0x600002, 0x600003) AM_READ(YM2610_read_port_0_lsb_r) AM_WRITE(YM2610_data_port_0_A_lsb_w)
AM_RANGE(0x600004, 0x600005) AM_READ(YM2610_status_port_0_B_lsb_r) AM_WRITE(YM2610_control_port_0_B_lsb_w)
AM_RANGE(0x600006, 0x600007) AM_WRITE(YM2610_data_port_0_B_lsb_w)
AM_RANGE(0x60000c, 0x60000d) AM_READ(MRA16_NOP) AM_WRITE(MWA16_NOP)
AM_RANGE(0x60000e, 0x60000f) AM_READ(MRA16_NOP) AM_WRITE(MWA16_NOP)
AM_RANGE(0x60000c, 0x60000d) AM_READ(SMH_NOP) AM_WRITE(SMH_NOP)
AM_RANGE(0x60000e, 0x60000f) AM_READ(SMH_NOP) AM_WRITE(SMH_NOP)
ADDRESS_MAP_END
static INPUT_PORTS_START( drill )

18
src/mame/drivers/8080bw.c
View File

@ -481,13 +481,13 @@ ADDRESS_MAP_END
/* at least one of these MWA8_NOPs must be sound related */
static ADDRESS_MAP_START( cosmo_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x00, 0x00) AM_READWRITE(input_port_0_r, MWA8_NOP)
AM_RANGE(0x01, 0x01) AM_READWRITE(input_port_1_r, MWA8_NOP)
AM_RANGE(0x02, 0x02) AM_READWRITE(input_port_2_r, MWA8_NOP)
AM_RANGE(0x00, 0x00) AM_READWRITE(input_port_0_r, SMH_NOP)
AM_RANGE(0x01, 0x01) AM_READWRITE(input_port_1_r, SMH_NOP)
AM_RANGE(0x02, 0x02) AM_READWRITE(input_port_2_r, SMH_NOP)
AM_RANGE(0x03, 0x03) AM_WRITE(invadpt2_sh_port_1_w)
AM_RANGE(0x05, 0x05) AM_WRITE(cosmo_sh_port_2_w)
AM_RANGE(0x06, 0x06) AM_WRITE(watchdog_reset_w)
AM_RANGE(0x07, 0x07) AM_WRITE(MWA8_NOP)
AM_RANGE(0x07, 0x07) AM_WRITE(SMH_NOP)
ADDRESS_MAP_END
@ -1522,9 +1522,9 @@ static ADDRESS_MAP_START( sflush_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x800b, 0x800b) AM_READ(input_port_0_r)
AM_RANGE(0x8018, 0x8018) AM_WRITE(mb14241_0_shift_data_w)
AM_RANGE(0x8019, 0x8019) AM_WRITE(mb14241_0_shift_count_w)
AM_RANGE(0x801a, 0x801a) AM_WRITE(MWA8_NOP)
AM_RANGE(0x801c, 0x801c) AM_WRITE(MWA8_NOP)
AM_RANGE(0x801d, 0x801d) AM_WRITE(MWA8_NOP)
AM_RANGE(0x801a, 0x801a) AM_WRITE(SMH_NOP)
AM_RANGE(0x801c, 0x801c) AM_WRITE(SMH_NOP)
AM_RANGE(0x801d, 0x801d) AM_WRITE(SMH_NOP)
AM_RANGE(0xa000, 0xbfff) AM_MIRROR(0x00e0) AM_RAM AM_BASE(&c8080bw_colorram)
AM_RANGE(0xd800, 0xffff) AM_ROM
ADDRESS_MAP_END
@ -2142,7 +2142,7 @@ MACHINE_DRIVER_END
static ADDRESS_MAP_START( yosakdon_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x2000, 0x3fff) AM_RAM AM_BASE(&mw8080bw_ram) AM_SIZE(&mw8080bw_ram_size)
AM_RANGE(0x4000, 0x43ff) AM_WRITE(MWA8_RAM) /* what's this? */
AM_RANGE(0x4000, 0x43ff) AM_WRITE(SMH_RAM) /* what's this? */
ADDRESS_MAP_END
static ADDRESS_MAP_START( yosakdon_io_map, ADDRESS_SPACE_IO, 8 )
@ -2150,7 +2150,7 @@ static ADDRESS_MAP_START( yosakdon_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x02, 0x02) AM_READ(input_port_1_r)
AM_RANGE(0x03, 0x03) AM_WRITE(yosakdon_sh_port_1_w)
AM_RANGE(0x05, 0x05) AM_WRITE(yosakdon_sh_port_2_w)
AM_RANGE(0x06, 0x06) AM_WRITE(MWA8_NOP) /* character numbers */
AM_RANGE(0x06, 0x06) AM_WRITE(SMH_NOP) /* character numbers */
ADDRESS_MAP_END

2
src/mame/drivers/88games.c
View File

@ -122,7 +122,7 @@ static WRITE8_HANDLER( speech_msg_w )
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_RAM AM_BASE(&banked_rom) /* banked ROM + palette RAM */
AM_RANGE(0x1000, 0x1fff) AM_READWRITE(MRA8_RAM, paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram_1000) /* banked ROM + palette RAM */
AM_RANGE(0x1000, 0x1fff) AM_READWRITE(SMH_RAM, paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram_1000) /* banked ROM + palette RAM */
AM_RANGE(0x2000, 0x2fff) AM_RAM
AM_RANGE(0x3000, 0x37ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x3800, 0x3fff) AM_READWRITE(bankedram_r, bankedram_w) AM_BASE(&ram)

2
src/mame/drivers/acefruit.c
View File

@ -255,7 +255,7 @@ static ADDRESS_MAP_START( acefruit_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x2000, 0x20ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x4000, 0x43ff) AM_RAM AM_BASE(&videoram)
AM_RANGE(0x4400, 0x47ff) AM_READWRITE(MRA8_RAM, acefruit_colorram_w) AM_BASE(&colorram)
AM_RANGE(0x4400, 0x47ff) AM_READWRITE(SMH_RAM, acefruit_colorram_w) AM_BASE(&colorram)
AM_RANGE(0x8000, 0x8000) AM_READ(input_port_0_r)
AM_RANGE(0x8001, 0x8001) AM_READ(input_port_1_r)
AM_RANGE(0x8002, 0x8002) AM_READ(input_port_2_r)

6
src/mame/drivers/acommand.c
View File

@ -365,9 +365,9 @@ static ADDRESS_MAP_START( acommand, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x082000, 0x082005) AM_WRITE(ac_bgscroll_w)
AM_RANGE(0x082100, 0x082105) AM_WRITE(ac_txscroll_w)
AM_RANGE(0x082208, 0x082209) AM_WRITE(ac_unk2_w)
AM_RANGE(0x0a0000, 0x0a3fff) AM_READWRITE(MRA16_RAM, ac_bgvram_w) AM_BASE(&ac_bgvram)
AM_RANGE(0x0b0000, 0x0b3fff) AM_READWRITE(MRA16_RAM, ac_txvram_w) AM_BASE(&ac_txvram)
AM_RANGE(0x0b8000, 0x0bffff) AM_READWRITE(MRA16_RAM, paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x0a0000, 0x0a3fff) AM_READWRITE(SMH_RAM, ac_bgvram_w) AM_BASE(&ac_bgvram)
AM_RANGE(0x0b0000, 0x0b3fff) AM_READWRITE(SMH_RAM, ac_txvram_w) AM_BASE(&ac_txvram)
AM_RANGE(0x0b8000, 0x0bffff) AM_READWRITE(SMH_RAM, paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x0f0000, 0x0f7fff) AM_RAM
AM_RANGE(0x0f8000, 0x0f8fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x0f9000, 0x0fffff) AM_RAM

8
src/mame/drivers/actfancr.c
View File

@ -98,7 +98,7 @@ static ADDRESS_MAP_START( actfan_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x072000, 0x0727ff) AM_READWRITE(actfancr_pf2_data_r, actfancr_pf2_data_w) AM_BASE(&actfancr_pf2_data)
AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x110000, 0x110001) AM_WRITE(buffer_spriteram_w)
AM_RANGE(0x120000, 0x1205ff) AM_READWRITE(MRA8_RAM, paletteram_xxxxBBBBGGGGRRRR_le_w) AM_BASE(&paletteram)
AM_RANGE(0x120000, 0x1205ff) AM_READWRITE(SMH_RAM, paletteram_xxxxBBBBGGGGRRRR_le_w) AM_BASE(&paletteram)
AM_RANGE(0x130000, 0x130003) AM_READ(actfan_control_1_r)
AM_RANGE(0x140000, 0x140001) AM_READ(actfan_control_0_r)
AM_RANGE(0x150000, 0x150001) AM_WRITE(actfancr_sound_w)
@ -109,14 +109,14 @@ static ADDRESS_MAP_START( triothep_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x040000, 0x04001f) AM_WRITE(actfancr_pf2_control_w)
AM_RANGE(0x044000, 0x045fff) AM_READWRITE(actfancr_pf2_data_r, actfancr_pf2_data_w) AM_BASE(&actfancr_pf2_data)
AM_RANGE(0x046400, 0x0467ff) AM_WRITE(MWA8_NOP) /* Pf2 rowscroll - is it used? */
AM_RANGE(0x046400, 0x0467ff) AM_WRITE(SMH_NOP) /* Pf2 rowscroll - is it used? */
AM_RANGE(0x060000, 0x06001f) AM_WRITE(actfancr_pf1_control_w)
AM_RANGE(0x064000, 0x0647ff) AM_READWRITE(actfancr_pf1_data_r, actfancr_pf1_data_w) AM_BASE(&actfancr_pf1_data)
AM_RANGE(0x066400, 0x0667ff) AM_WRITE(MWA8_RAM) AM_BASE(&actfancr_pf1_rowscroll_data)
AM_RANGE(0x066400, 0x0667ff) AM_WRITE(SMH_RAM) AM_BASE(&actfancr_pf1_rowscroll_data)
AM_RANGE(0x100000, 0x100001) AM_WRITE(actfancr_sound_w)
AM_RANGE(0x110000, 0x110001) AM_WRITE(buffer_spriteram_w)
AM_RANGE(0x120000, 0x1207ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x130000, 0x1305ff) AM_READWRITE(MRA8_RAM, paletteram_xxxxBBBBGGGGRRRR_le_w) AM_BASE(&paletteram)
AM_RANGE(0x130000, 0x1305ff) AM_READWRITE(SMH_RAM, paletteram_xxxxBBBBGGGGRRRR_le_w) AM_BASE(&paletteram)
AM_RANGE(0x140000, 0x140001) AM_READNOP /* Value doesn't matter */
AM_RANGE(0x1f0000, 0x1f3fff) AM_RAM AM_BASE(&actfancr_ram) /* Main ram */
AM_RANGE(0x1ff000, 0x1ff001) AM_READWRITE(triothep_control_r, triothep_control_select_w)

12
src/mame/drivers/aeroboto.c
View File

@ -77,19 +77,19 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x01a2, 0x01a2) AM_WRITE(aeroboto_1a2_w) // affects IRQ line (more protection?)
AM_RANGE(0x0000, 0x07ff) AM_RAM AM_BASE(&aeroboto_mainram) // main RAM
AM_RANGE(0x0800, 0x08ff) AM_RAM // tile color buffer; copied to 0x2000
AM_RANGE(0x0900, 0x09ff) AM_WRITE(MWA8_RAM) // a backup of default tile colors
AM_RANGE(0x1000, 0x17ff) AM_READWRITE(MRA8_RAM, aeroboto_videoram_w) AM_BASE(&aeroboto_videoram) // tile RAM
AM_RANGE(0x0900, 0x09ff) AM_WRITE(SMH_RAM) // a backup of default tile colors
AM_RANGE(0x1000, 0x17ff) AM_READWRITE(SMH_RAM, aeroboto_videoram_w) AM_BASE(&aeroboto_videoram) // tile RAM
AM_RANGE(0x1800, 0x183f) AM_RAM AM_BASE(&aeroboto_hscroll) // horizontal scroll regs
AM_RANGE(0x2000, 0x20ff) AM_READWRITE(MRA8_RAM, aeroboto_tilecolor_w) AM_BASE(&aeroboto_tilecolor) // tile color RAM
AM_RANGE(0x1840, 0x27ff) AM_WRITE(MWA8_NOP) // cleared during custom LSI test
AM_RANGE(0x2000, 0x20ff) AM_READWRITE(SMH_RAM, aeroboto_tilecolor_w) AM_BASE(&aeroboto_tilecolor) // tile color RAM
AM_RANGE(0x1840, 0x27ff) AM_WRITE(SMH_NOP) // cleared during custom LSI test
AM_RANGE(0x2800, 0x28ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size) // sprite RAM
AM_RANGE(0x2900, 0x2fff) AM_WRITE(MWA8_NOP) // cleared along with sprite RAM
AM_RANGE(0x2900, 0x2fff) AM_WRITE(SMH_NOP) // cleared along with sprite RAM
AM_RANGE(0x2973, 0x2973) AM_READ(aeroboto_2973_r) // protection read
AM_RANGE(0x3000, 0x3000) AM_READWRITE(aeroboto_in0_r, aeroboto_3000_w)
AM_RANGE(0x3001, 0x3001) AM_READWRITE(input_port_2_r, soundlatch_w)
AM_RANGE(0x3002, 0x3002) AM_READWRITE(input_port_3_r, soundlatch2_w)
AM_RANGE(0x3003, 0x3003) AM_WRITEONLY AM_BASE(&aeroboto_vscroll)
AM_RANGE(0x3004, 0x3004) AM_READWRITE(aeroboto_201_r, MWA8_RAM) AM_BASE(&aeroboto_starx)
AM_RANGE(0x3004, 0x3004) AM_READWRITE(aeroboto_201_r, SMH_RAM) AM_BASE(&aeroboto_starx)
AM_RANGE(0x3005, 0x3005) AM_WRITEONLY AM_BASE(&aeroboto_stary) // usable but probably wrong
AM_RANGE(0x3006, 0x3006) AM_WRITEONLY AM_BASE(&aeroboto_bgcolor)
AM_RANGE(0x3800, 0x3800) AM_READNOP // watchdog or IRQ ack

52
src/mame/drivers/aerofgt.c
View File

@ -165,10 +165,10 @@ static ADDRESS_MAP_START( pspikes_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_RAM /* work RAM */
AM_RANGE(0x200000, 0x203fff) AM_RAM AM_BASE(&aerofgt_spriteram1) AM_SIZE(&aerofgt_spriteram1_size)
AM_RANGE(0xff8000, 0xff8fff) AM_READWRITE(MRA16_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0xff8000, 0xff8fff) AM_READWRITE(SMH_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0xffc000, 0xffc3ff) AM_WRITEONLY AM_BASE(&aerofgt_spriteram3) AM_SIZE(&aerofgt_spriteram3_size)
AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_BASE(&aerofgt_rasterram) /* bg1 scroll registers */
AM_RANGE(0xffe000, 0xffefff) AM_READWRITE(MRA16_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xffe000, 0xffefff) AM_READWRITE(SMH_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xfff000, 0xfff001) AM_READWRITE(input_port_0_word_r, pspikes_palette_bank_w)
AM_RANGE(0xfff002, 0xfff003) AM_READWRITE(input_port_1_word_r, pspikes_gfxbank_w)
AM_RANGE(0xfff004, 0xfff005) AM_READWRITE(input_port_2_word_r, aerofgt_bg1scrolly_w)
@ -180,11 +180,11 @@ static ADDRESS_MAP_START( pspikesb_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x100000, 0x10ffff) AM_RAM /* work RAM */
AM_RANGE(0x200000, 0x203fff) AM_RAM AM_BASE(&aerofgt_spriteram1) AM_SIZE(&aerofgt_spriteram1_size)
AM_RANGE(0xc04000, 0xc04001) AM_WRITENOP
AM_RANGE(0xff8000, 0xff8fff) AM_READWRITE(MRA16_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0xff8000, 0xff8fff) AM_READWRITE(SMH_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0xffc000, 0xffcbff) AM_RAM AM_BASE(&aerofgt_spriteram3) AM_SIZE(&aerofgt_spriteram3_size)
AM_RANGE(0xffd200, 0xffd201) AM_WRITE(pspikesb_gfxbank_w)
AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_BASE(&aerofgt_rasterram) /* bg1 scroll registers */
AM_RANGE(0xffe000, 0xffefff) AM_READWRITE(MRA16_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xffe000, 0xffefff) AM_READWRITE(SMH_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xfff000, 0xfff001) AM_READ(input_port_0_word_r)
AM_RANGE(0xfff002, 0xfff003) AM_READ(input_port_1_word_r)
AM_RANGE(0xfff004, 0xfff005) AM_READWRITE(input_port_2_word_r, aerofgt_bg1scrolly_w)
@ -213,10 +213,10 @@ static ADDRESS_MAP_START( pspikesc_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_RAM /* work RAM */
AM_RANGE(0x200000, 0x203fff) AM_RAM AM_BASE(&aerofgt_spriteram1) AM_SIZE(&aerofgt_spriteram1_size)
AM_RANGE(0xff8000, 0xff8fff) AM_READWRITE(MRA16_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0xff8000, 0xff8fff) AM_READWRITE(SMH_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0xffc000, 0xffcbff) AM_RAM AM_BASE(&aerofgt_spriteram3) AM_SIZE(&aerofgt_spriteram3_size)
AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_BASE(&aerofgt_rasterram) /* bg1 scroll registers */
AM_RANGE(0xffe000, 0xffefff) AM_READWRITE(MRA16_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xffe000, 0xffefff) AM_READWRITE(SMH_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xfff000, 0xfff001) AM_READWRITE(input_port_0_word_r, pspikes_palette_bank_w)
AM_RANGE(0xfff002, 0xfff003) AM_READWRITE(input_port_1_word_r, pspikes_gfxbank_w)
AM_RANGE(0xfff004, 0xfff005) AM_READ(input_port_2_word_r)
@ -227,14 +227,14 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( karatblz_map, ADDRESS_SPACE_PROGRAM, 16 )
ADDRESS_MAP_GLOBAL_MASK(0xfffff)
AM_RANGE(0x000000, 0x07ffff) AM_ROM
AM_RANGE(0x080000, 0x081fff) AM_READWRITE(MRA16_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0x082000, 0x083fff) AM_READWRITE(MRA16_RAM, aerofgt_bg2videoram_w) AM_BASE(&aerofgt_bg2videoram)
AM_RANGE(0x080000, 0x081fff) AM_READWRITE(SMH_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0x082000, 0x083fff) AM_READWRITE(SMH_RAM, aerofgt_bg2videoram_w) AM_BASE(&aerofgt_bg2videoram)
AM_RANGE(0x0a0000, 0x0affff) AM_RAM AM_BASE(&aerofgt_spriteram1) AM_SIZE(&aerofgt_spriteram1_size)
AM_RANGE(0x0b0000, 0x0bffff) AM_RAM AM_BASE(&aerofgt_spriteram2) AM_SIZE(&aerofgt_spriteram2_size)
AM_RANGE(0x0c0000, 0x0cffff) AM_RAM /* work RAM */
AM_RANGE(0x0f8000, 0x0fbfff) AM_RAM /* work RAM */
AM_RANGE(0x0fc000, 0x0fc7ff) AM_RAM AM_BASE(&aerofgt_spriteram3) AM_SIZE(&aerofgt_spriteram3_size)
AM_RANGE(0x0fe000, 0x0fe7ff) AM_READWRITE(MRA16_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x0fe000, 0x0fe7ff) AM_READWRITE(SMH_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x0ff000, 0x0ff001) AM_READ(input_port_0_word_r)
AM_RANGE(0x0ff002, 0x0ff003) AM_READWRITE(input_port_1_word_r, karatblz_gfxbank_w)
AM_RANGE(0x0ff004, 0x0ff005) AM_READ(input_port_2_word_r)
@ -247,12 +247,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( spinlbrk_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x080000, 0x080fff) AM_READWRITE(MRA16_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0x082000, 0x082fff) AM_READWRITE(MRA16_RAM, aerofgt_bg2videoram_w) AM_BASE(&aerofgt_bg2videoram)
AM_RANGE(0x080000, 0x080fff) AM_READWRITE(SMH_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0x082000, 0x082fff) AM_READWRITE(SMH_RAM, aerofgt_bg2videoram_w) AM_BASE(&aerofgt_bg2videoram)
AM_RANGE(0xff8000, 0xffbfff) AM_RAM /* work RAM */
AM_RANGE(0xffc000, 0xffc7ff) AM_RAM AM_BASE(&aerofgt_spriteram3) AM_SIZE(&aerofgt_spriteram3_size)
AM_RANGE(0xffd000, 0xffd1ff) AM_RAM AM_BASE(&aerofgt_rasterram) /* bg1 scroll registers */
AM_RANGE(0xffe000, 0xffe7ff) AM_READWRITE(MRA16_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xffe000, 0xffe7ff) AM_READWRITE(SMH_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xfff000, 0xfff001) AM_READWRITE(input_port_0_word_r, spinlbrk_gfxbank_w)
AM_RANGE(0xfff002, 0xfff003) AM_READWRITE(input_port_1_word_r, aerofgt_bg2scrollx_w)
AM_RANGE(0xfff004, 0xfff005) AM_READ(input_port_2_word_r)
@ -263,34 +263,34 @@ static ADDRESS_MAP_START( turbofrc_map, ADDRESS_SPACE_PROGRAM, 16 )
ADDRESS_MAP_GLOBAL_MASK(0xfffff)
AM_RANGE(0x000000, 0x0bffff) AM_ROM
AM_RANGE(0x0c0000, 0x0cffff) AM_RAM /* work RAM */
AM_RANGE(0x0d0000, 0x0d1fff) AM_READWRITE(MRA16_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0x0d2000, 0x0d3fff) AM_READWRITE(MRA16_RAM, aerofgt_bg2videoram_w) AM_BASE(&aerofgt_bg2videoram)
AM_RANGE(0x0d0000, 0x0d1fff) AM_READWRITE(SMH_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0x0d2000, 0x0d3fff) AM_READWRITE(SMH_RAM, aerofgt_bg2videoram_w) AM_BASE(&aerofgt_bg2videoram)
AM_RANGE(0x0e0000, 0x0e3fff) AM_RAM AM_BASE(&aerofgt_spriteram1) AM_SIZE(&aerofgt_spriteram1_size)
AM_RANGE(0x0e4000, 0x0e7fff) AM_RAM AM_BASE(&aerofgt_spriteram2) AM_SIZE(&aerofgt_spriteram2_size)
AM_RANGE(0x0f8000, 0x0fbfff) AM_RAM /* work RAM */
AM_RANGE(0x0fc000, 0x0fc7ff) AM_RAM AM_BASE(&aerofgt_spriteram3) AM_SIZE(&aerofgt_spriteram3_size)
AM_RANGE(0x0fd000, 0x0fdfff) AM_RAM AM_BASE(&aerofgt_rasterram) /* bg1 scroll registers */
AM_RANGE(0x0fe000, 0x0fe7ff) AM_READWRITE(MRA16_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x0fe000, 0x0fe7ff) AM_READWRITE(SMH_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x0ff000, 0x0ff001) AM_READ(input_port_0_word_r)
AM_RANGE(0x0ff002, 0x0ff003) AM_READWRITE(input_port_1_word_r, aerofgt_bg1scrolly_w)
AM_RANGE(0x0ff004, 0x0ff005) AM_READWRITE(input_port_2_word_r, aerofgt_bg2scrollx_w)
AM_RANGE(0x0ff006, 0x0ff007) AM_READWRITE(pending_command_r, aerofgt_bg2scrolly_w)
AM_RANGE(0x0ff008, 0x0ff009) AM_READ(input_port_3_word_r)
AM_RANGE(0x0ff008, 0x0ff00b) AM_WRITE(turbofrc_gfxbank_w)
AM_RANGE(0x0ff00c, 0x0ff00d) AM_WRITE(MWA16_NOP) /* related to bg2 (written together with the scroll registers) */
AM_RANGE(0x0ff00c, 0x0ff00d) AM_WRITE(SMH_NOP) /* related to bg2 (written together with the scroll registers) */
AM_RANGE(0x0ff00e, 0x0ff00f) AM_WRITE(turbofrc_sound_command_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( aerofgtb_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
AM_RANGE(0x0c0000, 0x0cffff) AM_RAM /* work RAM */
AM_RANGE(0x0d0000, 0x0d1fff) AM_READWRITE(MRA16_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0x0d2000, 0x0d3fff) AM_READWRITE(MRA16_RAM, aerofgt_bg2videoram_w) AM_BASE(&aerofgt_bg2videoram)
AM_RANGE(0x0d0000, 0x0d1fff) AM_READWRITE(SMH_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0x0d2000, 0x0d3fff) AM_READWRITE(SMH_RAM, aerofgt_bg2videoram_w) AM_BASE(&aerofgt_bg2videoram)
AM_RANGE(0x0e0000, 0x0e3fff) AM_RAM AM_BASE(&aerofgt_spriteram1) AM_SIZE(&aerofgt_spriteram1_size)
AM_RANGE(0x0e4000, 0x0e7fff) AM_RAM AM_BASE(&aerofgt_spriteram2) AM_SIZE(&aerofgt_spriteram2_size)
AM_RANGE(0x0f8000, 0x0fbfff) AM_RAM /* work RAM */
AM_RANGE(0x0fc000, 0x0fc7ff) AM_RAM AM_BASE(&aerofgt_spriteram3) AM_SIZE(&aerofgt_spriteram3_size)
AM_RANGE(0x0fd000, 0x0fd7ff) AM_READWRITE(MRA16_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x0fd000, 0x0fd7ff) AM_READWRITE(SMH_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x0fe000, 0x0fe001) AM_READ(input_port_0_word_r)
AM_RANGE(0x0fe002, 0x0fe003) AM_READWRITE(input_port_1_word_r, aerofgt_bg1scrolly_w)
AM_RANGE(0x0fe004, 0x0fe005) AM_READWRITE(input_port_2_word_r, aerofgt_bg2scrollx_w)
@ -303,12 +303,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( aerofgt_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
AM_RANGE(0x1a0000, 0x1a07ff) AM_READWRITE(MRA16_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x1a0000, 0x1a07ff) AM_READWRITE(SMH_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x1b0000, 0x1b07ff) AM_RAM AM_BASE(&aerofgt_rasterram) /* used only for the scroll registers */
AM_RANGE(0x1b0800, 0x1b0801) AM_NOP /* ??? */
AM_RANGE(0x1b0ff0, 0x1b0fff) AM_RAM /* stack area during boot */
AM_RANGE(0x1b2000, 0x1b3fff) AM_READWRITE(MRA16_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0x1b4000, 0x1b5fff) AM_READWRITE(MRA16_RAM, aerofgt_bg2videoram_w) AM_BASE(&aerofgt_bg2videoram)
AM_RANGE(0x1b2000, 0x1b3fff) AM_READWRITE(SMH_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0x1b4000, 0x1b5fff) AM_READWRITE(SMH_RAM, aerofgt_bg2videoram_w) AM_BASE(&aerofgt_bg2videoram)
AM_RANGE(0x1c0000, 0x1c3fff) AM_RAM AM_BASE(&aerofgt_spriteram1) AM_SIZE(&aerofgt_spriteram1_size)
AM_RANGE(0x1c4000, 0x1c7fff) AM_RAM AM_BASE(&aerofgt_spriteram2) AM_SIZE(&aerofgt_spriteram2_size)
AM_RANGE(0x1d0000, 0x1d1fff) AM_RAM AM_BASE(&aerofgt_spriteram3) AM_SIZE(&aerofgt_spriteram3_size)
@ -321,7 +321,7 @@ static ADDRESS_MAP_START( aerofgt_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xffffa4, 0xffffa5) AM_READ(input_port_2_word_r)
AM_RANGE(0xffffa6, 0xffffa7) AM_READ(input_port_3_word_r)
AM_RANGE(0xffffa8, 0xffffa9) AM_READ(input_port_4_word_r)
AM_RANGE(0xffffac, 0xffffad) AM_READWRITE(pending_command_r, MWA16_NOP) /* ??? */
AM_RANGE(0xffffac, 0xffffad) AM_READWRITE(pending_command_r, SMH_NOP) /* ??? */
AM_RANGE(0xffffae, 0xffffaf) AM_READ(input_port_5_word_r)
AM_RANGE(0xffffc0, 0xffffc1) AM_WRITE(sound_command_w)
ADDRESS_MAP_END
@ -357,14 +357,14 @@ static ADDRESS_MAP_START( wbbc97_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x500000, 0x50ffff) AM_RAM /* work RAM */
AM_RANGE(0x600000, 0x605fff) AM_RAM AM_BASE(&aerofgt_spriteram1) AM_SIZE(&aerofgt_spriteram1_size)
AM_RANGE(0xa00000, 0xa3ffff) AM_RAM AM_BASE(&wbbc97_bitmapram)
AM_RANGE(0xff8000, 0xff8fff) AM_READWRITE(MRA16_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0xff8000, 0xff8fff) AM_READWRITE(SMH_RAM, aerofgt_bg1videoram_w) AM_BASE(&aerofgt_bg1videoram)
AM_RANGE(0xffc000, 0xffc3ff) AM_WRITEONLY AM_BASE(&aerofgt_spriteram3) AM_SIZE(&aerofgt_spriteram3_size)
AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_BASE(&aerofgt_rasterram) /* bg1 scroll registers */
AM_RANGE(0xffe000, 0xffefff) AM_READWRITE(MRA16_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xffe000, 0xffefff) AM_READWRITE(SMH_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xfff000, 0xfff001) AM_READWRITE(input_port_0_word_r, pspikes_palette_bank_w)
AM_RANGE(0xfff002, 0xfff003) AM_READWRITE(input_port_1_word_r, pspikes_gfxbank_w)
AM_RANGE(0xfff004, 0xfff005) AM_READWRITE(input_port_2_word_r, aerofgt_bg1scrolly_w)
AM_RANGE(0xfff006, 0xfff007) AM_READWRITE(MRA16_NOP, sound_command_w)
AM_RANGE(0xfff006, 0xfff007) AM_READWRITE(SMH_NOP, sound_command_w)
AM_RANGE(0xfff00e, 0xfff00f) AM_WRITE(wbbc97_bitmap_enable_w)
ADDRESS_MAP_END

2
src/mame/drivers/ajax.c
View File

@ -35,7 +35,7 @@ static ADDRESS_MAP_START( ajax_main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x01c0) AM_READWRITE(ajax_ls138_f10_r, ajax_ls138_f10_w) /* bankswitch + sound command + FIRQ command */
AM_RANGE(0x0800, 0x0807) AM_READWRITE(K051937_r, K051937_w) /* sprite control registers */
AM_RANGE(0x0c00, 0x0fff) AM_READWRITE(K051960_r, K051960_w) /* sprite RAM 2128SL at J7 */
AM_RANGE(0x1000, 0x1fff) AM_READWRITE(MRA8_RAM, paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram)/* palette */
AM_RANGE(0x1000, 0x1fff) AM_READWRITE(SMH_RAM, paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram)/* palette */
AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE(1) /* shared RAM with the 6809 */
AM_RANGE(0x4000, 0x5fff) AM_RAM /* RAM 6264L at K10 */
AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(2) /* banked ROM */

2
src/mame/drivers/aleck64.c
View File

@ -201,7 +201,7 @@ static ADDRESS_MAP_START( n64_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x1fc00000, 0x1fc007bf) AM_ROM AM_REGION(REGION_USER1, 0) // PIF ROM
AM_RANGE(0x1fc007c0, 0x1fc007ff) AM_READWRITE(n64_pif_ram_r, n64_pif_ram_w)
AM_RANGE(0xc0800000, 0xc08fffff) AM_READWRITE(aleck_dips_r, MWA32_NOP)
AM_RANGE(0xc0800000, 0xc08fffff) AM_READWRITE(aleck_dips_r, SMH_NOP)
AM_RANGE(0xd0000000, 0xd0000fff) AM_RAM
AM_RANGE(0xd0010000, 0xd00109ff) AM_RAM
ADDRESS_MAP_END

4
src/mame/drivers/alg.c
View File

@ -276,11 +276,11 @@ static void alg_cia_0_porta_w(UINT8 data)
/* swap the write handlers between ROM and bank 1 based on the bit */
if ((data & 1) == 0)
/* overlay disabled, map RAM on 0x000000 */
memory_install_write16_handler(0, ADDRESS_SPACE_PROGRAM, 0x000000, 0x07ffff, 0, 0, MWA16_BANK1);
memory_install_write16_handler(0, ADDRESS_SPACE_PROGRAM, 0x000000, 0x07ffff, 0, 0, SMH_BANK1);
else
/* overlay enabled, map Amiga system ROM on 0x000000 */
memory_install_write16_handler(0, ADDRESS_SPACE_PROGRAM, 0x000000, 0x07ffff, 0, 0, MWA16_UNMAP);
memory_install_write16_handler(0, ADDRESS_SPACE_PROGRAM, 0x000000, 0x07ffff, 0, 0, SMH_UNMAP);
}

30
src/mame/drivers/alpha68k.c
View File

@ -700,7 +700,7 @@ static ADDRESS_MAP_START( alpha68k_I_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM // main program
AM_RANGE(0x080000, 0x083fff) AM_RAM // work RAM
AM_RANGE(0x100000, 0x103fff) AM_RAM AM_BASE(&spriteram16) // video RAM
AM_RANGE(0x180000, 0x180001) AM_READWRITE(input_port_3_word_r, MWA16_NOP) // LSB: DSW0, MSB: watchdog(?)
AM_RANGE(0x180000, 0x180001) AM_READWRITE(input_port_3_word_r, SMH_NOP) // LSB: DSW0, MSB: watchdog(?)
AM_RANGE(0x180008, 0x180009) AM_READ(input_port_4_word_r) // LSB: DSW1
AM_RANGE(0x300000, 0x300001) AM_READ(input_port_0_word_r) // joy1, joy2
AM_RANGE(0x340000, 0x340001) AM_READ(input_port_1_word_r) // coin, start, service
@ -716,13 +716,13 @@ static ADDRESS_MAP_START( alpha68k_II_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x0c0000, 0x0c00ff) AM_WRITE(alpha68k_II_video_bank_w)
AM_RANGE(0x0c8000, 0x0c8001) AM_READ(control_3_r) /* Bottom of CN2 */
AM_RANGE(0x0d0000, 0x0d0001) AM_READ(control_4_r) /* Top of CN1 & CN2 */
AM_RANGE(0x0d8000, 0x0d8001) AM_READ(MRA16_NOP) /* IRQ ack? */
AM_RANGE(0x0e0000, 0x0e0001) AM_READ(MRA16_NOP) /* IRQ ack? */
AM_RANGE(0x0e8000, 0x0e8001) AM_READ(MRA16_NOP) /* watchdog? */
AM_RANGE(0x100000, 0x100fff) AM_READWRITE(MRA16_RAM, alpha68k_videoram_w) AM_BASE(&videoram16)
AM_RANGE(0x0d8000, 0x0d8001) AM_READ(SMH_NOP) /* IRQ ack? */
AM_RANGE(0x0e0000, 0x0e0001) AM_READ(SMH_NOP) /* IRQ ack? */
AM_RANGE(0x0e8000, 0x0e8001) AM_READ(SMH_NOP) /* watchdog? */
AM_RANGE(0x100000, 0x100fff) AM_READWRITE(SMH_RAM, alpha68k_videoram_w) AM_BASE(&videoram16)
AM_RANGE(0x200000, 0x207fff) AM_RAM AM_BASE(&spriteram16)
AM_RANGE(0x300000, 0x3001ff) AM_READWRITE(alpha_II_trigger_r, alpha_microcontroller_w)
AM_RANGE(0x400000, 0x400fff) AM_READWRITE(MRA16_RAM, alpha68k_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0x400000, 0x400fff) AM_READWRITE(SMH_RAM, alpha68k_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0x800000, 0x83ffff) AM_ROMBANK(8)
ADDRESS_MAP_END
@ -735,12 +735,12 @@ static ADDRESS_MAP_START( alpha68k_V_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x0d8000, 0x0d8001) AM_READNOP /* IRQ ack? */
AM_RANGE(0x0e0000, 0x0e0001) AM_READNOP /* IRQ ack? */
AM_RANGE(0x0e8000, 0x0e8001) AM_READNOP /* watchdog? */
AM_RANGE(0x100000, 0x100fff) AM_READWRITE(MRA16_RAM, alpha68k_videoram_w) AM_BASE(&videoram16)
AM_RANGE(0x100000, 0x100fff) AM_READWRITE(SMH_RAM, alpha68k_videoram_w) AM_BASE(&videoram16)
AM_RANGE(0x200000, 0x207fff) AM_RAM AM_BASE(&spriteram16)
AM_RANGE(0x300000, 0x303fff) AM_READ(alpha_V_trigger_r)
AM_RANGE(0x300000, 0x3001ff) AM_WRITE(alpha_microcontroller_w)
AM_RANGE(0x303e00, 0x303fff) AM_WRITE(alpha_microcontroller_w) /* Gang Wars mirror */
AM_RANGE(0x400000, 0x401fff) AM_READWRITE(MRA16_RAM, alpha68k_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0x400000, 0x401fff) AM_READWRITE(SMH_RAM, alpha68k_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0x800000, 0x83ffff) AM_ROMBANK(8)
ADDRESS_MAP_END
@ -787,13 +787,13 @@ static ADDRESS_MAP_START( kyros_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_r)
AM_RANGE(0xe002, 0xe002) AM_WRITE(soundlatch_clear_w)
AM_RANGE(0xe004, 0xe004) AM_WRITE(DAC_0_signed_data_w)
AM_RANGE(0xe006, 0xe00e) AM_WRITE(MWA8_NOP) // soundboard I/O's, ignored
AM_RANGE(0xe006, 0xe00e) AM_WRITE(SMH_NOP) // soundboard I/O's, ignored
/* reference only
AM_RANGE(0xe006, 0xe006) AM_WRITE(MWA8_NOP) // NMI: diminishing saw-tooth
AM_RANGE(0xe008, 0xe008) AM_WRITE(MWA8_NOP) // NMI: 00
AM_RANGE(0xe00a, 0xe00a) AM_WRITE(MWA8_NOP) // RST38: 20
AM_RANGE(0xe00c, 0xe00c) AM_WRITE(MWA8_NOP) // RST30: 00 on entry
AM_RANGE(0xe00e, 0xe00e) AM_WRITE(MWA8_NOP) // RST30: 00,02,ff on exit(0x1d88)
AM_RANGE(0xe006, 0xe006) AM_WRITE(SMH_NOP) // NMI: diminishing saw-tooth
AM_RANGE(0xe008, 0xe008) AM_WRITE(SMH_NOP) // NMI: 00
AM_RANGE(0xe00a, 0xe00a) AM_WRITE(SMH_NOP) // RST38: 20
AM_RANGE(0xe00c, 0xe00c) AM_WRITE(SMH_NOP) // RST30: 00 on entry
AM_RANGE(0xe00e, 0xe00e) AM_WRITE(SMH_NOP) // RST30: 00,02,ff on exit(0x1d88)
*/
ADDRESS_MAP_END
@ -853,7 +853,7 @@ static ADDRESS_MAP_START( jongbou_sound_portmap, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x00, 0x00) AM_WRITE(AY8910_control_port_0_w)
AM_RANGE(0x01, 0x01) AM_READWRITE(AY8910_read_port_0_r, AY8910_write_port_0_w)
AM_RANGE(0x02, 0x02) AM_WRITE(soundlatch_clear_w)
AM_RANGE(0x06, 0x06) AM_WRITE(MWA8_NOP)
AM_RANGE(0x06, 0x06) AM_WRITE(SMH_NOP)
ADDRESS_MAP_END
static ADDRESS_MAP_START( tnexspce_sound_portmap, ADDRESS_SPACE_IO, 8 )

4
src/mame/drivers/ambush.c
View File

@ -66,9 +66,9 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc200, 0xc3ff) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xc400, 0xc7ff) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0xc800, 0xc800) AM_READ(input_port_2_r)
AM_RANGE(0xcc00, 0xcc03) AM_WRITE(MWA8_NOP)
AM_RANGE(0xcc00, 0xcc03) AM_WRITE(SMH_NOP)
AM_RANGE(0xcc04, 0xcc04) AM_WRITE(flip_screen_w)
AM_RANGE(0xcc05, 0xcc05) AM_WRITE(MWA8_RAM) AM_BASE(&ambush_colorbank)
AM_RANGE(0xcc05, 0xcc05) AM_WRITE(SMH_RAM) AM_BASE(&ambush_colorbank)
AM_RANGE(0xcc07, 0xcc07) AM_WRITE(ambush_coin_counter_w)
ADDRESS_MAP_END

22
src/mame/drivers/amidar.c
View File

@ -81,22 +81,22 @@ static WRITE8_HANDLER(amidar_ppi8255_1_w)
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(MRA8_ROM)
AM_RANGE(0x8000, 0x87ff) AM_READ(MRA8_RAM)
AM_RANGE(0x9000, 0x93ff) AM_READ(MRA8_RAM)
AM_RANGE(0x9800, 0x98ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
AM_RANGE(0x9000, 0x93ff) AM_READ(SMH_RAM)
AM_RANGE(0x9800, 0x98ff) AM_READ(SMH_RAM)
AM_RANGE(0xa800, 0xa800) AM_READ(watchdog_reset_r)
AM_RANGE(0xb000, 0xb03f) AM_READ(amidar_ppi8255_0_r)
AM_RANGE(0xb800, 0xb83f) AM_READ(amidar_ppi8255_1_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x8000, 0x87ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x9000, 0x93ff) AM_WRITE(galaxian_videoram_w) AM_BASE(&galaxian_videoram)
AM_RANGE(0x9800, 0x983f) AM_WRITE(galaxian_attributesram_w) AM_BASE(&galaxian_attributesram)
AM_RANGE(0x9840, 0x985f) AM_WRITE(MWA8_RAM) AM_BASE(&galaxian_spriteram) AM_SIZE(&galaxian_spriteram_size)
AM_RANGE(0x9860, 0x98ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x9840, 0x985f) AM_WRITE(SMH_RAM) AM_BASE(&galaxian_spriteram) AM_SIZE(&galaxian_spriteram_size)
AM_RANGE(0x9860, 0x98ff) AM_WRITE(SMH_RAM)
AM_RANGE(0xa000, 0xa000) AM_WRITE(scramble_background_red_w)
AM_RANGE(0xa008, 0xa008) AM_WRITE(galaxian_nmi_enable_w)
AM_RANGE(0xa010, 0xa010) AM_WRITE(galaxian_flip_screen_x_w)
@ -111,14 +111,14 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( amidar_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x2fff) AM_READ(MRA8_ROM)
AM_RANGE(0x0000, 0x2fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x8fff) AM_READ(amidar_soundram_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( amidar_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x2fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x0000, 0x2fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0x8fff) AM_WRITE(amidar_soundram_w)
AM_RANGE(0x8000, 0x83ff) AM_WRITE(MWA8_NOP) AM_BASE(&amidar_soundram) /* only here to initialize pointer */
AM_RANGE(0x8000, 0x83ff) AM_WRITE(SMH_NOP) AM_BASE(&amidar_soundram) /* only here to initialize pointer */
AM_RANGE(0x9000, 0x9fff) AM_WRITE(scramble_filter_w)
ADDRESS_MAP_END

4
src/mame/drivers/amspdwy.c
View File

@ -75,8 +75,8 @@ static WRITE8_HANDLER( amspdwy_sound_w )
static ADDRESS_MAP_START( amspdwy_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM // ROM
AM_RANGE(0x8000, 0x801f) AM_WRITE(amspdwy_paletteram_w) AM_BASE(&paletteram)// Palette
AM_RANGE(0x9000, 0x93ff) AM_MIRROR(0x0400) AM_READWRITE(MRA8_RAM, amspdwy_videoram_w) AM_BASE(&videoram) // Layer, mirrored?
AM_RANGE(0x9800, 0x9bff) AM_READWRITE(MRA8_RAM, amspdwy_colorram_w) AM_BASE(&colorram) // Layer
AM_RANGE(0x9000, 0x93ff) AM_MIRROR(0x0400) AM_READWRITE(SMH_RAM, amspdwy_videoram_w) AM_BASE(&videoram) // Layer, mirrored?
AM_RANGE(0x9800, 0x9bff) AM_READWRITE(SMH_RAM, amspdwy_colorram_w) AM_BASE(&colorram) // Layer
AM_RANGE(0x9c00, 0x9fff) AM_RAM // Unused?
// AM_RANGE(0xa000, 0xa000) AM_WRITENOP // ?
AM_RANGE(0xa000, 0xa000) AM_READ(input_port_0_r) // DSW 1

14
src/mame/drivers/angelkds.c
View File

@ -217,11 +217,11 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
AM_RANGE(0xc000, 0xdfff) AM_RAM
AM_RANGE(0xe000, 0xe3ff) AM_READWRITE(MRA8_RAM, angelkds_bgtopvideoram_w) AM_BASE(&angelkds_bgtopvideoram) /* Top Half of Screen */
AM_RANGE(0xe400, 0xe7ff) AM_READWRITE(MRA8_RAM, angelkds_bgbotvideoram_w) AM_BASE(&angelkds_bgbotvideoram) /* Bottom Half of Screen */
AM_RANGE(0xe800, 0xebff) AM_READWRITE(MRA8_RAM, angelkds_txvideoram_w) AM_BASE(&angelkds_txvideoram)
AM_RANGE(0xe000, 0xe3ff) AM_READWRITE(SMH_RAM, angelkds_bgtopvideoram_w) AM_BASE(&angelkds_bgtopvideoram) /* Top Half of Screen */
AM_RANGE(0xe400, 0xe7ff) AM_READWRITE(SMH_RAM, angelkds_bgbotvideoram_w) AM_BASE(&angelkds_bgbotvideoram) /* Bottom Half of Screen */
AM_RANGE(0xe800, 0xebff) AM_READWRITE(SMH_RAM, angelkds_txvideoram_w) AM_BASE(&angelkds_txvideoram)
AM_RANGE(0xec00, 0xecff) AM_RAM AM_BASE(&spriteram)
AM_RANGE(0xed00, 0xeeff) AM_READWRITE(MRA8_RAM, angelkds_paletteram_w) AM_BASE(&paletteram)
AM_RANGE(0xed00, 0xeeff) AM_READWRITE(SMH_RAM, angelkds_paletteram_w) AM_BASE(&paletteram)
AM_RANGE(0xef00, 0xefff) AM_RAM
AM_RANGE(0xf000, 0xf000) AM_WRITE(angelkds_bgtopbank_write)
AM_RANGE(0xf001, 0xf001) AM_WRITE(angelkds_bgtopscroll_write)
@ -233,15 +233,15 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( main_portmap, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(MWA8_NOP) // 00 on start-up, not again
AM_RANGE(0x00, 0x00) AM_WRITE(SMH_NOP) // 00 on start-up, not again
AM_RANGE(0x42, 0x42) AM_WRITE(angelkds_cpu_bank_write)
AM_RANGE(0x43, 0x43) AM_WRITE(MWA8_NOP) // 9a on start-up, not again
AM_RANGE(0x43, 0x43) AM_WRITE(SMH_NOP) // 9a on start-up, not again
AM_RANGE(0x40, 0x40) AM_READ(input_port_0_r) /* "Coinage" Dip Switches */
AM_RANGE(0x41, 0x41) AM_READ(input_port_1_r) /* Other Dip Switches */
AM_RANGE(0x42, 0x42) AM_READ(input_port_2_r) /* Players inputs (not needed ?) */
AM_RANGE(0x80, 0x80) AM_READ(input_port_3_r) /* System inputs */
AM_RANGE(0x81, 0x82) AM_READ(angelkds_input_r) /* Players inputs */
AM_RANGE(0x83, 0x83) AM_WRITE(MWA8_NOP) // 9b on start-up, not again
AM_RANGE(0x83, 0x83) AM_WRITE(SMH_NOP) // 9b on start-up, not again
AM_RANGE(0xc0, 0xc3) AM_READWRITE(angelkds_main_sound_r, angelkds_main_sound_w) // 02 various points
ADDRESS_MAP_END

30
src/mame/drivers/aquarium.c
View File

@ -145,40 +145,40 @@ static WRITE8_HANDLER( aquarium_oki_w )
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_READ(MRA16_ROM)
AM_RANGE(0xc00000, 0xc03fff) AM_READ(MRA16_RAM)
AM_RANGE(0xc80000, 0xc81fff) AM_READ(MRA16_RAM) /* sprite ram */
AM_RANGE(0xd00000, 0xd00fff) AM_READ(MRA16_RAM)
AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
AM_RANGE(0xc00000, 0xc03fff) AM_READ(SMH_RAM)
AM_RANGE(0xc80000, 0xc81fff) AM_READ(SMH_RAM) /* sprite ram */
AM_RANGE(0xd00000, 0xd00fff) AM_READ(SMH_RAM)
AM_RANGE(0xd80080, 0xd80081) AM_READ(input_port_0_word_r)
AM_RANGE(0xd80082, 0xd80083) AM_READ(MRA16_NOP) /* stored but not read back ? check code at 0x01f440 */
AM_RANGE(0xd80082, 0xd80083) AM_READ(SMH_NOP) /* stored but not read back ? check code at 0x01f440 */
AM_RANGE(0xd80084, 0xd80085) AM_READ(input_port_1_word_r)
AM_RANGE(0xd80086, 0xd80087) AM_READ(aquarium_coins_r)
AM_RANGE(0xff0000, 0xffffff) AM_READ(MRA16_RAM) /* RAM */
AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM) /* RAM */
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_WRITE(MWA16_ROM)
AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc00000, 0xc00fff) AM_WRITE(aquarium_mid_videoram_w) AM_BASE(&aquarium_mid_videoram)
AM_RANGE(0xc01000, 0xc01fff) AM_WRITE(aquarium_bak_videoram_w) AM_BASE(&aquarium_bak_videoram)
AM_RANGE(0xc02000, 0xc03fff) AM_WRITE(aquarium_txt_videoram_w) AM_BASE(&aquarium_txt_videoram)
AM_RANGE(0xc80000, 0xc81fff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0xc80000, 0xc81fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0xd00000, 0xd00fff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xd80014, 0xd8001f) AM_WRITE(MWA16_RAM) AM_BASE(&aquarium_scroll)
AM_RANGE(0xd80014, 0xd8001f) AM_WRITE(SMH_RAM) AM_BASE(&aquarium_scroll)
AM_RANGE(0xd80068, 0xd80069) AM_WRITENOP /* probably not used */
AM_RANGE(0xd80088, 0xd80089) AM_WRITENOP /* ?? video related */
AM_RANGE(0xd8008a, 0xd8008b) AM_WRITE(aquarium_sound_w)
AM_RANGE(0xff0000, 0xffffff) AM_WRITE(MWA16_RAM)
AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( snd_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_READ(MRA8_ROM)
AM_RANGE(0x7800, 0x7fff) AM_READ(MRA8_RAM)
AM_RANGE(0x8000, 0xffff) AM_READ(MRA8_BANK1)
AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
AM_RANGE(0x7800, 0x7fff) AM_READ(SMH_RAM)
AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)
ADDRESS_MAP_END
static ADDRESS_MAP_START( snd_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x7800, 0x7fff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x7800, 0x7fff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( snd_readport, ADDRESS_SPACE_IO, 8 )

2
src/mame/drivers/arabian.c
View File

@ -215,7 +215,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc000, 0xc000) AM_MIRROR(0x01ff) AM_READ(input_port_0_r)
AM_RANGE(0xc200, 0xc200) AM_MIRROR(0x01ff) AM_READ(input_port_1_r)
AM_RANGE(0xd000, 0xd7ef) AM_RAM AM_BASE(&custom_cpu_ram)
AM_RANGE(0xd7f0, 0xd7ff) AM_READWRITE(custom_cpu_r, MWA8_RAM)
AM_RANGE(0xd7f0, 0xd7ff) AM_READWRITE(custom_cpu_r, SMH_RAM)
AM_RANGE(0xe000, 0xe007) AM_MIRROR(0x0ff8) AM_WRITE(arabian_blitter_w) AM_BASE(&arabian_blitter)
ADDRESS_MAP_END

6
src/mame/drivers/arcadecl.c
View File

@ -173,10 +173,10 @@ static WRITE16_HANDLER( latch_w )
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_ROM
AM_RANGE(0x200000, 0x21ffff) AM_RAM AM_BASE(&rampart_bitmap)
AM_RANGE(0x3c0000, 0x3c07ff) AM_READWRITE(MRA16_RAM, atarigen_expanded_666_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0x3e0000, 0x3e07ff) AM_READWRITE(MRA16_RAM, atarimo_0_spriteram_w) AM_BASE(&atarimo_0_spriteram)
AM_RANGE(0x3c0000, 0x3c07ff) AM_READWRITE(SMH_RAM, atarigen_expanded_666_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0x3e0000, 0x3e07ff) AM_READWRITE(SMH_RAM, atarimo_0_spriteram_w) AM_BASE(&atarimo_0_spriteram)
AM_RANGE(0x3e0800, 0x3effbf) AM_RAM
AM_RANGE(0x3effc0, 0x3effff) AM_READWRITE(MRA16_RAM, atarimo_0_slipram_w) AM_BASE(&atarimo_0_slipram)
AM_RANGE(0x3effc0, 0x3effff) AM_READWRITE(SMH_RAM, atarimo_0_slipram_w) AM_BASE(&atarimo_0_slipram)
AM_RANGE(0x640000, 0x640001) AM_READ(input_port_0_word_r)
AM_RANGE(0x640002, 0x640003) AM_READ(input_port_1_word_r)
AM_RANGE(0x640010, 0x640011) AM_READ(input_port_2_word_r)

6
src/mame/drivers/arcadia.c
View File

@ -71,7 +71,7 @@ static UINT8 coin_counter[2];
static WRITE16_HANDLER( arcadia_multibios_change_game )
{
memory_install_read16_handler(0, ADDRESS_SPACE_PROGRAM, 0x800000, 0x97ffff, 0, 0, (data == 0) ? MRA16_BANK2 : MRA16_NOP);
memory_install_read16_handler(0, ADDRESS_SPACE_PROGRAM, 0x800000, 0x97ffff, 0, 0, (data == 0) ? SMH_BANK2 : SMH_NOP);
}
@ -104,11 +104,11 @@ static void arcadia_cia_0_porta_w(UINT8 data)
/* swap the write handlers between ROM and bank 1 based on the bit */
if ((data & 1) == 0)
/* overlay disabled, map RAM on 0x000000 */
memory_install_write16_handler(0, ADDRESS_SPACE_PROGRAM, 0x000000, 0x07ffff, 0, 0, MWA16_BANK1);
memory_install_write16_handler(0, ADDRESS_SPACE_PROGRAM, 0x000000, 0x07ffff, 0, 0, SMH_BANK1);
else
/* overlay enabled, map Amiga system ROM on 0x000000 */
memory_install_write16_handler(0, ADDRESS_SPACE_PROGRAM, 0x000000, 0x07ffff, 0, 0, MWA16_UNMAP);
memory_install_write16_handler(0, ADDRESS_SPACE_PROGRAM, 0x000000, 0x07ffff, 0, 0, SMH_UNMAP);
/* bit 2 = Power Led on Amiga */
set_led_status(0, (data & 2) ? 0 : 1);

108
src/mame/drivers/argus.c
View File

@ -277,8 +277,8 @@ static WRITE8_HANDLER( butasan_pagedram_w )
***************************************************************************/
static ADDRESS_MAP_START( argus_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(MRA8_ROM)
AM_RANGE(0x8000, 0xbfff) AM_READ(MRA8_BANK1)
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
AM_RANGE(0xc000, 0xc000) AM_READ(input_port_0_r) // Coin
AM_RANGE(0xc001, 0xc001) AM_READ(input_port_1_r) // Player 1
AM_RANGE(0xc002, 0xc002) AM_READ(input_port_2_r) // Player 2
@ -287,14 +287,14 @@ static ADDRESS_MAP_START( argus_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc400, 0xcfff) AM_READ(argus_paletteram_r)
AM_RANGE(0xd000, 0xd7ff) AM_READ(argus_txram_r)
AM_RANGE(0xd800, 0xdfff) AM_READ(argus_bg1ram_r)
AM_RANGE(0xe000, 0xf1ff) AM_READ(MRA8_RAM)
AM_RANGE(0xf200, 0xf7ff) AM_READ(MRA8_RAM)
AM_RANGE(0xf800, 0xffff) AM_READ(MRA8_RAM)
AM_RANGE(0xe000, 0xf1ff) AM_READ(SMH_RAM)
AM_RANGE(0xf200, 0xf7ff) AM_READ(SMH_RAM)
AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( argus_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x8000, 0xbfff) AM_WRITE(MWA8_BANK1)
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_BANK1)
AM_RANGE(0xc200, 0xc200) AM_WRITE(soundlatch_w)
AM_RANGE(0xc201, 0xc201) AM_WRITE(argus_flipscreen_w)
AM_RANGE(0xc202, 0xc202) AM_WRITE(argus_bankselect_w)
@ -306,14 +306,14 @@ static ADDRESS_MAP_START( argus_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc400, 0xcfff) AM_WRITE(argus_paletteram_w) AM_BASE(&argus_paletteram)
AM_RANGE(0xd000, 0xd7ff) AM_WRITE(argus_txram_w) AM_BASE(&argus_txram)
AM_RANGE(0xd800, 0xdfff) AM_WRITE(argus_bg1ram_w) AM_BASE(&argus_bg1ram)
AM_RANGE(0xe000, 0xf1ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0xf200, 0xf7ff) AM_WRITE(MWA8_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xf800, 0xffff) AM_WRITE(MWA8_RAM)
AM_RANGE(0xe000, 0xf1ff) AM_WRITE(SMH_RAM)
AM_RANGE(0xf200, 0xf7ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( valtric_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(MRA8_ROM)
AM_RANGE(0x8000, 0xbfff) AM_READ(MRA8_BANK1)
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
AM_RANGE(0xc000, 0xc000) AM_READ(input_port_0_r) // Coin
AM_RANGE(0xc001, 0xc001) AM_READ(input_port_1_r) // Player 1
AM_RANGE(0xc002, 0xc002) AM_READ(input_port_2_r) // Player 2
@ -322,14 +322,14 @@ static ADDRESS_MAP_START( valtric_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc400, 0xcfff) AM_READ(argus_paletteram_r)
AM_RANGE(0xd000, 0xd7ff) AM_READ(argus_txram_r)
AM_RANGE(0xd800, 0xdfff) AM_READ(argus_bg1ram_r)
AM_RANGE(0xe000, 0xf1ff) AM_READ(MRA8_RAM)
AM_RANGE(0xf200, 0xf7ff) AM_READ(MRA8_RAM)
AM_RANGE(0xf800, 0xffff) AM_READ(MRA8_RAM)
AM_RANGE(0xe000, 0xf1ff) AM_READ(SMH_RAM)
AM_RANGE(0xf200, 0xf7ff) AM_READ(SMH_RAM)
AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( valtric_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x8000, 0xbfff) AM_WRITE(MWA8_BANK1)
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_BANK1)
AM_RANGE(0xc200, 0xc200) AM_WRITE(soundlatch_w)
AM_RANGE(0xc201, 0xc201) AM_WRITE(argus_flipscreen_w)
AM_RANGE(0xc202, 0xc202) AM_WRITE(argus_bankselect_w)
@ -340,14 +340,14 @@ static ADDRESS_MAP_START( valtric_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc400, 0xcfff) AM_WRITE(valtric_paletteram_w) AM_BASE(&argus_paletteram)
AM_RANGE(0xd000, 0xd7ff) AM_WRITE(argus_txram_w) AM_BASE(&argus_txram)
AM_RANGE(0xd800, 0xdfff) AM_WRITE(argus_bg1ram_w) AM_BASE(&argus_bg1ram)
AM_RANGE(0xe000, 0xf1ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0xf200, 0xf7ff) AM_WRITE(MWA8_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xf800, 0xffff) AM_WRITE(MWA8_RAM)
AM_RANGE(0xe000, 0xf1ff) AM_WRITE(SMH_RAM)
AM_RANGE(0xf200, 0xf7ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( butasan_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(MRA8_ROM)
AM_RANGE(0x8000, 0xbfff) AM_READ(MRA8_BANK1)
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
AM_RANGE(0xc000, 0xc000) AM_READ(input_port_0_r) // Coin
AM_RANGE(0xc001, 0xc001) AM_READ(input_port_1_r) // Player 1
AM_RANGE(0xc002, 0xc002) AM_READ(input_port_2_r) // Player 2
@ -356,14 +356,14 @@ static ADDRESS_MAP_START( butasan_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc400, 0xc7ff) AM_READ(butasan_bg1ram_r)
AM_RANGE(0xc800, 0xcfff) AM_READ(argus_paletteram_r)
AM_RANGE(0xd000, 0xdfff) AM_READ(butasan_pagedram_r)
AM_RANGE(0xe000, 0xefff) AM_READ(MRA8_RAM)
AM_RANGE(0xf000, 0xf67f) AM_READ(MRA8_RAM)
AM_RANGE(0xf680, 0xffff) AM_READ(MRA8_RAM)
AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)
AM_RANGE(0xf000, 0xf67f) AM_READ(SMH_RAM)
AM_RANGE(0xf680, 0xffff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( butasan_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x8000, 0xbfff) AM_WRITE(MWA8_BANK1)
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_BANK1)
AM_RANGE(0xc200, 0xc200) AM_WRITE(soundlatch_w)
AM_RANGE(0xc201, 0xc201) AM_WRITE(argus_flipscreen_w)
AM_RANGE(0xc202, 0xc202) AM_WRITE(argus_bankselect_w)
@ -377,23 +377,23 @@ static ADDRESS_MAP_START( butasan_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc400, 0xc7ff) AM_WRITE(butasan_bg1ram_w) AM_BASE(&butasan_bg1ram)
AM_RANGE(0xc800, 0xcfff) AM_WRITE(butasan_paletteram_w) AM_BASE(&argus_paletteram)
AM_RANGE(0xd000, 0xdfff) AM_WRITE(butasan_pagedram_w)
AM_RANGE(0xe000, 0xefff) AM_WRITE(MWA8_RAM)
AM_RANGE(0xf000, 0xf67f) AM_WRITE(MWA8_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xf680, 0xffff) AM_WRITE(MWA8_RAM)
AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
AM_RANGE(0xf000, 0xf67f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xf680, 0xffff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
WRITE8_HANDLER( bombsa_txram_w );
READ8_HANDLER( bombsa_txram_r );
static ADDRESS_MAP_START( bombsa_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(MRA8_ROM)
AM_RANGE(0x8000, 0xbfff) AM_READ(MRA8_BANK1)
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
AM_RANGE(0xc000, 0xcfff) AM_READ(MRA8_RAM)
AM_RANGE(0xc000, 0xcfff) AM_READ(SMH_RAM)
AM_RANGE(0xd000, 0xd1ff) AM_READ(MRA8_RAM)
AM_RANGE(0xd200, 0xd7ff) AM_READ(MRA8_RAM)
AM_RANGE(0xd800, 0xdfff) AM_READ(MRA8_RAM)
AM_RANGE(0xd000, 0xd1ff) AM_READ(SMH_RAM)
AM_RANGE(0xd200, 0xd7ff) AM_READ(SMH_RAM)
AM_RANGE(0xd800, 0xdfff) AM_READ(SMH_RAM)
/* Input ports */
AM_RANGE(0xe000, 0xe000) AM_READ(input_port_0_r) // Coin
AM_RANGE(0xe001, 0xe001) AM_READ(input_port_1_r) // Player 1
@ -406,10 +406,10 @@ static ADDRESS_MAP_START( bombsa_readmem, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_END
static ADDRESS_MAP_START( bombsa_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x8000, 0xbfff) AM_WRITE(MWA8_BANK1)
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_BANK1)
AM_RANGE(0xc000, 0xcfff) AM_WRITE(MWA8_RAM)
AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM)
/* ports look like the other games */
AM_RANGE(0xd000, 0xd000) AM_WRITE(soundlatch_w) // confirmed
@ -417,41 +417,41 @@ static ADDRESS_MAP_START( bombsa_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xd002, 0xd002) AM_WRITE(argus_bankselect_w)
AM_RANGE(0xd003, 0xd003) AM_WRITE(bombsa_pageselect_w) // 0,1,0,1,0,1 etc.
AM_RANGE(0xd000, 0xd1ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0xd200, 0xd7ff) AM_WRITE(MWA8_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xd800, 0xdfff) AM_WRITE(MWA8_RAM)
AM_RANGE(0xd000, 0xd1ff) AM_WRITE(SMH_RAM)
AM_RANGE(0xd200, 0xd7ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xd800, 0xdfff) AM_WRITE(SMH_RAM)
AM_RANGE(0xe000, 0xe7ff) AM_WRITE(MWA8_RAM) // ??
AM_RANGE(0xe000, 0xe7ff) AM_WRITE(SMH_RAM) // ??
AM_RANGE(0xe800, 0xefff) AM_WRITE(bombsa_txram_w) AM_BASE(&argus_txram) // banked? it gets corrupted at game start, maybe its banked and one layer can be 16x16 or 8x8?
AM_RANGE(0xf000, 0xffff) AM_WRITE(bombsa_paletteram_w) AM_BASE(&argus_paletteram) // banked?
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_readmem_a, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(MRA8_ROM)
AM_RANGE(0x8000, 0x87ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
AM_RANGE(0xc000, 0xc000) AM_READ(soundlatch_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_writemem_a, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x8000, 0x87ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_readmem_b, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_READ(MRA8_ROM)
AM_RANGE(0xc000, 0xc7ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_writemem_b, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_WRITE(MWA8_ROM)
AM_RANGE(0xc000, 0xc7ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_writemem_c, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_WRITE(MWA8_ROM)
AM_RANGE(0xc000, 0xc7ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0xf000, 0xf000) AM_WRITE(MWA8_RAM) // Is this a confirm of some sort?
AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
AM_RANGE(0xf000, 0xf000) AM_WRITE(SMH_RAM) // Is this a confirm of some sort?
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_readport_1, ADDRESS_SPACE_IO, 8 )

164
src/mame/drivers/armedf.c
View File

@ -248,14 +248,14 @@ static WRITE16_HANDLER( legion_command_c )
static ADDRESS_MAP_START( terraf_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x04ffff) AM_READ(MRA16_ROM)
AM_RANGE(0x060000, 0x063fff) AM_READ(MRA16_RAM)
AM_RANGE(0x064000, 0x064fff) AM_READ(MRA16_RAM)
AM_RANGE(0x068000, 0x069fff) AM_READ(MRA16_RAM)
AM_RANGE(0x06a000, 0x06a9ff) AM_READ(MRA16_RAM)
AM_RANGE(0x06C000, 0x06C9ff) AM_READ(MRA16_RAM)
AM_RANGE(0x070000, 0x070fff) AM_READ(MRA16_RAM)
AM_RANGE(0x074000, 0x074fff) AM_READ(MRA16_RAM)
AM_RANGE(0x000000, 0x04ffff) AM_READ(SMH_ROM)
AM_RANGE(0x060000, 0x063fff) AM_READ(SMH_RAM)
AM_RANGE(0x064000, 0x064fff) AM_READ(SMH_RAM)
AM_RANGE(0x068000, 0x069fff) AM_READ(SMH_RAM)
AM_RANGE(0x06a000, 0x06a9ff) AM_READ(SMH_RAM)
AM_RANGE(0x06C000, 0x06C9ff) AM_READ(SMH_RAM)
AM_RANGE(0x070000, 0x070fff) AM_READ(SMH_RAM)
AM_RANGE(0x074000, 0x074fff) AM_READ(SMH_RAM)
AM_RANGE(0x078000, 0x078001) AM_READ(input_port_0_word_r)
AM_RANGE(0x078002, 0x078003) AM_READ(input_port_1_word_r)
AM_RANGE(0x078004, 0x078005) AM_READ(input_port_2_word_r)
@ -263,13 +263,13 @@ static ADDRESS_MAP_START( terraf_readmem, ADDRESS_SPACE_PROGRAM, 16 )
ADDRESS_MAP_END
static ADDRESS_MAP_START( terraf_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x04ffff) AM_WRITE(MWA16_ROM)
AM_RANGE(0x060000, 0x0603ff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x060400, 0x063fff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x000000, 0x04ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x060000, 0x0603ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x060400, 0x063fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x064000, 0x064fff) AM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x068000, 0x069fff) AM_WRITE(armedf_text_videoram_w) AM_BASE(&terraf_text_videoram)
AM_RANGE(0x06a000, 0x06a9ff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x06C000, 0x06C9ff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x06a000, 0x06a9ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x06C000, 0x06C9ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x070000, 0x070fff) AM_WRITE(armedf_fg_videoram_w) AM_BASE(&armedf_fg_videoram)
AM_RANGE(0x074000, 0x074fff) AM_WRITE(armedf_bg_videoram_w) AM_BASE(&armedf_bg_videoram)
AM_RANGE(0x07c000, 0x07c001) AM_WRITE(terraf_io_w)
@ -278,20 +278,20 @@ static ADDRESS_MAP_START( terraf_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x07c006, 0x07c007) AM_WRITE(terraf_fg_scrollx_w) /* not use in terrafu, 0x07c008 neither */
AM_RANGE(0x07c008, 0x07c009) AM_WRITE(terraf_fg_scrolly_w) /* written twice, lsb and msb */
AM_RANGE(0x07c00a, 0x07c00b) AM_WRITE(sound_command_w)
AM_RANGE(0x07c00c, 0x07c00d) AM_WRITE(MWA16_NOP) /* Watchdog ? cycle 0000 -> 0100 -> 0200 back to 0000 */
AM_RANGE(0x07c00c, 0x07c00d) AM_WRITE(SMH_NOP) /* Watchdog ? cycle 0000 -> 0100 -> 0200 back to 0000 */
AM_RANGE(0x07c00e, 0x07c00f) AM_WRITE(armedf_mcu_cmd) /* MCU Command ? */
AM_RANGE(0x0c0000, 0x0c0001) AM_WRITE(terraf_fg_scroll_msb_arm_w) /* written between two consecutive writes to 7c008 */
ADDRESS_MAP_END
static ADDRESS_MAP_START( kodure_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x05ffff) AM_READ(MRA16_ROM)
AM_RANGE(0x060000, 0x063fff) AM_READ(MRA16_RAM)
AM_RANGE(0x064000, 0x064fff) AM_READ(MRA16_RAM)
AM_RANGE(0x068000, 0x069fff) AM_READ(MRA16_RAM)
AM_RANGE(0x06a000, 0x06a9ff) AM_READ(MRA16_RAM)
AM_RANGE(0x06C000, 0x06C9ff) AM_READ(MRA16_RAM)
AM_RANGE(0x070000, 0x070fff) AM_READ(MRA16_RAM)
AM_RANGE(0x074000, 0x074fff) AM_READ(MRA16_RAM)
AM_RANGE(0x000000, 0x05ffff) AM_READ(SMH_ROM)
AM_RANGE(0x060000, 0x063fff) AM_READ(SMH_RAM)
AM_RANGE(0x064000, 0x064fff) AM_READ(SMH_RAM)
AM_RANGE(0x068000, 0x069fff) AM_READ(SMH_RAM)
AM_RANGE(0x06a000, 0x06a9ff) AM_READ(SMH_RAM)
AM_RANGE(0x06C000, 0x06C9ff) AM_READ(SMH_RAM)
AM_RANGE(0x070000, 0x070fff) AM_READ(SMH_RAM)
AM_RANGE(0x074000, 0x074fff) AM_READ(SMH_RAM)
AM_RANGE(0x078000, 0x078001) AM_READ(input_port_0_word_r)
AM_RANGE(0x078002, 0x078003) AM_READ(input_port_1_word_r)
AM_RANGE(0x078004, 0x078005) AM_READ(input_port_2_word_r)
@ -299,32 +299,32 @@ static ADDRESS_MAP_START( kodure_readmem, ADDRESS_SPACE_PROGRAM, 16 )
ADDRESS_MAP_END
static ADDRESS_MAP_START( kodure_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x05ffff) AM_WRITE(MWA16_ROM)
AM_RANGE(0x060000, 0x060fff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x061000, 0x063fff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x000000, 0x05ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x060000, 0x060fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x061000, 0x063fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x064000, 0x064fff) AM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x068000, 0x069fff) AM_WRITE(armedf_text_videoram_w) AM_BASE(&terraf_text_videoram)
AM_RANGE(0x06a000, 0x06a9ff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x06C000, 0x06C9ff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x06a000, 0x06a9ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x06C000, 0x06C9ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x070000, 0x070fff) AM_WRITE(armedf_fg_videoram_w) AM_BASE(&armedf_fg_videoram)
AM_RANGE(0x074000, 0x074fff) AM_WRITE(armedf_bg_videoram_w) AM_BASE(&armedf_bg_videoram)
AM_RANGE(0x07c000, 0x07c001) AM_WRITE(kodure_io_w)
AM_RANGE(0x07c002, 0x07c003) AM_WRITE(armedf_bg_scrollx_w)
AM_RANGE(0x07c004, 0x07c005) AM_WRITE(armedf_bg_scrolly_w)
AM_RANGE(0x07c00a, 0x07c00b) AM_WRITE(sound_command_w)
AM_RANGE(0x0c0000, 0x0c0001) AM_WRITE(MWA16_NOP) /* watchdog? */
AM_RANGE(0xffd000, 0xffd001) AM_WRITE(MWA16_NOP) /* ? */
AM_RANGE(0x0c0000, 0x0c0001) AM_WRITE(SMH_NOP) /* watchdog? */
AM_RANGE(0xffd000, 0xffd001) AM_WRITE(SMH_NOP) /* ? */
ADDRESS_MAP_END
static ADDRESS_MAP_START( cclimbr2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x05ffff) AM_READ(MRA16_ROM)
AM_RANGE(0x060000, 0x063fff) AM_READ(MRA16_RAM)
AM_RANGE(0x064000, 0x064fff) AM_READ(MRA16_RAM)
AM_RANGE(0x068000, 0x069fff) AM_READ(MRA16_RAM)
AM_RANGE(0x06a000, 0x06a9ff) AM_READ(MRA16_RAM)
AM_RANGE(0x06c000, 0x06c9ff) AM_READ(MRA16_RAM)
AM_RANGE(0x070000, 0x070fff) AM_READ(MRA16_RAM)
AM_RANGE(0x074000, 0x074fff) AM_READ(MRA16_RAM)
AM_RANGE(0x000000, 0x05ffff) AM_READ(SMH_ROM)
AM_RANGE(0x060000, 0x063fff) AM_READ(SMH_RAM)
AM_RANGE(0x064000, 0x064fff) AM_READ(SMH_RAM)
AM_RANGE(0x068000, 0x069fff) AM_READ(SMH_RAM)
AM_RANGE(0x06a000, 0x06a9ff) AM_READ(SMH_RAM)
AM_RANGE(0x06c000, 0x06c9ff) AM_READ(SMH_RAM)
AM_RANGE(0x070000, 0x070fff) AM_READ(SMH_RAM)
AM_RANGE(0x074000, 0x074fff) AM_READ(SMH_RAM)
AM_RANGE(0x078000, 0x078001) AM_READ(input_port_0_word_r)
AM_RANGE(0x078002, 0x078003) AM_READ(input_port_1_word_r)
AM_RANGE(0x078004, 0x078005) AM_READ(input_port_2_word_r)
@ -332,33 +332,33 @@ static ADDRESS_MAP_START( cclimbr2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
ADDRESS_MAP_END
static ADDRESS_MAP_START( cclimbr2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x05ffff) AM_WRITE(MWA16_ROM)
AM_RANGE(0x060000, 0x060fff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x061000, 0x063fff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x000000, 0x05ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x060000, 0x060fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x061000, 0x063fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x064000, 0x064fff) AM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x068000, 0x069fff) AM_WRITE(armedf_text_videoram_w) AM_BASE(&terraf_text_videoram)
AM_RANGE(0x06a000, 0x06a9ff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x06c000, 0x06c9ff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x06ca00, 0x06cbff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x06a000, 0x06a9ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x06c000, 0x06c9ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x06ca00, 0x06cbff) AM_WRITE(SMH_RAM)
AM_RANGE(0x070000, 0x070fff) AM_WRITE(armedf_fg_videoram_w) AM_BASE(&armedf_fg_videoram)
AM_RANGE(0x074000, 0x074fff) AM_WRITE(armedf_bg_videoram_w) AM_BASE(&armedf_bg_videoram)
AM_RANGE(0x07c000, 0x07c001) AM_WRITE(io_w)
AM_RANGE(0x07c002, 0x07c003) AM_WRITE(armedf_bg_scrollx_w)
AM_RANGE(0x07c004, 0x07c005) AM_WRITE(armedf_bg_scrolly_w)
AM_RANGE(0x07c00a, 0x07c00b) AM_WRITE(sound_command_w)
AM_RANGE(0x07c00e, 0x07c00f) AM_WRITE(MWA16_NOP) /* ? */
AM_RANGE(0x07c00c, 0x07c00d) AM_WRITE(MWA16_NOP) /* Watchdog ? cycle 0000 -> 0100 -> 0200 back to 0000 */
AM_RANGE(0x07c00e, 0x07c00f) AM_WRITE(SMH_NOP) /* ? */
AM_RANGE(0x07c00c, 0x07c00d) AM_WRITE(SMH_NOP) /* Watchdog ? cycle 0000 -> 0100 -> 0200 back to 0000 */
ADDRESS_MAP_END
static ADDRESS_MAP_START( legion_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x05ffff) AM_WRITE(MWA16_ROM)
AM_RANGE(0x060000, 0x060fff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x061000, 0x063fff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x000000, 0x05ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x060000, 0x060fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x061000, 0x063fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x064000, 0x064fff) AM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x068000, 0x069fff) AM_WRITE(armedf_text_videoram_w) AM_BASE(&terraf_text_videoram)
AM_RANGE(0x06a000, 0x06a9ff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x06c000, 0x06c9ff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x06ca00, 0x06cbff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x06a000, 0x06a9ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x06c000, 0x06c9ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x06ca00, 0x06cbff) AM_WRITE(SMH_RAM)
AM_RANGE(0x070000, 0x070fff) AM_WRITE(armedf_fg_videoram_w) AM_BASE(&armedf_fg_videoram)
AM_RANGE(0x074000, 0x074fff) AM_WRITE(armedf_bg_videoram_w) AM_BASE(&armedf_bg_videoram)
AM_RANGE(0x07c000, 0x07c001) AM_WRITE(terraf_io_w)
@ -366,20 +366,20 @@ static ADDRESS_MAP_START( legion_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x07c004, 0x07c005) AM_WRITE(armedf_bg_scrolly_w)
AM_RANGE(0x07c00a, 0x07c00b) AM_WRITE(sound_command_w)
AM_RANGE(0x07c00e, 0x07c00f) AM_WRITE(armedf_mcu_cmd) /* MCU Command ? */
AM_RANGE(0x07c00c, 0x07c00d) AM_WRITE(MWA16_NOP) /* Watchdog ? cycle 0000 -> 0100 -> 0200 back to 0000 */
AM_RANGE(0x07c00c, 0x07c00d) AM_WRITE(SMH_NOP) /* Watchdog ? cycle 0000 -> 0100 -> 0200 back to 0000 */
ADDRESS_MAP_END
static ADDRESS_MAP_START( legiono_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_WRITE(MWA16_ROM)
AM_RANGE(0x040000, 0x04003f) AM_WRITE(MWA16_RAM) AM_BASE(&legion_cmd)
AM_RANGE(0x040040, 0x05ffff) AM_WRITE(MWA16_ROM)
AM_RANGE(0x060000, 0x060fff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x061000, 0x063fff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x040000, 0x04003f) AM_WRITE(SMH_RAM) AM_BASE(&legion_cmd)
AM_RANGE(0x040040, 0x05ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x060000, 0x060fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x061000, 0x063fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x064000, 0x064fff) AM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x068000, 0x069fff) AM_WRITE(armedf_text_videoram_w) AM_BASE(&terraf_text_videoram)
AM_RANGE(0x06a000, 0x06a9ff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x06c000, 0x06c9ff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x06ca00, 0x06cbff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x06a000, 0x06a9ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x06c000, 0x06c9ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x06ca00, 0x06cbff) AM_WRITE(SMH_RAM)
AM_RANGE(0x070000, 0x070fff) AM_WRITE(armedf_fg_videoram_w) AM_BASE(&armedf_fg_videoram)
AM_RANGE(0x074000, 0x074fff) AM_WRITE(armedf_bg_videoram_w) AM_BASE(&armedf_bg_videoram)
AM_RANGE(0x07c000, 0x07c001) AM_WRITE(terraf_io_w)
@ -387,34 +387,34 @@ static ADDRESS_MAP_START( legiono_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x07c004, 0x07c005) AM_WRITE(armedf_bg_scrolly_w)
AM_RANGE(0x07c00a, 0x07c00b) AM_WRITE(sound_command_w)
//AM_RANGE(0x07c00e, 0x07c00f) AM_WRITE(armedf_mcu_cmd) /* MCU Command ? */
//AM_RANGE(0x07c00c, 0x07c00d) AM_WRITE(MWA16_NOP) /* Watchdog ? cycle 0000 -> 0100 -> 0200 back to 0000 */
//AM_RANGE(0x07c00c, 0x07c00d) AM_WRITE(SMH_NOP) /* Watchdog ? cycle 0000 -> 0100 -> 0200 back to 0000 */
ADDRESS_MAP_END
static ADDRESS_MAP_START( armedf_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x05ffff) AM_READ(MRA16_ROM)
AM_RANGE(0x060000, 0x065fff) AM_READ(MRA16_RAM)
AM_RANGE(0x066000, 0x066fff) AM_READ(MRA16_RAM)
AM_RANGE(0x067000, 0x067fff) AM_READ(MRA16_RAM)
AM_RANGE(0x068000, 0x069fff) AM_READ(MRA16_RAM)
AM_RANGE(0x06a000, 0x06afff) AM_READ(MRA16_RAM)
AM_RANGE(0x06b000, 0x06bfff) AM_READ(MRA16_RAM)
AM_RANGE(0x000000, 0x05ffff) AM_READ(SMH_ROM)
AM_RANGE(0x060000, 0x065fff) AM_READ(SMH_RAM)
AM_RANGE(0x066000, 0x066fff) AM_READ(SMH_RAM)
AM_RANGE(0x067000, 0x067fff) AM_READ(SMH_RAM)
AM_RANGE(0x068000, 0x069fff) AM_READ(SMH_RAM)
AM_RANGE(0x06a000, 0x06afff) AM_READ(SMH_RAM)
AM_RANGE(0x06b000, 0x06bfff) AM_READ(SMH_RAM)
AM_RANGE(0x06c000, 0x06c001) AM_READ(input_port_0_word_r)
AM_RANGE(0x06c002, 0x06c003) AM_READ(input_port_1_word_r)
AM_RANGE(0x06c004, 0x06c005) AM_READ(input_port_2_word_r)
AM_RANGE(0x06c006, 0x06c007) AM_READ(input_port_3_word_r)
AM_RANGE(0x06c008, 0x06c7ff) AM_READ(MRA16_RAM)
AM_RANGE(0x06c008, 0x06c7ff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( armedf_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x05ffff) AM_WRITE(MWA16_ROM)
AM_RANGE(0x060000, 0x060fff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x061000, 0x065fff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x000000, 0x05ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x060000, 0x060fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x061000, 0x065fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x066000, 0x066fff) AM_WRITE(armedf_bg_videoram_w) AM_BASE(&armedf_bg_videoram)
AM_RANGE(0x067000, 0x067fff) AM_WRITE(armedf_fg_videoram_w) AM_BASE(&armedf_fg_videoram)
AM_RANGE(0x068000, 0x069fff) AM_WRITE(armedf_text_videoram_w) AM_BASE(&terraf_text_videoram)
AM_RANGE(0x06a000, 0x06afff) AM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x06b000, 0x06bfff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x06c000, 0x06c7ff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x06b000, 0x06bfff) AM_WRITE(SMH_RAM)
AM_RANGE(0x06c000, 0x06c7ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x06d000, 0x06d001) AM_WRITE(io_w)
AM_RANGE(0x06d002, 0x06d003) AM_WRITE(armedf_bg_scrollx_w)
AM_RANGE(0x06d004, 0x06d005) AM_WRITE(armedf_bg_scrolly_w)
@ -425,23 +425,23 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( soundreadmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xf7ff) AM_READ(MRA8_ROM)
AM_RANGE(0xf800, 0xffff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0xf7ff) AM_READ(SMH_ROM)
AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( soundwritemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xf7ff) AM_WRITE(MWA8_ROM)
AM_RANGE(0xf800, 0xffff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0xf7ff) AM_WRITE(SMH_ROM)
AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( cclimbr2_soundreadmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_READ(MRA8_ROM)
AM_RANGE(0xc000, 0xffff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
AM_RANGE(0xc000, 0xffff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( cclimbr2_soundwritemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_WRITE(MWA8_ROM)
AM_RANGE(0xc000, 0xffff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xffff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
static READ8_HANDLER( soundlatch_clear_r )

18
src/mame/drivers/ashnojoe.c
View File

@ -117,18 +117,18 @@ static WRITE16_HANDLER( ashnojoe_soundlatch_w )
static ADDRESS_MAP_START( ashnojoe_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x01ffff) AM_ROM
AM_RANGE(0x040000, 0x041fff) AM_READWRITE(MRA16_RAM, ashnojoe_tileram3_w) AM_BASE(&ashnojoetileram16_3)
AM_RANGE(0x042000, 0x043fff) AM_READWRITE(MRA16_RAM, ashnojoe_tileram4_w) AM_BASE(&ashnojoetileram16_4)
AM_RANGE(0x044000, 0x044fff) AM_READWRITE(MRA16_RAM, ashnojoe_tileram5_w) AM_BASE(&ashnojoetileram16_5)
AM_RANGE(0x045000, 0x045fff) AM_READWRITE(MRA16_RAM, ashnojoe_tileram2_w) AM_BASE(&ashnojoetileram16_2)
AM_RANGE(0x046000, 0x046fff) AM_READWRITE(MRA16_RAM, ashnojoe_tileram6_w) AM_BASE(&ashnojoetileram16_6)
AM_RANGE(0x047000, 0x047fff) AM_READWRITE(MRA16_RAM, ashnojoe_tileram7_w) AM_BASE(&ashnojoetileram16_7)
AM_RANGE(0x048000, 0x048fff) AM_READWRITE(MRA16_RAM, ashnojoe_tileram_w) AM_BASE(&ashnojoetileram16)
AM_RANGE(0x049000, 0x049fff) AM_READWRITE(MRA16_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x040000, 0x041fff) AM_READWRITE(SMH_RAM, ashnojoe_tileram3_w) AM_BASE(&ashnojoetileram16_3)
AM_RANGE(0x042000, 0x043fff) AM_READWRITE(SMH_RAM, ashnojoe_tileram4_w) AM_BASE(&ashnojoetileram16_4)
AM_RANGE(0x044000, 0x044fff) AM_READWRITE(SMH_RAM, ashnojoe_tileram5_w) AM_BASE(&ashnojoetileram16_5)
AM_RANGE(0x045000, 0x045fff) AM_READWRITE(SMH_RAM, ashnojoe_tileram2_w) AM_BASE(&ashnojoetileram16_2)
AM_RANGE(0x046000, 0x046fff) AM_READWRITE(SMH_RAM, ashnojoe_tileram6_w) AM_BASE(&ashnojoetileram16_6)
AM_RANGE(0x047000, 0x047fff) AM_READWRITE(SMH_RAM, ashnojoe_tileram7_w) AM_BASE(&ashnojoetileram16_7)
AM_RANGE(0x048000, 0x048fff) AM_READWRITE(SMH_RAM, ashnojoe_tileram_w) AM_BASE(&ashnojoetileram16)
AM_RANGE(0x049000, 0x049fff) AM_READWRITE(SMH_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x04a000, 0x04a001) AM_READ(input_port_0_word_r) // p1 inputs, coins
AM_RANGE(0x04a002, 0x04a003) AM_READ(input_port_1_word_r) // p2 inputs
AM_RANGE(0x04a004, 0x04a005) AM_READ(input_port_2_word_r) // dipswitches
AM_RANGE(0x04a006, 0x04a007) AM_WRITE(MWA16_RAM) AM_BASE(&ashnojoe_tilemap_reg)
AM_RANGE(0x04a006, 0x04a007) AM_WRITE(SMH_RAM) AM_BASE(&ashnojoe_tilemap_reg)
AM_RANGE(0x04a008, 0x04a009) AM_WRITE(ashnojoe_soundlatch_w)
AM_RANGE(0x04a00a, 0x04a00b) AM_READ(fake_4a00a_r) // ??
AM_RANGE(0x04a010, 0x04a019) AM_WRITE(joe_tilemaps_xscroll_w)

2
src/mame/drivers/asterix.c
View File

@ -189,7 +189,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x180000, 0x1807ff) AM_READWRITE(K053245_word_r, K053245_word_w)
AM_RANGE(0x180800, 0x180fff) AM_RAM // extra RAM, or mirror for the above?
AM_RANGE(0x200000, 0x20000f) AM_READWRITE(K053244_word_r, K053244_word_w)
AM_RANGE(0x280000, 0x280fff) AM_READWRITE(MRA16_RAM, paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x280000, 0x280fff) AM_READWRITE(SMH_RAM, paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x300000, 0x30001f) AM_READWRITE(K053244_lsb_r, K053244_lsb_w)
AM_RANGE(0x380000, 0x380001) AM_READ(input_port_0_word_r)
AM_RANGE(0x380002, 0x380003) AM_READ(control1_r)

2
src/mame/drivers/astinvad.c
View File

@ -325,7 +325,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( spaceint_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x17ff) AM_ROM
AM_RANGE(0x2000, 0x23ff) AM_RAM
AM_RANGE(0x4000, 0x5fff) AM_READWRITE(MRA8_RAM, spaceint_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x4000, 0x5fff) AM_READWRITE(SMH_RAM, spaceint_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
ADDRESS_MAP_END

6
src/mame/drivers/astrocde.c
View File

@ -421,7 +421,7 @@ static WRITE8_HANDLER( profpac_banksw_w )
profpac_bank = data;
/* set the main banking */
memory_install_read8_handler(0, ADDRESS_SPACE_PROGRAM, 0x4000, 0xbfff, 0, 0, MRA8_BANK1);
memory_install_read8_handler(0, ADDRESS_SPACE_PROGRAM, 0x4000, 0xbfff, 0, 0, SMH_BANK1);
memory_set_bankptr(1, memory_region(REGION_USER1) + 0x8000 * bank);
/* bank 0 reads video RAM in the 4000-7FFF range */
@ -437,11 +437,11 @@ static WRITE8_HANDLER( profpac_banksw_w )
/* if the bank is in range, map the appropriate bank */
if (bank < 0x28)
{
memory_install_read8_handler(0, ADDRESS_SPACE_PROGRAM, 0x4000, 0x7fff, 0, 0, MRA8_BANK2);
memory_install_read8_handler(0, ADDRESS_SPACE_PROGRAM, 0x4000, 0x7fff, 0, 0, SMH_BANK2);
memory_set_bankptr(2, memory_region(REGION_USER2) + 0x4000 * bank);
}
else
memory_install_read8_handler(0, ADDRESS_SPACE_PROGRAM, 0x4000, 0x7fff, 0, 0, MRA8_UNMAP);
memory_install_read8_handler(0, ADDRESS_SPACE_PROGRAM, 0x4000, 0x7fff, 0, 0, SMH_UNMAP);
}
}

40
src/mame/drivers/astrof.c
View File

@ -511,14 +511,14 @@ static ADDRESS_MAP_START( astrof_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x4000, 0x5fff) AM_RAM AM_WRITE(astrof_videoram_w) AM_BASE(&astrof_videoram) AM_SIZE(&astrof_videoram_size)
AM_RANGE(0x6000, 0x7fff) AM_NOP
AM_RANGE(0x8000, 0x8002) AM_MIRROR(0x1ff8) AM_NOP
AM_RANGE(0x8003, 0x8003) AM_MIRROR(0x1ff8) AM_READWRITE(MRA8_NOP, MWA8_RAM) AM_BASE(&astrof_color)
AM_RANGE(0x8004, 0x8004) AM_MIRROR(0x1ff8) AM_READWRITE(MRA8_NOP, video_control_1_w)
AM_RANGE(0x8005, 0x8005) AM_MIRROR(0x1ff8) AM_READWRITE(MRA8_NOP, astrof_video_control_2_w)
AM_RANGE(0x8006, 0x8006) AM_MIRROR(0x1ff8) AM_READWRITE(MRA8_NOP, astrof_audio_1_w)
AM_RANGE(0x8007, 0x8007) AM_MIRROR(0x1ff8) AM_READWRITE(MRA8_NOP, astrof_audio_2_w)
AM_RANGE(0x8003, 0x8003) AM_MIRROR(0x1ff8) AM_READWRITE(SMH_NOP, SMH_RAM) AM_BASE(&astrof_color)
AM_RANGE(0x8004, 0x8004) AM_MIRROR(0x1ff8) AM_READWRITE(SMH_NOP, video_control_1_w)
AM_RANGE(0x8005, 0x8005) AM_MIRROR(0x1ff8) AM_READWRITE(SMH_NOP, astrof_video_control_2_w)
AM_RANGE(0x8006, 0x8006) AM_MIRROR(0x1ff8) AM_READWRITE(SMH_NOP, astrof_audio_1_w)
AM_RANGE(0x8007, 0x8007) AM_MIRROR(0x1ff8) AM_READWRITE(SMH_NOP, astrof_audio_2_w)
AM_RANGE(0xa000, 0xa000) AM_MIRROR(0x1ff8) AM_READ_PORT("IN") AM_WRITENOP
AM_RANGE(0xa001, 0xa001) AM_MIRROR(0x1ff8) AM_READ_PORT("DSW") AM_WRITENOP
AM_RANGE(0xa002, 0xa002) AM_MIRROR(0x1ff8) AM_READWRITE(irq_ack_r, MWA8_NOP)
AM_RANGE(0xa002, 0xa002) AM_MIRROR(0x1ff8) AM_READWRITE(irq_ack_r, SMH_NOP)
AM_RANGE(0xa003, 0xa007) AM_MIRROR(0x1ff8) AM_NOP
AM_RANGE(0xc000, 0xffff) AM_ROM
ADDRESS_MAP_END
@ -530,14 +530,14 @@ static ADDRESS_MAP_START( spfghmk2_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x4000, 0x5fff) AM_RAM AM_WRITE(astrof_videoram_w) AM_BASE(&astrof_videoram) AM_SIZE(&astrof_videoram_size)
AM_RANGE(0x6000, 0x7fff) AM_NOP
AM_RANGE(0x8000, 0x8002) AM_MIRROR(0x1ff8) AM_NOP
AM_RANGE(0x8003, 0x8003) AM_MIRROR(0x1ff8) AM_READWRITE(MRA8_NOP, MWA8_RAM) AM_BASE(&astrof_color)
AM_RANGE(0x8004, 0x8004) AM_MIRROR(0x1ff8) AM_READWRITE(MRA8_NOP, video_control_1_w)
AM_RANGE(0x8005, 0x8005) AM_MIRROR(0x1ff8) AM_READWRITE(MRA8_NOP, spfghmk2_video_control_2_w)
AM_RANGE(0x8006, 0x8006) AM_MIRROR(0x1ff8) AM_READWRITE(MRA8_NOP, spfghmk2_audio_w)
AM_RANGE(0x8003, 0x8003) AM_MIRROR(0x1ff8) AM_READWRITE(SMH_NOP, SMH_RAM) AM_BASE(&astrof_color)
AM_RANGE(0x8004, 0x8004) AM_MIRROR(0x1ff8) AM_READWRITE(SMH_NOP, video_control_1_w)
AM_RANGE(0x8005, 0x8005) AM_MIRROR(0x1ff8) AM_READWRITE(SMH_NOP, spfghmk2_video_control_2_w)
AM_RANGE(0x8006, 0x8006) AM_MIRROR(0x1ff8) AM_READWRITE(SMH_NOP, spfghmk2_audio_w)
AM_RANGE(0x8007, 0x8007) AM_MIRROR(0x1ff8) AM_NOP
AM_RANGE(0xa000, 0xa000) AM_MIRROR(0x1ff8) AM_READ_PORT("IN") AM_WRITENOP
AM_RANGE(0xa001, 0xa001) AM_MIRROR(0x1ff8) AM_READ_PORT("DSW") AM_WRITENOP
AM_RANGE(0xa002, 0xa002) AM_MIRROR(0x1ff8) AM_READWRITE(irq_ack_r, MWA8_NOP)
AM_RANGE(0xa002, 0xa002) AM_MIRROR(0x1ff8) AM_READWRITE(irq_ack_r, SMH_NOP)
AM_RANGE(0xa003, 0xa007) AM_MIRROR(0x1ff8) AM_NOP
AM_RANGE(0xc000, 0xffff) AM_ROM
ADDRESS_MAP_END
@ -549,15 +549,15 @@ static ADDRESS_MAP_START( tomahawk_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x4000, 0x5fff) AM_RAM AM_WRITE(tomahawk_videoram_w) AM_BASE(&astrof_videoram) AM_SIZE(&astrof_videoram_size)
AM_RANGE(0x6000, 0x7fff) AM_NOP
AM_RANGE(0x8000, 0x8002) AM_MIRROR(0x1ff8) AM_NOP
AM_RANGE(0x8003, 0x8003) AM_MIRROR(0x1ff8) AM_READWRITE(MRA8_NOP, MWA8_RAM) AM_BASE(&astrof_color)
AM_RANGE(0x8004, 0x8004) AM_MIRROR(0x1ff8) AM_READWRITE(MRA8_NOP, video_control_1_w)
AM_RANGE(0x8005, 0x8005) AM_MIRROR(0x1ff8) AM_READWRITE(MRA8_NOP, tomahawk_video_control_2_w)
AM_RANGE(0x8006, 0x8006) AM_MIRROR(0x1ff8) AM_READWRITE(MRA8_NOP, tomahawk_audio_w)
AM_RANGE(0x8007, 0x8007) AM_MIRROR(0x1ff8) AM_READWRITE(MRA8_NOP, MWA8_RAM) AM_BASE(&tomahawk_protection)
AM_RANGE(0xa000, 0xa000) AM_MIRROR(0x1ff8) AM_READ_PORT("IN") AM_WRITE(MWA8_NOP)
AM_RANGE(0xa001, 0xa001) AM_MIRROR(0x1ff8) AM_READ_PORT("DSW") AM_WRITE(MWA8_NOP)
AM_RANGE(0xa002, 0xa002) AM_MIRROR(0x1ff8) AM_READWRITE(irq_ack_r, MWA8_NOP)
AM_RANGE(0xa003, 0xa003) AM_MIRROR(0x1ff8) AM_READWRITE(tomahawk_protection_r, MWA8_NOP)
AM_RANGE(0x8003, 0x8003) AM_MIRROR(0x1ff8) AM_READWRITE(SMH_NOP, SMH_RAM) AM_BASE(&astrof_color)
AM_RANGE(0x8004, 0x8004) AM_MIRROR(0x1ff8) AM_READWRITE(SMH_NOP, video_control_1_w)
AM_RANGE(0x8005, 0x8005) AM_MIRROR(0x1ff8) AM_READWRITE(SMH_NOP, tomahawk_video_control_2_w)
AM_RANGE(0x8006, 0x8006) AM_MIRROR(0x1ff8) AM_READWRITE(SMH_NOP, tomahawk_audio_w)
AM_RANGE(0x8007, 0x8007) AM_MIRROR(0x1ff8) AM_READWRITE(SMH_NOP, SMH_RAM) AM_BASE(&tomahawk_protection)
AM_RANGE(0xa000, 0xa000) AM_MIRROR(0x1ff8) AM_READ_PORT("IN") AM_WRITE(SMH_NOP)
AM_RANGE(0xa001, 0xa001) AM_MIRROR(0x1ff8) AM_READ_PORT("DSW") AM_WRITE(SMH_NOP)
AM_RANGE(0xa002, 0xa002) AM_MIRROR(0x1ff8) AM_READWRITE(irq_ack_r, SMH_NOP)
AM_RANGE(0xa003, 0xa003) AM_MIRROR(0x1ff8) AM_READWRITE(tomahawk_protection_r, SMH_NOP)
AM_RANGE(0xa004, 0xa007) AM_MIRROR(0x1ff8) AM_NOP
AM_RANGE(0xc000, 0xffff) AM_ROM
ADDRESS_MAP_END

8
src/mame/drivers/asuka.c
View File

@ -332,7 +332,7 @@ static ADDRESS_MAP_START( asuka_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x1076f0, 0x1076f1) AM_READNOP /* Mofflott init does dummy reads here */
AM_RANGE(0x200000, 0x20000f) AM_READWRITE(TC0110PCR_word_r, TC0110PCR_step1_word_w)
AM_RANGE(0x3a0000, 0x3a0003) AM_WRITE(asuka_spritectrl_w)
AM_RANGE(0x3e0000, 0x3e0001) AM_READWRITE(MRA16_NOP, taitosound_port16_lsb_w)
AM_RANGE(0x3e0000, 0x3e0001) AM_READWRITE(SMH_NOP, taitosound_port16_lsb_w)
AM_RANGE(0x3e0002, 0x3e0003) AM_READWRITE(taitosound_comm16_lsb_r, taitosound_comm16_lsb_w)
AM_RANGE(0x400000, 0x40000f) AM_READWRITE(TC0220IOC_halfword_r, TC0220IOC_halfword_w)
AM_RANGE(0xc00000, 0xc0ffff) AM_READWRITE(TC0100SCN_word_0_r, TC0100SCN_word_0_w) /* tilemaps */
@ -344,7 +344,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( cadash_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
AM_RANGE(0x080000, 0x080003) AM_WRITE(asuka_spritectrl_w)
AM_RANGE(0x0c0000, 0x0c0001) AM_READWRITE(MRA16_NOP, taitosound_port16_lsb_w)
AM_RANGE(0x0c0000, 0x0c0001) AM_READWRITE(SMH_NOP, taitosound_port16_lsb_w)
AM_RANGE(0x0c0002, 0x0c0003) AM_READWRITE(taitosound_comm16_lsb_r, taitosound_comm16_lsb_w)
AM_RANGE(0x100000, 0x107fff) AM_RAM
AM_RANGE(0x800000, 0x800fff) AM_RAM /* network ram */
@ -362,7 +362,7 @@ static ADDRESS_MAP_START( eto_map, ADDRESS_SPACE_PROGRAM, 16 ) /* N.B. tc100scn
AM_RANGE(0x300000, 0x30000f) AM_READWRITE(TC0220IOC_halfword_r, TC0220IOC_halfword_w)
AM_RANGE(0x400000, 0x40000f) AM_READ(TC0220IOC_halfword_r) /* service mode mirror */
AM_RANGE(0x4a0000, 0x4a0003) AM_WRITE(asuka_spritectrl_w)
AM_RANGE(0x4e0000, 0x4e0001) AM_READWRITE(MRA16_NOP, taitosound_port16_lsb_w)
AM_RANGE(0x4e0000, 0x4e0001) AM_READWRITE(SMH_NOP, taitosound_port16_lsb_w)
AM_RANGE(0x4e0002, 0x4e0003) AM_READWRITE(taitosound_comm16_lsb_r, taitosound_comm16_lsb_w)
AM_RANGE(0xc00000, 0xc03fff) AM_READWRITE(PC090OJ_word_0_r, PC090OJ_word_0_w) /* sprite ram */
AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(TC0100SCN_word_0_w) /* service mode mirror */
@ -396,7 +396,7 @@ static ADDRESS_MAP_START( z80_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8000, 0x8fff) AM_RAM
AM_RANGE(0x9000, 0x9000) AM_WRITE(YM2151_register_port_0_w)
AM_RANGE(0x9001, 0x9001) AM_READWRITE(YM2151_status_port_0_r, YM2151_data_port_0_w)
// AM_RANGE(0x9002, 0x9100) AM_READ(MRA8_RAM)
// AM_RANGE(0x9002, 0x9100) AM_READ(SMH_RAM)
AM_RANGE(0xa000, 0xa000) AM_WRITE(taitosound_slave_port_w)
AM_RANGE(0xa001, 0xa001) AM_READWRITE(taitosound_slave_comm_r, taitosound_slave_comm_w)
AM_RANGE(0xb000, 0xb000) AM_WRITE(asuka_msm5205_address_w)

46
src/mame/drivers/atarifb.c
View File

@ -151,17 +151,17 @@ static PALETTE_INIT( atarifb )
static ADDRESS_MAP_START( atarifb_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_GLOBAL_MASK(0x7fff)
AM_RANGE(0x0000, 0x01ff) AM_RAM
AM_RANGE(0x0200, 0x025f) AM_READWRITE(MRA8_RAM, atarifb_alpha1_videoram_w) AM_BASE(&atarifb_alphap1_videoram)
AM_RANGE(0x0200, 0x025f) AM_READWRITE(SMH_RAM, atarifb_alpha1_videoram_w) AM_BASE(&atarifb_alphap1_videoram)
AM_RANGE(0x0260, 0x039f) AM_RAM
AM_RANGE(0x03a0, 0x03ff) AM_READWRITE(MRA8_RAM, atarifb_alpha2_videoram_w) AM_BASE(&atarifb_alphap2_videoram)
AM_RANGE(0x1000, 0x13bf) AM_READWRITE(MRA8_RAM, atarifb_field_videoram_w) AM_BASE(&atarifb_field_videoram)
AM_RANGE(0x03a0, 0x03ff) AM_READWRITE(SMH_RAM, atarifb_alpha2_videoram_w) AM_BASE(&atarifb_alphap2_videoram)
AM_RANGE(0x1000, 0x13bf) AM_READWRITE(SMH_RAM, atarifb_field_videoram_w) AM_BASE(&atarifb_field_videoram)
AM_RANGE(0x13c0, 0x13ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x2000, 0x2000) AM_WRITE(MWA8_RAM) AM_BASE(&atarifb_scroll_register) /* OUT 0 */
AM_RANGE(0x2000, 0x2000) AM_WRITE(SMH_RAM) AM_BASE(&atarifb_scroll_register) /* OUT 0 */
AM_RANGE(0x2001, 0x2001) AM_WRITE(atarifb_out1_w) /* OUT 1 */
AM_RANGE(0x2002, 0x2002) AM_WRITE(atarifb_out2_w) /* OUT 2 */
AM_RANGE(0x2003, 0x2003) AM_WRITE(atarifb_out3_w) /* OUT 3 */
AM_RANGE(0x3000, 0x3000) AM_READ(MRA8_RAM)
AM_RANGE(0x3000, 0x3000) AM_WRITE(MWA8_NOP) /* Interrupt Acknowledge */
AM_RANGE(0x3000, 0x3000) AM_READ(SMH_RAM)
AM_RANGE(0x3000, 0x3000) AM_WRITE(SMH_NOP) /* Interrupt Acknowledge */
AM_RANGE(0x4000, 0x4000) AM_READ(atarifb_in0_r)
AM_RANGE(0x4002, 0x4002) AM_READ(atarifb_in2_r)
AM_RANGE(0x5000, 0x5000) AM_WRITE(watchdog_reset_w)
@ -172,17 +172,17 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( atarifb4_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_GLOBAL_MASK(0x7fff)
AM_RANGE(0x0000, 0x01ff) AM_RAM
AM_RANGE(0x0200, 0x025f) AM_READWRITE(MRA8_RAM, atarifb_alpha1_videoram_w) AM_BASE(&atarifb_alphap1_videoram)
AM_RANGE(0x0200, 0x025f) AM_READWRITE(SMH_RAM, atarifb_alpha1_videoram_w) AM_BASE(&atarifb_alphap1_videoram)
AM_RANGE(0x0260, 0x039f) AM_RAM
AM_RANGE(0x03a0, 0x03ff) AM_READWRITE(MRA8_RAM, atarifb_alpha2_videoram_w) AM_BASE(&atarifb_alphap2_videoram)
AM_RANGE(0x1000, 0x13bf) AM_READWRITE(MRA8_RAM, atarifb_field_videoram_w) AM_BASE(&atarifb_field_videoram)
AM_RANGE(0x03a0, 0x03ff) AM_READWRITE(SMH_RAM, atarifb_alpha2_videoram_w) AM_BASE(&atarifb_alphap2_videoram)
AM_RANGE(0x1000, 0x13bf) AM_READWRITE(SMH_RAM, atarifb_field_videoram_w) AM_BASE(&atarifb_field_videoram)
AM_RANGE(0x13c0, 0x13ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x2000, 0x2000) AM_WRITE(MWA8_RAM) AM_BASE(&atarifb_scroll_register) /* OUT 0 */
AM_RANGE(0x2000, 0x2000) AM_WRITE(SMH_RAM) AM_BASE(&atarifb_scroll_register) /* OUT 0 */
AM_RANGE(0x2001, 0x2001) AM_WRITE(atarifb4_out1_w) /* OUT 1 */
AM_RANGE(0x2002, 0x2002) AM_WRITE(atarifb_out2_w) /* OUT 2 */
AM_RANGE(0x2003, 0x2003) AM_WRITE(atarifb_out3_w) /* OUT 3 */
AM_RANGE(0x3000, 0x3000) AM_READ(MRA8_RAM)
AM_RANGE(0x3000, 0x3000) AM_WRITE(MWA8_NOP) /* Interrupt Acknowledge */
AM_RANGE(0x3000, 0x3000) AM_READ(SMH_RAM)
AM_RANGE(0x3000, 0x3000) AM_WRITE(SMH_NOP) /* Interrupt Acknowledge */
AM_RANGE(0x4000, 0x4000) AM_READ(atarifb4_in0_r)
AM_RANGE(0x4001, 0x4001) AM_READ(input_port_1_r)
AM_RANGE(0x4002, 0x4002) AM_READ(atarifb4_in2_r)
@ -194,17 +194,17 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( abaseb_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_GLOBAL_MASK(0x7fff)
AM_RANGE(0x0000, 0x01ff) AM_RAM
AM_RANGE(0x0200, 0x025f) AM_READWRITE(MRA8_RAM, atarifb_alpha1_videoram_w) AM_BASE(&atarifb_alphap1_videoram)
AM_RANGE(0x0200, 0x025f) AM_READWRITE(SMH_RAM, atarifb_alpha1_videoram_w) AM_BASE(&atarifb_alphap1_videoram)
AM_RANGE(0x0260, 0x039f) AM_RAM
AM_RANGE(0x03a0, 0x03ff) AM_READWRITE(MRA8_RAM, atarifb_alpha2_videoram_w) AM_BASE(&atarifb_alphap2_videoram)
AM_RANGE(0x1000, 0x13bf) AM_READWRITE(MRA8_RAM, atarifb_field_videoram_w) AM_BASE(&atarifb_field_videoram)
AM_RANGE(0x03a0, 0x03ff) AM_READWRITE(SMH_RAM, atarifb_alpha2_videoram_w) AM_BASE(&atarifb_alphap2_videoram)
AM_RANGE(0x1000, 0x13bf) AM_READWRITE(SMH_RAM, atarifb_field_videoram_w) AM_BASE(&atarifb_field_videoram)
AM_RANGE(0x13c0, 0x13ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x2000, 0x2000) AM_WRITE(MWA8_RAM) AM_BASE(&atarifb_scroll_register) /* OUT 0 */
AM_RANGE(0x2000, 0x2000) AM_WRITE(SMH_RAM) AM_BASE(&atarifb_scroll_register) /* OUT 0 */
AM_RANGE(0x2001, 0x2001) AM_WRITE(abaseb_out1_w) /* OUT 1 */
AM_RANGE(0x2002, 0x2002) AM_WRITE(atarifb_out2_w) /* OUT 2 */
AM_RANGE(0x2003, 0x2003) AM_WRITE(atarifb_out3_w) /* OUT 3 */
AM_RANGE(0x3000, 0x3000) AM_READ(MRA8_RAM)
AM_RANGE(0x3000, 0x3000) AM_WRITE(MWA8_NOP) /* Interrupt Acknowledge */
AM_RANGE(0x3000, 0x3000) AM_READ(SMH_RAM)
AM_RANGE(0x3000, 0x3000) AM_WRITE(SMH_NOP) /* Interrupt Acknowledge */
AM_RANGE(0x4000, 0x4000) AM_READ(atarifb_in0_r)
AM_RANGE(0x4002, 0x4002) AM_READ(atarifb_in2_r)
AM_RANGE(0x5000, 0x5000) AM_WRITE(watchdog_reset_w)
@ -215,15 +215,15 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( soccer_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_GLOBAL_MASK(0x3fff)
AM_RANGE(0x0000, 0x01ff) AM_RAM
AM_RANGE(0x0200, 0x025f) AM_READWRITE(MRA8_RAM, atarifb_alpha1_videoram_w) AM_BASE(&atarifb_alphap1_videoram)
AM_RANGE(0x0200, 0x025f) AM_READWRITE(SMH_RAM, atarifb_alpha1_videoram_w) AM_BASE(&atarifb_alphap1_videoram)
AM_RANGE(0x0260, 0x039f) AM_RAM
AM_RANGE(0x03a0, 0x03ff) AM_READWRITE(MRA8_RAM, atarifb_alpha2_videoram_w) AM_BASE(&atarifb_alphap2_videoram)
AM_RANGE(0x0800, 0x0bbf) AM_READWRITE(MRA8_RAM, atarifb_field_videoram_w) AM_BASE(&atarifb_field_videoram)
AM_RANGE(0x03a0, 0x03ff) AM_READWRITE(SMH_RAM, atarifb_alpha2_videoram_w) AM_BASE(&atarifb_alphap2_videoram)
AM_RANGE(0x0800, 0x0bbf) AM_READWRITE(SMH_RAM, atarifb_field_videoram_w) AM_BASE(&atarifb_field_videoram)
AM_RANGE(0x0bc0, 0x0bff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x1000, 0x1000) AM_WRITE(MWA8_RAM) AM_BASE(&atarifb_scroll_register) /* OUT 0 */
AM_RANGE(0x1000, 0x1000) AM_WRITE(SMH_RAM) AM_BASE(&atarifb_scroll_register) /* OUT 0 */
AM_RANGE(0x1001, 0x1001) AM_WRITE(soccer_out1_w) /* OUT 1 */
AM_RANGE(0x1002, 0x1002) AM_WRITE(soccer_out2_w) /* OUT 2 */
AM_RANGE(0x1004, 0x1004) AM_WRITE(MWA8_NOP) /* Interrupt Acknowledge */
AM_RANGE(0x1004, 0x1004) AM_WRITE(SMH_NOP) /* Interrupt Acknowledge */
AM_RANGE(0x1005, 0x1005) AM_WRITE(watchdog_reset_w)
AM_RANGE(0x1800, 0x1800) AM_READ(atarifb4_in0_r)
AM_RANGE(0x1801, 0x1801) AM_READ(input_port_1_r)

2
src/mame/drivers/atarig1.c
View File

@ -230,7 +230,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xfd0000, 0xfd0001) AM_READ(atarigen_sound_upper_r)
AM_RANGE(0xfd8000, 0xfdffff) AM_READWRITE(atarigen_eeprom_r, atarigen_eeprom_w) AM_BASE(&atarigen_eeprom) AM_SIZE(&atarigen_eeprom_size)
/* AM_RANGE(0xfe0000, 0xfe7fff) AM_READ(from_r)*/
AM_RANGE(0xfe8000, 0xfe89ff) AM_READWRITE(MRA16_RAM, atarigen_666_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0xfe8000, 0xfe89ff) AM_READWRITE(SMH_RAM, atarigen_666_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0xff0000, 0xff0fff) AM_WRITE(atarirle_0_spriteram_w) AM_BASE(&atarirle_0_spriteram)
AM_RANGE(0xff2000, 0xff2001) AM_WRITE(mo_command_w) AM_BASE(&mo_command)
AM_RANGE(0xff4000, 0xff5fff) AM_WRITE(atarigen_playfield_w) AM_BASE(&atarigen_playfield)

2
src/mame/drivers/atarig42.c
View File

@ -365,7 +365,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xf60000, 0xf60001) AM_READ(asic65_r)
AM_RANGE(0xf80000, 0xf80003) AM_WRITE(asic65_data_w)
AM_RANGE(0xfa0000, 0xfa0fff) AM_READWRITE(atarigen_eeprom_r, atarigen_eeprom_w) AM_BASE(&atarigen_eeprom) AM_SIZE(&atarigen_eeprom_size)
AM_RANGE(0xfc0000, 0xfc0fff) AM_READWRITE(MRA16_RAM, atarigen_666_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0xfc0000, 0xfc0fff) AM_READWRITE(SMH_RAM, atarigen_666_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0xff0000, 0xff0fff) AM_WRITE(atarirle_0_spriteram_w) AM_BASE(&atarirle_0_spriteram)
AM_RANGE(0xff2000, 0xff5fff) AM_WRITE(atarigen_playfield_w) AM_BASE(&atarigen_playfield)
AM_RANGE(0xff6000, 0xff6fff) AM_WRITE(atarigen_alpha_w) AM_BASE(&atarigen_alpha)

2
src/mame/drivers/atarigt.c
View File

@ -628,7 +628,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0xe08000, 0xe08003) AM_WRITE(latch_w)
AM_RANGE(0xe0a000, 0xe0a003) AM_WRITE(atarigen_scanline_int_ack32_w)
AM_RANGE(0xe0c000, 0xe0c003) AM_WRITE(atarigen_video_int_ack32_w)
AM_RANGE(0xe0e000, 0xe0e003) AM_WRITE(MWA32_NOP)//watchdog_reset_w },
AM_RANGE(0xe0e000, 0xe0e003) AM_WRITE(SMH_NOP)//watchdog_reset_w },
AM_RANGE(0xe80000, 0xe80003) AM_READ(inputs_01_r)
AM_RANGE(0xe82000, 0xe82003) AM_READ(special_port2_r)
AM_RANGE(0xe82004, 0xe82007) AM_READ(special_port3_r)

4
src/mame/drivers/atarigx2.c
View File

@ -1188,7 +1188,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0xca0000, 0xca0fff) AM_READWRITE(atarigx2_protection_r, atarigx2_protection_w) AM_BASE(&protection_base)
AM_RANGE(0xd00000, 0xd1ffff) AM_READ(a2d_data_r)
AM_RANGE(0xd20000, 0xd20fff) AM_READWRITE(atarigen_eeprom_upper32_r, atarigen_eeprom32_w) AM_BASE((UINT32 **)&atarigen_eeprom) AM_SIZE(&atarigen_eeprom_size)
AM_RANGE(0xd40000, 0xd40fff) AM_READWRITE(MRA32_RAM, atarigen_666_paletteram32_w) AM_BASE(&paletteram32)
AM_RANGE(0xd40000, 0xd40fff) AM_READWRITE(SMH_RAM, atarigen_666_paletteram32_w) AM_BASE(&paletteram32)
AM_RANGE(0xd72000, 0xd75fff) AM_WRITE(atarigen_playfield32_w) AM_BASE(&atarigen_playfield32)
AM_RANGE(0xd76000, 0xd76fff) AM_WRITE(atarigen_alpha32_w) AM_BASE(&atarigen_alpha32)
AM_RANGE(0xd78000, 0xd78fff) AM_WRITE(atarirle_0_spriteram32_w) AM_BASE(&atarirle_0_spriteram32)
@ -1198,7 +1198,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0xe06000, 0xe06003) AM_WRITE(atarigen_sound_upper32_w)
AM_RANGE(0xe08000, 0xe08003) AM_WRITE(latch_w)
AM_RANGE(0xe0c000, 0xe0c003) AM_WRITE(atarigen_video_int_ack32_w)
AM_RANGE(0xe0e000, 0xe0e003) AM_WRITE(MWA32_NOP)//watchdog_reset_w },
AM_RANGE(0xe0e000, 0xe0e003) AM_WRITE(SMH_NOP)//watchdog_reset_w },
AM_RANGE(0xe80000, 0xe80003) AM_READ(inputs_01_r)
AM_RANGE(0xe82000, 0xe82003) AM_READ(special_port2_r)
AM_RANGE(0xe82004, 0xe82007) AM_READ(special_port3_r)

8
src/mame/drivers/atarisy1.c
View File

@ -463,10 +463,10 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x8a0000, 0x8a0001) AM_WRITE(atarigen_video_int_ack_w)
AM_RANGE(0x8c0000, 0x8c0001) AM_WRITE(atarigen_eeprom_enable_w)
AM_RANGE(0x900000, 0x9fffff) AM_RAM
AM_RANGE(0xa00000, 0xa01fff) AM_READWRITE(MRA16_RAM, atarigen_playfield_w) AM_BASE(&atarigen_playfield)
AM_RANGE(0xa02000, 0xa02fff) AM_READWRITE(MRA16_RAM, atarisy1_spriteram_w) AM_BASE(&atarimo_0_spriteram)
AM_RANGE(0xa03000, 0xa03fff) AM_READWRITE(MRA16_RAM, atarigen_alpha_w) AM_BASE(&atarigen_alpha)
AM_RANGE(0xb00000, 0xb007ff) AM_READWRITE(MRA16_RAM, paletteram16_IIIIRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xa00000, 0xa01fff) AM_READWRITE(SMH_RAM, atarigen_playfield_w) AM_BASE(&atarigen_playfield)
AM_RANGE(0xa02000, 0xa02fff) AM_READWRITE(SMH_RAM, atarisy1_spriteram_w) AM_BASE(&atarimo_0_spriteram)
AM_RANGE(0xa03000, 0xa03fff) AM_READWRITE(SMH_RAM, atarigen_alpha_w) AM_BASE(&atarigen_alpha)
AM_RANGE(0xb00000, 0xb007ff) AM_READWRITE(SMH_RAM, paletteram16_IIIIRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xf00000, 0xf00fff) AM_READWRITE(atarigen_eeprom_r, atarigen_eeprom_w) AM_BASE(&atarigen_eeprom) AM_SIZE(&atarigen_eeprom_size)
AM_RANGE(0xf20000, 0xf20007) AM_READ(trakball_r)
AM_RANGE(0xf40000, 0xf4001f) AM_READWRITE(joystick_r, joystick_w)

2
src/mame/drivers/atarisy2.c
View File

@ -710,7 +710,7 @@ static WRITE8_HANDLER( coincount_w )
/* full memory map derived from schematics */
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x0000, 0x0fff) AM_RAM
AM_RANGE(0x1000, 0x11ff) AM_MIRROR(0x0200) AM_READWRITE(MRA16_RAM, atarisy2_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0x1000, 0x11ff) AM_MIRROR(0x0200) AM_READWRITE(SMH_RAM, atarisy2_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0x1400, 0x1403) AM_MIRROR(0x007c) AM_READWRITE(adc_r, bankselect_w) AM_BASE(&bankselect)
AM_RANGE(0x1480, 0x1487) AM_MIRROR(0x0078) AM_WRITE(adc_strobe_w)
AM_RANGE(0x1580, 0x1581) AM_MIRROR(0x001e) AM_WRITE(int0_ack_w)

2
src/mame/drivers/ataxx.c
View File

@ -792,7 +792,7 @@ static DRIVER_INIT( asylum )
leland_rotate_memory(1);
/* asylum appears to have some extra RAM for the slave CPU */
memory_install_readwrite8_handler(1, ADDRESS_SPACE_PROGRAM, 0xf000, 0xfffb, 0, 0, MRA8_BANK4, MWA8_BANK4);
memory_install_readwrite8_handler(1, ADDRESS_SPACE_PROGRAM, 0xf000, 0xfffb, 0, 0, SMH_BANK4, SMH_BANK4);
memory_set_bankptr(4, auto_malloc(0x1000));
/* set up additional input ports */

12
src/mame/drivers/atetris.c
View File

@ -201,9 +201,9 @@ static WRITE8_HANDLER( nvram_enable_w )
/* full address map derived from schematics */
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_RAM
AM_RANGE(0x1000, 0x1fff) AM_READWRITE(MRA8_RAM, atetris_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x2000, 0x20ff) AM_MIRROR(0x0300) AM_READWRITE(MRA8_RAM, paletteram_RRRGGGBB_w) AM_BASE(&paletteram)
AM_RANGE(0x2400, 0x25ff) AM_MIRROR(0x0200) AM_READWRITE(MRA8_RAM, nvram_w) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x1000, 0x1fff) AM_READWRITE(SMH_RAM, atetris_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x2000, 0x20ff) AM_MIRROR(0x0300) AM_READWRITE(SMH_RAM, paletteram_RRRGGGBB_w) AM_BASE(&paletteram)
AM_RANGE(0x2400, 0x25ff) AM_MIRROR(0x0200) AM_READWRITE(SMH_RAM, nvram_w) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x2800, 0x280f) AM_MIRROR(0x03e0) AM_READWRITE(pokey1_r, pokey1_w)
AM_RANGE(0x2810, 0x281f) AM_MIRROR(0x03e0) AM_READWRITE(pokey2_r, pokey2_w)
AM_RANGE(0x3000, 0x3000) AM_MIRROR(0x03ff) AM_WRITE(watchdog_reset_w)
@ -218,9 +218,9 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( atetrsb2_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_RAM
AM_RANGE(0x1000, 0x1fff) AM_READWRITE(MRA8_RAM, atetris_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x2000, 0x20ff) AM_READWRITE(MRA8_RAM, paletteram_RRRGGGBB_w) AM_BASE(&paletteram)
AM_RANGE(0x2400, 0x25ff) AM_READWRITE(MRA8_RAM, nvram_w) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x1000, 0x1fff) AM_READWRITE(SMH_RAM, atetris_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x2000, 0x20ff) AM_READWRITE(SMH_RAM, paletteram_RRRGGGBB_w) AM_BASE(&paletteram)
AM_RANGE(0x2400, 0x25ff) AM_READWRITE(SMH_RAM, nvram_w) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x2802, 0x2802) AM_WRITE(SN76496_0_w)
AM_RANGE(0x2804, 0x2804) AM_WRITE(SN76496_1_w)
AM_RANGE(0x2806, 0x2806) AM_WRITE(SN76496_2_w)

2
src/mame/drivers/avalnche.c
View File

@ -134,7 +134,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2000, 0x2000) AM_MIRROR(0x0ffc) AM_READ(input_port_0_r)
AM_RANGE(0x2001, 0x2001) AM_MIRROR(0x0ffc) AM_READ(input_port_1_r)
AM_RANGE(0x2002, 0x2002) AM_MIRROR(0x0ffc) AM_READ(input_port_2_r)
AM_RANGE(0x2003, 0x2003) AM_MIRROR(0x0ffc) AM_READ(MRA8_NOP)
AM_RANGE(0x2003, 0x2003) AM_MIRROR(0x0ffc) AM_READ(SMH_NOP)
AM_RANGE(0x3000, 0x3000) AM_MIRROR(0x0fff) AM_WRITE(watchdog_reset_w)
AM_RANGE(0x4000, 0x4000) AM_MIRROR(0x0ff8) AM_WRITE(avalance_credit_1_lamp_w)
AM_RANGE(0x4001, 0x4001) AM_MIRROR(0x0ff8) AM_WRITE(avalnche_attract_enable_w)

2
src/mame/drivers/aztarac.c
View File

@ -74,7 +74,7 @@ static READ16_HANDLER( joystick_r )
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x00bfff) AM_ROM
AM_RANGE(0x022000, 0x0220ff) AM_READWRITE(nvram_r, MWA16_RAM) AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x022000, 0x0220ff) AM_READWRITE(nvram_r, SMH_RAM) AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x027000, 0x027001) AM_READ(joystick_r)
AM_RANGE(0x027004, 0x027005) AM_READ(input_port_3_word_r)
AM_RANGE(0x027008, 0x027009) AM_READWRITE(aztarac_sound_r, aztarac_sound_w)

2
src/mame/drivers/backfire.c
View File

@ -348,7 +348,7 @@ static ADDRESS_MAP_START( backfire_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x1a8000, 0x1a8003) AM_RAM AM_BASE(&backfire_left_priority)
AM_RANGE(0x1ac000, 0x1ac003) AM_RAM AM_BASE(&backfire_right_priority)
// AM_RANGE(0x1b0000, 0x1b0003) AM_WRITE(MWA32_NOP) // always 1b0000
// AM_RANGE(0x1b0000, 0x1b0003) AM_WRITE(SMH_NOP) // always 1b0000
/* when set to pentometer in test mode */
// AM_RANGE(0x1e4000, 0x1e4003) AM_READ(backfire_unknown_wheel_r)

6
src/mame/drivers/badlands.c
View File

@ -325,9 +325,9 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xfea000, 0xfebfff) AM_READ(atarigen_sound_upper_r)
AM_RANGE(0xfec000, 0xfedfff) AM_WRITE(badlands_pf_bank_w)
AM_RANGE(0xfee000, 0xfeffff) AM_WRITE(atarigen_eeprom_enable_w)
AM_RANGE(0xffc000, 0xffc3ff) AM_READWRITE(MRA16_RAM, atarigen_expanded_666_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0xffe000, 0xffefff) AM_READWRITE(MRA16_RAM, atarigen_playfield_w) AM_BASE(&atarigen_playfield)
AM_RANGE(0xfff000, 0xfff1ff) AM_READWRITE(MRA16_RAM, atarimo_0_spriteram_expanded_w) AM_BASE(&atarimo_0_spriteram)
AM_RANGE(0xffc000, 0xffc3ff) AM_READWRITE(SMH_RAM, atarigen_expanded_666_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0xffe000, 0xffefff) AM_READWRITE(SMH_RAM, atarigen_playfield_w) AM_BASE(&atarigen_playfield)
AM_RANGE(0xfff000, 0xfff1ff) AM_READWRITE(SMH_RAM, atarimo_0_spriteram_expanded_w) AM_BASE(&atarimo_0_spriteram)
AM_RANGE(0xfff200, 0xffffff) AM_RAM
ADDRESS_MAP_END

58
src/mame/drivers/bagman.c
View File

@ -193,66 +193,66 @@ static WRITE8_HANDLER( bagman_coin_counter_w )
}
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_READ(MRA8_ROM)
AM_RANGE(0x6000, 0x67ff) AM_READ(MRA8_RAM)
AM_RANGE(0x9000, 0x93ff) AM_READ(MRA8_RAM)
AM_RANGE(0x9800, 0x9bff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
AM_RANGE(0x6000, 0x67ff) AM_READ(SMH_RAM)
AM_RANGE(0x9000, 0x93ff) AM_READ(SMH_RAM)
AM_RANGE(0x9800, 0x9bff) AM_READ(SMH_RAM)
AM_RANGE(0xa000, 0xa000) AM_READ(bagman_pal16r6_r)
//AM_RANGE(0xa800, 0xa805) AM_READ(bagman_ls259_r) /*just for debugging purposes*/
AM_RANGE(0xb000, 0xb000) AM_READ(input_port_2_r) /* DSW */
AM_RANGE(0xb800, 0xb800) AM_READ(MRA8_NOP)
AM_RANGE(0xc000, 0xffff) AM_READ(MRA8_ROM) /* Super Bagman only */
AM_RANGE(0xb800, 0xb800) AM_READ(SMH_NOP)
AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM) /* Super Bagman only */
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x6000, 0x67ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x6000, 0x67ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x9000, 0x93ff) AM_WRITE(bagman_videoram_w) AM_BASE(&videoram)
AM_RANGE(0x9800, 0x9bff) AM_WRITE(bagman_colorram_w) AM_BASE(&colorram)
AM_RANGE(0xa000, 0xa000) AM_WRITE(interrupt_enable_w)
AM_RANGE(0xa001, 0xa002) AM_WRITE(bagman_flipscreen_w)
AM_RANGE(0xa003, 0xa003) AM_WRITE(MWA8_RAM) AM_BASE(&bagman_video_enable)
AM_RANGE(0xc000, 0xffff) AM_WRITE(MWA8_ROM) /* Super Bagman only */
AM_RANGE(0x9800, 0x981f) AM_WRITE(MWA8_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* hidden portion of color RAM */
AM_RANGE(0xa003, 0xa003) AM_WRITE(SMH_RAM) AM_BASE(&bagman_video_enable)
AM_RANGE(0xc000, 0xffff) AM_WRITE(SMH_ROM) /* Super Bagman only */
AM_RANGE(0x9800, 0x981f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* hidden portion of color RAM */
/* here only to initialize the pointer, */
/* writes are handled by bagman_colorram_w */
AM_RANGE(0xa800, 0xa805) AM_WRITE(bagman_ls259_w) /* TMS5110 driving state machine */
AM_RANGE(0x9c00, 0x9fff) AM_WRITE(MWA8_NOP) /* written to, but unused */
AM_RANGE(0x9c00, 0x9fff) AM_WRITE(SMH_NOP) /* written to, but unused */
AM_RANGE(0xa004, 0xa004) AM_WRITE(bagman_coin_counter_w)
#if 0
AM_RANGE(0xa007, 0xa007) AM_WRITE(MWA8_NOP) /* ???? */
AM_RANGE(0xb000, 0xb000) AM_WRITE(MWA8_NOP) /* ???? */
AM_RANGE(0xb800, 0xb800) AM_WRITE(MWA8_NOP) /* ???? */
AM_RANGE(0xa007, 0xa007) AM_WRITE(SMH_NOP) /* ???? */
AM_RANGE(0xb000, 0xb000) AM_WRITE(SMH_NOP) /* ???? */
AM_RANGE(0xb800, 0xb800) AM_WRITE(SMH_NOP) /* ???? */
#endif
ADDRESS_MAP_END
static ADDRESS_MAP_START( pickin_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_READ(MRA8_ROM)
AM_RANGE(0x7000, 0x77ff) AM_READ(MRA8_RAM)
AM_RANGE(0x8800, 0x8bff) AM_READ(MRA8_RAM)
AM_RANGE(0x9800, 0x9bff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
AM_RANGE(0x7000, 0x77ff) AM_READ(SMH_RAM)
AM_RANGE(0x8800, 0x8bff) AM_READ(SMH_RAM)
AM_RANGE(0x9800, 0x9bff) AM_READ(SMH_RAM)
AM_RANGE(0xa800, 0xa800) AM_READ(input_port_2_r)
AM_RANGE(0xb800, 0xb800) AM_READ(MRA8_NOP)
AM_RANGE(0xb800, 0xb800) AM_READ(SMH_NOP)
ADDRESS_MAP_END
static ADDRESS_MAP_START( pickin_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x7000, 0x77ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x7000, 0x77ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x8800, 0x8bff) AM_WRITE(bagman_videoram_w) AM_BASE(&videoram)
AM_RANGE(0x9800, 0x9bff) AM_WRITE(bagman_colorram_w) AM_BASE(&colorram)
AM_RANGE(0xa000, 0xa000) AM_WRITE(interrupt_enable_w)
AM_RANGE(0xa001, 0xa002) AM_WRITE(bagman_flipscreen_w)
AM_RANGE(0xa003, 0xa003) AM_WRITE(MWA8_RAM) AM_BASE(&bagman_video_enable)
AM_RANGE(0x9800, 0x981f) AM_WRITE(MWA8_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* hidden portion of color RAM */
AM_RANGE(0xa003, 0xa003) AM_WRITE(SMH_RAM) AM_BASE(&bagman_video_enable)
AM_RANGE(0x9800, 0x981f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* hidden portion of color RAM */
/* here only to initialize the pointer, */
/* writes are handled by bagman_colorram_w */
AM_RANGE(0x9c00, 0x9fff) AM_WRITE(MWA8_NOP) /* written to, but unused */
AM_RANGE(0x9c00, 0x9fff) AM_WRITE(SMH_NOP) /* written to, but unused */
AM_RANGE(0xa004, 0xa004) AM_WRITE(bagman_coin_counter_w)
#if 0
AM_RANGE(0xa007, 0xa007) AM_WRITE(MWA8_NOP) /* ???? */
AM_RANGE(0xb000, 0xb000) AM_WRITE(MWA8_NOP) /* ???? */
AM_RANGE(0xb800, 0xb800) AM_WRITE(MWA8_NOP) /* ???? */
AM_RANGE(0xa007, 0xa007) AM_WRITE(SMH_NOP) /* ???? */
AM_RANGE(0xb000, 0xb000) AM_WRITE(SMH_NOP) /* ???? */
AM_RANGE(0xb800, 0xb800) AM_WRITE(SMH_NOP) /* ???? */
#endif
ADDRESS_MAP_END
@ -265,7 +265,7 @@ static ADDRESS_MAP_START( writeport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x08, 0x08) AM_WRITE(AY8910_control_port_0_w)
AM_RANGE(0x09, 0x09) AM_WRITE(AY8910_write_port_0_w)
//AM_RANGE(0x56, 0x56) AM_WRITE(MWA8_NOP)
//AM_RANGE(0x56, 0x56) AM_WRITE(SMH_NOP)
ADDRESS_MAP_END

6
src/mame/drivers/balsente.c
View File

@ -233,8 +233,8 @@ DIP locations verified for:
static ADDRESS_MAP_START( cpu1_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x07ff) AM_RAM AM_BASE(&spriteram)
AM_RANGE(0x0800, 0x7fff) AM_READWRITE(MRA8_RAM, balsente_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x8000, 0x8fff) AM_READWRITE(MRA8_RAM, balsente_paletteram_w) AM_BASE(&paletteram)
AM_RANGE(0x0800, 0x7fff) AM_READWRITE(SMH_RAM, balsente_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x8000, 0x8fff) AM_READWRITE(SMH_RAM, balsente_paletteram_w) AM_BASE(&paletteram)
AM_RANGE(0x9000, 0x9007) AM_WRITE(balsente_adc_select_w)
AM_RANGE(0x9400, 0x9401) AM_READ(balsente_adc_data_r)
AM_RANGE(0x9800, 0x987f) AM_WRITE(balsente_misc_output_w)
@ -245,7 +245,7 @@ static ADDRESS_MAP_START( cpu1_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x9900, 0x9900) AM_READ(input_port_0_r)
AM_RANGE(0x9901, 0x9901) AM_READ(input_port_1_r)
AM_RANGE(0x9902, 0x9902) AM_READ(input_port_2_r)
AM_RANGE(0x9903, 0x9903) AM_READWRITE(input_port_3_r, MWA8_NOP)
AM_RANGE(0x9903, 0x9903) AM_READWRITE(input_port_3_r, SMH_NOP)
AM_RANGE(0x9a00, 0x9a03) AM_READ(balsente_random_num_r)
AM_RANGE(0x9a04, 0x9a05) AM_READWRITE(balsente_m6850_r, balsente_m6850_w)
AM_RANGE(0x9b00, 0x9cff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size) /* system+cart NOVRAM */

10
src/mame/drivers/baraduke.c
View File

@ -179,7 +179,7 @@ static ADDRESS_MAP_START( baraduke_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8800, 0x8800) AM_WRITE(baraduke_irq_ack_w) /* irq acknowledge */
AM_RANGE(0xb000, 0xb002) AM_WRITE(baraduke_scroll0_w) /* scroll (layer 0) */
AM_RANGE(0xb004, 0xb006) AM_WRITE(baraduke_scroll1_w) /* scroll (layer 1) */
AM_RANGE(0x6000, 0xffff) AM_READ(MRA8_ROM) /* ROM */
AM_RANGE(0x6000, 0xffff) AM_READ(SMH_ROM) /* ROM */
ADDRESS_MAP_END
static READ8_HANDLER( soundkludge_r )
@ -194,11 +194,11 @@ static ADDRESS_MAP_START( mcu_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0080, 0x00ff) AM_RAM /* built in RAM */
AM_RANGE(0x1105, 0x1105) AM_READ(soundkludge_r) /* cures speech */
AM_RANGE(0x1000, 0x13ff) AM_READWRITE(namcos1_cus30_r,namcos1_cus30_w) AM_BASE(&namco_wavedata)/* PSG device, shared RAM */
AM_RANGE(0x8000, 0xbfff) AM_READ(MRA8_ROM) /* MCU external ROM */
AM_RANGE(0x8000, 0x8000) AM_WRITE(MWA8_NOP) /* watchdog reset? */
AM_RANGE(0x8800, 0x8800) AM_WRITE(MWA8_NOP) /* irq acknoledge? */
AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_ROM) /* MCU external ROM */
AM_RANGE(0x8000, 0x8000) AM_WRITE(SMH_NOP) /* watchdog reset? */
AM_RANGE(0x8800, 0x8800) AM_WRITE(SMH_NOP) /* irq acknoledge? */
AM_RANGE(0xc000, 0xc7ff) AM_RAM /* RAM */
AM_RANGE(0xf000, 0xffff) AM_READ(MRA8_ROM) /* MCU internal ROM */
AM_RANGE(0xf000, 0xffff) AM_READ(SMH_ROM) /* MCU internal ROM */
ADDRESS_MAP_END

2
src/mame/drivers/batman.c
View File

@ -131,7 +131,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x260050, 0x260051) AM_MIRROR(0x11ff8e) AM_WRITE(latch_w)
AM_RANGE(0x260060, 0x260061) AM_MIRROR(0x11ff8e) AM_WRITE(atarigen_eeprom_enable_w)
AM_RANGE(0x2a0000, 0x2a0001) AM_MIRROR(0x11fffe) AM_WRITE(watchdog_reset16_w)
AM_RANGE(0x3e0000, 0x3e0fff) AM_MIRROR(0x100000) AM_READWRITE(MRA16_RAM, atarigen_666_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0x3e0000, 0x3e0fff) AM_MIRROR(0x100000) AM_READWRITE(SMH_RAM, atarigen_666_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0x3effc0, 0x3effff) AM_MIRROR(0x100000) AM_READWRITE(atarivc_r, atarivc_w) AM_BASE(&atarivc_data)
AM_RANGE(0x3f0000, 0x3f1fff) AM_MIRROR(0x100000) AM_WRITE(atarigen_playfield2_latched_msb_w) AM_BASE(&atarigen_playfield2)
AM_RANGE(0x3f2000, 0x3f3fff) AM_MIRROR(0x100000) AM_WRITE(atarigen_playfield_latched_lsb_w) AM_BASE(&atarigen_playfield)

16
src/mame/drivers/battlera.c
View File

@ -75,19 +75,19 @@ static READ8_HANDLER( control_data_r )
/******************************************************************************/
static ADDRESS_MAP_START( battlera_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x000000, 0x0fffff) AM_READ(MRA8_ROM)
AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
AM_RANGE(0x100000, 0x10ffff) AM_READ(HuC6270_debug_r) /* Cheat to view vram data */
AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(MRA8_BANK8)
AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_BANK8)
AM_RANGE(0x1fe000, 0x1fe001) AM_READ(HuC6270_register_r)
AM_RANGE(0x1ff000, 0x1ff001) AM_READ(control_data_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( battlera_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x100000, 0x10ffff) AM_WRITE(HuC6270_debug_w) /* Cheat to edit vram data */
AM_RANGE(0x1e0800, 0x1e0801) AM_WRITE(battlera_sound_w)
AM_RANGE(0x1e1000, 0x1e13ff) AM_WRITE(battlera_palette_w) AM_BASE(&paletteram)
AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(MWA8_BANK8) /* Main ram */
AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_BANK8) /* Main ram */
AM_RANGE(0x1fe000, 0x1fe001) AM_WRITE(HuC6270_register_w)
AM_RANGE(0x1fe002, 0x1fe003) AM_WRITE(HuC6270_data_w)
AM_RANGE(0x1ff000, 0x1ff001) AM_WRITE(control_data_w)
@ -134,17 +134,17 @@ static WRITE8_HANDLER( battlera_adpcm_reset_w )
}
static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x000000, 0x00ffff) AM_READ(MRA8_ROM)
AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(MRA8_BANK7) /* Main ram */
AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM)
AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_BANK7) /* Main ram */
AM_RANGE(0x1ff000, 0x1ff001) AM_READ(soundlatch_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x000000, 0x00ffff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x040000, 0x040001) AM_WRITE(YM2203_w)
AM_RANGE(0x080000, 0x080001) AM_WRITE(battlera_adpcm_data_w)
AM_RANGE(0x1fe800, 0x1fe80f) AM_WRITE(C6280_0_w)
AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(MWA8_BANK7) /* Main ram */
AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_BANK7) /* Main ram */
AM_RANGE(0x1ff000, 0x1ff001) AM_WRITE(battlera_adpcm_reset_w)
AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(H6280_irq_status_w)
ADDRESS_MAP_END

18
src/mame/drivers/battlex.c
View File

@ -59,18 +59,18 @@ extern VIDEO_UPDATE( battlex );
/*** MEMORY & PORT READ / WRITE **********************************************/
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_READ(MRA8_ROM)
AM_RANGE(0x8000, 0x8fff) AM_READ(MRA8_RAM) /* not read? */
AM_RANGE(0x9000, 0x91ff) AM_READ(MRA8_RAM) /* not read? */
AM_RANGE(0xa000, 0xa3ff) AM_READ(MRA8_RAM)
AM_RANGE(0xe000, 0xe03f) AM_READ(MRA8_RAM) /* not read? */
AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x8fff) AM_READ(SMH_RAM) /* not read? */
AM_RANGE(0x9000, 0x91ff) AM_READ(SMH_RAM) /* not read? */
AM_RANGE(0xa000, 0xa3ff) AM_READ(SMH_RAM)
AM_RANGE(0xe000, 0xe03f) AM_READ(SMH_RAM) /* not read? */
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0x8fff) AM_WRITE(battlex_videoram_w) AM_BASE(&videoram)
AM_RANGE(0x9000, 0x91ff) AM_WRITE(MWA8_RAM) AM_BASE(&spriteram)
AM_RANGE(0xa000, 0xa3ff) AM_WRITE(MWA8_RAM) /* main */
AM_RANGE(0x9000, 0x91ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram)
AM_RANGE(0xa000, 0xa3ff) AM_WRITE(SMH_RAM) /* main */
AM_RANGE(0xe000, 0xe03f) AM_WRITE(battlex_palette_w) /* probably palette */
ADDRESS_MAP_END
@ -92,7 +92,7 @@ static ADDRESS_MAP_START( writeport, ADDRESS_SPACE_IO, 8 )
/* 0x30 looks like scroll, but can't be ? changes (increases or decreases)
depending on the direction your ship is facing on lev 2. at least */
AM_RANGE(0x30, 0x30) AM_WRITE(MWA8_NOP)
AM_RANGE(0x30, 0x30) AM_WRITE(SMH_NOP)
AM_RANGE(0x32, 0x32) AM_WRITE(battlex_scroll_x_lsb_w)
AM_RANGE(0x33, 0x33) AM_WRITE(battlex_scroll_x_msb_w)

18
src/mame/drivers/battlnts.c
View File

@ -53,14 +53,14 @@ static ADDRESS_MAP_START( battlnts_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_READ(K007342_r) /* Color RAM + Video RAM */
AM_RANGE(0x2000, 0x21ff) AM_READ(K007420_r) /* Sprite RAM */
AM_RANGE(0x2200, 0x23ff) AM_READ(K007342_scroll_r) /* Scroll RAM */
AM_RANGE(0x2400, 0x24ff) AM_READ(MRA8_RAM) /* Palette */
AM_RANGE(0x2400, 0x24ff) AM_READ(SMH_RAM) /* Palette */
AM_RANGE(0x2e00, 0x2e00) AM_READ(input_port_0_r) /* DIPSW #1 */
AM_RANGE(0x2e01, 0x2e01) AM_READ(input_port_4_r) /* 2P controls */
AM_RANGE(0x2e02, 0x2e02) AM_READ(input_port_3_r) /* 1P controls */
AM_RANGE(0x2e03, 0x2e03) AM_READ(input_port_2_r) /* coinsw, testsw, startsw */
AM_RANGE(0x2e04, 0x2e04) AM_READ(input_port_1_r) /* DISPW #2 */
AM_RANGE(0x4000, 0x7fff) AM_READ(MRA8_BANK1) /* banked ROM */
AM_RANGE(0x8000, 0xffff) AM_READ(MRA8_ROM) /* ROM 777e02.bin */
AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1) /* banked ROM */
AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM) /* ROM 777e02.bin */
ADDRESS_MAP_END
static ADDRESS_MAP_START( battlnts_writemem, ADDRESS_SPACE_PROGRAM, 8 )
@ -74,21 +74,21 @@ static ADDRESS_MAP_START( battlnts_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2e10, 0x2e10) AM_WRITE(watchdog_reset_w) /* watchdog reset */
AM_RANGE(0x2e14, 0x2e14) AM_WRITE(soundlatch_w) /* sound code # */
AM_RANGE(0x2e18, 0x2e18) AM_WRITE(battlnts_sh_irqtrigger_w)/* cause interrupt on audio CPU */
AM_RANGE(0x4000, 0x7fff) AM_WRITE(MWA8_ROM) /* banked ROM */
AM_RANGE(0x8000, 0xffff) AM_WRITE(MWA8_ROM) /* ROM 777e02.bin */
AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM) /* banked ROM */
AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM) /* ROM 777e02.bin */
ADDRESS_MAP_END
static ADDRESS_MAP_START( battlnts_readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(MRA8_ROM) /* ROM 777c01.rom */
AM_RANGE(0x8000, 0x87ff) AM_READ(MRA8_RAM) /* RAM */
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM) /* ROM 777c01.rom */
AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM) /* RAM */
AM_RANGE(0xa000, 0xa000) AM_READ(YM3812_status_port_0_r) /* YM3812 (chip 1) */
AM_RANGE(0xc000, 0xc000) AM_READ(YM3812_status_port_1_r) /* YM3812 (chip 2) */
AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_r) /* soundlatch_r */
ADDRESS_MAP_END
static ADDRESS_MAP_START( battlnts_writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(MWA8_ROM) /* ROM 777c01.rom */
AM_RANGE(0x8000, 0x87ff) AM_WRITE(MWA8_RAM) /* RAM */
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM) /* ROM 777c01.rom */
AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM) /* RAM */
AM_RANGE(0xa000, 0xa000) AM_WRITE(YM3812_control_port_0_w) /* YM3812 (chip 1) */
AM_RANGE(0xa001, 0xa001) AM_WRITE(YM3812_write_port_0_w) /* YM3812 (chip 1) */
AM_RANGE(0xc000, 0xc000) AM_WRITE(YM3812_control_port_1_w) /* YM3812 (chip 2) */

72
src/mame/drivers/bbusters.c
View File

@ -291,14 +291,14 @@ static READ16_HANDLER( mechatt_gun_r )
/*******************************************************************************/
static ADDRESS_MAP_START( bbuster_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_READ(MRA16_ROM)
AM_RANGE(0x080000, 0x08ffff) AM_READ(MRA16_RAM)
AM_RANGE(0x090000, 0x090fff) AM_READ(MRA16_RAM)
AM_RANGE(0x0a0000, 0x0a0fff) AM_READ(MRA16_RAM)
AM_RANGE(0x0a8000, 0x0a8fff) AM_READ(MRA16_RAM)
AM_RANGE(0x0b0000, 0x0b1fff) AM_READ(MRA16_RAM)
AM_RANGE(0x0b2000, 0x0b3fff) AM_READ(MRA16_RAM)
AM_RANGE(0x0d0000, 0x0d0fff) AM_READ(MRA16_RAM)
AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
AM_RANGE(0x080000, 0x08ffff) AM_READ(SMH_RAM)
AM_RANGE(0x090000, 0x090fff) AM_READ(SMH_RAM)
AM_RANGE(0x0a0000, 0x0a0fff) AM_READ(SMH_RAM)
AM_RANGE(0x0a8000, 0x0a8fff) AM_READ(SMH_RAM)
AM_RANGE(0x0b0000, 0x0b1fff) AM_READ(SMH_RAM)
AM_RANGE(0x0b2000, 0x0b3fff) AM_READ(SMH_RAM)
AM_RANGE(0x0d0000, 0x0d0fff) AM_READ(SMH_RAM)
AM_RANGE(0x0e0000, 0x0e0001) AM_READ(input_port_2_word_r) /* Coins */
AM_RANGE(0x0e0002, 0x0e0003) AM_READ(input_port_0_word_r) /* Player 1 & 2 */
AM_RANGE(0x0e0004, 0x0e0005) AM_READ(input_port_1_word_r) /* Player 3 */
@ -311,32 +311,32 @@ static ADDRESS_MAP_START( bbuster_readmem, ADDRESS_SPACE_PROGRAM, 16 )
ADDRESS_MAP_END
static ADDRESS_MAP_START( bbuster_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_WRITE(MWA16_ROM)
AM_RANGE(0x080000, 0x08ffff) AM_WRITE(MWA16_RAM) AM_BASE(&bbuster_ram)
AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x080000, 0x08ffff) AM_WRITE(SMH_RAM) AM_BASE(&bbuster_ram)
AM_RANGE(0x090000, 0x090fff) AM_WRITE(bbuster_video_w) AM_BASE(&videoram16)
AM_RANGE(0x0a0000, 0x0a0fff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x0a8000, 0x0a8fff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16_2) AM_SIZE(&spriteram_2_size)
AM_RANGE(0x0a0000, 0x0a0fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x0a8000, 0x0a8fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2) AM_SIZE(&spriteram_2_size)
AM_RANGE(0x0b0000, 0x0b1fff) AM_WRITE(bbuster_pf1_w) AM_BASE(&bbuster_pf1_data)
AM_RANGE(0x0b2000, 0x0b3fff) AM_WRITE(bbuster_pf2_w) AM_BASE(&bbuster_pf2_data)
AM_RANGE(0x0b8000, 0x0b8003) AM_WRITE(MWA16_RAM) AM_BASE(&bbuster_pf1_scroll_data)
AM_RANGE(0x0b8008, 0x0b800b) AM_WRITE(MWA16_RAM) AM_BASE(&bbuster_pf2_scroll_data)
AM_RANGE(0x0b8000, 0x0b8003) AM_WRITE(SMH_RAM) AM_BASE(&bbuster_pf1_scroll_data)
AM_RANGE(0x0b8008, 0x0b800b) AM_WRITE(SMH_RAM) AM_BASE(&bbuster_pf2_scroll_data)
AM_RANGE(0x0d0000, 0x0d0fff) AM_WRITE(paletteram16_RRRRGGGGBBBBxxxx_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x0e8000, 0x0e8001) AM_WRITE(gun_select_w)
AM_RANGE(0x0f0008, 0x0f0009) AM_WRITE(MWA16_NOP)
AM_RANGE(0x0f0008, 0x0f0009) AM_WRITE(SMH_NOP)
AM_RANGE(0x0f0018, 0x0f0019) AM_WRITE(sound_cpu_w)
AM_RANGE(0x0f8000, 0x0f80ff) AM_WRITE(MWA16_RAM) AM_BASE(&eprom_data) /* Eeprom */
AM_RANGE(0x0f8000, 0x0f80ff) AM_WRITE(SMH_RAM) AM_BASE(&eprom_data) /* Eeprom */
ADDRESS_MAP_END
/*******************************************************************************/
static ADDRESS_MAP_START( mechatt_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x06ffff) AM_READ(MRA16_ROM)
AM_RANGE(0x070000, 0x07ffff) AM_READ(MRA16_RAM)
AM_RANGE(0x090000, 0x090fff) AM_READ(MRA16_RAM)
AM_RANGE(0x0a0000, 0x0a0fff) AM_READ(MRA16_RAM)
AM_RANGE(0x0b0000, 0x0b3fff) AM_READ(MRA16_RAM)
AM_RANGE(0x0c0000, 0x0c3fff) AM_READ(MRA16_RAM)
AM_RANGE(0x0d0000, 0x0d07ff) AM_READ(MRA16_RAM)
AM_RANGE(0x000000, 0x06ffff) AM_READ(SMH_ROM)
AM_RANGE(0x070000, 0x07ffff) AM_READ(SMH_RAM)
AM_RANGE(0x090000, 0x090fff) AM_READ(SMH_RAM)
AM_RANGE(0x0a0000, 0x0a0fff) AM_READ(SMH_RAM)
AM_RANGE(0x0b0000, 0x0b3fff) AM_READ(SMH_RAM)
AM_RANGE(0x0c0000, 0x0c3fff) AM_READ(SMH_RAM)
AM_RANGE(0x0d0000, 0x0d07ff) AM_READ(SMH_RAM)
AM_RANGE(0x0e0000, 0x0e0001) AM_READ(input_port_0_word_r)
AM_RANGE(0x0e0002, 0x0e0003) AM_READ(input_port_1_word_r)
AM_RANGE(0x0e0004, 0x0e0007) AM_READ(mechatt_gun_r)
@ -344,31 +344,31 @@ static ADDRESS_MAP_START( mechatt_readmem, ADDRESS_SPACE_PROGRAM, 16 )
ADDRESS_MAP_END
static ADDRESS_MAP_START( mechatt_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x06ffff) AM_WRITE(MWA16_ROM)
AM_RANGE(0x070000, 0x07ffff) AM_WRITE(MWA16_RAM) AM_BASE(&bbuster_ram)
AM_RANGE(0x000000, 0x06ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x070000, 0x07ffff) AM_WRITE(SMH_RAM) AM_BASE(&bbuster_ram)
AM_RANGE(0x090000, 0x090fff) AM_WRITE(bbuster_video_w) AM_BASE(&videoram16)
AM_RANGE(0x0a0000, 0x0a0fff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x0a1000, 0x0a7fff) AM_WRITE(MWA16_NOP)
AM_RANGE(0x0a0000, 0x0a0fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x0a1000, 0x0a7fff) AM_WRITE(SMH_NOP)
AM_RANGE(0x0b0000, 0x0b3fff) AM_WRITE(bbuster_pf1_w) AM_BASE(&bbuster_pf1_data)
AM_RANGE(0x0b8000, 0x0b8003) AM_WRITE(MWA16_RAM) AM_BASE(&bbuster_pf1_scroll_data)
AM_RANGE(0x0b8000, 0x0b8003) AM_WRITE(SMH_RAM) AM_BASE(&bbuster_pf1_scroll_data)
AM_RANGE(0x0c0000, 0x0c3fff) AM_WRITE(bbuster_pf2_w) AM_BASE(&bbuster_pf2_data)
AM_RANGE(0x0c8000, 0x0c8003) AM_WRITE(MWA16_RAM) AM_BASE(&bbuster_pf2_scroll_data)
AM_RANGE(0x0c8000, 0x0c8003) AM_WRITE(SMH_RAM) AM_BASE(&bbuster_pf2_scroll_data)
AM_RANGE(0x0d0000, 0x0d07ff) AM_WRITE(paletteram16_RRRRGGGGBBBBxxxx_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x0e4002, 0x0e4003) AM_WRITE(MWA16_NOP) /* Gun force feedback? */
AM_RANGE(0x0e4002, 0x0e4003) AM_WRITE(SMH_NOP) /* Gun force feedback? */
AM_RANGE(0x0e8000, 0x0e8001) AM_WRITE(sound_cpu_w)
ADDRESS_MAP_END
/******************************************************************************/
static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xefff) AM_READ(MRA8_ROM)
AM_RANGE(0xf000, 0xf7ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)
AM_RANGE(0xf800, 0xf800) AM_READ(soundlatch_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xefff) AM_WRITE(MWA8_ROM)
AM_RANGE(0xf000, 0xf7ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_readport, ADDRESS_SPACE_IO, 8 )
@ -383,7 +383,7 @@ static ADDRESS_MAP_START( sound_writeport, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x01, 0x01) AM_WRITE(YM2610_data_port_0_A_w)
AM_RANGE(0x02, 0x02) AM_WRITE(YM2610_control_port_0_B_w)
AM_RANGE(0x03, 0x03) AM_WRITE(YM2610_data_port_0_B_w)
AM_RANGE(0xc0, 0xc1) AM_WRITE(MWA8_NOP) /* -> Main CPU */
AM_RANGE(0xc0, 0xc1) AM_WRITE(SMH_NOP) /* -> Main CPU */
ADDRESS_MAP_END
static ADDRESS_MAP_START( sounda_readport, ADDRESS_SPACE_IO, 8 )
@ -398,7 +398,7 @@ static ADDRESS_MAP_START( sounda_writeport, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x01, 0x01) AM_WRITE(YM2608_data_port_0_A_w)
AM_RANGE(0x02, 0x02) AM_WRITE(YM2608_control_port_0_B_w)
AM_RANGE(0x03, 0x03) AM_WRITE(YM2608_data_port_0_B_w)
AM_RANGE(0xc0, 0xc1) AM_WRITE(MWA8_NOP) /* -> Main CPU */
AM_RANGE(0xc0, 0xc1) AM_WRITE(SMH_NOP) /* -> Main CPU */
ADDRESS_MAP_END
/******************************************************************************/

10
src/mame/drivers/beathead.c
View File

@ -345,7 +345,7 @@ static WRITE32_HANDLER( coin_count_w )
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x0001ffff) AM_RAM AM_BASE(&ram_base)
AM_RANGE(0x01800000, 0x01bfffff) AM_ROM AM_REGION(REGION_USER1, 0) AM_BASE(&rom_base)
AM_RANGE(0x40000000, 0x400007ff) AM_READWRITE(MRA32_RAM, eeprom_data_w) AM_BASE(&generic_nvram32) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x40000000, 0x400007ff) AM_READWRITE(SMH_RAM, eeprom_data_w) AM_BASE(&generic_nvram32) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x41000000, 0x41000003) AM_READWRITE(sound_data_r, sound_data_w)
AM_RANGE(0x41000100, 0x41000103) AM_READ(interrupt_control_r)
AM_RANGE(0x41000100, 0x4100011f) AM_WRITE(interrupt_control_w)
@ -355,18 +355,18 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x41000220, 0x41000227) AM_WRITE(coin_count_w)
AM_RANGE(0x41000300, 0x41000303) AM_READ(input_2_r)
AM_RANGE(0x41000304, 0x41000307) AM_READ(input_3_r)
AM_RANGE(0x41000400, 0x41000403) AM_WRITE(MWA32_RAM) AM_BASE(&beathead_palette_select)
AM_RANGE(0x41000400, 0x41000403) AM_WRITE(SMH_RAM) AM_BASE(&beathead_palette_select)
AM_RANGE(0x41000500, 0x41000503) AM_WRITE(eeprom_enable_w)
AM_RANGE(0x41000600, 0x41000603) AM_WRITE(beathead_finescroll_w)
AM_RANGE(0x41000700, 0x41000703) AM_WRITE(watchdog_reset32_w)
AM_RANGE(0x42000000, 0x4201ffff) AM_READWRITE(MRA32_RAM, beathead_palette_w) AM_BASE(&paletteram32)
AM_RANGE(0x42000000, 0x4201ffff) AM_READWRITE(SMH_RAM, beathead_palette_w) AM_BASE(&paletteram32)
AM_RANGE(0x43000000, 0x43000007) AM_READWRITE(beathead_hsync_ram_r, beathead_hsync_ram_w)
AM_RANGE(0x8df80000, 0x8df80003) AM_READ(MRA32_NOP) /* noisy x4 during scanline int */
AM_RANGE(0x8df80000, 0x8df80003) AM_READ(SMH_NOP) /* noisy x4 during scanline int */
AM_RANGE(0x8f380000, 0x8f3fffff) AM_WRITE(beathead_vram_latch_w)
AM_RANGE(0x8f900000, 0x8f97ffff) AM_WRITE(beathead_vram_transparent_w)
AM_RANGE(0x8f980000, 0x8f9fffff) AM_RAM AM_BASE(&videoram32)
AM_RANGE(0x8fb80000, 0x8fbfffff) AM_WRITE(beathead_vram_bulk_w)
AM_RANGE(0x8fff8000, 0x8fff8003) AM_WRITE(MWA32_RAM) AM_BASE(&beathead_vram_bulk_latch)
AM_RANGE(0x8fff8000, 0x8fff8003) AM_WRITE(SMH_RAM) AM_BASE(&beathead_vram_bulk_latch)
AM_RANGE(0x9e280000, 0x9e2fffff) AM_WRITE(beathead_vram_copy_w)
ADDRESS_MAP_END

18
src/mame/drivers/beezer.c
View File

@ -21,30 +21,30 @@ DRIVER_INIT( beezer );
WRITE8_HANDLER( beezer_bankswitch_w );
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_READ(MRA8_RAM)
AM_RANGE(0xc000, 0xcfff) AM_READ(MRA8_BANK1)
AM_RANGE(0xd000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_RAM)
AM_RANGE(0xc000, 0xcfff) AM_READ(SMH_BANK1)
AM_RANGE(0xd000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_WRITE(MWA8_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0xc000, 0xcfff) AM_WRITE(MWA8_BANK1)
AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_BANK1)
AM_RANGE(0xd000, 0xffff) AM_WRITE(beezer_bankswitch_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x07ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
// AM_RANGE(0x1000, 0x10ff) AM_READ(beezer_6840_r)
AM_RANGE(0x1800, 0x18ff) AM_READ(via_1_r)
AM_RANGE(0xe000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0xe000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x07ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
// AM_RANGE(0x1000, 0x10ff) AM_WRITE(beezer_6840_w)
AM_RANGE(0x1800, 0x18ff) AM_WRITE(via_1_w)
// AM_RANGE(0x8000, 0x9fff) AM_WRITE(beezer_dac_w)
AM_RANGE(0xe000, 0xffff) AM_WRITE(MWA8_ROM)
AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_ROM)
ADDRESS_MAP_END

28
src/mame/drivers/berzerk.c
View File

@ -559,7 +559,7 @@ static ADDRESS_MAP_START( berzerk_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0800, 0x0bff) AM_MIRROR(0x0400) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x1000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x5fff) AM_RAM AM_BASE(&berzerk_videoram) AM_SIZE(&berzerk_videoram_size) AM_SHARE(1)
AM_RANGE(0x6000, 0x7fff) AM_READWRITE(MRA8_RAM, magicram_w) AM_SHARE(1)
AM_RANGE(0x6000, 0x7fff) AM_READWRITE(SMH_RAM, magicram_w) AM_SHARE(1)
AM_RANGE(0x8000, 0x87ff) AM_MIRROR(0x3800) AM_RAM AM_BASE(&berzerk_colorram)
AM_RANGE(0xc000, 0xffff) AM_NOP
ADDRESS_MAP_END
@ -568,7 +568,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( frenzy_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x5fff) AM_RAM AM_BASE(&berzerk_videoram) AM_SIZE(&berzerk_videoram_size) AM_SHARE(1)
AM_RANGE(0x6000, 0x7fff) AM_READWRITE(MRA8_RAM, magicram_w) AM_SHARE(1)
AM_RANGE(0x6000, 0x7fff) AM_READWRITE(SMH_RAM, magicram_w) AM_SHARE(1)
AM_RANGE(0x8000, 0x87ff) AM_MIRROR(0x3800) AM_RAM AM_BASE(&berzerk_colorram)
AM_RANGE(0xc000, 0xcfff) AM_ROM
AM_RANGE(0xf800, 0xfbff) AM_MIRROR(0x0400) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
@ -586,22 +586,22 @@ static ADDRESS_MAP_START( berzerk_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x3f) AM_NOP
AM_RANGE(0x40, 0x47) AM_READWRITE(berzerk_audio_r, berzerk_audio_w)
AM_RANGE(0x48, 0x48) AM_READWRITE(input_port_0_r, MWA8_NOP)
AM_RANGE(0x49, 0x49) AM_READWRITE(input_port_1_r, MWA8_NOP)
AM_RANGE(0x4a, 0x4a) AM_READWRITE(input_port_2_r, MWA8_NOP)
AM_RANGE(0x4b, 0x4b) AM_READWRITE(MRA8_NOP, magicram_control_w)
AM_RANGE(0x48, 0x48) AM_READWRITE(input_port_0_r, SMH_NOP)
AM_RANGE(0x49, 0x49) AM_READWRITE(input_port_1_r, SMH_NOP)
AM_RANGE(0x4a, 0x4a) AM_READWRITE(input_port_2_r, SMH_NOP)
AM_RANGE(0x4b, 0x4b) AM_READWRITE(SMH_NOP, magicram_control_w)
AM_RANGE(0x4c, 0x4c) AM_READWRITE(nmi_enable_r, nmi_enable_w)
AM_RANGE(0x4d, 0x4d) AM_READWRITE(nmi_disable_r, nmi_disable_w)
AM_RANGE(0x4e, 0x4e) AM_READWRITE(intercept_v256_r, MWA8_NOP)
AM_RANGE(0x4f, 0x4f) AM_READWRITE(MRA8_NOP, irq_enable_w)
AM_RANGE(0x4e, 0x4e) AM_READWRITE(intercept_v256_r, SMH_NOP)
AM_RANGE(0x4f, 0x4f) AM_READWRITE(SMH_NOP, irq_enable_w)
AM_RANGE(0x50, 0x57) AM_NOP /* second sound board, but not used */
AM_RANGE(0x58, 0x5f) AM_NOP
AM_RANGE(0x60, 0x60) AM_MIRROR(0x18) AM_READWRITE(input_port_3_r, MWA8_NOP)
AM_RANGE(0x61, 0x61) AM_MIRROR(0x18) AM_READWRITE(input_port_4_r, MWA8_NOP)
AM_RANGE(0x62, 0x62) AM_MIRROR(0x18) AM_READWRITE(input_port_5_r, MWA8_NOP)
AM_RANGE(0x63, 0x63) AM_MIRROR(0x18) AM_READWRITE(input_port_6_r, MWA8_NOP)
AM_RANGE(0x64, 0x64) AM_MIRROR(0x18) AM_READWRITE(input_port_7_r, MWA8_NOP)
AM_RANGE(0x65, 0x65) AM_MIRROR(0x18) AM_READWRITE(input_port_8_r, MWA8_NOP)
AM_RANGE(0x60, 0x60) AM_MIRROR(0x18) AM_READWRITE(input_port_3_r, SMH_NOP)
AM_RANGE(0x61, 0x61) AM_MIRROR(0x18) AM_READWRITE(input_port_4_r, SMH_NOP)
AM_RANGE(0x62, 0x62) AM_MIRROR(0x18) AM_READWRITE(input_port_5_r, SMH_NOP)
AM_RANGE(0x63, 0x63) AM_MIRROR(0x18) AM_READWRITE(input_port_6_r, SMH_NOP)
AM_RANGE(0x64, 0x64) AM_MIRROR(0x18) AM_READWRITE(input_port_7_r, SMH_NOP)
AM_RANGE(0x65, 0x65) AM_MIRROR(0x18) AM_READWRITE(input_port_8_r, SMH_NOP)
AM_RANGE(0x66, 0x66) AM_MIRROR(0x18) AM_READWRITE(led_off_r, led_off_w)
AM_RANGE(0x67, 0x67) AM_MIRROR(0x18) AM_READWRITE(led_on_r, led_on_w)
AM_RANGE(0x80, 0xff) AM_NOP

12
src/mame/drivers/bfcobra.c
View File

@ -1083,10 +1083,10 @@ static MACHINE_RESET( bfcobra )
***************************************************************************/
static ADDRESS_MAP_START( z80_prog_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_READ(MRA8_BANK4)
AM_RANGE(0x4000, 0x7fff) AM_READWRITE(MRA8_BANK1, MWA8_BANK1)
AM_RANGE(0x8000, 0xbfff) AM_READWRITE(MRA8_BANK2, MWA8_BANK2)
AM_RANGE(0xc000, 0xffff) AM_READWRITE(MRA8_BANK3, MWA8_BANK3)
AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_BANK4)
AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK1, SMH_BANK1)
AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK2, SMH_BANK2)
AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK3, SMH_BANK3)
ADDRESS_MAP_END
static ADDRESS_MAP_START( z80_io_map, ADDRESS_SPACE_IO, 8 )
@ -1231,8 +1231,8 @@ static ADDRESS_MAP_START( m6809_prog_map, ADDRESS_SPACE_PROGRAM, 8 )
// AM_RANGE(0x340A, 0x340A) AM_NOP
// AM_RANGE(0x3600, 0x3600) AM_NOP
AM_RANGE(0x3801, 0x3801) AM_READWRITE(upd7759_r, upd7759_w)
AM_RANGE(0x8000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0xf000, 0xf000) AM_WRITE(MWA8_NOP) /* Watchdog */
AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
AM_RANGE(0xf000, 0xf000) AM_WRITE(SMH_NOP) /* Watchdog */
ADDRESS_MAP_END
static INPUT_PORTS_START( bfcobra )

2
src/mame/drivers/bfm_sc2.c
View File

@ -1558,7 +1558,7 @@ static ADDRESS_MAP_START( memmap_vid, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3FFF, 0x3FFF) AM_READ(coin_input_r)
AM_RANGE(0x4000, 0x5fff) AM_ROM // 8k fixed ROM
AM_RANGE(0x4000, 0xFFFF) AM_WRITE(unknown_w) // contains unknown I/O registers
AM_RANGE(0x6000, 0x7FFF) AM_READ(MRA8_BANK1) // 8k paged ROM (4 pages)
AM_RANGE(0x6000, 0x7FFF) AM_READ(SMH_BANK1) // 8k paged ROM (4 pages)
AM_RANGE(0x8000, 0xFFFF) AM_ROM // 32k ROM
ADDRESS_MAP_END

60
src/mame/drivers/bigevglf.c
View File

@ -304,28 +304,28 @@ INPUT_PORTS_END
/*****************************************************************************/
/* Main CPU */
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_READ(MRA8_ROM)
AM_RANGE(0xc000, 0xcfff) AM_READ(MRA8_RAM)
AM_RANGE(0xd000, 0xd7ff) AM_READ(MRA8_BANK1)
AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
AM_RANGE(0xc000, 0xcfff) AM_READ(SMH_RAM)
AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_BANK1)
AM_RANGE(0xd800, 0xdbff) AM_READ(beg_sharedram_r) /* only half of the RAM is accessible, line a10 of IC73 (6116) is GNDed */
AM_RANGE(0xf000, 0xf0ff) AM_READ(bigevglf_vidram_r) /* 41464 (64kB * 8 chips), addressed using ports 1 and 5 */
AM_RANGE(0xf840, 0xf8ff) AM_READ(MRA8_RAM)
AM_RANGE(0xf840, 0xf8ff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_WRITE(MWA8_ROM)
AM_RANGE(0xc000, 0xcfff) AM_WRITE(MWA8_RAM)
AM_RANGE(0xd000, 0xd7ff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM)
AM_RANGE(0xd000, 0xd7ff) AM_WRITE(SMH_ROM)
AM_RANGE(0xd800, 0xdbff) AM_WRITE(beg_sharedram_w) AM_BASE(&beg_sharedram)
AM_RANGE(0xe000, 0xe7ff) AM_WRITE(bigevglf_palette_w) AM_BASE(&paletteram)
AM_RANGE(0xe800, 0xefff) AM_WRITE(MWA8_RAM) AM_BASE(&bigevglf_spriteram1) /* sprite 'templates' */
AM_RANGE(0xe800, 0xefff) AM_WRITE(SMH_RAM) AM_BASE(&bigevglf_spriteram1) /* sprite 'templates' */
AM_RANGE(0xf000, 0xf0ff) AM_WRITE(bigevglf_vidram_w)
AM_RANGE(0xf840, 0xf8ff) AM_WRITE(MWA8_RAM) AM_BASE(&bigevglf_spriteram2) /* spriteram (x,y,offset in spriteram1,palette) */
AM_RANGE(0xf840, 0xf8ff) AM_WRITE(SMH_RAM) AM_BASE(&bigevglf_spriteram2) /* spriteram (x,y,offset in spriteram1,palette) */
ADDRESS_MAP_END
static ADDRESS_MAP_START( bigevglf_writeport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(MWA8_NOP) /* video ram enable ???*/
AM_RANGE(0x00, 0x00) AM_WRITE(SMH_NOP) /* video ram enable ???*/
AM_RANGE(0x01, 0x01) AM_WRITE(bigevglf_gfxcontrol_w) /* plane select */
AM_RANGE(0x02, 0x02) AM_WRITE(beg_banking_w)
AM_RANGE(0x03, 0x03) AM_WRITE(beg13A_set_w)
@ -343,23 +343,23 @@ ADDRESS_MAP_END
/* Sub CPU */
static ADDRESS_MAP_START( readmem_sub, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_READ(MRA8_ROM)
AM_RANGE(0x4000, 0x47ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
AM_RANGE(0x4000, 0x47ff) AM_READ(SMH_RAM)
AM_RANGE(0x8000, 0x83ff) AM_READ(beg_sharedram_r) /* shared with main CPU */
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem_sub, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x4000, 0x47ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x8000, 0x83ff) AM_WRITE(beg_sharedram_w) /* shared with main CPU */
ADDRESS_MAP_END
static ADDRESS_MAP_START( bigevglf_sub_writeport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x08, 0x08) AM_WRITE(MWA8_NOP) /*coinlockout_w ???? watchdog ???? */
AM_RANGE(0x08, 0x08) AM_WRITE(SMH_NOP) /*coinlockout_w ???? watchdog ???? */
AM_RANGE(0x0c, 0x0c) AM_WRITE(bigevglf_mcu_w)
AM_RANGE(0x0e, 0x0e) AM_WRITE(MWA8_NOP) /* 0-enable MCU, 1-keep reset line ASSERTED; D0 goes to the input of ls74 and the /Q of this ls74 goes to reset line on 68705 */
AM_RANGE(0x0e, 0x0e) AM_WRITE(SMH_NOP) /* 0-enable MCU, 1-keep reset line ASSERTED; D0 goes to the input of ls74 and the /Q of this ls74 goes to reset line on 68705 */
AM_RANGE(0x10, 0x17) AM_WRITE(beg13A_clr_w)
AM_RANGE(0x18, 0x1f) AM_WRITE(beg13B_set_w)
AM_RANGE(0x20, 0x20) AM_WRITE(sound_command_w)
@ -383,13 +383,13 @@ static READ8_HANDLER( sub_cpu_mcu_coin_port_r )
static ADDRESS_MAP_START( bigevglf_sub_readport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READ(input_port_0_r)
AM_RANGE(0x01, 0x01) AM_READ(MRA8_NOP)
AM_RANGE(0x01, 0x01) AM_READ(SMH_NOP)
AM_RANGE(0x02, 0x02) AM_READ(input_port_4_r)
AM_RANGE(0x03, 0x03) AM_READ(input_port_5_r)
AM_RANGE(0x04, 0x04) AM_READ(sub_cpu_mcu_coin_port_r)
AM_RANGE(0x05, 0x05) AM_READ(input_port_2_r)
AM_RANGE(0x06, 0x06) AM_READ(input_port_3_r)
AM_RANGE(0x07, 0x07) AM_READ(MRA8_NOP)
AM_RANGE(0x07, 0x07) AM_READ(SMH_NOP)
AM_RANGE(0x0b, 0x0b) AM_READ(bigevglf_mcu_r)
AM_RANGE(0x20, 0x20) AM_READ(beg_fromsound_r)
AM_RANGE(0x21, 0x21) AM_READ(beg_soundstate_r)
@ -400,25 +400,25 @@ ADDRESS_MAP_END
/* Sound CPU */
static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_READ(MRA8_ROM)
AM_RANGE(0xc000, 0xc7ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
AM_RANGE(0xda00, 0xda00) AM_READ(soundstate_r)
AM_RANGE(0xd800, 0xd800) AM_READ(sound_command_r) /* read from D800 sets bit 0 in status */
AM_RANGE(0xe000, 0xefff) AM_READ(MRA8_NOP) /* space for diagnostics ROM */
AM_RANGE(0xe000, 0xefff) AM_READ(SMH_NOP) /* space for diagnostics ROM */
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_WRITE(MWA8_ROM)
AM_RANGE(0xc000, 0xc7ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
AM_RANGE(0xc800, 0xc800) AM_WRITE(AY8910_control_port_0_w)
AM_RANGE(0xc801, 0xc801) AM_WRITE(AY8910_write_port_0_w)
AM_RANGE(0xca00, 0xca0d) AM_WRITE(MSM5232_0_w)
AM_RANGE(0xcc00, 0xcc00) AM_WRITE(MWA8_NOP)
AM_RANGE(0xce00, 0xce00) AM_WRITE(MWA8_NOP)
AM_RANGE(0xcc00, 0xcc00) AM_WRITE(SMH_NOP)
AM_RANGE(0xce00, 0xce00) AM_WRITE(SMH_NOP)
AM_RANGE(0xd800, 0xd800) AM_WRITE(beg_fromsound_w) /* write to D800 sets bit 1 in status */
AM_RANGE(0xda00, 0xda00) AM_WRITE(nmi_enable_w)
AM_RANGE(0xdc00, 0xdc00) AM_WRITE(nmi_disable_w)
AM_RANGE(0xde00, 0xde00) AM_WRITE(MWA8_NOP)
AM_RANGE(0xde00, 0xde00) AM_WRITE(SMH_NOP)
ADDRESS_MAP_END
@ -430,8 +430,8 @@ static ADDRESS_MAP_START( m68705_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0000) AM_READ(bigevglf_68705_portA_r)
AM_RANGE(0x0001, 0x0001) AM_READ(bigevglf_68705_portB_r)
AM_RANGE(0x0002, 0x0002) AM_READ(bigevglf_68705_portC_r)
AM_RANGE(0x0010, 0x007f) AM_READ(MRA8_RAM)
AM_RANGE(0x0080, 0x07ff) AM_READ(MRA8_ROM)
AM_RANGE(0x0010, 0x007f) AM_READ(SMH_RAM)
AM_RANGE(0x0080, 0x07ff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( m68705_writemem, ADDRESS_SPACE_PROGRAM, 8 )
@ -442,8 +442,8 @@ static ADDRESS_MAP_START( m68705_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0004, 0x0004) AM_WRITE(bigevglf_68705_ddrA_w)
AM_RANGE(0x0005, 0x0005) AM_WRITE(bigevglf_68705_ddrB_w)
AM_RANGE(0x0006, 0x0006) AM_WRITE(bigevglf_68705_ddrC_w)
AM_RANGE(0x0010, 0x007f) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0080, 0x07ff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x0010, 0x007f) AM_WRITE(SMH_RAM)
AM_RANGE(0x0080, 0x07ff) AM_WRITE(SMH_ROM)
ADDRESS_MAP_END

8
src/mame/drivers/bigfghtr.c
View File

@ -329,10 +329,10 @@ static ADDRESS_MAP_START( mainmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x080000, 0x0805ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x080600, 0x080fff) AM_READ(sharedram_r) AM_WRITE(sharedram_w) AM_BASE(&sharedram16)
AM_RANGE(0x081000, 0x085fff) AM_RAM //??
AM_RANGE(0x086000, 0x086fff) AM_READ(MRA16_RAM) AM_WRITE(bg_videoram_w) AM_BASE(&bg_videoram)
AM_RANGE(0x087000, 0x087fff) AM_READ(MRA16_RAM) AM_WRITE(fg_videoram_w) AM_BASE(&fg_videoram)
AM_RANGE(0x088000, 0x089fff) AM_READ(MRA16_RAM) AM_WRITE(text_videoram_w) AM_BASE(&text_videoram)
AM_RANGE(0x08a000, 0x08afff) AM_READ(MRA16_RAM) AM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x086000, 0x086fff) AM_READ(SMH_RAM) AM_WRITE(bg_videoram_w) AM_BASE(&bg_videoram)
AM_RANGE(0x087000, 0x087fff) AM_READ(SMH_RAM) AM_WRITE(fg_videoram_w) AM_BASE(&fg_videoram)
AM_RANGE(0x088000, 0x089fff) AM_READ(SMH_RAM) AM_WRITE(text_videoram_w) AM_BASE(&text_videoram)
AM_RANGE(0x08a000, 0x08afff) AM_READ(SMH_RAM) AM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x08b000, 0x08bfff) AM_RAM //??
AM_RANGE(0x08c000, 0x08c001) AM_READ(input_port_0_word_r)
AM_RANGE(0x08c002, 0x08c003) AM_READ(input_port_1_word_r)

56
src/mame/drivers/bigstrkb.c
View File

@ -44,15 +44,15 @@ VIDEO_UPDATE(bigstrkb);
/* some regions might be too large */
static ADDRESS_MAP_START( bigstrkb_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_READ(MRA16_ROM)
AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
/* most region sizes are unknown */
// AM_RANGE(0x0c0000, 0x0cffff) AM_READ(megasys1_vregs_C_r)
AM_RANGE(0x0D0000, 0x0dffff) AM_READ(MRA16_RAM)
AM_RANGE(0x0E0000, 0x0E3fff) AM_READ(MRA16_RAM)
AM_RANGE(0x0e8000, 0x0ebfff) AM_READ(MRA16_RAM)
AM_RANGE(0x0ec000, 0x0effff) AM_READ(MRA16_RAM)
AM_RANGE(0x0f0000, 0x0fffff) AM_READ(MRA16_RAM)
AM_RANGE(0x1f0000, 0x1fffff) AM_READ(MRA16_RAM)
AM_RANGE(0x0D0000, 0x0dffff) AM_READ(SMH_RAM)
AM_RANGE(0x0E0000, 0x0E3fff) AM_READ(SMH_RAM)
AM_RANGE(0x0e8000, 0x0ebfff) AM_READ(SMH_RAM)
AM_RANGE(0x0ec000, 0x0effff) AM_READ(SMH_RAM)
AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM)
AM_RANGE(0x1f0000, 0x1fffff) AM_READ(SMH_RAM)
AM_RANGE(0x700000, 0x700001) AM_READ(input_port_0_word_r) /* Dip 1 */
AM_RANGE(0x700002, 0x700003) AM_READ(input_port_1_word_r) /* Dip 2 */
AM_RANGE(0x700004, 0x700005) AM_READ(input_port_2_word_r) /* System */
@ -62,48 +62,48 @@ static ADDRESS_MAP_START( bigstrkb_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xE00000, 0xE00001) AM_READ(OKIM6295_status_0_lsb_r)
AM_RANGE(0xE00002, 0xE00003) AM_READ(OKIM6295_status_1_lsb_r)
AM_RANGE(0xF00000, 0xFFFFFF) AM_READ(MRA16_RAM) // main RAM
AM_RANGE(0xF00000, 0xFFFFFF) AM_READ(SMH_RAM) // main RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( bigstrkb_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_WRITE(MWA16_ROM)
AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
// AM_RANGE(0x0c0000, 0x0cffff) AM_WRITE(megasys1_vregs_C_w) AM_BASE(&megasys1_vregs)
AM_RANGE(0x0C2004, 0x0C2005) AM_WRITE(MWA16_NOP)
AM_RANGE(0x0C200C, 0x0C200d) AM_WRITE(MWA16_NOP)
AM_RANGE(0x0C2104, 0x0C2105) AM_WRITE(MWA16_NOP)
AM_RANGE(0x0C2108, 0x0C2109) AM_WRITE(MWA16_NOP)
AM_RANGE(0x0C2200, 0x0C2201) AM_WRITE(MWA16_NOP)
AM_RANGE(0x0C2208, 0x0C2209) AM_WRITE(MWA16_NOP)
AM_RANGE(0x0c2308, 0x0c2309) AM_WRITE(MWA16_NOP) // bit 0 of DSW1 (flip screen) - use vregs
AM_RANGE(0x0C2004, 0x0C2005) AM_WRITE(SMH_NOP)
AM_RANGE(0x0C200C, 0x0C200d) AM_WRITE(SMH_NOP)
AM_RANGE(0x0C2104, 0x0C2105) AM_WRITE(SMH_NOP)
AM_RANGE(0x0C2108, 0x0C2109) AM_WRITE(SMH_NOP)
AM_RANGE(0x0C2200, 0x0C2201) AM_WRITE(SMH_NOP)
AM_RANGE(0x0C2208, 0x0C2209) AM_WRITE(SMH_NOP)
AM_RANGE(0x0c2308, 0x0c2309) AM_WRITE(SMH_NOP) // bit 0 of DSW1 (flip screen) - use vregs
AM_RANGE(0x0D0000, 0x0dffff) AM_WRITE(MWA16_RAM) // 0xd2000 - 0xd3fff? 0xd8000?
AM_RANGE(0x0D0000, 0x0dffff) AM_WRITE(SMH_RAM) // 0xd2000 - 0xd3fff? 0xd8000?
AM_RANGE(0x0e0000, 0x0e3fff) AM_WRITE(bsb_videoram2_w) AM_BASE(&bsb_videoram2)
AM_RANGE(0x0e8000, 0x0ebfff) AM_WRITE(bsb_videoram3_w) AM_BASE(&bsb_videoram3)
AM_RANGE(0x0ec000, 0x0effff) AM_WRITE(bsb_videoram_w) AM_BASE(&bsb_videoram)
AM_RANGE(0x0f0000, 0x0f7fff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x0f0000, 0x0f7fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x0f8000, 0x0f87ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x0f8800, 0x0fffff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x0f8800, 0x0fffff) AM_WRITE(SMH_RAM)
AM_RANGE(0x1f0000, 0x1f7fff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x1f8000, 0x1f87ff) AM_WRITE(MWA16_RAM) AM_BASE(&bigstrkb_spriteram)
AM_RANGE(0x1f8800, 0x1fffff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x1f0000, 0x1f7fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x1f8000, 0x1f87ff) AM_WRITE(SMH_RAM) AM_BASE(&bigstrkb_spriteram)
AM_RANGE(0x1f8800, 0x1fffff) AM_WRITE(SMH_RAM)
AM_RANGE(0x700020, 0x700027) AM_WRITE(MWA16_RAM) AM_BASE(&bsb_vidreg1)
AM_RANGE(0x700030, 0x700037) AM_WRITE(MWA16_RAM) AM_BASE(&bsb_vidreg2)
AM_RANGE(0x700020, 0x700027) AM_WRITE(SMH_RAM) AM_BASE(&bsb_vidreg1)
AM_RANGE(0x700030, 0x700037) AM_WRITE(SMH_RAM) AM_BASE(&bsb_vidreg2)
AM_RANGE(0xB00000, 0xB00001) AM_WRITE(MWA16_NOP)
AM_RANGE(0xB00000, 0xB00001) AM_WRITE(SMH_NOP)
AM_RANGE(0xE00000, 0xE00001) AM_WRITE(OKIM6295_data_0_lsb_w)
AM_RANGE(0xE00002, 0xE00003) AM_WRITE(OKIM6295_data_1_lsb_w)
AM_RANGE(0xE00008, 0xE00009) AM_WRITE(MWA16_NOP)
AM_RANGE(0xE0000c, 0xE0000d) AM_WRITE(MWA16_NOP)
AM_RANGE(0xE00008, 0xE00009) AM_WRITE(SMH_NOP)
AM_RANGE(0xE0000c, 0xE0000d) AM_WRITE(SMH_NOP)
AM_RANGE(0xF00000, 0xFFFFFF) AM_WRITE(MWA16_RAM)
AM_RANGE(0xF00000, 0xFFFFFF) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
#define BIGSTRKB_PLAYER_INPUT( player, start ) \

36
src/mame/drivers/bionicc.c
View File

@ -144,26 +144,26 @@ static INTERRUPT_GEN( bionicc_interrupt )
}
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_READ(MRA16_ROM) /* 68000 ROM */
AM_RANGE(0xfe0000, 0xfe07ff) AM_READ(MRA16_RAM) /* RAM? */
AM_RANGE(0xfe0800, 0xfe0cff) AM_READ(MRA16_RAM) /* sprites */
AM_RANGE(0xfe0d00, 0xfe3fff) AM_READ(MRA16_RAM) /* RAM? */
AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM) /* 68000 ROM */
AM_RANGE(0xfe0000, 0xfe07ff) AM_READ(SMH_RAM) /* RAM? */
AM_RANGE(0xfe0800, 0xfe0cff) AM_READ(SMH_RAM) /* sprites */
AM_RANGE(0xfe0d00, 0xfe3fff) AM_READ(SMH_RAM) /* RAM? */
AM_RANGE(0xfe4000, 0xfe4001) AM_READ(input_port_0_word_r)
AM_RANGE(0xfe4002, 0xfe4003) AM_READ(input_port_1_word_r)
AM_RANGE(0xfec000, 0xfecfff) AM_READ(MRA16_RAM)
AM_RANGE(0xff0000, 0xff3fff) AM_READ(MRA16_RAM)
AM_RANGE(0xff4000, 0xff7fff) AM_READ(MRA16_RAM)
AM_RANGE(0xff8000, 0xff87ff) AM_READ(MRA16_RAM)
AM_RANGE(0xffc000, 0xfffff7) AM_READ(MRA16_RAM) /* working RAM */
AM_RANGE(0xfec000, 0xfecfff) AM_READ(SMH_RAM)
AM_RANGE(0xff0000, 0xff3fff) AM_READ(SMH_RAM)
AM_RANGE(0xff4000, 0xff7fff) AM_READ(SMH_RAM)
AM_RANGE(0xff8000, 0xff87ff) AM_READ(SMH_RAM)
AM_RANGE(0xffc000, 0xfffff7) AM_READ(SMH_RAM) /* working RAM */
AM_RANGE(0xfffff8, 0xfffff9) AM_READ(hacked_soundcommand_r) /* hack */
AM_RANGE(0xfffffa, 0xffffff) AM_READ(hacked_controls_r) /* hack */
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_WRITE(MWA16_ROM)
AM_RANGE(0xfe0000, 0xfe07ff) AM_WRITE(MWA16_RAM) /* RAM? */
AM_RANGE(0xfe0800, 0xfe0cff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0xfe0d00, 0xfe3fff) AM_WRITE(MWA16_RAM) /* RAM? */
AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0xfe0000, 0xfe07ff) AM_WRITE(SMH_RAM) /* RAM? */
AM_RANGE(0xfe0800, 0xfe0cff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0xfe0d00, 0xfe3fff) AM_WRITE(SMH_RAM) /* RAM? */
AM_RANGE(0xfe4000, 0xfe4001) AM_WRITE(bionicc_gfxctrl_w) /* + coin counters */
AM_RANGE(0xfe8010, 0xfe8017) AM_WRITE(bionicc_scroll_w)
AM_RANGE(0xfe801a, 0xfe801b) AM_WRITE(bionicc_mpu_trigger_w) /* ??? not sure, but looks like it */
@ -171,24 +171,24 @@ static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xff0000, 0xff3fff) AM_WRITE(bionicc_fgvideoram_w) AM_BASE(&bionicc_fgvideoram)
AM_RANGE(0xff4000, 0xff7fff) AM_WRITE(bionicc_bgvideoram_w) AM_BASE(&bionicc_bgvideoram)
AM_RANGE(0xff8000, 0xff87ff) AM_WRITE(bionicc_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0xffc000, 0xfffff7) AM_WRITE(MWA16_RAM) /* working RAM */
AM_RANGE(0xffc000, 0xfffff7) AM_WRITE(SMH_RAM) /* working RAM */
AM_RANGE(0xfffff8, 0xfffff9) AM_WRITE(hacked_soundcommand_w) /* hack */
AM_RANGE(0xfffffa, 0xffffff) AM_WRITE(hacked_controls_w) /* hack */
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(MRA8_ROM)
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8001, 0x8001) AM_READ(YM2151_status_port_0_r)
AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
AM_RANGE(0xc000, 0xc7ff) AM_READ(MRA8_RAM)
AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0x8000) AM_WRITE(YM2151_register_port_0_w)
AM_RANGE(0x8001, 0x8001) AM_WRITE(YM2151_data_port_0_w)
AM_RANGE(0xc000, 0xc7ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END

12
src/mame/drivers/bishi.c
View File

@ -119,25 +119,25 @@ static READ16_HANDLER( bishi_K056832_rom_r )
}
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_READ(MRA16_ROM)
AM_RANGE(0x400000, 0x407fff) AM_READ(MRA16_RAM) // work RAM
AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM) // work RAM
AM_RANGE(0x800000, 0x800001) AM_READ(control_r)
AM_RANGE(0x800004, 0x800005) AM_READ(dipsw_r)
AM_RANGE(0x800006, 0x800007) AM_READ(player1_r)
AM_RANGE(0x800008, 0x800009) AM_READ(player2_r)
AM_RANGE(0x880000, 0x880003) AM_READ(bishi_sound_r)
AM_RANGE(0xa00000, 0xa01fff) AM_READ(K056832_ram_word_r) // VRAM
AM_RANGE(0xb00000, 0xb03fff) AM_READ(MRA16_RAM)
AM_RANGE(0xb00000, 0xb03fff) AM_READ(SMH_RAM)
AM_RANGE(0xb04000, 0xb047ff) AM_READ(bishi_mirror_r) // bug in the ram/rom test?
AM_RANGE(0xc00000, 0xc01fff) AM_READ(bishi_K056832_rom_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(MWA16_ROM)
AM_RANGE(0x400000, 0x407fff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x400000, 0x407fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x800000, 0x800001) AM_WRITE(control_w)
AM_RANGE(0x810000, 0x810003) AM_WRITE(control2_w) // bank switch for K056832 character ROM test
AM_RANGE(0x820000, 0x820001) AM_WRITE(MWA16_NOP) // lamps (see lamp test in service menu)
AM_RANGE(0x820000, 0x820001) AM_WRITE(SMH_NOP) // lamps (see lamp test in service menu)
AM_RANGE(0x830000, 0x83003f) AM_WRITE(K056832_word_w)
AM_RANGE(0x840000, 0x840007) AM_WRITE(K056832_b_word_w) // VSCCS
AM_RANGE(0x850000, 0x85001f) AM_WRITE(K054338_word_w) // CLTC

20
src/mame/drivers/bishjan.c
View File

@ -265,28 +265,28 @@ static ADDRESS_MAP_START( bishjan_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE( 0x200000, 0x207fff ) AM_RAM AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size) // battery
AM_RANGE( 0x412000, 0x412fff ) AM_READ( bishjan_tmap2_lo_r ) //?
AM_RANGE( 0x413000, 0x413fff ) AM_READ( MRA16_RAM ) AM_SHARE(1)
AM_RANGE( 0x413000, 0x413fff ) AM_READ( SMH_RAM ) AM_SHARE(1)
AM_RANGE( 0x416000, 0x416fff ) AM_READ( bishjan_tmap1_lo_r ) //?
AM_RANGE( 0x417000, 0x417fff ) AM_READ( MRA16_RAM ) AM_SHARE(1)
AM_RANGE( 0x417000, 0x417fff ) AM_READ( SMH_RAM ) AM_SHARE(1)
AM_RANGE( 0x422000, 0x422fff ) AM_READ( bishjan_tmap2_hi_r ) //?
AM_RANGE( 0x423000, 0x423fff ) AM_READ( MRA16_RAM ) AM_SHARE(2)
AM_RANGE( 0x423000, 0x423fff ) AM_READ( SMH_RAM ) AM_SHARE(2)
AM_RANGE( 0x426000, 0x426fff ) AM_READ( bishjan_tmap1_hi_r )
AM_RANGE( 0x427000, 0x427fff ) AM_READ( MRA16_RAM ) AM_SHARE(2)
AM_RANGE( 0x427000, 0x427fff ) AM_READ( SMH_RAM ) AM_SHARE(2)
AM_RANGE( 0x430000, 0x431fff ) AM_WRITE( bishjan_tmap2_w )
AM_RANGE( 0x432000, 0x432fff ) AM_WRITE( bishjan_tmap2_w ) //?
AM_RANGE( 0x433000, 0x433fff ) AM_WRITE( MWA16_RAM ) AM_SHARE(1)
AM_RANGE( 0x433000, 0x433fff ) AM_WRITE( SMH_RAM ) AM_SHARE(1)
AM_RANGE( 0x434000, 0x435fff ) AM_WRITE( bishjan_tmap1_w )
AM_RANGE( 0x436000, 0x436fff ) AM_WRITE( bishjan_tmap1_w ) //?
AM_RANGE( 0x437000, 0x437fff ) AM_WRITE( MWA16_RAM ) AM_SHARE(2)
AM_RANGE( 0x437000, 0x437fff ) AM_WRITE( SMH_RAM ) AM_SHARE(2)
AM_RANGE( 0x600000, 0x600001 ) AM_READWRITE( MRA16_NOP, bishjan_sel_w )
AM_RANGE( 0x600000, 0x600001 ) AM_READWRITE( SMH_NOP, bishjan_sel_w )
AM_RANGE( 0x600060, 0x600061 ) AM_WRITE( colordac_w )
AM_RANGE( 0x600062, 0x600063 ) AM_WRITE( MWA16_NOP ) // ff to 600062
AM_RANGE( 0x600062, 0x600063 ) AM_WRITE( SMH_NOP ) // ff to 600062
AM_RANGE( 0x6000a0, 0x6000a1 ) AM_WRITE( bishjan_low_w )
AM_RANGE( 0xa0001e, 0xa0001f ) AM_WRITE( MWA16_RAM ) AM_BASE( &bishjan_layers )
AM_RANGE( 0xa0001e, 0xa0001f ) AM_WRITE( SMH_RAM ) AM_BASE( &bishjan_layers )
AM_RANGE( 0xa00020, 0xa00025 ) AM_WRITE( MWA16_RAM ) AM_BASE( &bishjan_scroll )
AM_RANGE( 0xa00020, 0xa00025 ) AM_WRITE( SMH_RAM ) AM_BASE( &bishjan_scroll )
AM_RANGE( 0xc00000, 0xc00001 ) AM_READ( input_port_1_word_r ) // c00001 sw1
AM_RANGE( 0xc00002, 0xc00003 ) AM_READWRITE( input_port_2_word_r, bishjan_input_w ) // in c

28
src/mame/drivers/bladestl.c
View File

@ -108,7 +108,7 @@ static ADDRESS_MAP_START( bladestl_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_READ(K007342_r) /* Color RAM + Video RAM */
AM_RANGE(0x2000, 0x21ff) AM_READ(K007420_r) /* Sprite RAM */
AM_RANGE(0x2200, 0x23ff) AM_READ(K007342_scroll_r) /* Scroll RAM */
AM_RANGE(0x2400, 0x245f) AM_READ(MRA8_RAM) /* Palette */
AM_RANGE(0x2400, 0x245f) AM_READ(SMH_RAM) /* Palette */
AM_RANGE(0x2e01, 0x2e01) AM_READ(input_port_3_r) /* 1P controls */
AM_RANGE(0x2e02, 0x2e02) AM_READ(input_port_4_r) /* 2P controls */
AM_RANGE(0x2e03, 0x2e03) AM_READ(input_port_1_r) /* DISPW #2 */
@ -116,43 +116,43 @@ static ADDRESS_MAP_START( bladestl_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2e00, 0x2e00) AM_READ(input_port_2_r) /* DIPSW #3, coinsw, startsw */
AM_RANGE(0x2f00, 0x2f03) AM_READ(trackball_r) /* Trackballs */
AM_RANGE(0x2f80, 0x2f9f) AM_READ(K051733_r) /* Protection: 051733 */
AM_RANGE(0x4000, 0x5fff) AM_READ(MRA8_RAM) /* Work RAM */
AM_RANGE(0x6000, 0x7fff) AM_READ(MRA8_BANK1) /* banked ROM */
AM_RANGE(0x8000, 0xffff) AM_READ(MRA8_ROM) /* ROM */
AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_RAM) /* Work RAM */
AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK1) /* banked ROM */
AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM) /* ROM */
ADDRESS_MAP_END
static ADDRESS_MAP_START( bladestl_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_WRITE(K007342_w) /* Color RAM + Video RAM */
AM_RANGE(0x2000, 0x21ff) AM_WRITE(K007420_w) /* Sprite RAM */
AM_RANGE(0x2200, 0x23ff) AM_WRITE(K007342_scroll_w) /* Scroll RAM */
AM_RANGE(0x2400, 0x245f) AM_WRITE(MWA8_RAM) AM_BASE(&paletteram)/* palette */
AM_RANGE(0x2400, 0x245f) AM_WRITE(SMH_RAM) AM_BASE(&paletteram)/* palette */
AM_RANGE(0x2600, 0x2607) AM_WRITE(K007342_vreg_w) /* Video Registers */
AM_RANGE(0x2e80, 0x2e80) AM_WRITE(bladestl_sh_irqtrigger_w)/* cause interrupt on audio CPU */
AM_RANGE(0x2ec0, 0x2ec0) AM_WRITE(watchdog_reset_w) /* watchdog reset */
AM_RANGE(0x2f40, 0x2f40) AM_WRITE(bladestl_bankswitch_w) /* bankswitch control */
AM_RANGE(0x2f80, 0x2f9f) AM_WRITE(K051733_w) /* Protection: 051733 */
AM_RANGE(0x2fc0, 0x2fc0) AM_WRITE(MWA8_NOP) /* ??? */
AM_RANGE(0x4000, 0x5fff) AM_WRITE(MWA8_RAM) /* Work RAM */
AM_RANGE(0x6000, 0x7fff) AM_WRITE(MWA8_RAM) /* banked ROM */
AM_RANGE(0x8000, 0xffff) AM_WRITE(MWA8_ROM) /* ROM */
AM_RANGE(0x2fc0, 0x2fc0) AM_WRITE(SMH_NOP) /* ??? */
AM_RANGE(0x4000, 0x5fff) AM_WRITE(SMH_RAM) /* Work RAM */
AM_RANGE(0x6000, 0x7fff) AM_WRITE(SMH_RAM) /* banked ROM */
AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM) /* ROM */
ADDRESS_MAP_END
static ADDRESS_MAP_START( bladestl_readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x07ff) AM_READ(MRA8_RAM) /* RAM */
AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM) /* RAM */
AM_RANGE(0x1000, 0x1000) AM_READ(YM2203_status_port_0_r) /* YM2203 */
AM_RANGE(0x1001, 0x1001) AM_READ(YM2203_read_port_0_r) /* YM2203 */
AM_RANGE(0x4000, 0x4000) AM_READ(upd7759_0_busy_r) /* UPD7759 */
AM_RANGE(0x6000, 0x6000) AM_READ(soundlatch_r) /* soundlatch_r */
AM_RANGE(0x8000, 0xffff) AM_READ(MRA8_ROM) /* ROM */
AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM) /* ROM */
ADDRESS_MAP_END
static ADDRESS_MAP_START( bladestl_writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x07ff) AM_WRITE(MWA8_RAM) /* RAM */
AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM) /* RAM */
AM_RANGE(0x1000, 0x1000) AM_WRITE(YM2203_control_port_0_w)/* YM2203 */
AM_RANGE(0x1001, 0x1001) AM_WRITE(YM2203_write_port_0_w) /* YM2203 */
AM_RANGE(0x3000, 0x3000) AM_WRITE(bladestl_speech_ctrl_w) /* UPD7759 */
AM_RANGE(0x5000, 0x5000) AM_WRITE(MWA8_NOP) /* ??? */
AM_RANGE(0x8000, 0xffff) AM_WRITE(MWA8_ROM) /* ROM */
AM_RANGE(0x5000, 0x5000) AM_WRITE(SMH_NOP) /* ??? */
AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM) /* ROM */
ADDRESS_MAP_END
/***************************************************************************

10
src/mame/drivers/blktiger.c
View File

@ -64,11 +64,11 @@ static WRITE8_HANDLER( blktiger_coinlockout_w )
static ADDRESS_MAP_START( mem_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_READWRITE(MRA8_BANK1, MWA8_ROM)
AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK1, SMH_ROM)
AM_RANGE(0xc000, 0xcfff) AM_READWRITE(blktiger_bgvideoram_r, blktiger_bgvideoram_w)
AM_RANGE(0xd000, 0xd7ff) AM_READWRITE(MRA8_RAM, blktiger_txvideoram_w) AM_BASE(&blktiger_txvideoram)
AM_RANGE(0xd800, 0xdbff) AM_READWRITE(MRA8_RAM, paletteram_xxxxBBBBRRRRGGGG_split1_w) AM_BASE(&paletteram)
AM_RANGE(0xdc00, 0xdfff) AM_READWRITE(MRA8_RAM, paletteram_xxxxBBBBRRRRGGGG_split2_w) AM_BASE(&paletteram_2)
AM_RANGE(0xd000, 0xd7ff) AM_READWRITE(SMH_RAM, blktiger_txvideoram_w) AM_BASE(&blktiger_txvideoram)
AM_RANGE(0xd800, 0xdbff) AM_READWRITE(SMH_RAM, paletteram_xxxxBBBBRRRRGGGG_split1_w) AM_BASE(&paletteram)
AM_RANGE(0xdc00, 0xdfff) AM_READWRITE(SMH_RAM, paletteram_xxxxBBBBRRRRGGGG_split2_w) AM_BASE(&paletteram_2)
AM_RANGE(0xe000, 0xfdff) AM_RAM
AM_RANGE(0xfe00, 0xffff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
ADDRESS_MAP_END
@ -82,7 +82,7 @@ static ADDRESS_MAP_START( port_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW1") AM_WRITE(blktiger_video_control_w)
AM_RANGE(0x05, 0x05) AM_READ_PORT("FREEZE")
AM_RANGE(0x06, 0x06) AM_WRITE(watchdog_reset_w)
AM_RANGE(0x07, 0x07) AM_READ(blktiger_protection_r) AM_WRITE(MWA8_NOP) /* Software protection (7) */
AM_RANGE(0x07, 0x07) AM_READ(blktiger_protection_r) AM_WRITE(SMH_NOP) /* Software protection (7) */
AM_RANGE(0x08, 0x09) AM_WRITE(blktiger_scrollx_w)
AM_RANGE(0x0a, 0x0b) AM_WRITE(blktiger_scrolly_w)
AM_RANGE(0x0c, 0x0c) AM_WRITE(blktiger_video_enable_w)

86
src/mame/drivers/blmbycar.c
View File

@ -115,16 +115,16 @@ static READ16_HANDLER( blmbycar_opt_wheel_r )
***************************************************************************/
static ADDRESS_MAP_START( blmbycar_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_READ(MRA16_ROM ) // ROM
AM_RANGE(0xfec000, 0xfeffff) AM_READ(MRA16_RAM ) // RAM
AM_RANGE(0x200000, 0x2005ff) AM_READ(MRA16_RAM ) // Palette
AM_RANGE(0x200600, 0x203fff) AM_READ(MRA16_RAM ) //
AM_RANGE(0x204000, 0x2045ff) AM_READ(MRA16_RAM ) // Palette
AM_RANGE(0x204600, 0x207fff) AM_READ(MRA16_RAM ) //
AM_RANGE(0x104000, 0x105fff) AM_READ(MRA16_RAM ) // Layer 1
AM_RANGE(0x106000, 0x107fff) AM_READ(MRA16_RAM ) // Layer 0
AM_RANGE(0x440000, 0x441fff) AM_READ(MRA16_RAM ) //
AM_RANGE(0x444000, 0x445fff) AM_READ(MRA16_RAM ) // Sprites (size?)
AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0xfec000, 0xfeffff) AM_READ(SMH_RAM ) // RAM
AM_RANGE(0x200000, 0x2005ff) AM_READ(SMH_RAM ) // Palette
AM_RANGE(0x200600, 0x203fff) AM_READ(SMH_RAM ) //
AM_RANGE(0x204000, 0x2045ff) AM_READ(SMH_RAM ) // Palette
AM_RANGE(0x204600, 0x207fff) AM_READ(SMH_RAM ) //
AM_RANGE(0x104000, 0x105fff) AM_READ(SMH_RAM ) // Layer 1
AM_RANGE(0x106000, 0x107fff) AM_READ(SMH_RAM ) // Layer 0
AM_RANGE(0x440000, 0x441fff) AM_READ(SMH_RAM ) //
AM_RANGE(0x444000, 0x445fff) AM_READ(SMH_RAM ) // Sprites (size?)
AM_RANGE(0x700000, 0x700001) AM_READ(input_port_0_word_r ) // 2 x DSW0
AM_RANGE(0x700002, 0x700003) AM_READ(input_port_1_word_r ) // Joystick + Buttons
AM_RANGE(0x700004, 0x700005) AM_READ(blmbycar_opt_wheel_r ) // Wheel (optical)
@ -134,21 +134,21 @@ static ADDRESS_MAP_START( blmbycar_readmem, ADDRESS_SPACE_PROGRAM, 16 )
ADDRESS_MAP_END
static ADDRESS_MAP_START( blmbycar_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(MWA16_ROM ) // ROM
AM_RANGE(0xfec000, 0xfeffff) AM_WRITE(MWA16_RAM ) // RAM
AM_RANGE(0x100000, 0x103fff) AM_WRITE(MWA16_RAM ) //
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0xfec000, 0xfeffff) AM_WRITE(SMH_RAM ) // RAM
AM_RANGE(0x100000, 0x103fff) AM_WRITE(SMH_RAM ) //
AM_RANGE(0x104000, 0x105fff) AM_WRITE(blmbycar_vram_1_w) AM_BASE(&blmbycar_vram_1 ) // Layer 1
AM_RANGE(0x106000, 0x107fff) AM_WRITE(blmbycar_vram_0_w) AM_BASE(&blmbycar_vram_0 ) // Layer 0
AM_RANGE(0x108000, 0x10bfff) AM_WRITE(MWA16_RAM ) //
AM_RANGE(0x10c000, 0x10c003) AM_WRITE(MWA16_RAM) AM_BASE(&blmbycar_scroll_1 ) // Scroll 1
AM_RANGE(0x10c004, 0x10c007) AM_WRITE(MWA16_RAM) AM_BASE(&blmbycar_scroll_0 ) // Scroll 0
AM_RANGE(0x108000, 0x10bfff) AM_WRITE(SMH_RAM ) //
AM_RANGE(0x10c000, 0x10c003) AM_WRITE(SMH_RAM) AM_BASE(&blmbycar_scroll_1 ) // Scroll 1
AM_RANGE(0x10c004, 0x10c007) AM_WRITE(SMH_RAM) AM_BASE(&blmbycar_scroll_0 ) // Scroll 0
AM_RANGE(0x200000, 0x2005ff) AM_WRITE(blmbycar_palette_w ) // Palette
AM_RANGE(0x200600, 0x203fff) AM_WRITE(MWA16_RAM ) //
AM_RANGE(0x200600, 0x203fff) AM_WRITE(SMH_RAM ) //
AM_RANGE(0x204000, 0x2045ff) AM_WRITE(blmbycar_palette_w) AM_BASE(&paletteram16 ) // Palette
AM_RANGE(0x204600, 0x207fff) AM_WRITE(MWA16_RAM ) //
AM_RANGE(0x440000, 0x441fff) AM_WRITE(MWA16_RAM ) //
AM_RANGE(0x444000, 0x445fff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size ) // Sprites (size?)
AM_RANGE(0x70000a, 0x70000b) AM_WRITE(MWA16_NOP ) // ? Wheel
AM_RANGE(0x204600, 0x207fff) AM_WRITE(SMH_RAM ) //
AM_RANGE(0x440000, 0x441fff) AM_WRITE(SMH_RAM ) //
AM_RANGE(0x444000, 0x445fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size ) // Sprites (size?)
AM_RANGE(0x70000a, 0x70000b) AM_WRITE(SMH_NOP ) // ? Wheel
AM_RANGE(0x70000c, 0x70000d) AM_WRITE(blmbycar_okibank_w ) // Sound
AM_RANGE(0x70000e, 0x70000f) AM_WRITE(OKIM6295_data_0_lsb_w ) //
AM_RANGE(0x70006a, 0x70006b) AM_WRITE(blmbycar_pot_wheel_reset_w ) // Wheel (potentiometer)
@ -165,39 +165,39 @@ static READ16_HANDLER( waterball_unk_r )
}
static ADDRESS_MAP_START( watrball_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_READ(MRA16_ROM ) // ROM
AM_RANGE(0xfec000, 0xfeffff) AM_READ(MRA16_RAM ) // RAM
AM_RANGE(0x200000, 0x2005ff) AM_READ(MRA16_RAM ) // Palette
AM_RANGE(0x200600, 0x203fff) AM_READ(MRA16_RAM ) //
AM_RANGE(0x204000, 0x2045ff) AM_READ(MRA16_RAM ) // Palette
AM_RANGE(0x204600, 0x207fff) AM_READ(MRA16_RAM ) //
AM_RANGE(0x104000, 0x105fff) AM_READ(MRA16_RAM ) // Layer 1
AM_RANGE(0x106000, 0x107fff) AM_READ(MRA16_RAM ) // Layer 0
AM_RANGE(0x440000, 0x441fff) AM_READ(MRA16_RAM ) //
AM_RANGE(0x444000, 0x445fff) AM_READ(MRA16_RAM ) // Sprites (size?)
AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0xfec000, 0xfeffff) AM_READ(SMH_RAM ) // RAM
AM_RANGE(0x200000, 0x2005ff) AM_READ(SMH_RAM ) // Palette
AM_RANGE(0x200600, 0x203fff) AM_READ(SMH_RAM ) //
AM_RANGE(0x204000, 0x2045ff) AM_READ(SMH_RAM ) // Palette
AM_RANGE(0x204600, 0x207fff) AM_READ(SMH_RAM ) //
AM_RANGE(0x104000, 0x105fff) AM_READ(SMH_RAM ) // Layer 1
AM_RANGE(0x106000, 0x107fff) AM_READ(SMH_RAM ) // Layer 0
AM_RANGE(0x440000, 0x441fff) AM_READ(SMH_RAM ) //
AM_RANGE(0x444000, 0x445fff) AM_READ(SMH_RAM ) // Sprites (size?)
AM_RANGE(0x700000, 0x700001) AM_READ(input_port_0_word_r )
AM_RANGE(0x700002, 0x700003) AM_READ(input_port_1_word_r )
AM_RANGE(0x700006, 0x700007) AM_READ(MRA16_NOP ) // read
AM_RANGE(0x700006, 0x700007) AM_READ(SMH_NOP ) // read
AM_RANGE(0x700008, 0x700009) AM_READ(waterball_unk_r ) // 0x0008 must toggle
AM_RANGE(0x70000e, 0x70000f) AM_READ(OKIM6295_status_0_lsb_r ) // Sound
ADDRESS_MAP_END
static ADDRESS_MAP_START( watrball_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(MWA16_ROM ) // ROM
AM_RANGE(0xfec000, 0xfeffff) AM_WRITE(MWA16_RAM ) // RAM
AM_RANGE(0x100000, 0x103fff) AM_WRITE(MWA16_RAM ) //
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0xfec000, 0xfeffff) AM_WRITE(SMH_RAM ) // RAM
AM_RANGE(0x100000, 0x103fff) AM_WRITE(SMH_RAM ) //
AM_RANGE(0x104000, 0x105fff) AM_WRITE(blmbycar_vram_1_w) AM_BASE(&blmbycar_vram_1 ) // Layer 1
AM_RANGE(0x106000, 0x107fff) AM_WRITE(blmbycar_vram_0_w) AM_BASE(&blmbycar_vram_0 ) // Layer 0
AM_RANGE(0x108000, 0x10bfff) AM_WRITE(MWA16_RAM ) //
AM_RANGE(0x10c000, 0x10c003) AM_WRITE(MWA16_RAM) AM_BASE(&blmbycar_scroll_1 ) // Scroll 1
AM_RANGE(0x10c004, 0x10c007) AM_WRITE(MWA16_RAM) AM_BASE(&blmbycar_scroll_0 ) // Scroll 0
AM_RANGE(0x108000, 0x10bfff) AM_WRITE(SMH_RAM ) //
AM_RANGE(0x10c000, 0x10c003) AM_WRITE(SMH_RAM) AM_BASE(&blmbycar_scroll_1 ) // Scroll 1
AM_RANGE(0x10c004, 0x10c007) AM_WRITE(SMH_RAM) AM_BASE(&blmbycar_scroll_0 ) // Scroll 0
AM_RANGE(0x200000, 0x2005ff) AM_WRITE(blmbycar_palette_w ) // Palette
AM_RANGE(0x200600, 0x203fff) AM_WRITE(MWA16_RAM ) //
AM_RANGE(0x200600, 0x203fff) AM_WRITE(SMH_RAM ) //
AM_RANGE(0x204000, 0x2045ff) AM_WRITE(blmbycar_palette_w) AM_BASE(&paletteram16 ) // Palette
AM_RANGE(0x204600, 0x207fff) AM_WRITE(MWA16_RAM ) //
AM_RANGE(0x440000, 0x441fff) AM_WRITE(MWA16_RAM ) //
AM_RANGE(0x444000, 0x445fff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size ) // Sprites (size?)
AM_RANGE(0x70000a, 0x70000b) AM_WRITE(MWA16_NOP ) // ?? busy
AM_RANGE(0x204600, 0x207fff) AM_WRITE(SMH_RAM ) //
AM_RANGE(0x440000, 0x441fff) AM_WRITE(SMH_RAM ) //
AM_RANGE(0x444000, 0x445fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size ) // Sprites (size?)
AM_RANGE(0x70000a, 0x70000b) AM_WRITE(SMH_NOP ) // ?? busy
AM_RANGE(0x70000c, 0x70000d) AM_WRITE(blmbycar_okibank_w ) // Sound
AM_RANGE(0x70000e, 0x70000f) AM_WRITE(OKIM6295_data_0_lsb_w ) //
ADDRESS_MAP_END

10
src/mame/drivers/blockade.c
View File

@ -116,15 +116,15 @@ static WRITE8_HANDLER( blockade_coin_latch_w )
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x07ff) AM_READ(MRA8_ROM) AM_MIRROR(0x6000)
AM_RANGE(0x8000, 0x83ff) AM_READ(MRA8_RAM) AM_MIRROR(0x6c00)
AM_RANGE(0x9000, 0x90ff) AM_READ(MRA8_RAM) AM_MIRROR(0x6f00)
AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_ROM) AM_MIRROR(0x6000)
AM_RANGE(0x8000, 0x83ff) AM_READ(SMH_RAM) AM_MIRROR(0x6c00)
AM_RANGE(0x9000, 0x90ff) AM_READ(SMH_RAM) AM_MIRROR(0x6f00)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x07ff) AM_WRITE(MWA8_ROM) AM_MIRROR(0x6000)
AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_ROM) AM_MIRROR(0x6000)
AM_RANGE(0x8000, 0x83ff) AM_WRITE(blockade_videoram_w) AM_BASE(&videoram) AM_MIRROR(0x6c00)
AM_RANGE(0x9000, 0x90ff) AM_WRITE(MWA8_RAM) AM_MIRROR(0x6f00)
AM_RANGE(0x9000, 0x90ff) AM_WRITE(SMH_RAM) AM_MIRROR(0x6f00)
ADDRESS_MAP_END
static ADDRESS_MAP_START( readport, ADDRESS_SPACE_IO, 8 )

22
src/mame/drivers/blockhl.c
View File

@ -73,10 +73,10 @@ static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1f97, 0x1f97) AM_READ(input_port_2_r)
AM_RANGE(0x1f98, 0x1f98) AM_READ(input_port_3_r)
AM_RANGE(0x0000, 0x3fff) AM_READ(K052109_051960_r)
AM_RANGE(0x4000, 0x57ff) AM_READ(MRA8_RAM)
AM_RANGE(0x4000, 0x57ff) AM_READ(SMH_RAM)
AM_RANGE(0x5800, 0x5fff) AM_READ(bankedram_r)
AM_RANGE(0x6000, 0x7fff) AM_READ(MRA8_BANK1)
AM_RANGE(0x8000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK1)
AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
@ -84,25 +84,25 @@ static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1f88, 0x1f88) AM_WRITE(blockhl_sh_irqtrigger_w)
AM_RANGE(0x1f8c, 0x1f8c) AM_WRITE(watchdog_reset_w)
AM_RANGE(0x0000, 0x3fff) AM_WRITE(K052109_051960_w)
AM_RANGE(0x4000, 0x57ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x4000, 0x57ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x5800, 0x5fff) AM_WRITE(bankedram_w) AM_BASE(&ram)
AM_RANGE(0x6000, 0x7fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x8000, 0xffff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x6000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(MRA8_ROM)
AM_RANGE(0x8000, 0x87ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
AM_RANGE(0xc001, 0xc001) AM_READ(YM2151_status_port_0_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x8000, 0x87ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
AM_RANGE(0xc000, 0xc000) AM_WRITE(YM2151_register_port_0_w)
AM_RANGE(0xc001, 0xc001) AM_WRITE(YM2151_data_port_0_w)
AM_RANGE(0xe00c, 0xe00d) AM_WRITE(MWA8_NOP) /* leftover from missing 007232? */
AM_RANGE(0xe00c, 0xe00d) AM_WRITE(SMH_NOP) /* leftover from missing 007232? */
ADDRESS_MAP_END
/***************************************************************************

34
src/mame/drivers/blockout.c
View File

@ -43,44 +43,44 @@ static WRITE16_HANDLER( blockout_sound_command_w )
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_READ(MRA16_ROM)
AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
AM_RANGE(0x100000, 0x100001) AM_READ(input_port_0_word_r)
AM_RANGE(0x100002, 0x100003) AM_READ(input_port_1_word_r)
AM_RANGE(0x100004, 0x100005) AM_READ(input_port_2_word_r)
AM_RANGE(0x100006, 0x100007) AM_READ(input_port_3_word_r)
AM_RANGE(0x100008, 0x100009) AM_READ(input_port_4_word_r)
AM_RANGE(0x180000, 0x1bffff) AM_READ(MRA16_RAM)
AM_RANGE(0x1d4000, 0x1dffff) AM_READ(MRA16_RAM)
AM_RANGE(0x1f4000, 0x1fffff) AM_READ(MRA16_RAM)
AM_RANGE(0x200000, 0x207fff) AM_READ(MRA16_RAM)
AM_RANGE(0x208000, 0x21ffff) AM_READ(MRA16_RAM)
AM_RANGE(0x280200, 0x2805ff) AM_READ(MRA16_RAM)
AM_RANGE(0x180000, 0x1bffff) AM_READ(SMH_RAM)
AM_RANGE(0x1d4000, 0x1dffff) AM_READ(SMH_RAM)
AM_RANGE(0x1f4000, 0x1fffff) AM_READ(SMH_RAM)
AM_RANGE(0x200000, 0x207fff) AM_READ(SMH_RAM)
AM_RANGE(0x208000, 0x21ffff) AM_READ(SMH_RAM)
AM_RANGE(0x280200, 0x2805ff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_WRITE(MWA16_ROM)
AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x100014, 0x100015) AM_WRITE(blockout_sound_command_w)
AM_RANGE(0x100016, 0x100017) AM_WRITE(MWA16_NOP) /* don't know, maybe reset sound CPU */
AM_RANGE(0x100016, 0x100017) AM_WRITE(SMH_NOP) /* don't know, maybe reset sound CPU */
AM_RANGE(0x180000, 0x1bffff) AM_WRITE(blockout_videoram_w) AM_BASE(&blockout_videoram)
AM_RANGE(0x1d4000, 0x1dffff) AM_WRITE(MWA16_RAM) /* work RAM */
AM_RANGE(0x1f4000, 0x1fffff) AM_WRITE(MWA16_RAM) /* work RAM */
AM_RANGE(0x200000, 0x207fff) AM_WRITE(MWA16_RAM) AM_BASE(&blockout_frontvideoram)
AM_RANGE(0x208000, 0x21ffff) AM_WRITE(MWA16_RAM) /* ??? */
AM_RANGE(0x1d4000, 0x1dffff) AM_WRITE(SMH_RAM) /* work RAM */
AM_RANGE(0x1f4000, 0x1fffff) AM_WRITE(SMH_RAM) /* work RAM */
AM_RANGE(0x200000, 0x207fff) AM_WRITE(SMH_RAM) AM_BASE(&blockout_frontvideoram)
AM_RANGE(0x208000, 0x21ffff) AM_WRITE(SMH_RAM) /* ??? */
AM_RANGE(0x280002, 0x280003) AM_WRITE(blockout_frontcolor_w)
AM_RANGE(0x280200, 0x2805ff) AM_WRITE(blockout_paletteram_w) AM_BASE(&paletteram16)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(MRA8_ROM)
AM_RANGE(0x8000, 0x87ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
AM_RANGE(0x8801, 0x8801) AM_READ(YM2151_status_port_0_r)
AM_RANGE(0x9800, 0x9800) AM_READ(OKIM6295_status_0_r)
AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x8000, 0x87ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x8800, 0x8800) AM_WRITE(YM2151_register_port_0_w)
AM_RANGE(0x8801, 0x8801) AM_WRITE(YM2151_data_port_0_w)
AM_RANGE(0x9800, 0x9800) AM_WRITE(OKIM6295_data_0_w)

8
src/mame/drivers/blstroid.c
View File

@ -89,7 +89,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xff8200, 0xff8201) AM_MIRROR(0x7f81fe) AM_WRITE(atarigen_scanline_int_ack_w)
AM_RANGE(0xff8400, 0xff8401) AM_MIRROR(0x7f81fe) AM_WRITE(atarigen_video_int_ack_w)
AM_RANGE(0xff8600, 0xff8601) AM_MIRROR(0x7f81fe) AM_WRITE(atarigen_eeprom_enable_w)
AM_RANGE(0xff8800, 0xff89ff) AM_MIRROR(0x7f8000) AM_WRITE(MWA16_RAM) AM_BASE(&blstroid_priorityram)
AM_RANGE(0xff8800, 0xff89ff) AM_MIRROR(0x7f8000) AM_WRITE(SMH_RAM) AM_BASE(&blstroid_priorityram)
AM_RANGE(0xff8a00, 0xff8a01) AM_MIRROR(0x7f81fe) AM_WRITE(atarigen_sound_w)
AM_RANGE(0xff8c00, 0xff8c01) AM_MIRROR(0x7f81fe) AM_WRITE(atarigen_sound_reset_w)
AM_RANGE(0xff8e00, 0xff8e01) AM_MIRROR(0x7f81fe) AM_WRITE(atarigen_halt_until_hblank_0_w)
@ -97,10 +97,10 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xff9800, 0xff9801) AM_MIRROR(0x7f83f8) AM_READ(input_port_0_word_r)
AM_RANGE(0xff9804, 0xff9805) AM_MIRROR(0x7f83f8) AM_READ(input_port_1_word_r)
AM_RANGE(0xff9c00, 0xff9c03) AM_MIRROR(0x7f83fc) AM_READ(inputs_r)
AM_RANGE(0xffa000, 0xffa3ff) AM_MIRROR(0x7f8c00) AM_READWRITE(MRA16_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xffa000, 0xffa3ff) AM_MIRROR(0x7f8c00) AM_READWRITE(SMH_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xffb000, 0xffb3ff) AM_MIRROR(0x7f8c00) AM_READWRITE(atarigen_eeprom_r, atarigen_eeprom_w) AM_BASE(&atarigen_eeprom) AM_SIZE(&atarigen_eeprom_size)
AM_RANGE(0xffc000, 0xffcfff) AM_MIRROR(0x7f8000) AM_READWRITE(MRA16_RAM, atarigen_playfield_w) AM_BASE(&atarigen_playfield)
AM_RANGE(0xffd000, 0xffdfff) AM_MIRROR(0x7f8000) AM_READWRITE(MRA16_RAM, atarimo_0_spriteram_w) AM_BASE(&atarimo_0_spriteram)
AM_RANGE(0xffc000, 0xffcfff) AM_MIRROR(0x7f8000) AM_READWRITE(SMH_RAM, atarigen_playfield_w) AM_BASE(&atarigen_playfield)
AM_RANGE(0xffd000, 0xffdfff) AM_MIRROR(0x7f8000) AM_READWRITE(SMH_RAM, atarimo_0_spriteram_w) AM_BASE(&atarimo_0_spriteram)
AM_RANGE(0xffe000, 0xffffff) AM_MIRROR(0x7f8000) AM_RAM
ADDRESS_MAP_END

22
src/mame/drivers/bmcbowl.c
View File

@ -327,20 +327,20 @@ static ADDRESS_MAP_START( bmcbowl_mem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x090000, 0x090001) AM_WRITE(bmc_RAMDAC_offset_w)
AM_RANGE(0x090002, 0x090003) AM_WRITE(bmc_RAMDAC_color_w)
AM_RANGE(0x090004, 0x090005) AM_WRITE(MWA16_NOP)//RAMDAC
AM_RANGE(0x090004, 0x090005) AM_WRITE(SMH_NOP)//RAMDAC
AM_RANGE(0x090800, 0x090803) AM_WRITE(MWA16_NOP)
AM_RANGE(0x091000, 0x091001) AM_WRITE(MWA16_NOP)
AM_RANGE(0x090800, 0x090803) AM_WRITE(SMH_NOP)
AM_RANGE(0x091000, 0x091001) AM_WRITE(SMH_NOP)
AM_RANGE(0x091800, 0x091801) AM_WRITE(scroll_w)
AM_RANGE(0x092000, 0x09201f) AM_READWRITE(via_r,via_w)
AM_RANGE(0x093000, 0x093003) AM_WRITE(MWA16_NOP) // related to music
AM_RANGE(0x093000, 0x093003) AM_WRITE(SMH_NOP) // related to music
AM_RANGE(0x092800, 0x092801) AM_WRITE(AY8910_write_port_0_msb_w )
AM_RANGE(0x092802, 0x092803) AM_READ(AY8910_read_port_0_msb_r) AM_WRITE(AY8910_control_port_0_msb_w )
AM_RANGE(0x093802, 0x093803) AM_READ(input_port_0_word_r)
AM_RANGE(0x095000, 0x095fff) AM_RAM AM_BASE((UINT16 **)&stats_ram) AM_SIZE(&stats_ram_size) /* 8 bit */
AM_RANGE(0x097000, 0x097001) AM_READ(MRA16_NOP)
AM_RANGE(0x097000, 0x097001) AM_READ(SMH_NOP)
AM_RANGE(0x140000, 0x1bffff) AM_ROM
AM_RANGE(0x1c0000, 0x1effff) AM_RAM AM_BASE(&bmcbowl_vid1)
AM_RANGE(0x1f0000, 0x1fffff) AM_RAM
@ -349,13 +349,13 @@ static ADDRESS_MAP_START( bmcbowl_mem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x28c000, 0x28c001) AM_READWRITE(OKIM6295_status_0_msb_r,OKIM6295_data_0_msb_w)
/* protection device*/
AM_RANGE(0x30c000, 0x30c001) AM_WRITE(MWA16_NOP)
AM_RANGE(0x30c040, 0x30c041) AM_WRITE(MWA16_NOP)
AM_RANGE(0x30c080, 0x30c081) AM_WRITE(MWA16_NOP)
AM_RANGE(0x30c0c0, 0x30c0c1) AM_WRITE(MWA16_NOP)
AM_RANGE(0x30c000, 0x30c001) AM_WRITE(SMH_NOP)
AM_RANGE(0x30c040, 0x30c041) AM_WRITE(SMH_NOP)
AM_RANGE(0x30c080, 0x30c081) AM_WRITE(SMH_NOP)
AM_RANGE(0x30c0c0, 0x30c0c1) AM_WRITE(SMH_NOP)
AM_RANGE(0x30c100, 0x30c101) AM_READ(bmc_protection_r)
AM_RANGE(0x30c140, 0x30c141) AM_WRITE(MWA16_NOP)
AM_RANGE(0x30ca00, 0x30ca01) AM_READ(bmc_random_read) AM_WRITE(MWA16_NOP)
AM_RANGE(0x30c140, 0x30c141) AM_WRITE(SMH_NOP)
AM_RANGE(0x30ca00, 0x30ca01) AM_READ(bmc_random_read) AM_WRITE(SMH_NOP)
ADDRESS_MAP_END

22
src/mame/drivers/bnstars.c
View File

@ -1239,18 +1239,18 @@ static ADDRESS_MAP_START( bnstars_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0xfcc00008, 0xfcc0000b) AM_READ( bnstars2_r )
AM_RANGE(0xfcc00010, 0xfcc00013) AM_READ( bnstars3_r )
AM_RANGE(0xfce00034, 0xfce00037) AM_WRITE(MWA32_NOP)
AM_RANGE(0xfce00034, 0xfce00037) AM_WRITE(SMH_NOP)
AM_RANGE(0xfce00050, 0xfce00053) AM_WRITE(MWA32_NOP)
AM_RANGE(0xfce00058, 0xfce0005b) AM_WRITE(MWA32_NOP)
AM_RANGE(0xfce0005c, 0xfce0005f) AM_WRITE(MWA32_NOP)
AM_RANGE(0xfce00050, 0xfce00053) AM_WRITE(SMH_NOP)
AM_RANGE(0xfce00058, 0xfce0005b) AM_WRITE(SMH_NOP)
AM_RANGE(0xfce0005c, 0xfce0005f) AM_WRITE(SMH_NOP)
AM_RANGE(0xfce00400, 0xfce0045f) AM_WRITE(MWA32_RAM) AM_BASE(&ms32_roz_ctrl[0])
AM_RANGE(0xfce00700, 0xfce0075f) AM_WRITE(MWA32_RAM) AM_BASE(&ms32_roz_ctrl[1]) // guess
AM_RANGE(0xfce00a00, 0xfce00a17) AM_WRITE(MWA32_RAM) AM_BASE(&ms32_tx0_scroll)
AM_RANGE(0xfce00a20, 0xfce00a37) AM_WRITE(MWA32_RAM) AM_BASE(&ms32_bg0_scroll)
AM_RANGE(0xfce00c00, 0xfce00c17) AM_WRITE(MWA32_RAM) AM_BASE(&ms32_tx1_scroll)
AM_RANGE(0xfce00c20, 0xfce00c37) AM_WRITE(MWA32_RAM) AM_BASE(&ms32_bg1_scroll)
AM_RANGE(0xfce00400, 0xfce0045f) AM_WRITE(SMH_RAM) AM_BASE(&ms32_roz_ctrl[0])
AM_RANGE(0xfce00700, 0xfce0075f) AM_WRITE(SMH_RAM) AM_BASE(&ms32_roz_ctrl[1]) // guess
AM_RANGE(0xfce00a00, 0xfce00a17) AM_WRITE(SMH_RAM) AM_BASE(&ms32_tx0_scroll)
AM_RANGE(0xfce00a20, 0xfce00a37) AM_WRITE(SMH_RAM) AM_BASE(&ms32_bg0_scroll)
AM_RANGE(0xfce00c00, 0xfce00c17) AM_WRITE(SMH_RAM) AM_BASE(&ms32_tx1_scroll)
AM_RANGE(0xfce00c20, 0xfce00c37) AM_WRITE(SMH_RAM) AM_BASE(&ms32_bg1_scroll)
AM_RANGE(0xfce00e00, 0xfce00e03) AM_WRITE(bnstars1_mahjong_select_w) // ?
@ -1268,7 +1268,7 @@ static ADDRESS_MAP_START( bnstars_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0xfec08000, 0xfec0ffff) AM_RAM AM_WRITE(ms32_bg0_ram_w) AM_BASE(&ms32_bg0_ram)
AM_RANGE(0xfee00000, 0xfee1ffff) AM_RAM
AM_RANGE(0xffe00000, 0xffffffff) AM_READWRITE(MRA32_BANK1, MWA32_ROM)
AM_RANGE(0xffe00000, 0xffffffff) AM_READWRITE(SMH_BANK1, SMH_ROM)
ADDRESS_MAP_END
#if 0

26
src/mame/drivers/bombjack.c
View File

@ -137,41 +137,41 @@ static READ8_HANDLER( bombjack_soundlatch_r )
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(MRA8_ROM)
AM_RANGE(0x8000, 0x97ff) AM_READ(MRA8_RAM) /* including video and color RAM */
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x97ff) AM_READ(SMH_RAM) /* including video and color RAM */
AM_RANGE(0xb000, 0xb000) AM_READ(input_port_0_r) /* player 1 input */
AM_RANGE(0xb001, 0xb001) AM_READ(input_port_1_r) /* player 2 input */
AM_RANGE(0xb002, 0xb002) AM_READ(input_port_2_r) /* coin */
AM_RANGE(0xb003, 0xb003) AM_READ(MRA8_NOP) /* watchdog reset? */
AM_RANGE(0xb003, 0xb003) AM_READ(SMH_NOP) /* watchdog reset? */
AM_RANGE(0xb004, 0xb004) AM_READ(input_port_3_r) /* DSW1 */
AM_RANGE(0xb005, 0xb005) AM_READ(input_port_4_r) /* DSW2 */
AM_RANGE(0xc000, 0xdfff) AM_READ(MRA8_ROM)
AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x8000, 0x8fff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0x8fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x9000, 0x93ff) AM_WRITE(bombjack_videoram_w) AM_BASE(&videoram)
AM_RANGE(0x9400, 0x97ff) AM_WRITE(bombjack_colorram_w) AM_BASE(&colorram)
AM_RANGE(0x9820, 0x987f) AM_WRITE(MWA8_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x9a00, 0x9a00) AM_WRITE(MWA8_NOP)
AM_RANGE(0x9820, 0x987f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x9a00, 0x9a00) AM_WRITE(SMH_NOP)
AM_RANGE(0x9c00, 0x9cff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_le_w) AM_BASE(&paletteram)
AM_RANGE(0x9e00, 0x9e00) AM_WRITE(bombjack_background_w)
AM_RANGE(0xb000, 0xb000) AM_WRITE(interrupt_enable_w)
AM_RANGE(0xb004, 0xb004) AM_WRITE(bombjack_flipscreen_w)
AM_RANGE(0xb800, 0xb800) AM_WRITE(bombjack_soundlatch_w)
AM_RANGE(0xc000, 0xdfff) AM_WRITE(MWA8_ROM)
AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( bombjack_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_READ(MRA8_ROM)
AM_RANGE(0x4000, 0x43ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
AM_RANGE(0x4000, 0x43ff) AM_READ(SMH_RAM)
AM_RANGE(0x6000, 0x6000) AM_READ(bombjack_soundlatch_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( bombjack_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x4000, 0x43ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x4000, 0x43ff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END

32
src/mame/drivers/boogwing.c
View File

@ -107,17 +107,17 @@ static ADDRESS_MAP_START( boogwing_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x24e344, 0x24e345) AM_READ(input_port_2_word_r)
AM_RANGE(0x24e000, 0x24e7ff) AM_WRITE(deco16_104_prot_w) AM_BASE(&deco16_prot_ram)
AM_RANGE(0x260000, 0x26000f) AM_WRITE(MWA16_RAM) AM_BASE(&deco16_pf12_control)
AM_RANGE(0x264000, 0x265fff) AM_READ(MRA16_RAM) AM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
AM_RANGE(0x266000, 0x267fff) AM_READ(MRA16_RAM) AM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
AM_RANGE(0x268000, 0x268fff) AM_READ(MRA16_RAM) AM_WRITE(MWA16_RAM) AM_BASE(&deco16_pf1_rowscroll)
AM_RANGE(0x26a000, 0x26afff) AM_READ(MRA16_RAM) AM_WRITE(MWA16_RAM) AM_BASE(&deco16_pf2_rowscroll)
AM_RANGE(0x260000, 0x26000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf12_control)
AM_RANGE(0x264000, 0x265fff) AM_READ(SMH_RAM) AM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
AM_RANGE(0x266000, 0x267fff) AM_READ(SMH_RAM) AM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
AM_RANGE(0x268000, 0x268fff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf1_rowscroll)
AM_RANGE(0x26a000, 0x26afff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf2_rowscroll)
AM_RANGE(0x270000, 0x27000f) AM_WRITE(MWA16_RAM) AM_BASE(&deco16_pf34_control)
AM_RANGE(0x274000, 0x275fff) AM_READ(MRA16_RAM) AM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
AM_RANGE(0x276000, 0x277fff) AM_READ(MRA16_RAM) AM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
AM_RANGE(0x278000, 0x278fff) AM_READ(MRA16_RAM) AM_WRITE(MWA16_RAM) AM_BASE(&deco16_pf3_rowscroll)
AM_RANGE(0x27a000, 0x27afff) AM_READ(MRA16_RAM) AM_WRITE(MWA16_RAM) AM_BASE(&deco16_pf4_rowscroll)
AM_RANGE(0x270000, 0x27000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf34_control)
AM_RANGE(0x274000, 0x275fff) AM_READ(SMH_RAM) AM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
AM_RANGE(0x276000, 0x277fff) AM_READ(SMH_RAM) AM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
AM_RANGE(0x278000, 0x278fff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf3_rowscroll)
AM_RANGE(0x27a000, 0x27afff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf4_rowscroll)
AM_RANGE(0x280000, 0x28000f) AM_NOP // ?
AM_RANGE(0x282000, 0x282001) AM_NOP // Palette setup?
@ -129,22 +129,22 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x000000, 0x00ffff) AM_READ(MRA8_ROM)
AM_RANGE(0x100000, 0x100001) AM_READ(MRA8_NOP)
AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM)
AM_RANGE(0x100000, 0x100001) AM_READ(SMH_NOP)
AM_RANGE(0x110000, 0x110001) AM_READ(YM2151_status_port_0_r)
AM_RANGE(0x120000, 0x120001) AM_READ(OKIM6295_status_0_r)
AM_RANGE(0x130000, 0x130001) AM_READ(OKIM6295_status_1_r)
AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(MRA8_BANK8)
AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_BANK8)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x000000, 0x00ffff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x100000, 0x100001) AM_WRITE(MWA8_NOP)
AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x100000, 0x100001) AM_WRITE(SMH_NOP)
AM_RANGE(0x110000, 0x110001) AM_WRITE(YM2151_word_0_w)
AM_RANGE(0x120000, 0x120001) AM_WRITE(OKIM6295_data_0_w)
AM_RANGE(0x130000, 0x130001) AM_WRITE(OKIM6295_data_1_w)
AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(MWA8_BANK8)
AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_BANK8)
AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(H6280_timer_w)
AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(H6280_irq_status_w)
ADDRESS_MAP_END

20
src/mame/drivers/bottom9.c
View File

@ -136,9 +136,9 @@ static ADDRESS_MAP_START( bottom9_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1fe0, 0x1fe0) AM_READ(input_port_3_r)
AM_RANGE(0x2000, 0x27ff) AM_READ(bottom9_bankedram2_r)
AM_RANGE(0x0000, 0x3fff) AM_READ(K052109_051960_r)
AM_RANGE(0x4000, 0x5fff) AM_READ(MRA8_RAM)
AM_RANGE(0x6000, 0x7fff) AM_READ(MRA8_BANK1)
AM_RANGE(0x8000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_RAM)
AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK1)
AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( bottom9_writemem, ADDRESS_SPACE_PROGRAM, 8 )
@ -151,22 +151,22 @@ static ADDRESS_MAP_START( bottom9_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1ff0, 0x1fff) AM_WRITE(K051316_ctrl_0_w)
AM_RANGE(0x2000, 0x27ff) AM_WRITE(bottom9_bankedram2_w) AM_BASE(&paletteram)
AM_RANGE(0x0000, 0x3fff) AM_WRITE(K052109_051960_w)
AM_RANGE(0x4000, 0x5fff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x6000, 0x7fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x8000, 0xffff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x4000, 0x5fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x6000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( bottom9_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(MRA8_ROM)
AM_RANGE(0x8000, 0x87ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
AM_RANGE(0xa000, 0xa00d) AM_READ(K007232_read_port_0_r)
AM_RANGE(0xb000, 0xb00d) AM_READ(K007232_read_port_1_r)
AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( bottom9_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x8000, 0x87ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x9000, 0x9000) AM_WRITE(sound_bank_w)
AM_RANGE(0xa000, 0xa00d) AM_WRITE(K007232_write_port_0_w)
AM_RANGE(0xb000, 0xb00d) AM_WRITE(K007232_write_port_1_w)

2
src/mame/drivers/boxer.c
View File

@ -189,7 +189,7 @@ static ADDRESS_MAP_START( boxer_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1b00, 0x1bff) AM_WRITE(boxer_crowd_w)
AM_RANGE(0x1c00, 0x1cff) AM_WRITE(boxer_irq_reset_w)
AM_RANGE(0x1d00, 0x1dff) AM_WRITE(boxer_bell_w)
AM_RANGE(0x1e00, 0x1eff) AM_WRITE(MWA8_RAM) AM_BASE(&boxer_sprite_ram)
AM_RANGE(0x1e00, 0x1eff) AM_WRITE(SMH_RAM) AM_BASE(&boxer_sprite_ram)
AM_RANGE(0x1f00, 0x1fff) AM_WRITE(watchdog_reset_w)
AM_RANGE(0x3000, 0x3fff) AM_ROM
ADDRESS_MAP_END

10
src/mame/drivers/brkthru.c
View File

@ -98,9 +98,9 @@ static INPUT_CHANGED( coin_inserted )
static ADDRESS_MAP_START( brkthru_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x03ff) AM_READWRITE(MRA8_RAM, brkthru_fgram_w) AM_BASE(&brkthru_videoram) AM_SIZE(&brkthru_videoram_size)
AM_RANGE(0x0000, 0x03ff) AM_READWRITE(SMH_RAM, brkthru_fgram_w) AM_BASE(&brkthru_videoram) AM_SIZE(&brkthru_videoram_size)
AM_RANGE(0x0400, 0x0bff) AM_RAM
AM_RANGE(0x0c00, 0x0fff) AM_READWRITE(MRA8_RAM, brkthru_bgram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x0c00, 0x0fff) AM_READWRITE(SMH_RAM, brkthru_bgram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x1000, 0x10ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x1100, 0x17ff) AM_RAM
AM_RANGE(0x1800, 0x1800) AM_READ(input_port_0_r) /* player controls, player start */
@ -117,11 +117,11 @@ ADDRESS_MAP_END
/* same as brktrhu, but xor 0x1000 below 8k */
static ADDRESS_MAP_START( darwin_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1000, 0x13ff) AM_READWRITE(MRA8_RAM, brkthru_fgram_w) AM_BASE(&brkthru_videoram) AM_SIZE(&brkthru_videoram_size)
AM_RANGE(0x1000, 0x13ff) AM_READWRITE(SMH_RAM, brkthru_fgram_w) AM_BASE(&brkthru_videoram) AM_SIZE(&brkthru_videoram_size)
AM_RANGE(0x1400, 0x1bff) AM_RAM
AM_RANGE(0x1c00, 0x1fff) AM_READWRITE(MRA8_RAM, brkthru_bgram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x1c00, 0x1fff) AM_READWRITE(SMH_RAM, brkthru_bgram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0x0000, 0x00ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x0100, 0x01ff) AM_WRITE(MWA8_NOP) /*tidyup, nothing realy here?*/
AM_RANGE(0x0100, 0x01ff) AM_WRITE(SMH_NOP) /*tidyup, nothing realy here?*/
AM_RANGE(0x0800, 0x0800) AM_READ(input_port_0_r) /* player controls, player start */
AM_RANGE(0x0801, 0x0801) AM_READ(input_port_1_r) /* cocktail player controls */
AM_RANGE(0x0802, 0x0802) AM_READ(input_port_3_r) /* DSW 0 */

6
src/mame/drivers/bsktball.c
View File

@ -77,9 +77,9 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0800, 0x0800) AM_READ(bsktball_in0_r)
AM_RANGE(0x0802, 0x0802) AM_READ(input_port_5_r)
AM_RANGE(0x0803, 0x0803) AM_READ(input_port_6_r)
AM_RANGE(0x1000, 0x1000) AM_WRITE(MWA8_NOP) /* Timer Reset */
AM_RANGE(0x1000, 0x1000) AM_WRITE(SMH_NOP) /* Timer Reset */
AM_RANGE(0x1010, 0x1010) AM_WRITE(bsktball_bounce_w) /* Crowd Amp / Bounce */
AM_RANGE(0x1022, 0x1023) AM_WRITE(MWA8_NOP) /* Coin Counter */
AM_RANGE(0x1022, 0x1023) AM_WRITE(SMH_NOP) /* Coin Counter */
AM_RANGE(0x1024, 0x1025) AM_WRITE(bsktball_led1_w) /* LED 1 */
AM_RANGE(0x1026, 0x1027) AM_WRITE(bsktball_led2_w) /* LED 2 */
AM_RANGE(0x1028, 0x1029) AM_WRITE(bsktball_ld1_w) /* LD 1 */
@ -87,7 +87,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x102c, 0x102d) AM_WRITE(bsktball_noise_reset_w) /* Noise Reset */
AM_RANGE(0x102e, 0x102f) AM_WRITE(bsktball_nmion_w) /* NMI On */
AM_RANGE(0x1030, 0x1030) AM_WRITE(bsktball_note_w) /* Music Ckt Note Dvsr */
AM_RANGE(0x1800, 0x1bbf) AM_READWRITE(MRA8_RAM, bsktball_videoram_w) AM_BASE(&videoram) /* DISPLAY */
AM_RANGE(0x1800, 0x1bbf) AM_READWRITE(SMH_RAM, bsktball_videoram_w) AM_BASE(&videoram) /* DISPLAY */
AM_RANGE(0x1bc0, 0x1bff) AM_RAM AM_BASE(&bsktball_motion)
AM_RANGE(0x1c00, 0x1cff) AM_RAM
AM_RANGE(0x2000, 0x3fff) AM_ROM /* PROGRAM */

48
src/mame/drivers/btime.c
View File

@ -151,10 +151,10 @@ static WRITE8_HANDLER( lnc_w )
if (offset <= 0x3bff) ;
else if (offset >= 0x3c00 && offset <= 0x3fff) { lnc_videoram_w(machine,offset - 0x3c00,data); return; }
else if (offset >= 0x7c00 && offset <= 0x7fff) { lnc_mirrorvideoram_w(machine,offset - 0x7c00,data); return; }
else if (offset == 0x8000) { return; } /* MWA8_NOP */
else if (offset == 0x8000) { return; } /* SMH_NOP */
else if (offset == 0x8001) { lnc_video_control_w(machine,0,data); return; }
else if (offset == 0x8003) ;
else if (offset == 0x9000) { return; } /* MWA8_NOP */
else if (offset == 0x9000) { return; } /* SMH_NOP */
else if (offset == 0x9002) { audio_command_w(machine,0,data); return; }
else if (offset >= 0xb000 && offset <= 0xb1ff) ;
else logerror("CPU #%d PC %04x: warning - write %02x to unmapped memory address %04x\n",cpu_getactivecpu(),activecpu_get_pc(),data,offset);
@ -172,7 +172,7 @@ static WRITE8_HANDLER( mmonkey_w )
else if (offset >= 0x7c00 && offset <= 0x7fff) { lnc_mirrorvideoram_w(machine,offset - 0x7c00,data); return; }
else if (offset == 0x8001) { lnc_video_control_w(machine,0,data); return; }
else if (offset == 0x8003) ;
else if (offset == 0x9000) { return; } /* MWA8_NOP */
else if (offset == 0x9000) { return; } /* SMH_NOP */
else if (offset == 0x9002) { audio_command_w(machine,0,data); return; }
else if (offset >= 0xb000 && offset <= 0xbfff) { mmonkey_protection_w(machine,offset - 0xb000, data); return; }
else logerror("CPU #%d PC %04x: warning - write %02x to unmapped memory address %04x\n",cpu_getactivecpu(),activecpu_get_pc(),data,offset);
@ -242,12 +242,12 @@ static ADDRESS_MAP_START( btime_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1400, 0x17ff) AM_RAM AM_BASE(&btime_colorram)
AM_RANGE(0x1800, 0x1bff) AM_READWRITE(btime_mirrorvideoram_r, btime_mirrorvideoram_w)
AM_RANGE(0x1c00, 0x1fff) AM_READWRITE(btime_mirrorcolorram_r, btime_mirrorcolorram_w)
AM_RANGE(0x4000, 0x4000) AM_READWRITE(input_port_0_r, MWA8_NOP)
AM_RANGE(0x4000, 0x4000) AM_READWRITE(input_port_0_r, SMH_NOP)
AM_RANGE(0x4001, 0x4001) AM_READ(input_port_1_r)
AM_RANGE(0x4002, 0x4002) AM_READWRITE(input_port_2_r, btime_video_control_w)
AM_RANGE(0x4003, 0x4003) AM_READWRITE(input_port_3_r, audio_command_w)
AM_RANGE(0x4004, 0x4004) AM_READWRITE(input_port_4_r, bnj_scroll1_w)
AM_RANGE(0xb000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0xb000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( cookrace_map, ADDRESS_SPACE_PROGRAM, 8 )
@ -274,8 +274,8 @@ static ADDRESS_MAP_START( zoar_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xffff) AM_WRITE(zoar_w) /* override the following entries to */
/* support ROM decryption */
AM_RANGE(0x0000, 0x07ff) AM_RAM AM_BASE(&rambase)
AM_RANGE(0x8000, 0x83ff) AM_WRITE(MWA8_RAM) AM_BASE(&btime_videoram) AM_SIZE(&btime_videoram_size)
AM_RANGE(0x8400, 0x87ff) AM_WRITE(MWA8_RAM) AM_BASE(&btime_colorram)
AM_RANGE(0x8000, 0x83ff) AM_WRITE(SMH_RAM) AM_BASE(&btime_videoram) AM_SIZE(&btime_videoram_size)
AM_RANGE(0x8400, 0x87ff) AM_WRITE(SMH_RAM) AM_BASE(&btime_colorram)
AM_RANGE(0x8800, 0x8bff) AM_WRITE(btime_mirrorvideoram_w)
AM_RANGE(0x8c00, 0x8fff) AM_WRITE(btime_mirrorcolorram_w)
AM_RANGE(0x9000, 0x9000) AM_WRITE(zoar_video_control_w)
@ -283,45 +283,45 @@ static ADDRESS_MAP_START( zoar_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x9801, 0x9801) AM_READ(input_port_4_r)
AM_RANGE(0x9802, 0x9802) AM_READ(input_port_0_r)
AM_RANGE(0x9803, 0x9803) AM_READ(input_port_1_r)
AM_RANGE(0x9800, 0x9803) AM_WRITE(MWA8_RAM) AM_BASE(&zoar_scrollram)
AM_RANGE(0x9800, 0x9803) AM_WRITE(SMH_RAM) AM_BASE(&zoar_scrollram)
AM_RANGE(0x9804, 0x9804) AM_READWRITE(input_port_2_r, bnj_scroll2_w)
AM_RANGE(0x9805, 0x9805) AM_WRITE(bnj_scroll1_w)
AM_RANGE(0x9806, 0x9806) AM_WRITE(audio_command_w)
AM_RANGE(0xd000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0xd000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( lnc_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xffff) AM_WRITE(lnc_w) /* override the following entries to */
/* support ROM decryption */
AM_RANGE(0x0000, 0x3bff) AM_RAM AM_BASE(&rambase)
AM_RANGE(0x3c00, 0x3fff) AM_READWRITE(MRA8_RAM, lnc_videoram_w) AM_BASE(&btime_videoram) AM_SIZE(&btime_videoram_size)
AM_RANGE(0x7800, 0x7bff) AM_WRITE(MWA8_RAM) AM_BASE(&btime_colorram) /* this is just here to initialize the pointer */
AM_RANGE(0x3c00, 0x3fff) AM_READWRITE(SMH_RAM, lnc_videoram_w) AM_BASE(&btime_videoram) AM_SIZE(&btime_videoram_size)
AM_RANGE(0x7800, 0x7bff) AM_WRITE(SMH_RAM) AM_BASE(&btime_colorram) /* this is just here to initialize the pointer */
AM_RANGE(0x7c00, 0x7fff) AM_READWRITE(btime_mirrorvideoram_r, lnc_mirrorvideoram_w)
AM_RANGE(0x8000, 0x8000) AM_READWRITE(input_port_3_r, MWA8_NOP) /* ??? */
AM_RANGE(0x8000, 0x8000) AM_READWRITE(input_port_3_r, SMH_NOP) /* ??? */
AM_RANGE(0x8001, 0x8001) AM_READWRITE(input_port_4_r, lnc_video_control_w)
AM_RANGE(0x8003, 0x8003) AM_WRITE(MWA8_RAM) AM_BASE(&lnc_charbank)
AM_RANGE(0x9000, 0x9000) AM_READWRITE(input_port_0_r, MWA8_NOP) /* IRQ ack??? */
AM_RANGE(0x8003, 0x8003) AM_WRITE(SMH_RAM) AM_BASE(&lnc_charbank)
AM_RANGE(0x9000, 0x9000) AM_READWRITE(input_port_0_r, SMH_NOP) /* IRQ ack??? */
AM_RANGE(0x9001, 0x9001) AM_READ(input_port_1_r)
AM_RANGE(0x9002, 0x9002) AM_READWRITE(input_port_2_r, audio_command_w)
AM_RANGE(0xb000, 0xb1ff) AM_RAM
AM_RANGE(0xc000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( mmonkey_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xffff) AM_WRITE(mmonkey_w) /* override the following entries to */
/* support ROM decryption */
AM_RANGE(0x0000, 0x3bff) AM_RAM AM_BASE(&rambase)
AM_RANGE(0x3c00, 0x3fff) AM_READWRITE(MRA8_RAM, lnc_videoram_w) AM_BASE(&btime_videoram) AM_SIZE(&btime_videoram_size)
AM_RANGE(0x7800, 0x7bff) AM_WRITE(MWA8_RAM) AM_BASE(&btime_colorram) /* this is just here to initialize the pointer */
AM_RANGE(0x3c00, 0x3fff) AM_READWRITE(SMH_RAM, lnc_videoram_w) AM_BASE(&btime_videoram) AM_SIZE(&btime_videoram_size)
AM_RANGE(0x7800, 0x7bff) AM_WRITE(SMH_RAM) AM_BASE(&btime_colorram) /* this is just here to initialize the pointer */
AM_RANGE(0x7c00, 0x7fff) AM_READWRITE(btime_mirrorvideoram_r, lnc_mirrorvideoram_w)
AM_RANGE(0x8000, 0x8000) AM_READ(input_port_3_r)
AM_RANGE(0x8001, 0x8001) AM_READWRITE(input_port_4_r, lnc_video_control_w)
AM_RANGE(0x8003, 0x8003) AM_WRITE(MWA8_RAM) AM_BASE(&lnc_charbank)
AM_RANGE(0x9000, 0x9000) AM_READWRITE(input_port_0_r, MWA8_NOP) /* IRQ ack??? */
AM_RANGE(0x8003, 0x8003) AM_WRITE(SMH_RAM) AM_BASE(&lnc_charbank)
AM_RANGE(0x9000, 0x9000) AM_READWRITE(input_port_0_r, SMH_NOP) /* IRQ ack??? */
AM_RANGE(0x9001, 0x9001) AM_READ(input_port_1_r)
AM_RANGE(0x9002, 0x9002) AM_READWRITE(input_port_2_r, audio_command_w)
AM_RANGE(0xb000, 0xbfff) AM_READWRITE(mmonkey_protection_r, mmonkey_protection_w)
AM_RANGE(0xc000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( bnj_map, ADDRESS_SPACE_PROGRAM, 8 )
@ -339,14 +339,14 @@ static ADDRESS_MAP_START( bnj_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x5400, 0x5400) AM_WRITE(bnj_scroll1_w)
AM_RANGE(0x5800, 0x5800) AM_WRITE(bnj_scroll2_w)
AM_RANGE(0x5c00, 0x5c0f) AM_WRITE(btime_paletteram_w) AM_BASE(&paletteram)
AM_RANGE(0xa000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0xa000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( disco_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xffff) AM_WRITE(disco_w) /* override the following entries to */
/* support ROM decryption */
AM_RANGE(0x0000, 0x04ff) AM_RAM AM_BASE(&rambase)
AM_RANGE(0x2000, 0x7fff) AM_READWRITE(MRA8_RAM, deco_charram_w) AM_BASE(&deco_charram)
AM_RANGE(0x2000, 0x7fff) AM_READWRITE(SMH_RAM, deco_charram_w) AM_BASE(&deco_charram)
AM_RANGE(0x8000, 0x83ff) AM_RAM AM_BASE(&btime_videoram) AM_SIZE(&btime_videoram_size)
AM_RANGE(0x8400, 0x87ff) AM_RAM AM_BASE(&btime_colorram)
AM_RANGE(0x8800, 0x881f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
@ -356,7 +356,7 @@ static ADDRESS_MAP_START( disco_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x9800, 0x9800) AM_READ(input_port_3_r)
AM_RANGE(0x9a00, 0x9a00) AM_READWRITE(input_port_4_r, audio_command_w)
AM_RANGE(0x9c00, 0x9c00) AM_READWRITE(input_port_5_r, disco_video_control_w)
AM_RANGE(0xa000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0xa000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
@ -378,7 +378,7 @@ static ADDRESS_MAP_START( disco_audio_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x5000, 0x5fff) AM_WRITE(AY8910_control_port_0_w)
AM_RANGE(0x6000, 0x6fff) AM_WRITE(AY8910_write_port_1_w)
AM_RANGE(0x7000, 0x7fff) AM_WRITE(AY8910_control_port_1_w)
AM_RANGE(0x8000, 0x8fff) AM_READWRITE(soundlatch_r, MWA8_NOP) /* ack ? */
AM_RANGE(0x8000, 0x8fff) AM_READWRITE(soundlatch_r, SMH_NOP) /* ack ? */
AM_RANGE(0xf000, 0xffff) AM_ROM
ADDRESS_MAP_END

8
src/mame/drivers/btoads.c
View File

@ -191,20 +191,20 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x20000180, 0x200001ff) AM_READ(input_port_3_word_r)
AM_RANGE(0x20000200, 0x2000027f) AM_READ(special_port_4_r)
AM_RANGE(0x20000280, 0x200002ff) AM_READ(input_port_5_word_r)
AM_RANGE(0x20000000, 0x200000ff) AM_WRITE(MWA16_RAM) AM_BASE(&btoads_sprite_scale)
AM_RANGE(0x20000100, 0x2000017f) AM_WRITE(MWA16_RAM) AM_BASE(&btoads_sprite_control)
AM_RANGE(0x20000000, 0x200000ff) AM_WRITE(SMH_RAM) AM_BASE(&btoads_sprite_scale)
AM_RANGE(0x20000100, 0x2000017f) AM_WRITE(SMH_RAM) AM_BASE(&btoads_sprite_control)
AM_RANGE(0x20000180, 0x200001ff) AM_WRITE(btoads_display_control_w)
AM_RANGE(0x20000200, 0x2000027f) AM_WRITE(btoads_scroll0_w)
AM_RANGE(0x20000280, 0x200002ff) AM_WRITE(btoads_scroll1_w)
AM_RANGE(0x20000300, 0x2000037f) AM_READWRITE(btoads_paletteram_r, btoads_paletteram_w)
AM_RANGE(0x20000380, 0x200003ff) AM_READWRITE(main_sound_r, main_sound_w)
AM_RANGE(0x20000400, 0x2000047f) AM_WRITE(btoads_misc_control_w)
AM_RANGE(0x40000000, 0x4000000f) AM_WRITE(MWA16_NOP) /* watchdog? */
AM_RANGE(0x40000000, 0x4000000f) AM_WRITE(SMH_NOP) /* watchdog? */
AM_RANGE(0x60000000, 0x6003ffff) AM_RAM AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)
AM_RANGE(0xa0000000, 0xa03fffff) AM_READWRITE(btoads_vram_fg_display_r, btoads_vram_fg_display_w) AM_BASE(&btoads_vram_fg0)
AM_RANGE(0xa4000000, 0xa43fffff) AM_READWRITE(btoads_vram_fg_draw_r, btoads_vram_fg_draw_w) AM_BASE(&btoads_vram_fg1)
AM_RANGE(0xa8000000, 0xa87fffff) AM_RAM AM_BASE(&btoads_vram_fg_data)
AM_RANGE(0xa8800000, 0xa8ffffff) AM_WRITE(MWA16_NOP)
AM_RANGE(0xa8800000, 0xa8ffffff) AM_WRITE(SMH_NOP)
AM_RANGE(0xb0000000, 0xb03fffff) AM_READWRITE(btoads_vram_bg0_r, btoads_vram_bg0_w) AM_BASE(&btoads_vram_bg0)
AM_RANGE(0xb4000000, 0xb43fffff) AM_READWRITE(btoads_vram_bg1_r, btoads_vram_bg1_w) AM_BASE(&btoads_vram_bg1)
AM_RANGE(0xc0000000, 0xc00003ff) AM_READWRITE(tms34020_io_register_r, tms34020_io_register_w)

60
src/mame/drivers/buggychl.c
View File

@ -160,12 +160,12 @@ static WRITE8_HANDLER( sound_enable_w )
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_READ(MRA8_ROM) /* A22-04 (23) */
AM_RANGE(0x4000, 0x7fff) AM_READ(MRA8_ROM) /* A22-05 (22) */
AM_RANGE(0x8000, 0x87ff) AM_READ(MRA8_RAM) /* 6116 SRAM (36) */
AM_RANGE(0x8800, 0x8fff) AM_READ(MRA8_RAM) /* 6116 SRAM (35) */
AM_RANGE(0xa000, 0xbfff) AM_READ(MRA8_BANK1)
AM_RANGE(0xc800, 0xcfff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM) /* A22-04 (23) */
AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_ROM) /* A22-05 (22) */
AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM) /* 6116 SRAM (36) */
AM_RANGE(0x8800, 0x8fff) AM_READ(SMH_RAM) /* 6116 SRAM (35) */
AM_RANGE(0xa000, 0xbfff) AM_READ(SMH_BANK1)
AM_RANGE(0xc800, 0xcfff) AM_READ(SMH_RAM)
AM_RANGE(0xd400, 0xd400) AM_READ(buggychl_mcu_r)
AM_RANGE(0xd401, 0xd401) AM_READ(buggychl_mcu_status_r)
AM_RANGE(0xd600, 0xd600) AM_READ(input_port_0_r) /* dsw */
@ -179,13 +179,13 @@ static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_WRITE(MWA8_ROM) /* A22-04 (23) */
AM_RANGE(0x4000, 0x7fff) AM_WRITE(MWA8_ROM) /* A22-05 (22) */
AM_RANGE(0x8000, 0x87ff) AM_WRITE(MWA8_RAM) /* 6116 SRAM (36) */
AM_RANGE(0x8800, 0x8fff) AM_WRITE(MWA8_RAM) /* 6116 SRAM (35) */
AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM) /* A22-04 (23) */
AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM) /* A22-05 (22) */
AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM) /* 6116 SRAM (36) */
AM_RANGE(0x8800, 0x8fff) AM_WRITE(SMH_RAM) /* 6116 SRAM (35) */
AM_RANGE(0x9000, 0x9fff) AM_WRITE(buggychl_sprite_lookup_w)
AM_RANGE(0xa000, 0xbfff) AM_WRITE(buggychl_chargen_w) AM_BASE(&buggychl_character_ram)
AM_RANGE(0xc800, 0xcfff) AM_WRITE(MWA8_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
AM_RANGE(0xc800, 0xcfff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
// { 0xd000, 0xd000, horizon
AM_RANGE(0xd100, 0xd100) AM_WRITE(buggychl_ctrl_w)
AM_RANGE(0xd200, 0xd200) AM_WRITE(bankswitch_w)
@ -195,40 +195,40 @@ static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xd303, 0xd303) AM_WRITE(buggychl_sprite_lookup_bank_w)
// { 0xd304, 0xd307, sccon 1-4
AM_RANGE(0xd400, 0xd400) AM_WRITE(buggychl_mcu_w)
AM_RANGE(0xd500, 0xd57f) AM_WRITE(MWA8_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xd500, 0xd57f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xd610, 0xd610) AM_WRITE(sound_command_w)
// { 0xd613, 0xd613, reset sound cpu & sound chips
AM_RANGE(0xd618, 0xd618) AM_WRITE(MWA8_NOP) /* accelerator clear */
AM_RANGE(0xd618, 0xd618) AM_WRITE(SMH_NOP) /* accelerator clear */
AM_RANGE(0xd700, 0xd7ff) AM_WRITE(paletteram_xxxxRRRRGGGGBBBB_be_w) AM_BASE(&paletteram)
AM_RANGE(0xd840, 0xd85f) AM_WRITE(MWA8_RAM) AM_BASE(&buggychl_scrollv)
AM_RANGE(0xdb00, 0xdbff) AM_WRITE(MWA8_RAM) AM_BASE(&buggychl_scrollh)
AM_RANGE(0xdc04, 0xdc04) AM_WRITE(MWA8_RAM) /* should be fg scroll */
AM_RANGE(0xd840, 0xd85f) AM_WRITE(SMH_RAM) AM_BASE(&buggychl_scrollv)
AM_RANGE(0xdb00, 0xdbff) AM_WRITE(SMH_RAM) AM_BASE(&buggychl_scrollh)
AM_RANGE(0xdc04, 0xdc04) AM_WRITE(SMH_RAM) /* should be fg scroll */
AM_RANGE(0xdc06, 0xdc06) AM_WRITE(buggychl_bg_scrollx_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_READ(MRA8_ROM)
AM_RANGE(0x4000, 0x47ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
AM_RANGE(0x4000, 0x47ff) AM_READ(SMH_RAM)
AM_RANGE(0x5000, 0x5000) AM_READ(soundlatch_r)
// AM_RANGE(0x5001, 0x5001) AM_READ(MRA8_RAM) /* is command pending? */
AM_RANGE(0xe000, 0xefff) AM_READ(MRA8_ROM) /* space for diagnostics ROM */
// AM_RANGE(0x5001, 0x5001) AM_READ(SMH_RAM) /* is command pending? */
AM_RANGE(0xe000, 0xefff) AM_READ(SMH_ROM) /* space for diagnostics ROM */
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x4000, 0x47ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x4800, 0x4800) AM_WRITE(AY8910_control_port_0_w)
AM_RANGE(0x4801, 0x4801) AM_WRITE(AY8910_write_port_0_w)
AM_RANGE(0x4802, 0x4802) AM_WRITE(AY8910_control_port_1_w)
AM_RANGE(0x4803, 0x4803) AM_WRITE(AY8910_write_port_1_w)
AM_RANGE(0x4810, 0x481d) AM_WRITE(MSM5232_0_w)
AM_RANGE(0x4820, 0x4820) AM_WRITE(MWA8_RAM) /* VOL/BAL for the 7630 on the MSM5232 output */
AM_RANGE(0x4830, 0x4830) AM_WRITE(MWA8_RAM) /* TRBL/BASS for the 7630 on the MSM5232 output */
// AM_RANGE(0x5000, 0x5000) AM_WRITE(MWA8_RAM) /* to main cpu */
AM_RANGE(0x4820, 0x4820) AM_WRITE(SMH_RAM) /* VOL/BAL for the 7630 on the MSM5232 output */
AM_RANGE(0x4830, 0x4830) AM_WRITE(SMH_RAM) /* TRBL/BASS for the 7630 on the MSM5232 output */
// AM_RANGE(0x5000, 0x5000) AM_WRITE(SMH_RAM) /* to main cpu */
AM_RANGE(0x5001, 0x5001) AM_WRITE(nmi_enable_w)
AM_RANGE(0x5002, 0x5002) AM_WRITE(nmi_disable_w)
AM_RANGE(0x5003, 0x5003) AM_WRITE(sound_enable_w)
AM_RANGE(0xe000, 0xefff) AM_WRITE(MWA8_ROM)
AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( mcu_readmem, ADDRESS_SPACE_PROGRAM, 8 )
@ -236,8 +236,8 @@ static ADDRESS_MAP_START( mcu_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0000) AM_READ(buggychl_68705_portA_r)
AM_RANGE(0x0001, 0x0001) AM_READ(buggychl_68705_portB_r)
AM_RANGE(0x0002, 0x0002) AM_READ(buggychl_68705_portC_r)
AM_RANGE(0x0010, 0x007f) AM_READ(MRA8_RAM)
AM_RANGE(0x0080, 0x07ff) AM_READ(MRA8_ROM)
AM_RANGE(0x0010, 0x007f) AM_READ(SMH_RAM)
AM_RANGE(0x0080, 0x07ff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( mcu_writemem, ADDRESS_SPACE_PROGRAM, 8 )
@ -248,8 +248,8 @@ static ADDRESS_MAP_START( mcu_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0004, 0x0004) AM_WRITE(buggychl_68705_ddrA_w)
AM_RANGE(0x0005, 0x0005) AM_WRITE(buggychl_68705_ddrB_w)
AM_RANGE(0x0006, 0x0006) AM_WRITE(buggychl_68705_ddrC_w)
AM_RANGE(0x0010, 0x007f) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0080, 0x07ff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x0010, 0x007f) AM_WRITE(SMH_RAM)
AM_RANGE(0x0080, 0x07ff) AM_WRITE(SMH_ROM)
ADDRESS_MAP_END
/******************************************************************************/

6
src/mame/drivers/bwidow.c
View File

@ -353,7 +353,7 @@ static ADDRESS_MAP_START( bwidow_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x88c0, 0x88c0) AM_WRITE(irq_ack_w) /* interrupt acknowledge */
AM_RANGE(0x8900, 0x8900) AM_WRITE(atari_vg_earom_ctrl_w)
AM_RANGE(0x8940, 0x897f) AM_WRITE(atari_vg_earom_w)
AM_RANGE(0x8980, 0x89ed) AM_WRITE(MWA8_NOP) /* watchdog clear */
AM_RANGE(0x8980, 0x89ed) AM_WRITE(SMH_NOP) /* watchdog clear */
AM_RANGE(0x9000, 0xffff) AM_ROM
ADDRESS_MAP_END
@ -362,11 +362,11 @@ static ADDRESS_MAP_START( spacduel_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x03ff) AM_RAM
AM_RANGE(0x0800, 0x0800) AM_READ(bzone_IN0_r) /* IN0 */
AM_RANGE(0x0900, 0x0907) AM_READ(spacduel_IN3_r) /* IN1 */
AM_RANGE(0x0905, 0x0906) AM_WRITE(MWA8_NOP) /* ignore? */
AM_RANGE(0x0905, 0x0906) AM_WRITE(SMH_NOP) /* ignore? */
AM_RANGE(0x0a00, 0x0a00) AM_READ(atari_vg_earom_r)
// AM_RANGE(0x0c00, 0x0c00) AM_WRITE(coin_counter_w) /* coin out */
AM_RANGE(0x0c80, 0x0c80) AM_WRITE(avgdvg_go_w)
AM_RANGE(0x0d00, 0x0d00) AM_WRITE(MWA8_NOP) /* watchdog clear */
AM_RANGE(0x0d00, 0x0d00) AM_WRITE(SMH_NOP) /* watchdog clear */
AM_RANGE(0x0d80, 0x0d80) AM_WRITE(avgdvg_reset_w)
AM_RANGE(0x0e00, 0x0e00) AM_WRITE(irq_ack_w) /* interrupt acknowledge */
AM_RANGE(0x0e80, 0x0e80) AM_WRITE(atari_vg_earom_ctrl_w)

26
src/mame/drivers/bwing.c
View File

@ -183,48 +183,48 @@ static WRITE8_HANDLER( bwp2_ctrl_w )
// Main CPU
static ADDRESS_MAP_START( bwp1_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1b00, 0x1b07) AM_READ(bwp1_io_r)
AM_RANGE(0x0000, 0x1fff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_RAM)
AM_RANGE(0x2000, 0x3fff) AM_READ(bwing_scrollram_r)
AM_RANGE(0x4000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( bwp1_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x07ff) AM_WRITE(bwp12_sharedram1_w) AM_BASE(&bwp1_sharedram1)
AM_RANGE(0x0800, 0x0fff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0800, 0x0fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x1000, 0x13ff) AM_WRITE(bwing_videoram_w) AM_BASE(&videoram)
AM_RANGE(0x1800, 0x19ff) AM_WRITE(bwing_spriteram_w) AM_BASE(&buffered_spriteram)
AM_RANGE(0x1a00, 0x1aff) AM_WRITE(bwing_paletteram_w) AM_BASE(&paletteram)
AM_RANGE(0x1b00, 0x1b07) AM_WRITE(bwing_scrollreg_w)
AM_RANGE(0x1c00, 0x1c07) AM_WRITE(bwp1_ctrl_w)
AM_RANGE(0x2000, 0x3fff) AM_WRITE(bwing_scrollram_w)
AM_RANGE(0x1000, 0x1fff) AM_WRITE(MWA8_RAM) // falls through
AM_RANGE(0x4000, 0xffff) AM_WRITE(MWA8_NOP) // "B-Wings US" writes to 9631-9632(debug?)
AM_RANGE(0x1000, 0x1fff) AM_WRITE(SMH_RAM) // falls through
AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_NOP) // "B-Wings US" writes to 9631-9632(debug?)
ADDRESS_MAP_END
// Sub CPU
static ADDRESS_MAP_START( bwp2_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_READ(MRA8_RAM)
AM_RANGE(0xa000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM)
AM_RANGE(0xa000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( bwp2_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x07ff) AM_WRITE(bwp12_sharedram1_w) AM_BASE(&bwp2_sharedram1)
AM_RANGE(0x0800, 0x0fff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0800, 0x0fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x1800, 0x1803) AM_WRITE(bwp2_ctrl_w)
AM_RANGE(0xa000, 0xffff) AM_WRITE(MWA8_ROM)
AM_RANGE(0xa000, 0xffff) AM_WRITE(SMH_ROM)
ADDRESS_MAP_END
// Sound CPU
static ADDRESS_MAP_START( bwp3_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x01ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x01ff) AM_READ(SMH_RAM)
AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
AM_RANGE(0xe000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0xe000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( bwp3_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x01ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x01ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x0200, 0x0200) AM_WRITE(DAC_0_signed_data_w)
AM_RANGE(0x1000, 0x1000) AM_WRITE(bwp3_nmiack_w)
AM_RANGE(0x2000, 0x2000) AM_WRITE(AY8910_write_port_0_w)
@ -232,7 +232,7 @@ static ADDRESS_MAP_START( bwp3_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x6000, 0x6000) AM_WRITE(AY8910_write_port_1_w)
AM_RANGE(0x8000, 0x8000) AM_WRITE(AY8910_control_port_1_w)
AM_RANGE(0xd000, 0xd000) AM_WRITE(bwp3_nmimask_w)
AM_RANGE(0xe000, 0xffff) AM_WRITE(MWA8_ROM) AM_BASE(&bwp3_rombase) AM_SIZE(&bwp3_romsize)
AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_ROM) AM_BASE(&bwp3_rombase) AM_SIZE(&bwp3_romsize)
ADDRESS_MAP_END
static ADDRESS_MAP_START( bwp3_readport, ADDRESS_SPACE_IO, 8 )

6
src/mame/drivers/bzone.c
View File

@ -336,7 +336,7 @@ static ADDRESS_MAP_START( redbaron_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0800, 0x0800) AM_READ(bzone_IN0_r) /* IN0 */
AM_RANGE(0x0a00, 0x0a00) AM_READ(input_port_1_r) /* DSW1 */
AM_RANGE(0x0c00, 0x0c00) AM_READ(input_port_2_r) /* DSW2 */
AM_RANGE(0x1000, 0x1000) AM_WRITE(MWA8_NOP) /* coin out */
AM_RANGE(0x1000, 0x1000) AM_WRITE(SMH_NOP) /* coin out */
AM_RANGE(0x1200, 0x1200) AM_WRITE(avgdvg_go_w)
AM_RANGE(0x1400, 0x1400) AM_WRITE(watchdog_reset_w)
AM_RANGE(0x1600, 0x1600) AM_WRITE(avgdvg_reset_w)
@ -345,7 +345,7 @@ static ADDRESS_MAP_START( redbaron_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1804, 0x1804) AM_READ(mb_lo_r)
AM_RANGE(0x1806, 0x1806) AM_READ(mb_hi_r)
AM_RANGE(0x1808, 0x1808) AM_WRITE(redbaron_sounds_w) /* and select joystick pot also */
AM_RANGE(0x180a, 0x180a) AM_WRITE(MWA8_NOP) /* sound reset, yet todo */
AM_RANGE(0x180a, 0x180a) AM_WRITE(SMH_NOP) /* sound reset, yet todo */
AM_RANGE(0x180c, 0x180c) AM_WRITE(atari_vg_earom_ctrl_w)
AM_RANGE(0x1810, 0x181f) AM_READWRITE(pokey1_r, pokey1_w)
AM_RANGE(0x1820, 0x185f) AM_READWRITE(atari_vg_earom_r, atari_vg_earom_w)
@ -813,7 +813,7 @@ static WRITE8_HANDLER( analog_select_w )
static DRIVER_INIT( bradley )
{
memory_install_readwrite8_handler(0, ADDRESS_SPACE_PROGRAM, 0x400, 0x7ff, 0, 0, MRA8_BANK1, MWA8_BANK1);
memory_install_readwrite8_handler(0, ADDRESS_SPACE_PROGRAM, 0x400, 0x7ff, 0, 0, SMH_BANK1, SMH_BANK1);
memory_set_bankptr(1, auto_malloc(0x400));
memory_install_read8_handler(0, ADDRESS_SPACE_PROGRAM, 0x1808, 0x1808, 0, 0, input_port_4_r);

82
src/mame/drivers/cabal.c
View File

@ -119,30 +119,30 @@ static WRITE16_HANDLER( cabalbl_sound_irq_trigger_word_w )
static ADDRESS_MAP_START( readmem_cpu, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x00000, 0x3ffff) AM_READ(MRA16_ROM)
AM_RANGE(0x40000, 0x437ff) AM_READ(MRA16_RAM)
AM_RANGE(0x43800, 0x43fff) AM_READ(MRA16_RAM)
AM_RANGE(0x44000, 0x4ffff) AM_READ(MRA16_RAM)
AM_RANGE(0x60000, 0x607ff) AM_READ(MRA16_RAM)
AM_RANGE(0x80000, 0x801ff) AM_READ(MRA16_RAM)
AM_RANGE(0x80200, 0x803ff) AM_READ(MRA16_RAM)
AM_RANGE(0x00000, 0x3ffff) AM_READ(SMH_ROM)
AM_RANGE(0x40000, 0x437ff) AM_READ(SMH_RAM)
AM_RANGE(0x43800, 0x43fff) AM_READ(SMH_RAM)
AM_RANGE(0x44000, 0x4ffff) AM_READ(SMH_RAM)
AM_RANGE(0x60000, 0x607ff) AM_READ(SMH_RAM)
AM_RANGE(0x80000, 0x801ff) AM_READ(SMH_RAM)
AM_RANGE(0x80200, 0x803ff) AM_READ(SMH_RAM)
AM_RANGE(0xa0000, 0xa0001) AM_READ(input_port_0_word_r)
AM_RANGE(0xa0008, 0xa000f) AM_READ(track_r)
AM_RANGE(0xa0010, 0xa0011) AM_READ(input_port_1_word_r)
AM_RANGE(0xe0000, 0xe07ff) AM_READ(MRA16_RAM)
AM_RANGE(0xe0000, 0xe07ff) AM_READ(SMH_RAM)
AM_RANGE(0xe8000, 0xe800d) AM_READ(seibu_main_word_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem_cpu, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x00000, 0x3ffff) AM_WRITE(MWA16_ROM)
AM_RANGE(0x40000, 0x437ff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x43800, 0x43fff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x44000, 0x4ffff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x00000, 0x3ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x40000, 0x437ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x43800, 0x43fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x44000, 0x4ffff) AM_WRITE(SMH_RAM)
AM_RANGE(0x60000, 0x607ff) AM_WRITE(cabal_text_videoram16_w) AM_BASE(&colorram16)
AM_RANGE(0x80000, 0x801ff) AM_WRITE(cabal_background_videoram16_w) AM_BASE(&videoram16) AM_SIZE(&videoram_size)
AM_RANGE(0x80200, 0x803ff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x80200, 0x803ff) AM_WRITE(SMH_RAM)
AM_RANGE(0xc0000, 0xc0001) AM_WRITE(track_reset_w)
AM_RANGE(0xc0040, 0xc0041) AM_WRITE(MWA16_NOP) /* ??? */
AM_RANGE(0xc0040, 0xc0041) AM_WRITE(SMH_NOP) /* ??? */
AM_RANGE(0xc0080, 0xc0081) AM_WRITE(cabal_flipscreen_w)
AM_RANGE(0xe0000, 0xe07ff) AM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xe8008, 0xe8009) AM_WRITE(cabal_sound_irq_trigger_word_w) // fix coin insertion
@ -150,29 +150,29 @@ static ADDRESS_MAP_START( writemem_cpu, ADDRESS_SPACE_PROGRAM, 16 )
ADDRESS_MAP_END
static ADDRESS_MAP_START( cabalbl_readmem_cpu, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x00000, 0x3ffff) AM_READ(MRA16_ROM)
AM_RANGE(0x40000, 0x437ff) AM_READ(MRA16_RAM)
AM_RANGE(0x43800, 0x43fff) AM_READ(MRA16_RAM)
AM_RANGE(0x44000, 0x4ffff) AM_READ(MRA16_RAM)
AM_RANGE(0x60000, 0x607ff) AM_READ(MRA16_RAM)
AM_RANGE(0x80000, 0x801ff) AM_READ(MRA16_RAM)
AM_RANGE(0x80200, 0x803ff) AM_READ(MRA16_RAM)
AM_RANGE(0x00000, 0x3ffff) AM_READ(SMH_ROM)
AM_RANGE(0x40000, 0x437ff) AM_READ(SMH_RAM)
AM_RANGE(0x43800, 0x43fff) AM_READ(SMH_RAM)
AM_RANGE(0x44000, 0x4ffff) AM_READ(SMH_RAM)
AM_RANGE(0x60000, 0x607ff) AM_READ(SMH_RAM)
AM_RANGE(0x80000, 0x801ff) AM_READ(SMH_RAM)
AM_RANGE(0x80200, 0x803ff) AM_READ(SMH_RAM)
AM_RANGE(0xa0000, 0xa0001) AM_READ(input_port_0_word_r)
AM_RANGE(0xa0008, 0xa0009) AM_READ(input_port_1_word_r)
AM_RANGE(0xa0010, 0xa0011) AM_READ(input_port_2_word_r)
AM_RANGE(0xe0000, 0xe07ff) AM_READ(MRA16_RAM)
AM_RANGE(0xe0000, 0xe07ff) AM_READ(SMH_RAM)
AM_RANGE(0xe8004, 0xe8005) AM_READ(soundlatch2_word_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( cabalbl_writemem_cpu, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x00000, 0x3ffff) AM_WRITE(MWA16_ROM)
AM_RANGE(0x40000, 0x437ff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x43800, 0x43fff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x44000, 0x4ffff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x00000, 0x3ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x40000, 0x437ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x43800, 0x43fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x44000, 0x4ffff) AM_WRITE(SMH_RAM)
AM_RANGE(0x60000, 0x607ff) AM_WRITE(cabal_text_videoram16_w) AM_BASE(&colorram16)
AM_RANGE(0x80000, 0x801ff) AM_WRITE(cabal_background_videoram16_w) AM_BASE(&videoram16) AM_SIZE(&videoram_size)
AM_RANGE(0x80200, 0x803ff) AM_WRITE(MWA16_RAM)
AM_RANGE(0xc0040, 0xc0041) AM_WRITE(MWA16_NOP) /* ??? */
AM_RANGE(0x80200, 0x803ff) AM_WRITE(SMH_RAM)
AM_RANGE(0xc0040, 0xc0041) AM_WRITE(SMH_NOP) /* ??? */
AM_RANGE(0xc0080, 0xc0081) AM_WRITE(cabal_flipscreen_w)
AM_RANGE(0xe0000, 0xe07ff) AM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
AM_RANGE(0xe8000, 0xe8003) AM_WRITE(cabalbl_sndcmd_w)
@ -201,18 +201,18 @@ static WRITE8_HANDLER( cabalbl_coin_w )
}
static ADDRESS_MAP_START( readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_READ(MRA8_ROM)
AM_RANGE(0x2000, 0x27ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
AM_RANGE(0x4009, 0x4009) AM_READ(YM2151_status_port_0_r)
AM_RANGE(0x4010, 0x4011) AM_READ(seibu_soundlatch_r)
AM_RANGE(0x4012, 0x4012) AM_READ(seibu_main_data_pending_r)
AM_RANGE(0x4013, 0x4013) AM_READ(input_port_2_r)
AM_RANGE(0x8000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x2000, 0x27ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x2000, 0x27ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x4001, 0x4001) AM_WRITE(seibu_irq_clear_w)
AM_RANGE(0x4002, 0x4002) AM_WRITE(seibu_rst10_ack_w)
AM_RANGE(0x4003, 0x4003) AM_WRITE(seibu_rst18_ack_w)
@ -224,30 +224,30 @@ static ADDRESS_MAP_START( writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x401b, 0x401b) AM_WRITE(seibu_coin_w)
AM_RANGE(0x6005, 0x6006) AM_WRITE(seibu_adpcm_adr_2_w)
AM_RANGE(0x601a, 0x601a) AM_WRITE(seibu_adpcm_ctl_2_w)
AM_RANGE(0x8000, 0xffff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( cabalbl_readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_READ(MRA8_ROM)
AM_RANGE(0x2000, 0x2fff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
AM_RANGE(0x2000, 0x2fff) AM_READ(SMH_RAM)
AM_RANGE(0x4008, 0x4008) AM_READ(cabalbl_snd2_r)
AM_RANGE(0x400a, 0x400a) AM_READ(cabalbl_snd1_r)
AM_RANGE(0x4006, 0x4006) AM_READ(input_port_3_r)
AM_RANGE(0x400f, 0x400f) AM_READ(YM2151_status_port_0_r)
AM_RANGE(0x8000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( cabalbl_writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x2000, 0x2fff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x2000, 0x2fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x4000, 0x4000) AM_WRITE(soundlatch3_w)
AM_RANGE(0x4002, 0x4002) AM_WRITE(soundlatch4_w)
AM_RANGE(0x4004, 0x4004) AM_WRITE(cabalbl_coin_w)
AM_RANGE(0x400c, 0x400c) AM_WRITE(soundlatch2_w)
AM_RANGE(0x400e, 0x400e) AM_WRITE(YM2151_register_port_0_w)
AM_RANGE(0x400f, 0x400f) AM_WRITE(YM2151_data_port_0_w)
AM_RANGE(0x6000, 0x6000) AM_WRITE(MWA8_NOP) /* ??? */
AM_RANGE(0x8000, 0xffff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x6000, 0x6000) AM_WRITE(SMH_NOP) /* ??? */
AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
ADDRESS_MAP_END
/* the bootleg has 2x z80 sample players */

4
src/mame/drivers/canyon.c
View File

@ -114,8 +114,8 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0600, 0x0603) AM_WRITE(canyon_whistle_w)
AM_RANGE(0x0680, 0x0683) AM_WRITE(canyon_led_w)
AM_RANGE(0x0700, 0x0703) AM_WRITE(canyon_attract_w)
AM_RANGE(0x0800, 0x0bff) AM_READWRITE(MRA8_RAM, canyon_videoram_w) AM_BASE(&canyon_videoram)
AM_RANGE(0x1000, 0x17ff) AM_READWRITE(canyon_switches_r, MWA8_NOP) /* sloppy code writes here */
AM_RANGE(0x0800, 0x0bff) AM_READWRITE(SMH_RAM, canyon_videoram_w) AM_BASE(&canyon_videoram)
AM_RANGE(0x1000, 0x17ff) AM_READWRITE(canyon_switches_r, SMH_NOP) /* sloppy code writes here */
AM_RANGE(0x1800, 0x1fff) AM_READ(canyon_options_r)
AM_RANGE(0x2000, 0x3fff) AM_ROM
ADDRESS_MAP_END

4
src/mame/drivers/capbowl.c
View File

@ -243,7 +243,7 @@ static NVRAM_HANDLER( capbowl )
static ADDRESS_MAP_START( capbowl_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROMBANK(1)
AM_RANGE(0x4000, 0x4000) AM_WRITE(MWA8_RAM) AM_BASE(&capbowl_rowaddress)
AM_RANGE(0x4000, 0x4000) AM_WRITE(SMH_RAM) AM_BASE(&capbowl_rowaddress)
AM_RANGE(0x4800, 0x4800) AM_WRITE(capbowl_rom_select_w)
AM_RANGE(0x5000, 0x57ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x5800, 0x5fff) AM_READWRITE(capbowl_tms34061_r, capbowl_tms34061_w)
@ -257,7 +257,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( bowlrama_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x001f) AM_READWRITE(bowlrama_blitter_r, bowlrama_blitter_w)
AM_RANGE(0x4000, 0x4000) AM_WRITE(MWA8_RAM) AM_BASE(&capbowl_rowaddress)
AM_RANGE(0x4000, 0x4000) AM_WRITE(SMH_RAM) AM_BASE(&capbowl_rowaddress)
AM_RANGE(0x5000, 0x57ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x5800, 0x5fff) AM_READWRITE(capbowl_tms34061_r, capbowl_tms34061_w)
AM_RANGE(0x6000, 0x6000) AM_WRITE(capbowl_sndcmd_w)

46
src/mame/drivers/carjmbre.c
View File

@ -53,59 +53,59 @@ VIDEO_UPDATE( carjmbre );
static ADDRESS_MAP_START( carjmbre_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(MRA8_ROM)
AM_RANGE(0x8000, 0x87ff) AM_READ(MRA8_RAM)
AM_RANGE(0x8800, 0x8800) AM_READ(MRA8_NOP) //?? possibly watchdog
AM_RANGE(0x9000, 0x97ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
AM_RANGE(0x8800, 0x8800) AM_READ(SMH_NOP) //?? possibly watchdog
AM_RANGE(0x9000, 0x97ff) AM_READ(SMH_RAM)
AM_RANGE(0xa000, 0xa000) AM_READ(input_port_0_r)
AM_RANGE(0xa800, 0xa800) AM_READ(input_port_1_r)
AM_RANGE(0xb800, 0xb800) AM_READ(input_port_2_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( carjmbre_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x8000, 0x87ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x8803, 0x8803) AM_WRITE(interrupt_enable_w)
AM_RANGE(0x8805, 0x8806) AM_WRITE(carjmbre_bgcolor_w) //guess
AM_RANGE(0x8807, 0x8807) AM_WRITE(carjmbre_flipscreen_w)
AM_RANGE(0x8fc1, 0x8fc1) AM_WRITE(MWA8_NOP) //overrun during initial screen clear
AM_RANGE(0x8fe1, 0x8fe1) AM_WRITE(MWA8_NOP) //overrun during initial screen clear
AM_RANGE(0x8fc1, 0x8fc1) AM_WRITE(SMH_NOP) //overrun during initial screen clear
AM_RANGE(0x8fe1, 0x8fe1) AM_WRITE(SMH_NOP) //overrun during initial screen clear
AM_RANGE(0x9000, 0x97ff) AM_WRITE(carjmbre_videoram_w) AM_BASE(&videoram)
AM_RANGE(0x9800, 0x985f) AM_WRITE(MWA8_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x9880, 0x98df) AM_WRITE(MWA8_RAM) //spriteram mirror
AM_RANGE(0x9800, 0x985f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x9880, 0x98df) AM_WRITE(SMH_RAM) //spriteram mirror
AM_RANGE(0xb800, 0xb800) AM_WRITE(soundlatch_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( carjmbre_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_READ(MRA8_ROM)
AM_RANGE(0x1000, 0x10ff) AM_READ(MRA8_NOP) //look to be stray reads from 10/12/14/16/18xx
AM_RANGE(0x1200, 0x12ff) AM_READ(MRA8_NOP)
AM_RANGE(0x1400, 0x14ff) AM_READ(MRA8_NOP)
AM_RANGE(0x1600, 0x16ff) AM_READ(MRA8_NOP)
AM_RANGE(0x1800, 0x18ff) AM_READ(MRA8_NOP)
AM_RANGE(0x2000, 0x27ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM)
AM_RANGE(0x1000, 0x10ff) AM_READ(SMH_NOP) //look to be stray reads from 10/12/14/16/18xx
AM_RANGE(0x1200, 0x12ff) AM_READ(SMH_NOP)
AM_RANGE(0x1400, 0x14ff) AM_READ(SMH_NOP)
AM_RANGE(0x1600, 0x16ff) AM_READ(SMH_NOP)
AM_RANGE(0x1800, 0x18ff) AM_READ(SMH_NOP)
AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( carjmbre_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_WRITE(MWA8_ROM)
AM_RANGE(0x2000, 0x27ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x2000, 0x27ff) AM_WRITE(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( carjmbre_sound_readport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READ(soundlatch_r)
AM_RANGE(0x24, 0x24) AM_READ(MRA8_NOP) //??
AM_RANGE(0x24, 0x24) AM_READ(SMH_NOP) //??
ADDRESS_MAP_END
static ADDRESS_MAP_START( carjmbre_sound_writeport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x10, 0x10) AM_WRITE(MWA8_NOP) //?? written on init/0xff sound command reset
AM_RANGE(0x10, 0x10) AM_WRITE(SMH_NOP) //?? written on init/0xff sound command reset
AM_RANGE(0x20, 0x20) AM_WRITE(AY8910_control_port_0_w)
AM_RANGE(0x21, 0x21) AM_WRITE(AY8910_write_port_0_w)
AM_RANGE(0x22, 0x22) AM_WRITE(MWA8_NOP) //?? written before and after 0x21 with same value
AM_RANGE(0x22, 0x22) AM_WRITE(SMH_NOP) //?? written before and after 0x21 with same value
AM_RANGE(0x30, 0x30) AM_WRITE(AY8910_control_port_1_w)
AM_RANGE(0x31, 0x31) AM_WRITE(AY8910_write_port_1_w)
AM_RANGE(0x32, 0x32) AM_WRITE(MWA8_NOP) //?? written before and after 0x31 with same value
AM_RANGE(0x32, 0x32) AM_WRITE(SMH_NOP) //?? written before and after 0x31 with same value
ADDRESS_MAP_END
static INPUT_PORTS_START( carjmbre )

12
src/mame/drivers/carpolo.c
View File

@ -29,7 +29,7 @@
*************************************/
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x01ff) AM_READ(MRA8_RAM)
AM_RANGE(0x0000, 0x01ff) AM_READ(SMH_RAM)
AM_RANGE(0x5400, 0x5403) AM_READ(pia_0_r)
AM_RANGE(0x5800, 0x5803) AM_READ(pia_1_r)
AM_RANGE(0xa000, 0xa000) AM_READ(carpolo_ball_screen_collision_cause_r)
@ -41,13 +41,13 @@ static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xa006, 0xa006) AM_READ(carpolo_car_goal_collision_cause_r)
AM_RANGE(0xa007, 0xa007) AM_READ(input_port_1_r)
AM_RANGE(0xc000, 0xc000) AM_READ(carpolo_interrupt_cause_r)
AM_RANGE(0xf000, 0xffff) AM_READ(MRA8_ROM)
AM_RANGE(0xf000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x01ff) AM_WRITE(MWA8_RAM)
AM_RANGE(0x3000, 0x30ff) AM_WRITE(MWA8_RAM) AM_BASE(&carpolo_alpharam)
AM_RANGE(0x4000, 0x400f) AM_WRITE(MWA8_RAM) AM_BASE(&carpolo_spriteram)
AM_RANGE(0x0000, 0x01ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x3000, 0x30ff) AM_WRITE(SMH_RAM) AM_BASE(&carpolo_alpharam)
AM_RANGE(0x4000, 0x400f) AM_WRITE(SMH_RAM) AM_BASE(&carpolo_spriteram)
AM_RANGE(0x5400, 0x5403) AM_WRITE(pia_0_w)
AM_RANGE(0x5800, 0x5803) AM_WRITE(pia_1_w)
AM_RANGE(0xb000, 0xb000) AM_WRITE(carpolo_ball_screen_interrupt_clear_w)
@ -56,7 +56,7 @@ static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xb004, 0xb004) AM_WRITE(carpolo_car_border_interrupt_clear_w)
AM_RANGE(0xb005, 0xb005) AM_WRITE(carpolo_car_ball_interrupt_clear_w)
AM_RANGE(0xb006, 0xb006) AM_WRITE(carpolo_car_goal_interrupt_clear_w)
AM_RANGE(0xf000, 0xffff) AM_WRITE(MWA8_ROM)
AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_ROM)
ADDRESS_MAP_END

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