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trs80.cpp: More clock notes (nw)

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This commit is contained in:
AJR 2018-03-12 13:32:14 -04:00
parent 549ec6d076
commit 093268232b
1 changed files with 4 additions and 4 deletions
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8
src/mame/drivers/trs80.cpp
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@ -593,7 +593,7 @@ SLOT_INTERFACE_END
MACHINE_CONFIG_START(trs80_state::trs80) // the original model I, level I, with no extras
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", Z80, 10.6445_MHz_XTAL / 6) // "a little over 1.744 MHz"
MCFG_CPU_ADD("maincpu", Z80, 10.6445_MHz_XTAL / 6) // about 1.774 MHz
MCFG_CPU_PROGRAM_MAP(trs80_map)
MCFG_CPU_IO_MAP(trs80_io)
@ -702,7 +702,7 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(trs80_state::lnw80)
model1(config);
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_CLOCK(16_MHz_XTAL / 4) // or 16MHz / 9
MCFG_CPU_CLOCK(16_MHz_XTAL / 4) // or 16MHz / 9; 4MHz or 1.77MHz operation selected by HI/LO switch
MCFG_CPU_PROGRAM_MAP(lnw80_map)
MCFG_CPU_IO_MAP(lnw80_io)
MCFG_MACHINE_RESET_OVERRIDE(trs80_state, lnw80)
@ -713,7 +713,7 @@ MACHINE_CONFIG_START(trs80_state::lnw80)
MCFG_PALETTE_ENTRIES(8)
MCFG_PALETTE_INIT_OWNER(trs80_state,lnw80)
MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_RAW_PARAMS(3.579545_MHz_XTAL * 3, 682, 0, 480, 264, 0, 192)
MCFG_SCREEN_RAW_PARAMS(3.579545_MHz_XTAL * 3, 682, 0, 480, 264, 0, 192) // 10.738MHz generated by tank circuit (top left of page 2 of schematics)
// LNW80 Theory of Operations gives H and V periods as 15.750kHz and 59.66Hz, which don't seem exactly divisible
MCFG_SCREEN_UPDATE_DRIVER(trs80_state, screen_update_lnw80)
MACHINE_CONFIG_END
@ -721,7 +721,7 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(trs80_state::radionic)
model1(config);
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_CLOCK(12_MHz_XTAL / 6) // or 3.579MHz / 2
MCFG_CPU_CLOCK(12_MHz_XTAL / 6) // or 3.579MHz / 2 (selectable?)
MCFG_CPU_PERIODIC_INT_DRIVER(trs80_state, nmi_line_pulse, 12_MHz_XTAL / 12 / 16384)
MCFG_SCREEN_MODIFY("screen")