mirror of
https://github.com/holub/mame
synced 2025-10-05 08:41:31 +03:00
Previous commit examples of use (nw)
This commit is contained in:
parent
639c9b85fc
commit
09466d3382
@ -182,12 +182,12 @@ uint8_t a2bus_ayboard_device::read_cnxx(uint8_t offset)
|
||||
{
|
||||
if (viaSel & 1)
|
||||
{
|
||||
retVal |= m_via1->read(machine().dummy_space(), offset & 0xf);
|
||||
retVal |= m_via1->read(offset & 0xf);
|
||||
}
|
||||
|
||||
if (viaSel & 2)
|
||||
{
|
||||
retVal |= m_via2->read(machine().dummy_space(), offset & 0xf);
|
||||
retVal |= m_via2->read(offset & 0xf);
|
||||
}
|
||||
}
|
||||
|
||||
@ -197,11 +197,11 @@ uint8_t a2bus_ayboard_device::read_cnxx(uint8_t offset)
|
||||
{
|
||||
if (offset <= 0x10)
|
||||
{
|
||||
return m_via1->read(machine().dummy_space(), offset & 0xf);
|
||||
return m_via1->read(offset & 0xf);
|
||||
}
|
||||
else if (offset >= 0x80 && offset <= 0x90)
|
||||
{
|
||||
return m_via2->read(machine().dummy_space(), offset & 0xf);
|
||||
return m_via2->read(offset & 0xf);
|
||||
}
|
||||
}
|
||||
|
||||
@ -231,11 +231,11 @@ void a2bus_ayboard_device::write_cnxx(uint8_t offset, uint8_t data)
|
||||
|
||||
if (viaSel & 1)
|
||||
{
|
||||
m_via1->write(machine().dummy_space(), offset&0xf, data);
|
||||
m_via1->write(offset&0xf, data);
|
||||
}
|
||||
if (viaSel & 2)
|
||||
{
|
||||
m_via2->write(machine().dummy_space(), offset&0xf, data);
|
||||
m_via2->write(offset&0xf, data);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -243,11 +243,11 @@ void a2bus_ayboard_device::write_cnxx(uint8_t offset, uint8_t data)
|
||||
{
|
||||
if (offset <= 0x10)
|
||||
{
|
||||
m_via1->write(machine().dummy_space(), offset & 0xf, data);
|
||||
m_via1->write(offset & 0xf, data);
|
||||
}
|
||||
else if (offset >= 0x80 && offset <= 0x90)
|
||||
{
|
||||
m_via2->write(machine().dummy_space(), offset & 0xf, data);
|
||||
m_via2->write(offset & 0xf, data);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -146,7 +146,7 @@ void cms_4080term_device::device_start()
|
||||
address_space &space = m_bus->memspace();
|
||||
|
||||
space.install_readwrite_handler(0xfd20, 0xfd2f, read8_delegate(FUNC(ef9345_device::data_r), m_ef9345.target()), write8_delegate(FUNC(ef9345_device::data_w), m_ef9345.target()));
|
||||
space.install_readwrite_handler(0xfd30, 0xfd3f, read8_delegate(FUNC(via6522_device::read), m_via.target()), write8_delegate(FUNC(via6522_device::write), m_via.target()));
|
||||
space.install_readwrite_handler(0xfd30, 0xfd3f, read8sm_delegate(FUNC(via6522_device::read), m_via.target()), write8sm_delegate(FUNC(via6522_device::write), m_via.target()));
|
||||
space.install_readwrite_handler(0xfd40, 0xfd4f, read8_delegate(FUNC(mos6551_device::read), m_acia.target()), write8_delegate(FUNC(mos6551_device::write), m_acia.target()));
|
||||
|
||||
uint8_t *FNT = memregion("ef9345")->base();
|
||||
|
@ -93,7 +93,7 @@ void acorn_vib_device::device_reset()
|
||||
{
|
||||
address_space &space = m_bus->memspace();
|
||||
|
||||
space.install_readwrite_handler(0x0c00, 0x0c0f, 0, 0x10, 0, read8_delegate(FUNC(via6522_device::read), m_via6522.target()), write8_delegate(FUNC(via6522_device::write), m_via6522.target()));
|
||||
space.install_readwrite_handler(0x0c00, 0x0c0f, 0, 0x10, 0, read8sm_delegate(FUNC(via6522_device::read), m_via6522.target()), write8sm_delegate(FUNC(via6522_device::write), m_via6522.target()));
|
||||
space.install_readwrite_handler(0x0c20, 0x0c21, 0, 0x1e, 0, read8_delegate(FUNC(acia6850_device::read), m_acia.target()), write8_delegate(FUNC(acia6850_device::write), m_acia.target()));
|
||||
space.install_readwrite_handler(0x0c40, 0x0c43, 0, 0x1c, 0, read8_delegate(FUNC(i8255_device::read), m_ppi8255.target()), write8_delegate(FUNC(i8255_device::write), m_ppi8255.target()));
|
||||
}
|
||||
|
@ -123,10 +123,10 @@ void bbc_tube_casper_device::device_reset()
|
||||
|
||||
READ8_MEMBER(bbc_tube_casper_device::host_r)
|
||||
{
|
||||
return m_via6522_0->read(space, offset & 0xf);
|
||||
return m_via6522_0->read(offset & 0xf);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(bbc_tube_casper_device::host_w)
|
||||
{
|
||||
m_via6522_0->write(space, offset & 0xf, data);
|
||||
m_via6522_0->write(offset & 0xf, data);
|
||||
}
|
||||
|
@ -139,7 +139,7 @@ void bbc_tube_zep100_device::device_reset()
|
||||
|
||||
READ8_MEMBER(bbc_tube_zep100_device::host_r)
|
||||
{
|
||||
return m_via->read(space, offset & 0x0f);
|
||||
return m_via->read(offset & 0x0f);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(bbc_tube_zep100_device::host_w)
|
||||
@ -147,7 +147,7 @@ WRITE8_MEMBER(bbc_tube_zep100_device::host_w)
|
||||
if (offset & 0x10)
|
||||
m_z80->reset();
|
||||
|
||||
m_via->write(space, offset & 0x0f, data);
|
||||
m_via->write(offset & 0x0f, data);
|
||||
}
|
||||
|
||||
|
||||
|
@ -384,7 +384,7 @@ WRITE8_MEMBER( c1571cr_device::via0_pb_w )
|
||||
|
||||
READ8_MEMBER( c1571_device::via1_r )
|
||||
{
|
||||
uint8_t data = m_via1->read(space, offset);
|
||||
uint8_t data = m_via1->read(offset);
|
||||
|
||||
m_ga->ted_w(!m_1_2mhz);
|
||||
m_ga->ted_w(1);
|
||||
@ -394,7 +394,7 @@ READ8_MEMBER( c1571_device::via1_r )
|
||||
|
||||
WRITE8_MEMBER( c1571_device::via1_w )
|
||||
{
|
||||
m_via1->write(space, offset, data);
|
||||
m_via1->write(offset, data);
|
||||
|
||||
m_ga->ted_w(!m_1_2mhz);
|
||||
m_ga->ted_w(1);
|
||||
|
@ -168,7 +168,7 @@ uint8_t electron_m2105_device::expbus_r(address_space &space, offs_t offset, uin
|
||||
}
|
||||
else if (offset >= 0xfc40 && offset < 0xfc60)
|
||||
{
|
||||
data = m_via6522_1->read(space, offset);
|
||||
data = m_via6522_1->read(offset);
|
||||
}
|
||||
else if (offset >= 0xfc60 && offset < 0xfc70)
|
||||
{
|
||||
@ -176,7 +176,7 @@ uint8_t electron_m2105_device::expbus_r(address_space &space, offs_t offset, uin
|
||||
}
|
||||
else if (offset >= 0xfc70 && offset < 0xfc90)
|
||||
{
|
||||
data = m_via6522_0->read(space, offset);
|
||||
data = m_via6522_0->read(offset);
|
||||
}
|
||||
|
||||
return data;
|
||||
@ -194,7 +194,7 @@ void electron_m2105_device::expbus_w(address_space &space, offs_t offset, uint8_
|
||||
}
|
||||
else if (offset >= 0xfc40 && offset < 0xfc60)
|
||||
{
|
||||
m_via6522_1->write(space, offset, data);
|
||||
m_via6522_1->write(offset, data);
|
||||
}
|
||||
else if (offset >= 0xfc60 && offset < 0xfc70)
|
||||
{
|
||||
@ -202,7 +202,7 @@ void electron_m2105_device::expbus_w(address_space &space, offs_t offset, uint8_
|
||||
}
|
||||
else if (offset >= 0xfc70 && offset < 0xfc90)
|
||||
{
|
||||
m_via6522_0->write(space, offset, data);
|
||||
m_via6522_0->write(offset, data);
|
||||
}
|
||||
else if (offset == 0xfe05)
|
||||
{
|
||||
|
@ -166,7 +166,7 @@ uint8_t vic1112_device::vic20_cd_r(address_space &space, offs_t offset, uint8_t
|
||||
{
|
||||
if (!io2)
|
||||
{
|
||||
data = (BIT(offset, 4) ? m_via1 : m_via0)->read(space, offset & 0x0f);
|
||||
data = (BIT(offset, 4) ? m_via1 : m_via0)->read(offset & 0x0f);
|
||||
}
|
||||
else if (!blk5)
|
||||
{
|
||||
@ -186,6 +186,6 @@ void vic1112_device::vic20_cd_w(address_space &space, offs_t offset, uint8_t dat
|
||||
{
|
||||
if (!io2)
|
||||
{
|
||||
(BIT(offset, 4) ? m_via1 : m_via0)->write(space, offset & 0x0f, data);
|
||||
(BIT(offset, 4) ? m_via1 : m_via0)->write(offset & 0x0f, data);
|
||||
}
|
||||
}
|
||||
|
@ -535,7 +535,7 @@ void via6522_device::output_pb()
|
||||
via_r - CPU interface for VIA read
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER( via6522_device::read )
|
||||
u8 via6522_device::read(offs_t offset)
|
||||
{
|
||||
int val = 0;
|
||||
if (machine().side_effects_disabled())
|
||||
@ -715,7 +715,7 @@ READ8_MEMBER( via6522_device::read )
|
||||
via_w - CPU interface for VIA write
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE8_MEMBER( via6522_device::write )
|
||||
void via6522_device::write(offs_t offset, u8 data)
|
||||
{
|
||||
offset &=0x0f;
|
||||
|
||||
|
@ -105,8 +105,8 @@ public:
|
||||
|
||||
virtual void map(address_map &map);
|
||||
|
||||
DECLARE_READ8_MEMBER( read );
|
||||
DECLARE_WRITE8_MEMBER( write );
|
||||
u8 read(offs_t offset);
|
||||
void write(offs_t offset, u8 data);
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER( write_pa0 ) { set_pa_line(0, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER( write_pa1 ) { set_pa_line(1, state); }
|
||||
|
@ -170,18 +170,18 @@ IRQ_CALLBACK_MEMBER(seibu_sound_device::im0_vector_cb)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER( seibu_sound_device::irq_clear_w )
|
||||
void seibu_sound_device::irq_clear_w(u8)
|
||||
{
|
||||
/* Denjin Makai and SD Gundam doesn't like this, it's tied to the rst18 ack ONLY so it could be related to it. */
|
||||
//update_irq_lines(VECTOR_INIT);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( seibu_sound_device::rst10_ack_w )
|
||||
void seibu_sound_device::rst10_ack_w(u8)
|
||||
{
|
||||
/* Unused for now */
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( seibu_sound_device::rst18_ack_w )
|
||||
void seibu_sound_device::rst18_ack_w(u8)
|
||||
{
|
||||
update_irq_lines(RST18_CLEAR);
|
||||
}
|
||||
@ -191,51 +191,51 @@ WRITE_LINE_MEMBER( seibu_sound_device::fm_irqhandler )
|
||||
update_irq_lines(state ? RST10_ASSERT : RST10_CLEAR);
|
||||
}
|
||||
|
||||
READ8_MEMBER( seibu_sound_device::ym_r )
|
||||
u8 seibu_sound_device::ym_r(offs_t offset)
|
||||
{
|
||||
return m_ym_read_cb(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( seibu_sound_device::ym_w )
|
||||
void seibu_sound_device::ym_w(offs_t offset, u8 data)
|
||||
{
|
||||
m_ym_write_cb(offset, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( seibu_sound_device::bank_w )
|
||||
void seibu_sound_device::bank_w(u8 data)
|
||||
{
|
||||
if (m_rom_bank.found())
|
||||
m_rom_bank->set_entry(data & 1);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( seibu_sound_device::coin_w )
|
||||
void seibu_sound_device::coin_w(u8 data)
|
||||
{
|
||||
machine().bookkeeping().coin_counter_w(0, data & 1);
|
||||
machine().bookkeeping().coin_counter_w(1, data & 2);
|
||||
}
|
||||
|
||||
READ8_MEMBER( seibu_sound_device::soundlatch_r )
|
||||
u8 seibu_sound_device::soundlatch_r(offs_t offset)
|
||||
{
|
||||
return m_main2sub[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER( seibu_sound_device::main_data_pending_r )
|
||||
u8 seibu_sound_device::main_data_pending_r()
|
||||
{
|
||||
return m_sub2main_pending ? 1 : 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( seibu_sound_device::main_data_w )
|
||||
void seibu_sound_device::main_data_w(offs_t offset, u8 data)
|
||||
{
|
||||
m_sub2main[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( seibu_sound_device::pending_w )
|
||||
void seibu_sound_device::pending_w(u8)
|
||||
{
|
||||
/* just a guess */
|
||||
m_main2sub_pending = 0;
|
||||
m_sub2main_pending = 1;
|
||||
}
|
||||
|
||||
READ8_MEMBER( seibu_sound_device::main_r )
|
||||
u8 seibu_sound_device::main_r(offs_t offset)
|
||||
{
|
||||
//logerror("%s: seibu_main_r(%x)\n",machine().describe_context(),offset);
|
||||
switch (offset)
|
||||
@ -251,7 +251,7 @@ READ8_MEMBER( seibu_sound_device::main_r )
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( seibu_sound_device::main_w )
|
||||
void seibu_sound_device::main_w(offs_t offset, u8 data)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
@ -275,7 +275,7 @@ WRITE8_MEMBER( seibu_sound_device::main_w )
|
||||
}
|
||||
|
||||
// used only by NMK16 bootlegs
|
||||
WRITE16_MEMBER( seibu_sound_device::main_mustb_w )
|
||||
void seibu_sound_device::main_mustb_w(offs_t, u16 data, u16 mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
m_main2sub[0] = data & 0xff;
|
||||
@ -318,7 +318,7 @@ sei80bu_device::sei80bu_device(const machine_config &mconfig, const char *tag, d
|
||||
{
|
||||
}
|
||||
|
||||
READ8_MEMBER(sei80bu_device::data_r)
|
||||
u8 sei80bu_device::data_r(offs_t offset)
|
||||
{
|
||||
u16 a = offset;
|
||||
u8 src = read_byte(offset);
|
||||
@ -335,7 +335,7 @@ READ8_MEMBER(sei80bu_device::data_r)
|
||||
return src;
|
||||
}
|
||||
|
||||
READ8_MEMBER(sei80bu_device::opcode_r)
|
||||
u8 sei80bu_device::opcode_r(offs_t offset)
|
||||
{
|
||||
u16 a = offset;
|
||||
u8 src = read_byte(offset);
|
||||
@ -406,7 +406,7 @@ void seibu_adpcm_device::decrypt()
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( seibu_adpcm_device::adr_w )
|
||||
void seibu_adpcm_device::adr_w(offs_t offset, u8 data)
|
||||
{
|
||||
if (m_stream)
|
||||
m_stream->update();
|
||||
@ -422,7 +422,7 @@ WRITE8_MEMBER( seibu_adpcm_device::adr_w )
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( seibu_adpcm_device::ctl_w )
|
||||
void seibu_adpcm_device::ctl_w(u8 data)
|
||||
{
|
||||
// sequence is 00 02 01 each time.
|
||||
if (m_stream)
|
||||
|
@ -51,21 +51,21 @@ public:
|
||||
template<class Object> devcb_base &set_ym_read_callback(Object &&object) { return m_ym_read_cb.set_callback(std::forward<Object>(object)); }
|
||||
template<class Object> devcb_base &set_ym_write_callback(Object &&object) { return m_ym_write_cb.set_callback(std::forward<Object>(object)); }
|
||||
|
||||
DECLARE_READ8_MEMBER( main_r );
|
||||
DECLARE_WRITE8_MEMBER( main_w );
|
||||
DECLARE_WRITE16_MEMBER( main_mustb_w );
|
||||
DECLARE_WRITE8_MEMBER( irq_clear_w );
|
||||
DECLARE_WRITE8_MEMBER( rst10_ack_w );
|
||||
DECLARE_WRITE8_MEMBER( rst18_ack_w );
|
||||
DECLARE_READ8_MEMBER( ym_r );
|
||||
DECLARE_WRITE8_MEMBER( ym_w );
|
||||
DECLARE_WRITE8_MEMBER( bank_w );
|
||||
DECLARE_WRITE8_MEMBER( coin_w );
|
||||
u8 main_r(offs_t offset);
|
||||
void main_w(offs_t offset, u8 data);
|
||||
void main_mustb_w(offs_t, u16 data, u16 mem_mask);
|
||||
void irq_clear_w(u8);
|
||||
void rst10_ack_w(u8);
|
||||
void rst18_ack_w(u8);
|
||||
u8 ym_r(offs_t offset);
|
||||
void ym_w(offs_t offset, u8 data);
|
||||
void bank_w(u8 data);
|
||||
void coin_w(u8 data);
|
||||
WRITE_LINE_MEMBER( fm_irqhandler );
|
||||
DECLARE_READ8_MEMBER( soundlatch_r );
|
||||
DECLARE_READ8_MEMBER( main_data_pending_r );
|
||||
DECLARE_WRITE8_MEMBER( main_data_w );
|
||||
DECLARE_WRITE8_MEMBER( pending_w );
|
||||
u8 soundlatch_r(offs_t offset);
|
||||
u8 main_data_pending_r();
|
||||
void main_data_w(offs_t offset, u8 data);
|
||||
void pending_w(u8);
|
||||
|
||||
IRQ_CALLBACK_MEMBER(im0_vector_cb);
|
||||
|
||||
@ -113,8 +113,8 @@ class sei80bu_device : public device_t, public device_rom_interface
|
||||
public:
|
||||
sei80bu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
DECLARE_READ8_MEMBER(data_r);
|
||||
DECLARE_READ8_MEMBER(opcode_r);
|
||||
u8 data_r(offs_t offset);
|
||||
u8 opcode_r(offs_t offset);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
@ -134,8 +134,8 @@ public:
|
||||
~seibu_adpcm_device() {}
|
||||
|
||||
void decrypt();
|
||||
DECLARE_WRITE8_MEMBER( adr_w );
|
||||
DECLARE_WRITE8_MEMBER( ctl_w );
|
||||
void adr_w(offs_t offset, u8 data);
|
||||
void ctl_w(u8 data);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
|
@ -184,9 +184,9 @@ void bloodbro_state::skysmash_map(address_map &map)
|
||||
map(0xc0000, 0xc004f).rw("crtc", FUNC(seibu_crtc_device::read_alt), FUNC(seibu_crtc_device::write_alt));
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(bloodbro_state::weststry_soundlatch_w)
|
||||
void bloodbro_state::weststry_soundlatch_w(offs_t offset, u8 data)
|
||||
{
|
||||
m_seibu_sound->main_w(space, offset, data, mem_mask);
|
||||
m_seibu_sound->main_w(offset, data);
|
||||
|
||||
if (offset == 1)
|
||||
m_audiocpu->set_input_line(0, ASSERT_LINE);
|
||||
|
@ -86,10 +86,10 @@ WRITE16_MEMBER(cabal_state::cabalbl_sndcmd_w)
|
||||
|
||||
|
||||
|
||||
WRITE16_MEMBER(cabal_state::sound_irq_trigger_word_w)
|
||||
void cabal_state::sound_irq_trigger_word_w(offs_t, u16 data, u16 mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
m_seibu_sound->main_w(space, 4, data & 0x00ff);
|
||||
m_seibu_sound->main_w(4, data & 0x00ff);
|
||||
|
||||
/* spin for a while to let the Z80 read the command, otherwise coins "stick" */
|
||||
m_maincpu->spin_until_time(attotime::from_usec(50));
|
||||
|
@ -29,13 +29,13 @@
|
||||
|
||||
/***************************************************************************/
|
||||
|
||||
READ8_MEMBER(dcon_state::sdgndmps_sound_comms_r)
|
||||
u8 dcon_state::sdgndmps_sound_comms_r(offs_t offset)
|
||||
{
|
||||
// Routine at 134C sends no sound commands if lowest bit is 0
|
||||
if (offset == 5) // ($a000a)
|
||||
return 1;
|
||||
|
||||
return m_seibu_sound->main_r(space, offset);
|
||||
return m_seibu_sound->main_r(offset);
|
||||
}
|
||||
|
||||
void dcon_state::dcon_map(address_map &map)
|
||||
|
@ -130,7 +130,7 @@ WRITE8_MEMBER(jr100_state::jr100_via_w)
|
||||
m_beeper->set_clock(894886.25 / (double)(m_t1latch) / 2.0);
|
||||
}
|
||||
}
|
||||
m_via->write(space,offset,data);
|
||||
m_via->write(offset,data);
|
||||
}
|
||||
|
||||
void jr100_state::jr100_mem(address_map &map)
|
||||
|
@ -94,13 +94,13 @@ Preliminary COP MCU memory map
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
READ8_MEMBER(legionna_state::denjinmk_sound_comms_r)
|
||||
u8 legionna_state::denjinmk_sound_comms_r(offs_t offset)
|
||||
{
|
||||
// Routine at 5FDC spins indefinitely until the lowest bit becomes 1
|
||||
if (offset == 10) // ($100714)
|
||||
return 1;
|
||||
|
||||
return m_seibu_sound->main_r(space, (offset >> 1) & 7);
|
||||
return m_seibu_sound->main_r((offset >> 1) & 7);
|
||||
}
|
||||
|
||||
void legionna_state::legionna_cop_map(address_map &map)
|
||||
@ -189,12 +189,8 @@ void legionna_state::legionna_map(address_map &map)
|
||||
map(0x100600, 0x10064f).rw(m_crtc, FUNC(seibu_crtc_device::read), FUNC(seibu_crtc_device::write));
|
||||
map(0x100680, 0x100681).nopw(); // irq ack?
|
||||
map(0x100700, 0x10071f).lrw8("seibu_sound_rw",
|
||||
[this](address_space &space, offs_t offset, u8 mem_mask) {
|
||||
return m_seibu_sound->main_r(space, offset >> 1, mem_mask);
|
||||
},
|
||||
[this](address_space &space, offs_t offset, u8 data, u8 mem_mask) {
|
||||
m_seibu_sound->main_w(space, offset >> 1, data, mem_mask);
|
||||
}).umask16(0x00ff);
|
||||
[this](offs_t offset) { return m_seibu_sound->main_r(offset >> 1); },
|
||||
[this](offs_t offset, u8 data) { m_seibu_sound->main_w(offset >> 1, data); }).umask16(0x00ff);
|
||||
map(0x100740, 0x100741).portr("DSW1");
|
||||
map(0x100744, 0x100745).portr("PLAYERS12");
|
||||
map(0x100748, 0x100749).portr("PLAYERS34");
|
||||
@ -223,12 +219,8 @@ void legionna_state::heatbrl_map(address_map &map)
|
||||
map(0x100748, 0x100749).portr("PLAYERS34");
|
||||
map(0x10074c, 0x10074d).portr("SYSTEM");
|
||||
map(0x1007c0, 0x1007df).lrw8("seibu_sound_rw",
|
||||
[this](address_space &space, offs_t offset, u8 mem_mask) {
|
||||
return m_seibu_sound->main_r(space, offset >> 1, mem_mask);
|
||||
},
|
||||
[this](address_space &space, offs_t offset, u8 data, u8 mem_mask) {
|
||||
m_seibu_sound->main_w(space, offset >> 1, data, mem_mask);
|
||||
}).umask16(0x00ff);
|
||||
[this](offs_t offset) { return m_seibu_sound->main_r(offset >> 1); },
|
||||
[this](offs_t offset, u8 data) { m_seibu_sound->main_w(offset >> 1, data); }).umask16(0x00ff);
|
||||
map(0x100800, 0x100fff).ram(); // .w(FUNC(legionna_state::legionna_background_w)).share("back_data");
|
||||
map(0x101000, 0x1017ff).ram(); // .w(FUNC(legionna_state::legionna_foreground_w).share("fore_data");
|
||||
map(0x101800, 0x101fff).ram(); // .w(FUNC(legionna_state::legionna_midground_w).share("mid_data");
|
||||
@ -247,12 +239,8 @@ void legionna_state::godzilla_map(address_map &map)
|
||||
map(0x100600, 0x10064f).rw(m_crtc, FUNC(seibu_crtc_device::read), FUNC(seibu_crtc_device::write));
|
||||
map(0x100680, 0x100681).nopw(); // irq ack?
|
||||
map(0x100700, 0x10071f).lrw8("seibu_sound_rw",
|
||||
[this](address_space &space, offs_t offset, u8 mem_mask) {
|
||||
return m_seibu_sound->main_r(space, offset >> 1, mem_mask);
|
||||
},
|
||||
[this](address_space &space, offs_t offset, u8 data, u8 mem_mask) {
|
||||
m_seibu_sound->main_w(space, offset >> 1, data, mem_mask);
|
||||
}).umask16(0x00ff);
|
||||
[this](offs_t offset) { return m_seibu_sound->main_r(offset >> 1); },
|
||||
[this](offs_t offset, u8 data) { m_seibu_sound->main_w(offset >> 1, data); }).umask16(0x00ff);
|
||||
map(0x100740, 0x100741).portr("DSW1");
|
||||
map(0x100744, 0x100745).portr("PLAYERS12");
|
||||
map(0x100748, 0x100749).portr("PLAYERS34");
|
||||
@ -306,10 +294,7 @@ void legionna_state::denjinmk_map(address_map &map)
|
||||
map(0x100600, 0x10064f).rw(m_crtc, FUNC(seibu_crtc_device::read), FUNC(seibu_crtc_device::write));
|
||||
map(0x100680, 0x100681).nopw(); // irq ack?
|
||||
map(0x100700, 0x10071f).r(FUNC(legionna_state::denjinmk_sound_comms_r))
|
||||
.lw8("seibu_sound_w",
|
||||
[this](address_space &space, offs_t offset, u8 data, u8 mem_mask) {
|
||||
m_seibu_sound->main_w(space, offset >> 1, data, mem_mask);
|
||||
}).umask16(0x00ff);
|
||||
.lw8("seibu_sound_w", [this](offs_t offset, u8 data) { m_seibu_sound->main_w(offset >> 1, data); }).umask16(0x00ff);
|
||||
map(0x100740, 0x100741).portr("DSW1");
|
||||
map(0x100744, 0x100745).portr("PLAYERS12");
|
||||
map(0x100748, 0x100749).portr("PLAYERS34");
|
||||
@ -337,12 +322,8 @@ void legionna_state::grainbow_map(address_map &map)
|
||||
map(0x100600, 0x10064f).rw(m_crtc, FUNC(seibu_crtc_device::read), FUNC(seibu_crtc_device::write));
|
||||
map(0x100680, 0x100681).nopw(); // irq ack?
|
||||
map(0x100700, 0x10071f).lrw8("seibu_sound_rw",
|
||||
[this](address_space &space, offs_t offset, u8 mem_mask) {
|
||||
return m_seibu_sound->main_r(space, offset >> 1, mem_mask);
|
||||
},
|
||||
[this](address_space &space, offs_t offset, u8 data, u8 mem_mask) {
|
||||
m_seibu_sound->main_w(space, offset >> 1, data, mem_mask);
|
||||
}).umask16(0x00ff);
|
||||
[this](offs_t offset) { return m_seibu_sound->main_r(offset >> 1); },
|
||||
[this](offs_t offset, u8 data) { m_seibu_sound->main_w(offset >> 1, data); }).umask16(0x00ff);
|
||||
map(0x100740, 0x100741).portr("DSW1");
|
||||
map(0x100744, 0x100745).portr("PLAYERS12");
|
||||
map(0x100748, 0x100749).portr("PLAYERS34");
|
||||
@ -368,12 +349,8 @@ void legionna_state::cupsoc_map(address_map &map)
|
||||
map(0x100600, 0x10064f).rw(m_crtc, FUNC(seibu_crtc_device::read), FUNC(seibu_crtc_device::write));
|
||||
map(0x100680, 0x100681).nopw(); // irq ack?
|
||||
map(0x100700, 0x10071f).lrw8("seibu_sound_rw",
|
||||
[this](address_space &space, offs_t offset, u8 mem_mask) {
|
||||
return m_seibu_sound->main_r(space, offset >> 1, mem_mask);
|
||||
},
|
||||
[this](address_space &space, offs_t offset, u8 data, u8 mem_mask) {
|
||||
m_seibu_sound->main_w(space, offset >> 1, data, mem_mask);
|
||||
}).umask16(0x00ff);
|
||||
[this](offs_t offset) { return m_seibu_sound->main_r(offset >> 1); },
|
||||
[this](offs_t offset, u8 data) { m_seibu_sound->main_w(offset >> 1, data); }).umask16(0x00ff);
|
||||
map(0x100740, 0x100741).portr("DSW1");
|
||||
map(0x100744, 0x100745).portr("PLAYERS12");
|
||||
map(0x100748, 0x100749).portr("PLAYERS34");
|
||||
@ -413,12 +390,8 @@ void legionna_state::cupsocs_map(address_map &map)
|
||||
map(0x10070c, 0x10070d).portr("SYSTEM");
|
||||
map(0x10071c, 0x10071d).portr("DSW2");
|
||||
map(0x100740, 0x10075f).lrw8("seibu_sound_rw",
|
||||
[this](address_space &space, offs_t offset, u8 mem_mask) {
|
||||
return m_seibu_sound->main_r(space, offset >> 1, mem_mask);
|
||||
},
|
||||
[this](address_space &space, offs_t offset, u8 data, u8 mem_mask) {
|
||||
m_seibu_sound->main_w(space, offset >> 1, data, mem_mask);
|
||||
}).umask16(0x00ff);
|
||||
[this](offs_t offset) { return m_seibu_sound->main_r(offset >> 1); },
|
||||
[this](offs_t offset, u8 data) { m_seibu_sound->main_w(offset >> 1, data); }).umask16(0x00ff);
|
||||
map(0x100800, 0x100fff).ram(); // .w(FUNC(legionna_state::legionna_background_w)).share("back_data");
|
||||
map(0x101000, 0x1017ff).ram(); // .w(FUNC(legionna_state::legionna_foreground_w).share("fore_data");
|
||||
map(0x101800, 0x101fff).ram(); // .w(FUNC(legionna_state::legionna_midground_w).share("mid_data");
|
||||
|
@ -681,7 +681,7 @@ READ16_MEMBER ( mac128_state::mac_via_r )
|
||||
|
||||
if (LOG_VIA)
|
||||
logerror("mac_via_r: offset=0x%02x\n", offset);
|
||||
data = m_via->read(space, offset);
|
||||
data = m_via->read(offset);
|
||||
|
||||
m_maincpu->adjust_icount(m_via_cycles);
|
||||
|
||||
@ -697,9 +697,9 @@ WRITE16_MEMBER ( mac128_state::mac_via_w )
|
||||
logerror("mac_via_w: offset=0x%02x data=0x%08x\n", offset, data);
|
||||
|
||||
if (ACCESSING_BITS_0_7)
|
||||
m_via->write(space, offset, data & 0xff);
|
||||
m_via->write(offset, data & 0xff);
|
||||
if (ACCESSING_BITS_8_15)
|
||||
m_via->write(space, offset, (data >> 8) & 0xff);
|
||||
m_via->write(offset, (data >> 8) & 0xff);
|
||||
|
||||
m_maincpu->adjust_icount(m_via_cycles);
|
||||
}
|
||||
|
@ -147,9 +147,6 @@ public:
|
||||
DECLARE_WRITE_LINE_MEMBER(via2_ca2_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(via2_cb2_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(via2_irq_w);
|
||||
DECLARE_WRITE8_MEMBER(port_314_w);
|
||||
DECLARE_READ8_MEMBER(port_314_r);
|
||||
DECLARE_READ8_MEMBER(port_318_r);
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(acia_irq_w);
|
||||
|
||||
@ -193,6 +190,9 @@ protected:
|
||||
|
||||
virtual void update_irq() override;
|
||||
void remap();
|
||||
void port_314_w(u8 data);
|
||||
u8 port_314_r();
|
||||
u8 port_318_r();
|
||||
};
|
||||
|
||||
/* Ram is 64K, with 16K hidden by the rom. The 300-3ff is also hidden by the i/o */
|
||||
@ -477,7 +477,7 @@ WRITE_LINE_MEMBER(telestrat_state::via2_irq_w)
|
||||
update_irq();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(telestrat_state::port_314_w)
|
||||
void telestrat_state::port_314_w(u8 data)
|
||||
{
|
||||
m_port_314 = data;
|
||||
floppy_image_device *floppy = m_floppies[(m_port_314 >> 5) & 3];
|
||||
@ -490,12 +490,12 @@ WRITE8_MEMBER(telestrat_state::port_314_w)
|
||||
update_irq();
|
||||
}
|
||||
|
||||
READ8_MEMBER(telestrat_state::port_314_r)
|
||||
u8 telestrat_state::port_314_r()
|
||||
{
|
||||
return (m_fdc_irq && (m_port_314 & P_IRQEN)) ? 0x7f : 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER(telestrat_state::port_318_r)
|
||||
u8 telestrat_state::port_318_r()
|
||||
{
|
||||
return m_fdc_drq ? 0x7f : 0xff;
|
||||
}
|
||||
|
@ -602,7 +602,7 @@ READ8_MEMBER( pet_state::read )
|
||||
}
|
||||
if (BIT(offset, 6))
|
||||
{
|
||||
data &= m_via->read(space, offset & 0x0f);
|
||||
data &= m_via->read(offset & 0x0f);
|
||||
}
|
||||
if (m_crtc && BIT(offset, 7) && BIT(offset, 0))
|
||||
{
|
||||
@ -659,7 +659,7 @@ WRITE8_MEMBER( pet_state::write )
|
||||
}
|
||||
if (BIT(offset, 6))
|
||||
{
|
||||
m_via->write(space, offset & 0x0f, data);
|
||||
m_via->write(offset & 0x0f, data);
|
||||
}
|
||||
if (m_crtc && BIT(offset, 7))
|
||||
{
|
||||
@ -820,7 +820,7 @@ READ8_MEMBER( cbm8296_state::read )
|
||||
}
|
||||
if (BIT(offset, 6))
|
||||
{
|
||||
data &= m_via->read(space, offset & 0x0f);
|
||||
data &= m_via->read(offset & 0x0f);
|
||||
}
|
||||
if (BIT(offset, 7) && BIT(offset, 0))
|
||||
{
|
||||
@ -875,7 +875,7 @@ WRITE8_MEMBER( cbm8296_state::write )
|
||||
}
|
||||
if (BIT(offset, 6))
|
||||
{
|
||||
m_via->write(space, offset & 0x0f, data);
|
||||
m_via->write(offset & 0x0f, data);
|
||||
}
|
||||
if (BIT(offset, 7))
|
||||
{
|
||||
|
@ -226,7 +226,7 @@ WRITE16_MEMBER(pntnpuzl_state::pntnpuzl_280018_w)
|
||||
if (data & 0x2000)
|
||||
m_serial |= 0x400;
|
||||
|
||||
m_via->write(space, 0x18/2, data >> 8);
|
||||
m_via->write(0x18/2, data >> 8);
|
||||
}
|
||||
|
||||
READ16_MEMBER(pntnpuzl_state::pntnpuzl_280014_r)
|
||||
@ -234,7 +234,7 @@ READ16_MEMBER(pntnpuzl_state::pntnpuzl_280014_r)
|
||||
static const int startup[3] = { 0x80, 0x0c, 0x00 };
|
||||
int res;
|
||||
|
||||
(void)m_via->read(space, 0x14/2);
|
||||
(void)m_via->read(0x14/2);
|
||||
|
||||
if (m_serial_out == 0x11)
|
||||
{
|
||||
|
@ -493,12 +493,8 @@ void r2dx_v33_state::nzeroteam_base_map(address_map &map)
|
||||
// map(0x00762, 0x00763).r(FUNC(r2dx_v33_state::nzerotea_unknown_r));
|
||||
|
||||
map(0x00780, 0x0079f).lrw8("seibu_sound_rw",
|
||||
[this](address_space &space, offs_t offset, u8 mem_mask) {
|
||||
return m_seibu_sound->main_r(space, offset >> 1, mem_mask);
|
||||
},
|
||||
[this](address_space &space, offs_t offset, u8 data, u8 mem_mask) {
|
||||
m_seibu_sound->main_w(space, offset >> 1, data, mem_mask);
|
||||
}).umask16(0x00ff);
|
||||
[this](offs_t offset) { return m_seibu_sound->main_r(offset >> 1); },
|
||||
[this](offs_t offset, u8 data) { m_seibu_sound->main_w(offset >> 1, data); }).umask16(0x00ff);
|
||||
|
||||
map(0x00800, 0x00fff).ram();
|
||||
map(0x01000, 0x0bfff).ram();
|
||||
|
@ -973,12 +973,8 @@ void raiden2_state::raiden2_mem(address_map &map)
|
||||
map(0x0068e, 0x0068f).nopw(); //irq ack / sprite buffering?
|
||||
|
||||
map(0x00700, 0x0071f).lrw8("seibu_sound_rw",
|
||||
[this](address_space &space, offs_t offset, u8 mem_mask) {
|
||||
return m_seibu_sound->main_r(space, offset >> 1, mem_mask);
|
||||
},
|
||||
[this](address_space &space, offs_t offset, u8 data, u8 mem_mask) {
|
||||
m_seibu_sound->main_w(space, offset >> 1, data, mem_mask);
|
||||
}).umask16(0x00ff);
|
||||
[this](offs_t offset) { return m_seibu_sound->main_r(offset >> 1); },
|
||||
[this](offs_t offset, u8 data) { m_seibu_sound->main_w(offset >> 1, data); }).umask16(0x00ff);
|
||||
|
||||
map(0x00740, 0x00741).portr("DSW");
|
||||
map(0x00744, 0x00745).portr("P1_P2");
|
||||
@ -1022,12 +1018,8 @@ void raiden2_state::zeroteam_mem(address_map &map)
|
||||
map(0x0068e, 0x0068f).nopw(); // irq ack / sprite buffering?
|
||||
|
||||
map(0x00700, 0x0071f).lrw8("seibu_sound_rw",
|
||||
[this](address_space &space, offs_t offset, u8 mem_mask) {
|
||||
return m_seibu_sound->main_r(space, offset >> 1, mem_mask);
|
||||
},
|
||||
[this](address_space &space, offs_t offset, u8 data, u8 mem_mask) {
|
||||
m_seibu_sound->main_w(space, offset >> 1, data, mem_mask);
|
||||
}).umask16(0x00ff);
|
||||
[this](offs_t offset) { return m_seibu_sound->main_r(offset >> 1); },
|
||||
[this](offs_t offset, u8 data) { m_seibu_sound->main_w(offset >> 1, data); }).umask16(0x00ff);
|
||||
|
||||
map(0x00740, 0x00741).portr("DSW");
|
||||
map(0x00744, 0x00745).portr("P1_P2");
|
||||
@ -1060,12 +1052,8 @@ void raiden2_state::xsedae_mem(address_map &map)
|
||||
map(0x0068e, 0x0068f).nopw(); //irq ack / sprite buffering?
|
||||
|
||||
map(0x00700, 0x0071f).lrw8("seibu_sound_rw",
|
||||
[this](address_space &space, offs_t offset, u8 mem_mask) {
|
||||
return m_seibu_sound->main_r(space, offset >> 1, mem_mask);
|
||||
},
|
||||
[this](address_space &space, offs_t offset, u8 data, u8 mem_mask) {
|
||||
m_seibu_sound->main_w(space, offset >> 1, data, mem_mask);
|
||||
}).umask16(0x00ff);
|
||||
[this](offs_t offset) { return m_seibu_sound->main_r(offset >> 1); },
|
||||
[this](offs_t offset, u8 data) { m_seibu_sound->main_w(offset >> 1, data); }).umask16(0x00ff);
|
||||
|
||||
map(0x00740, 0x00741).portr("DSW");
|
||||
map(0x00744, 0x00745).portr("P1_P2");
|
||||
|
@ -642,7 +642,7 @@ static const char *const swyft_via_regnames[] = { "0: ORB/IRB", "1: ORA/IRA", "2
|
||||
READ8_MEMBER( swyft_state::swyft_via0_r )
|
||||
{
|
||||
if (offset&0x000C3F) logerror("VIA0: read from invalid offset in 68k space: %06X!\n", offset);
|
||||
uint8_t data = m_via[0]->read(space, (offset>>6)&0xF);
|
||||
uint8_t data = m_via[0]->read((offset>>6)&0xF);
|
||||
LOGMASKED(LOG_VIA0, "VIA0 register %s read by cpu: returning %02x\n", swyft_via_regnames[(offset>>5)&0xF], data);
|
||||
return data;
|
||||
}
|
||||
@ -651,13 +651,13 @@ WRITE8_MEMBER( swyft_state::swyft_via0_w )
|
||||
{
|
||||
LOGMASKED(LOG_VIA0, "VIA0 register %s written by cpu with data %02x\n", swyft_via_regnames[(offset>>5)&0xF], data);
|
||||
if (offset&0x000C3F) logerror("VIA0: write to invalid offset in 68k space: %06X, data: %02X!\n", offset, data);
|
||||
m_via[1]->write(space, (offset>>6)&0xF, data);
|
||||
m_via[1]->write((offset>>6)&0xF, data);
|
||||
}
|
||||
|
||||
READ8_MEMBER( swyft_state::swyft_via1_r )
|
||||
{
|
||||
if (offset&0x000C3F) logerror("VIA1: read from invalid offset in 68k space: %06X!\n", offset);
|
||||
uint8_t data = m_via[1]->read(space, (offset>>6)&0xF);
|
||||
uint8_t data = m_via[1]->read((offset>>6)&0xF);
|
||||
LOGMASKED(LOG_VIA1, "VIA1 register %s read by cpu: returning %02x\n", swyft_via_regnames[(offset>>5)&0xF], data);
|
||||
return data;
|
||||
}
|
||||
@ -666,7 +666,7 @@ WRITE8_MEMBER( swyft_state::swyft_via1_w )
|
||||
{
|
||||
LOGMASKED(LOG_VIA1, "VIA1 register %s written by cpu with data %02x\n", swyft_via_regnames[(offset>>5)&0xF], data);
|
||||
if (offset&0x000C3F) logerror("VIA1: write to invalid offset in 68k space: %06X, data: %02X!\n", offset, data);
|
||||
m_via[0]->write(space, (offset>>6)&0xF, data);
|
||||
m_via[0]->write((offset>>6)&0xF, data);
|
||||
}
|
||||
|
||||
// first via
|
||||
|
@ -216,11 +216,11 @@ READ8_MEMBER( vic20_state::read )
|
||||
case IO0:
|
||||
if (BIT(offset, 4))
|
||||
{
|
||||
data = m_via1->read(space, offset & 0x0f);
|
||||
data = m_via1->read(offset & 0x0f);
|
||||
}
|
||||
else if (BIT(offset, 5))
|
||||
{
|
||||
data = m_via2->read(space, offset & 0x0f);
|
||||
data = m_via2->read(offset & 0x0f);
|
||||
}
|
||||
else if (offset >= 0x9000 && offset < 0x9010)
|
||||
{
|
||||
@ -291,11 +291,11 @@ WRITE8_MEMBER( vic20_state::write )
|
||||
case IO0:
|
||||
if (BIT(offset, 4))
|
||||
{
|
||||
m_via1->write(space, offset & 0x0f, data);
|
||||
m_via1->write(offset & 0x0f, data);
|
||||
}
|
||||
else if (BIT(offset, 5))
|
||||
{
|
||||
m_via2->write(space, offset & 0x0f, data);
|
||||
m_via2->write(offset & 0x0f, data);
|
||||
}
|
||||
else if (offset >= 0x9000 && offset < 0x9010)
|
||||
{
|
||||
|
@ -533,16 +533,16 @@ WRITE8_MEMBER(wicat_state::fdc_w)
|
||||
READ16_MEMBER(wicat_state::via_r)
|
||||
{
|
||||
if(ACCESSING_BITS_0_7)
|
||||
return m_via->read(space,offset);
|
||||
return m_via->read(offset);
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(wicat_state::via_w)
|
||||
{
|
||||
if(ACCESSING_BITS_0_7)
|
||||
m_via->write(space,offset,data);
|
||||
m_via->write(offset,data);
|
||||
else if(ACCESSING_BITS_8_15)
|
||||
m_via->write(space,offset,data>>8);
|
||||
m_via->write(offset,data>>8);
|
||||
}
|
||||
|
||||
READ8_MEMBER(wicat_state::video_r)
|
||||
|
@ -48,7 +48,7 @@ public:
|
||||
DECLARE_WRITE16_MEMBER(layer_en_w);
|
||||
DECLARE_WRITE16_MEMBER(layer_scroll_w);
|
||||
DECLARE_WRITE16_MEMBER(weststry_layer_scroll_w);
|
||||
DECLARE_WRITE8_MEMBER(weststry_soundlatch_w);
|
||||
void weststry_soundlatch_w(offs_t offset, u8 data);
|
||||
DECLARE_WRITE_LINE_MEMBER(weststry_opl_irq_w);
|
||||
DECLARE_WRITE8_MEMBER(weststry_opl_w);
|
||||
DECLARE_WRITE8_MEMBER(weststry_soundnmi_ack_w);
|
||||
|
@ -47,7 +47,7 @@ public:
|
||||
DECLARE_WRITE16_MEMBER(text_videoram_w);
|
||||
|
||||
// cabal specific
|
||||
DECLARE_WRITE16_MEMBER(sound_irq_trigger_word_w);
|
||||
void sound_irq_trigger_word_w(offs_t, u16 data, u16 mem_mask);
|
||||
|
||||
// cabalbl specific
|
||||
DECLARE_WRITE16_MEMBER(cabalbl_sndcmd_w);
|
||||
|
@ -44,7 +44,7 @@ private:
|
||||
uint16_t m_scroll_ram[6];
|
||||
uint16_t m_layer_en;
|
||||
|
||||
DECLARE_READ8_MEMBER(sdgndmps_sound_comms_r);
|
||||
u8 sdgndmps_sound_comms_r(offs_t offset);
|
||||
|
||||
DECLARE_WRITE16_MEMBER(layer_en_w);
|
||||
DECLARE_WRITE16_MEMBER(layer_scroll_w);
|
||||
|
@ -80,7 +80,7 @@ private:
|
||||
DECLARE_WRITE16_MEMBER(legionna_midground_w);
|
||||
DECLARE_WRITE16_MEMBER(legionna_foreground_w);
|
||||
DECLARE_WRITE16_MEMBER(legionna_text_w);
|
||||
DECLARE_READ8_MEMBER(denjinmk_sound_comms_r);
|
||||
u8 denjinmk_sound_comms_r(offs_t offset);
|
||||
DECLARE_WRITE8_MEMBER(godzilla_oki_bank_w);
|
||||
DECLARE_WRITE16_MEMBER(denjinmk_setgfxbank);
|
||||
DECLARE_WRITE16_MEMBER(heatbrl_setgfxbank);
|
||||
|
@ -902,11 +902,11 @@ READ8_MEMBER(apple3_state::apple3_memory_r)
|
||||
}
|
||||
else if (offset >= 0xffd0 && offset <= 0xffdf)
|
||||
{
|
||||
rv = m_via[0]->read(space, offset);
|
||||
rv = m_via[0]->read(offset);
|
||||
}
|
||||
else if (offset >= 0xffe0 && offset <= 0xffef)
|
||||
{
|
||||
rv = m_via[1]->read(space, offset);
|
||||
rv = m_via[1]->read(offset);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -1049,14 +1049,14 @@ WRITE8_MEMBER(apple3_state::apple3_memory_w)
|
||||
{
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
m_via[0]->write(space, offset, data);
|
||||
m_via[0]->write(offset, data);
|
||||
}
|
||||
}
|
||||
else if (offset >= 0xffe0 && offset <= 0xffef)
|
||||
{
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
m_via[1]->write(space, offset, data);
|
||||
m_via[1]->write(offset, data);
|
||||
}
|
||||
}
|
||||
else
|
||||
|
@ -431,8 +431,8 @@ READ8_MEMBER(bbc_state::bbcm_r)
|
||||
if ((myo>=0x30) && (myo<=0x33)) return 0xfe;
|
||||
if ((myo>=0x34) && (myo<=0x37)) return bbcm_acccon_r(space, myo-0x34); /* ACCCON */
|
||||
if ((myo>=0x38) && (myo<=0x3f)) return 0xfe; /* NC ?? */
|
||||
if ((myo>=0x40) && (myo<=0x5f)) return m_via6522_0->read(space, myo-0x40);
|
||||
if ((myo>=0x60) && (myo<=0x7f)) return m_via6522_1 ? m_via6522_1->read(space, myo-0x60) : 0xfe;
|
||||
if ((myo>=0x40) && (myo<=0x5f)) return m_via6522_0->read(myo-0x40);
|
||||
if ((myo>=0x60) && (myo<=0x7f)) return m_via6522_1 ? m_via6522_1->read(myo-0x60) : 0xfe;
|
||||
if ((myo>=0x80) && (myo<=0x9f)) return 0xfe;
|
||||
if ((myo>=0xa0) && (myo<=0xbf)) return m_adlc ? m_adlc->read(space, myo & 0x03) : 0xfe;
|
||||
if ((myo>=0xc0) && (myo<=0xdf)) return 0xff;
|
||||
@ -465,8 +465,8 @@ WRITE8_MEMBER(bbc_state::bbcm_w)
|
||||
if ((myo>=0x30) && (myo<=0x33)) page_selectbm_w(space, myo-0x30, data); /* ROMSEL */
|
||||
if ((myo>=0x34) && (myo<=0x37)) bbcm_acccon_w(space, myo-0x34, data); /* ACCCON */
|
||||
//if ((myo>=0x38) && (myo<=0x3f)) /* NC ?? */
|
||||
if ((myo>=0x40) && (myo<=0x5f)) m_via6522_0->write(space, myo-0x40, data);
|
||||
if ((myo>=0x60) && (myo<=0x7f) && (m_via6522_1)) m_via6522_1->write(space, myo-0x60, data);
|
||||
if ((myo>=0x40) && (myo<=0x5f)) m_via6522_0->write(myo-0x40, data);
|
||||
if ((myo>=0x60) && (myo<=0x7f) && (m_via6522_1)) m_via6522_1->write(myo-0x60, data);
|
||||
//if ((myo>=0x80) && (myo<=0x9f))
|
||||
if ((myo>=0xa0) && (myo<=0xbf) && (m_adlc)) m_adlc->write(space, myo & 0x03, data);
|
||||
//if ((myo>=0xc0) && (myo<=0xdf))
|
||||
|
@ -249,7 +249,7 @@ READ16_MEMBER(concept_state::concept_io_r)
|
||||
/* NVIA versatile system interface */
|
||||
// LOG(("concept_io_r: VIA read at address 0x03%4.4x\n", offset << 1));
|
||||
{
|
||||
return m_via0->read(space, offset & 0xf);
|
||||
return m_via0->read(offset & 0xf);
|
||||
}
|
||||
|
||||
case 4:
|
||||
@ -362,7 +362,7 @@ WRITE16_MEMBER(concept_state::concept_io_w)
|
||||
case 3:
|
||||
/* NVIA versatile system interface */
|
||||
{
|
||||
m_via0->write(space, offset & 0xf, data);
|
||||
m_via0->write(offset & 0xf, data);
|
||||
}
|
||||
break;
|
||||
|
||||
|
@ -389,7 +389,6 @@ TIMER_CALLBACK_MEMBER(lisa_state::handle_mouse)
|
||||
TIMER_CALLBACK_MEMBER(lisa_state::read_COPS_command)
|
||||
{
|
||||
int command;
|
||||
address_space &space = m_maincpu->space(AS_PROGRAM);
|
||||
|
||||
m_COPS_Ready = 0;
|
||||
m_via0->write_pb6(m_COPS_Ready);
|
||||
@ -398,7 +397,7 @@ TIMER_CALLBACK_MEMBER(lisa_state::read_COPS_command)
|
||||
COPS_send_data_if_possible();
|
||||
|
||||
/* some pull-ups allow the COPS to read 1s when the VIA port is not set as output */
|
||||
command = (m_COPS_command | (~ m_via0->read(space, via6522_device::VIA_DDRA))) & 0xff;
|
||||
command = (m_COPS_command | (~ m_via0->read(via6522_device::VIA_DDRA))) & 0xff;
|
||||
|
||||
// printf("Dropping Ready, command = %02x\n", command);
|
||||
|
||||
@ -675,7 +674,7 @@ WRITE_LINE_MEMBER(lisa_state::COPS_via_out_ca2)
|
||||
WRITE8_MEMBER(lisa_state::COPS_via_out_b)
|
||||
{
|
||||
/* pull-up */
|
||||
data |= (~ m_via0->read(space, via6522_device::VIA_DDRA)) & 0x01;
|
||||
data |= (~ m_via0->read(via6522_device::VIA_DDRA)) & 0x01;
|
||||
|
||||
if (data & 0x01)
|
||||
{
|
||||
@ -1721,13 +1720,13 @@ READ16_MEMBER(lisa_state::lisa_IO_r)
|
||||
case 2: /* parallel port */
|
||||
/* 1 VIA located at 0xD901 */
|
||||
if (ACCESSING_BITS_0_7)
|
||||
answer = m_via1->read(space, (offset >> 2) & 0xf);
|
||||
answer = m_via1->read((offset >> 2) & 0xf);
|
||||
break;
|
||||
|
||||
case 3: /* keyboard/mouse cops via */
|
||||
/* 1 VIA located at 0xDD81 */
|
||||
if (ACCESSING_BITS_0_7)
|
||||
answer = m_via0->read(space, offset & 0xf);
|
||||
answer = m_via0->read(offset & 0xf);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -1844,12 +1843,12 @@ WRITE16_MEMBER(lisa_state::lisa_IO_w)
|
||||
|
||||
case 2: /* paralel port */
|
||||
if (ACCESSING_BITS_0_7)
|
||||
m_via1->write(space, (offset >> 2) & 0xf, data & 0xff);
|
||||
m_via1->write((offset >> 2) & 0xf, data & 0xff);
|
||||
break;
|
||||
|
||||
case 3: /* keyboard/mouse cops via */
|
||||
if (ACCESSING_BITS_0_7)
|
||||
m_via0->write(space, offset & 0xf, data & 0xff);
|
||||
m_via0->write(offset & 0xf, data & 0xff);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -1652,7 +1652,7 @@ READ16_MEMBER ( mac_state::mac_via_r )
|
||||
|
||||
if (LOG_VIA)
|
||||
logerror("mac_via_r: offset=0x%02x\n", offset);
|
||||
data = m_via1->read(space, offset);
|
||||
data = m_via1->read(offset);
|
||||
|
||||
m_maincpu->adjust_icount(m_via_cycles);
|
||||
|
||||
@ -1668,9 +1668,9 @@ WRITE16_MEMBER ( mac_state::mac_via_w )
|
||||
logerror("mac_via_w: offset=0x%02x data=0x%08x\n", offset, data);
|
||||
|
||||
if (ACCESSING_BITS_0_7)
|
||||
m_via1->write(space, offset, data & 0xff);
|
||||
m_via1->write(offset, data & 0xff);
|
||||
if (ACCESSING_BITS_8_15)
|
||||
m_via1->write(space, offset, (data >> 8) & 0xff);
|
||||
m_via1->write(offset, (data >> 8) & 0xff);
|
||||
|
||||
m_maincpu->adjust_icount(m_via_cycles);
|
||||
}
|
||||
@ -1691,7 +1691,7 @@ READ16_MEMBER ( mac_state::mac_via2_r )
|
||||
offset >>= 8;
|
||||
offset &= 0x0f;
|
||||
|
||||
data = m_via2->read(space, offset);
|
||||
data = m_via2->read(offset);
|
||||
|
||||
if (LOG_VIA)
|
||||
logerror("mac_via2_r: offset=0x%02x = %02x (PC=%x)\n", offset*2, data, m_maincpu->pc());
|
||||
@ -1708,9 +1708,9 @@ WRITE16_MEMBER ( mac_state::mac_via2_w )
|
||||
logerror("mac_via2_w: offset=%x data=0x%08x mask=%x (PC=%x)\n", offset, data, mem_mask, m_maincpu->pc());
|
||||
|
||||
if (ACCESSING_BITS_0_7)
|
||||
m_via2->write(space, offset, data & 0xff);
|
||||
m_via2->write(offset, data & 0xff);
|
||||
if (ACCESSING_BITS_8_15)
|
||||
m_via2->write(space, offset, (data >> 8) & 0xff);
|
||||
m_via2->write(offset, (data >> 8) & 0xff);
|
||||
}
|
||||
|
||||
|
||||
|
@ -72,7 +72,7 @@ READ16_MEMBER ( macpci_state::mac_via_r )
|
||||
|
||||
if (LOG_VIA)
|
||||
printf("mac_via_r: offset=0x%02x (PC=%x)\n", offset, m_maincpu->pc());
|
||||
data = m_via1->read(space, offset);
|
||||
data = m_via1->read(offset);
|
||||
|
||||
m_maincpu->adjust_icount(m_via_cycles);
|
||||
|
||||
@ -88,9 +88,9 @@ WRITE16_MEMBER ( macpci_state::mac_via_w )
|
||||
printf("mac_via_w: offset=0x%02x data=0x%08x (PC=%x)\n", offset, data, m_maincpu->pc());
|
||||
|
||||
if (ACCESSING_BITS_0_7)
|
||||
m_via1->write(space, offset, data & 0xff);
|
||||
m_via1->write(offset, data & 0xff);
|
||||
if (ACCESSING_BITS_8_15)
|
||||
m_via1->write(space, offset, (data >> 8) & 0xff);
|
||||
m_via1->write(offset, (data >> 8) & 0xff);
|
||||
|
||||
m_maincpu->adjust_icount(m_via_cycles);
|
||||
}
|
||||
|
@ -751,11 +751,11 @@ void microtan_state::snapshot_copy(uint8_t *snapshot_buff, int snapshot_size)
|
||||
|
||||
/* first set of VIA6522 registers */
|
||||
for (int i = 0; i < 16; i++ )
|
||||
m_via6522[0]->write(space, i, snapshot_buff[base++]);
|
||||
m_via6522[0]->write(i, snapshot_buff[base++]);
|
||||
|
||||
/* second set of VIA6522 registers */
|
||||
for (int i = 0; i < 16; i++ )
|
||||
m_via6522[1]->write(space, i, snapshot_buff[base++]);
|
||||
m_via6522[1]->write(i, snapshot_buff[base++]);
|
||||
|
||||
/* microtan IO bff0-bfff */
|
||||
for (int i = 0; i < 16; i++ )
|
||||
|
@ -1059,9 +1059,9 @@ READ8_MEMBER( victor_9000_fdc_device::cs7_r )
|
||||
{
|
||||
m_lbrdy_cb(1);
|
||||
|
||||
if (LOG_VIA) logerror("%s %s LBRDY 1 : %02x\n", machine().time().as_string(), machine().describe_context(), m_via5->read(space, offset));
|
||||
if (LOG_VIA) logerror("%s %s LBRDY 1 : %02x\n", machine().time().as_string(), machine().describe_context(), m_via5->read(offset));
|
||||
|
||||
return m_via5->read(space, offset);
|
||||
return m_via5->read(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( victor_9000_fdc_device::cs7_w )
|
||||
@ -1070,7 +1070,7 @@ WRITE8_MEMBER( victor_9000_fdc_device::cs7_w )
|
||||
|
||||
if (LOG_VIA) logerror("%s %s LBRDY 1\n", machine().time().as_string(), machine().describe_context());
|
||||
|
||||
m_via5->write(space, offset, data);
|
||||
m_via5->write(offset, data);
|
||||
}
|
||||
|
||||
floppy_image_device* victor_9000_fdc_device::get_floppy()
|
||||
|
@ -35,10 +35,10 @@ public:
|
||||
auto syn_wr_callback() { return m_syn_cb.bind(); }
|
||||
auto lbrdy_wr_callback() { return m_lbrdy_cb.bind(); }
|
||||
|
||||
DECLARE_READ8_MEMBER( cs5_r ) { return m_via4->read(space, offset); }
|
||||
DECLARE_WRITE8_MEMBER( cs5_w ) { m_via4->write(space, offset, data); }
|
||||
DECLARE_READ8_MEMBER( cs6_r ) { return m_via6->read(space, offset); }
|
||||
DECLARE_WRITE8_MEMBER( cs6_w ) { m_via6->write(space, offset, data); }
|
||||
DECLARE_READ8_MEMBER( cs5_r ) { return m_via4->read(offset); }
|
||||
DECLARE_WRITE8_MEMBER( cs5_w ) { m_via4->write(offset, data); }
|
||||
DECLARE_READ8_MEMBER( cs6_r ) { return m_via6->read(offset); }
|
||||
DECLARE_WRITE8_MEMBER( cs6_w ) { m_via6->write(offset, data); }
|
||||
DECLARE_READ8_MEMBER( cs7_r );
|
||||
DECLARE_WRITE8_MEMBER( cs7_w );
|
||||
|
||||
|
@ -75,7 +75,7 @@ TIMER_CALLBACK_MEMBER(vectrex_base_state::lightpen_trigger)
|
||||
|
||||
READ8_MEMBER(vectrex_base_state::vectrex_via_r)
|
||||
{
|
||||
return m_via6522_0->read(space, offset);
|
||||
return m_via6522_0->read(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(vectrex_base_state::vectrex_via_w)
|
||||
@ -102,7 +102,7 @@ WRITE8_MEMBER(vectrex_base_state::vectrex_via_w)
|
||||
period);
|
||||
break;
|
||||
}
|
||||
m_via6522_0->write(space, offset, data);
|
||||
m_via6522_0->write(offset, data);
|
||||
}
|
||||
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user