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nes_slot.cpp: Unified CHR banking into a common function. (#9261)
* nes_slot.cpp: Unified CHR banking into a common function. - Removed PPU_MIRROR_NONE as an option for nametable mirroring. - Shrunk over-allocated 4-screen NT RAM to correct 4K size. - Sundry minor clean ups. - Only calculate start of bank once.
This commit is contained in:
0kmg
GitHub
parent
fff6c5e9fd
commit
09c4c23136
@ -2678,12 +2678,11 @@ void nes_bmc_jy208_device::write_m(offs_t offset, u8 data)
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nes_bmc_hik8_device::write_m(offset, data);
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if (BIT(m_reg[2], 6))
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{
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set_nt_mirroring(PPU_MIRROR_4SCREEN); // actually change NT pointers
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m_mirroring = PPU_MIRROR_4SCREEN; // prevent MMC3 mirror switching
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}
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m_mirroring = PPU_MIRROR_4SCREEN; // prevent MMC3 mirror switching
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else
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m_mirroring = PPU_MIRROR_NONE; // allow MMC3 mirror switching
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m_mirroring = BIT(m_mmc_mirror, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT; // allow MMC3 mirror switching and get its current setting
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set_nt_mirroring(m_mirroring); // actually change nametable pointers
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}
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/*-------------------------------------------------
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@ -130,7 +130,7 @@ device_nes_cart_interface::device_nes_cart_interface(const machine_config &mconf
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, m_outer_prg_size(0)
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, m_outer_chr_size(0)
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, m_smd133_addr(0x6000)
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, m_mirroring(PPU_MIRROR_NONE)
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, m_mirroring(PPU_MIRROR_HORZ)
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, m_pcb_ctrl_mirror(false)
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, m_four_screen_vram(false)
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, m_has_trainer(false)
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@ -174,26 +174,24 @@ void device_nes_cart_interface::prg_alloc(size_t size, const char *tag)
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m_prg_chunks--;
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}
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m_prg_mask = ((m_prg_chunks << 1) - 1);
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m_prg_mask = (m_prg_chunks << 1) - 1;
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// printf("first mask %x!\n", m_prg_mask);
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if ((m_prg_chunks << 1) & m_prg_mask)
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{
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int mask_bits = 0, temp = (m_prg_chunks << 1), mapsize;
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int mask_bits = 0;
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// contrary to what happens with later systems, like e.g. SNES or MD,
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// only half a dozen of NES carts have PRG which is not a power of 2
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// so we use this bank_map only as an exception
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// printf("uneven rom!\n");
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// 1. redefine mask as (next power of 2)-1
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for (; temp; )
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{
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for (int temp = m_prg_chunks << 1; temp; temp >>= 1)
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mask_bits++;
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temp >>= 1;
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}
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m_prg_mask = (1 << mask_bits) - 1;
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// printf("new mask %x!\n", m_prg_mask);
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mapsize = (1 << mask_bits)/2;
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int mapsize = (1 << mask_bits) / 2;
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// 2. create a bank_map for banks in the range mask/2 -> mask
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m_prg_bank_map.resize(mapsize);
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@ -206,7 +204,7 @@ void device_nes_cart_interface::prg_alloc(size_t size, const char *tag)
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while (j % mapsize)
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{
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int k = 0, repeat_banks;
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while ((j % (mapsize >> k)) && k < mask_bits)
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while (j % (mapsize >> k) && k < mask_bits)
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k++;
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repeat_banks = j % (mapsize >> (k - 1));
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for (int l = 0; l < repeat_banks; l++)
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@ -271,20 +269,20 @@ void device_nes_cart_interface::battery_alloc(size_t size)
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inline int device_nes_cart_interface::prg_8k_bank_num(int bank_8k)
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{
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if (m_prg_mask == ((m_prg_chunks << 1) - 1))
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if (m_prg_mask == (m_prg_chunks << 1) - 1)
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return bank_8k & m_prg_mask;
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// only a few pirate games (less than a dozen) have PRG which is not power of 2
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// so we treat it here separately, rather than forcing all games to use m_prg_bank_map
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// case 1: if we are accessing a bank before the end of the image, just return that bank
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if (bank_8k < ((m_prg_chunks << 1) - 1))
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if (bank_8k < (m_prg_chunks << 1) - 1)
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return bank_8k;
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// case 2: otherwise return a mirror using the bank_map!
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// uint8_t temp = bank_8k;
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bank_8k &= m_prg_mask;
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bank_8k -= (m_prg_mask/2 + 1);
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bank_8k -= m_prg_mask / 2 + 1;
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// printf("bank: accessed %x (top: %x), returned %x\n", temp, (m_prg_chunks << 1) - 1, m_prg_bank_map[bank_8k]);
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return m_prg_bank_map[bank_8k];
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}
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@ -303,11 +301,11 @@ inline void device_nes_cart_interface::update_prg_banks(int prg_bank_start, int
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void device_nes_cart_interface::prg32(int bank)
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{
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/* if there is only 16k PRG, return */
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// if there is only 16k PRG, return
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if (!(m_prg_chunks >> 1))
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return;
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/* assumes that bank references a 32k chunk */
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// assumes that bank references a 32k chunk
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bank = prg_8k_bank_num(bank * 4);
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m_prg_bank[0] = bank + 0;
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@ -319,7 +317,7 @@ void device_nes_cart_interface::prg32(int bank)
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void device_nes_cart_interface::prg16_89ab(int bank)
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{
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/* assumes that bank references a 16k chunk */
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// assumes that bank references a 16k chunk
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bank = prg_8k_bank_num(bank * 2);
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m_prg_bank[0] = bank + 0;
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@ -329,7 +327,7 @@ void device_nes_cart_interface::prg16_89ab(int bank)
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void device_nes_cart_interface::prg16_cdef(int bank)
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{
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/* assumes that bank references a 16k chunk */
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// assumes that bank references a 16k chunk
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bank = prg_8k_bank_num(bank * 2);
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m_prg_bank[2] = bank + 0;
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@ -353,110 +351,36 @@ void device_nes_cart_interface::prg8_x(int start, int bank)
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// CHR helpers
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//-------------------------------------------------
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inline void device_nes_cart_interface::chr_sanity_check( int source )
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void device_nes_cart_interface::bank_chr(int shift, int start, int bank, int source)
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{
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if (source == CHRRAM && m_vram.empty())
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fatalerror("CHRRAM bankswitch with no VRAM\n");
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if (source == CHRROM && m_vrom == nullptr)
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fatalerror("CHRROM bankswitch with no VROM\n");
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}
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void device_nes_cart_interface::chr8(int bank, int source)
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{
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chr_sanity_check(source);
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uint8_t *base_ptr;
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uint32_t chr_chunks;
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if (source == CHRRAM)
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{
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bank &= (m_vram_chunks - 1);
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for (int i = 0; i < 8; i++)
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{
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m_chr_src[i] = source;
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m_chr_orig[i] = (bank * 0x2000) + (i * 0x400); // for save state uses!
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m_chr_access[i] = &m_vram[m_chr_orig[i]];
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}
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}
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else
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{
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bank &= (m_vrom_chunks - 1);
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for (int i = 0; i < 8; i++)
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{
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m_chr_src[i] = source;
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m_chr_orig[i] = (bank * 0x2000) + (i * 0x400); // for save state uses!
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m_chr_access[i] = &m_vrom[m_chr_orig[i]];
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}
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}
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}
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assert(!m_vram.empty());
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void device_nes_cart_interface::chr4_x(int start, int bank, int source)
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{
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chr_sanity_check(source);
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if (source == CHRRAM)
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{
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bank &= ((m_vram_chunks << 1) - 1);
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for (int i = 0; i < 4; i++)
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{
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m_chr_src[i + start] = source;
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m_chr_orig[i + start] = (bank * 0x1000) + (i * 0x400); // for save state uses!
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m_chr_access[i + start] = &m_vram[m_chr_orig[i + start]];
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}
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base_ptr = &m_vram[0];
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chr_chunks = m_vram_chunks;
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}
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else
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else // source == CHRROM
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{
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bank &= ((m_vrom_chunks << 1) - 1);
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for (int i = 0; i < 4; i++)
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{
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m_chr_src[i + start] = source;
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m_chr_orig[i + start] = (bank * 0x1000) + (i * 0x400); // for save state uses!
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m_chr_access[i + start] = &m_vrom[m_chr_orig[i + start]];
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}
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}
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}
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assert(m_vrom != nullptr);
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void device_nes_cart_interface::chr2_x(int start, int bank, int source)
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{
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chr_sanity_check(source);
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if (source == CHRRAM)
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{
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bank &= ((m_vram_chunks << 2) - 1);
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for (int i = 0; i < 2; i++)
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{
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m_chr_src[i + start] = source;
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m_chr_orig[i + start] = (bank * 0x800) + (i * 0x400); // for save state uses!
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m_chr_access[i + start] = &m_vram[m_chr_orig[i + start]];
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}
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base_ptr = m_vrom;
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chr_chunks = m_vrom_chunks;
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}
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else
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{
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bank &= ((m_vrom_chunks << 2) - 1);
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for (int i = 0; i < 2; i++)
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{
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m_chr_src[i + start] = source;
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m_chr_orig[i + start] = (bank * 0x800) + (i * 0x400); // for save state uses!
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m_chr_access[i + start] = &m_vrom[m_chr_orig[i + start]];
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}
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}
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}
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void device_nes_cart_interface::chr1_x(int start, int bank, int source)
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{
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chr_sanity_check(source);
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bank &= (chr_chunks << (3 - shift)) - 1;
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int size = 0x400 << shift;
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int bank_start = bank * size;
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int kbyte = 1 << shift;
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if (source == CHRRAM)
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for (int i = 0; i < kbyte; i++)
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{
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bank &= ((m_vram_chunks << 3) - 1);
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m_chr_src[start] = source;
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m_chr_orig[start] = (bank * 0x400); // for save state uses!
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m_chr_access[start] = &m_vram[m_chr_orig[start]];
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}
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else
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{
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bank &= ((m_vrom_chunks << 3) - 1);
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m_chr_src[start] = source;
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m_chr_orig[start] = (bank * 0x400); // for save state uses!
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m_chr_access[start] = &m_vrom[m_chr_orig[start]];
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m_chr_src[i + start] = source;
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m_chr_orig[i + start] = bank_start + i * 0x400; // for save state uses!
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m_chr_access[i + start] = &base_ptr[m_chr_orig[i + start]];
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}
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}
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@ -466,7 +390,7 @@ void device_nes_cart_interface::chr1_x(int start, int bank, int source)
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void device_nes_cart_interface::set_nt_page(int page, int source, int bank, int writable)
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{
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uint8_t* base_ptr;
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uint8_t *base_ptr;
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switch (source)
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{
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@ -474,7 +398,7 @@ void device_nes_cart_interface::set_nt_page(int page, int source, int bank, int
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base_ptr = &m_ext_ntram[0];
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break;
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case VROM:
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bank &= ((m_vrom_chunks << 3) - 1);
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bank &= (m_vrom_chunks << 3) - 1;
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base_ptr = m_vrom;
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break;
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case EXRAM:
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@ -487,7 +411,7 @@ void device_nes_cart_interface::set_nt_page(int page, int source, int bank, int
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break;
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}
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page &= 3; /* mask down to the 4 logical pages */
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page &= 3; // mask down to the 4 logical pages
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m_nt_src[page] = source;
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if (base_ptr)
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@ -501,16 +425,10 @@ void device_nes_cart_interface::set_nt_page(int page, int source, int bank, int
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void device_nes_cart_interface::set_nt_mirroring(int mirroring)
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{
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/* setup our videomem handlers based on mirroring */
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// setup our videomem handlers based on mirroring
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switch (mirroring)
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{
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case PPU_MIRROR_VERT:
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set_nt_page(0, CIRAM, 0, 1);
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set_nt_page(1, CIRAM, 1, 1);
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set_nt_page(2, CIRAM, 0, 1);
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set_nt_page(3, CIRAM, 1, 1);
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break;
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default:
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case PPU_MIRROR_HORZ:
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set_nt_page(0, CIRAM, 0, 1);
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set_nt_page(1, CIRAM, 0, 1);
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@ -518,6 +436,13 @@ void device_nes_cart_interface::set_nt_mirroring(int mirroring)
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set_nt_page(3, CIRAM, 1, 1);
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break;
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case PPU_MIRROR_VERT:
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set_nt_page(0, CIRAM, 0, 1);
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set_nt_page(1, CIRAM, 1, 1);
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set_nt_page(2, CIRAM, 0, 1);
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set_nt_page(3, CIRAM, 1, 1);
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break;
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case PPU_MIRROR_HIGH:
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set_nt_page(0, CIRAM, 1, 1);
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set_nt_page(1, CIRAM, 1, 1);
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@ -539,14 +464,6 @@ void device_nes_cart_interface::set_nt_mirroring(int mirroring)
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set_nt_page(2, CART_NTRAM, 2, 1);
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set_nt_page(3, CART_NTRAM, 3, 1);
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break;
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case PPU_MIRROR_NONE:
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default:
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set_nt_page(0, CIRAM, 0, 1);
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set_nt_page(1, CIRAM, 0, 1);
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set_nt_page(2, CIRAM, 1, 1);
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set_nt_page(3, CIRAM, 1, 1);
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break;
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}
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}
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@ -623,7 +540,7 @@ uint8_t device_nes_cart_interface::chr_r(offs_t offset)
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void device_nes_cart_interface::nt_w(offs_t offset, uint8_t data)
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{
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int page = ((offset & 0xc00) >> 10);
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int page = (offset & 0xc00) >> 10;
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if (!m_nt_writable[page])
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return;
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@ -633,7 +550,7 @@ void device_nes_cart_interface::nt_w(offs_t offset, uint8_t data)
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uint8_t device_nes_cart_interface::nt_r(offs_t offset)
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{
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int page = ((offset & 0xc00) >> 10);
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int page = (offset & 0xc00) >> 10;
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return m_nt_access[page][offset & 0x3ff];
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}
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@ -708,7 +625,7 @@ void device_nes_cart_interface::pcb_start(running_machine &machine, uint8_t *cir
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if (m_four_screen_vram)
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{
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m_ext_ntram.resize(0x2000);
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m_ext_ntram.resize(0x1000);
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device().save_item(NAME(m_ext_ntram));
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}
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@ -803,7 +720,7 @@ void nes_cart_slot_device::pcb_reset()
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-------------------------------------------------*/
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/* Include emulation of NES PCBs for softlist */
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// Include emulation of NES PCBs for softlist
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#include "nes_pcb.hxx"
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@ -813,7 +730,7 @@ void nes_cart_slot_device::pcb_reset()
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-------------------------------------------------*/
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/* Include emulation of UNIF Boards for .unf files */
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// Include emulation of UNIF Boards for .unf files
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#include "nes_unif.hxx"
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@ -823,7 +740,7 @@ void nes_cart_slot_device::pcb_reset()
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-------------------------------------------------*/
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/* Include emulation of iNES Mappers for .nes files */
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// Include emulation of iNES Mappers for .nes files
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#include "nes_ines.hxx"
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@ -835,11 +752,11 @@ image_init_result nes_cart_slot_device::call_load()
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{
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char magic[4];
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/* Check first 4 bytes of the image to decide if it is UNIF or iNES */
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/* Unfortunately, many .unf files have been released as .nes, so we cannot rely on extensions only */
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// Check first 4 bytes of the image to decide if it is UNIF or iNES
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// Unfortunately, many .unf files have been released as .nes, so we cannot rely on extensions only
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fread(magic, 4);
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if ((magic[0] == 'N') && (magic[1] == 'E') && (magic[2] == 'S')) /* If header starts with 'NES' it is iNES */
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if ((magic[0] == 'N') && (magic[1] == 'E') && (magic[2] == 'S')) // If header starts with 'NES' it is iNES
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{
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if (length() <= 0x10)
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{
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@ -849,7 +766,7 @@ image_init_result nes_cart_slot_device::call_load()
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call_load_ines();
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}
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else if ((magic[0] == 'U') && (magic[1] == 'N') && (magic[2] == 'I') && (magic[3] == 'F')) /* If header starts with 'UNIF' it is UNIF */
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else if ((magic[0] == 'U') && (magic[1] == 'N') && (magic[2] == 'I') && (magic[3] == 'F')) // If header starts with 'UNIF' it is UNIF
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{
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||||
if (length() <= 0x20)
|
||||
{
|
||||
|
||||
@ -170,7 +170,6 @@ enum
|
||||
#define CART_NTRAM 4
|
||||
|
||||
|
||||
#define PPU_MIRROR_NONE 0
|
||||
#define PPU_MIRROR_VERT 1
|
||||
#define PPU_MIRROR_HORZ 2
|
||||
#define PPU_MIRROR_HIGH 3
|
||||
@ -334,7 +333,6 @@ public:
|
||||
|
||||
// CHR
|
||||
int m_chr_source; // global source for the 8 VROM banks
|
||||
inline void chr_sanity_check(int source);
|
||||
|
||||
//these were previously called chr_map. they are a quick banking structure,
|
||||
//because some of these change multiple times per scanline!
|
||||
@ -346,24 +344,27 @@ public:
|
||||
uint32_t m_vram_chunks;
|
||||
|
||||
// CHR helpers
|
||||
void chr8(int bank, int source);
|
||||
void chr4_x(int start, int bank, int source);
|
||||
void chr4_0(int bank, int source) { chr4_x(0, bank, source); }
|
||||
void chr4_4(int bank, int source) { chr4_x(4, bank, source); }
|
||||
void chr2_x(int start, int bank, int source);
|
||||
void chr2_0(int bank, int source) { chr2_x(0, bank, source); }
|
||||
void chr2_2(int bank, int source) { chr2_x(2, bank, source); }
|
||||
void chr2_4(int bank, int source) { chr2_x(4, bank, source); }
|
||||
void chr2_6(int bank, int source) { chr2_x(6, bank, source); }
|
||||
void chr1_x(int start, int bank, int source);
|
||||
void chr1_0(int bank, int source) { chr1_x(0, bank, source); }
|
||||
void chr1_1(int bank, int source) { chr1_x(1, bank, source); }
|
||||
void chr1_2(int bank, int source) { chr1_x(2, bank, source); }
|
||||
void chr1_3(int bank, int source) { chr1_x(3, bank, source); }
|
||||
void chr1_4(int bank, int source) { chr1_x(4, bank, source); }
|
||||
void chr1_5(int bank, int source) { chr1_x(5, bank, source); }
|
||||
void chr1_6(int bank, int source) { chr1_x(6, bank, source); }
|
||||
void chr1_7(int bank, int source) { chr1_x(7, bank, source); }
|
||||
private:
|
||||
void bank_chr(int shift, int start, int bank, int source);
|
||||
public:
|
||||
void chr8(int bank, int source) { bank_chr(3, 0, bank, source); }
|
||||
void chr4_x(int start, int bank, int source) { bank_chr(2, start, bank, source); }
|
||||
void chr4_0(int bank, int source) { bank_chr(2, 0, bank, source); }
|
||||
void chr4_4(int bank, int source) { bank_chr(2, 4, bank, source); }
|
||||
void chr2_x(int start, int bank, int source) { bank_chr(1, start, bank, source); }
|
||||
void chr2_0(int bank, int source) { bank_chr(1, 0, bank, source); }
|
||||
void chr2_2(int bank, int source) { bank_chr(1, 2, bank, source); }
|
||||
void chr2_4(int bank, int source) { bank_chr(1, 4, bank, source); }
|
||||
void chr2_6(int bank, int source) { bank_chr(1, 6, bank, source); }
|
||||
void chr1_x(int start, int bank, int source) { bank_chr(0, start, bank, source); }
|
||||
void chr1_0(int bank, int source) { bank_chr(0, 0, bank, source); }
|
||||
void chr1_1(int bank, int source) { bank_chr(0, 1, bank, source); }
|
||||
void chr1_2(int bank, int source) { bank_chr(0, 2, bank, source); }
|
||||
void chr1_3(int bank, int source) { bank_chr(0, 3, bank, source); }
|
||||
void chr1_4(int bank, int source) { bank_chr(0, 4, bank, source); }
|
||||
void chr1_5(int bank, int source) { bank_chr(0, 5, bank, source); }
|
||||
void chr1_6(int bank, int source) { bank_chr(0, 6, bank, source); }
|
||||
void chr1_7(int bank, int source) { bank_chr(0, 7, bank, source); }
|
||||
|
||||
|
||||
// NameTable & Mirroring
|
||||
|
||||
Loading…
Reference in New Issue
Block a user