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ti99: Extend gromemu cartridge type to support bank-switched ROMs.
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@ -136,10 +136,24 @@ void ti99_cartridge_device::prepare_cartridge()
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}
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m_pcb->m_rom_size = loaded_through_softlist() ? get_software_region_length("rom") : m_rpk->get_resource_length("rom_socket");
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m_pcb->m_bank_mask = 0;
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if (m_pcb->m_rom_size > 0)
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{
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if (m_pcb->m_rom_size > 0x200000) fatalerror("Cartridge ROM size exceeding 2 MiB");
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LOGMASKED(LOG_CONFIG, "rom size=0x%04x\n", m_pcb->m_rom_size);
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// Determine the bank mask for flexible ROM sizes in gromemu
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int rsizet = m_pcb->m_rom_size;
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int msizet = 0x2000;
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while (msizet < rsizet)
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{
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m_pcb->m_bank_mask = (m_pcb->m_bank_mask<<1) | 1;
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msizet <<= 1;
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}
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LOGMASKED(LOG_CONFIG, "rom bank mask=0x%04x\n", m_pcb->m_bank_mask);
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regr = memregion(CARTROM_TAG);
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rom_ptr = loaded_through_softlist() ? get_software_region("rom") : m_rpk->get_contents_of_socket("rom_socket");
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memcpy(regr->base(), rom_ptr, m_pcb->m_rom_size);
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@ -158,6 +172,11 @@ void ti99_cartridge_device::prepare_cartridge()
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regr = memregion(CARTROM_TAG);
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rom_ptr = m_rpk->get_contents_of_socket("rom2_socket");
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memcpy(regr->base() + 0x2000, rom_ptr, rom2_length);
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// Configurations with ROM1+ROM2 have exactly two banks; only
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// the first 8K are used from ROM1.
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m_pcb->m_bank_mask = 1;
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LOGMASKED(LOG_CONFIG, "rom bank mask=0x0001 (using rom/rom2)\n");
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}
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}
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@ -1270,23 +1289,16 @@ void ti99_pagedcru_cartridge::cruwrite(offs_t offset, uint8_t data)
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will deliver the address when reading.
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- No wait states. Reading is generally faster than with real GROMs.
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- No wrapping at 8K boundaries.
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- Two pages of ROM at address 6000
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If any of these fails, the cartridge will crash, so we'll see.
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- One or two ROM sockets; if one socket, the standard bank switch scheme is
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used
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Typical cartridges: Third-party cartridges
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For the sake of simplicity, we register GROMs like the other PCB types, but
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we implement special access methods for the GROM space.
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Still not working:
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rxb1002 (Set page to 1 (6372 <- 00), lockup)
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rxb237 (immediate reset)
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rxbv555 (repeating reset on Master Title Screen)
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superxb (lockup, fix: add RAM at 7c00)
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Super-MiniMemory is also included here. We assume a RAM area at addresses
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7000-7fff for this cartridge.
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7000-7fff for this cartridge if the RAM option is used.
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GROM space
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@ -1296,10 +1308,22 @@ void ti99_pagedcru_cartridge::cruwrite(offs_t offset, uint8_t data)
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ROM space
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6000 7000 7fff
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|========== ROM1 ===========| Bank 0 write to 6000, 6004, ... 7ffc
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|========== ROM1 ===========| Bank 0
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|========== ROM2 ===========| Bank 1 write to 6002, 6006, ... 7ffe
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|========== ROM2 ===========| Bank 1
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... ...
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|========== ROMn ===========| Bank n-1
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Depending on the number of banks, a number of address bits is used to select
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the bank:
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Write to 011x xxxx xxxx xxx0 -> Set bank number to xxxxxxxxxxxx
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The number xxxxxxxxxxxx has just enough bits to encode the highest bank number.
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Higher bits are ignored.
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If rom2_socket is used, we assume that rom_socket and rom2_socket contain
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8K ROM each, so we have exactly two banks, regardless of the ROM length.
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******************************************************************************/
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@ -1349,7 +1373,9 @@ void ti99_gromemu_cartridge::write(offs_t offset, uint8_t data)
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}
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return; // no paging
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}
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m_rom_page = (offset >> 1) & 1;
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m_rom_page = (offset >> 1) & m_bank_mask;
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if ((offset & 1)==0)
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LOGMASKED(LOG_BANKSWITCH, "Set ROM page = %d (writing to %04x)\n", m_rom_page, (offset | 0x6000));
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}
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@ -236,6 +236,7 @@ protected:
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int m_grom_size;
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int m_rom_size;
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int m_ram_size;
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int m_bank_mask;
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uint8_t* m_rom_ptr;
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uint8_t* m_ram_ptr;
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