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saturn.cpp: rewritten SMPC into a device [Angelo Salese]

Browse Source 
(out-of-whatsnew: added remaining devices, removed almost all trampolines, cleanups, merge implementations between ST-V and Saturn)
This commit is contained in:
angelosa 2017-10-05 05:09:33 +02:00
parent d6dbbe5454
commit 0a212f58c8
6 changed files with 191 additions and 852 deletions
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808
src/devices/machine/smpc.cpp
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File diff suppressed because it is too large Load Diff

67
src/devices/machine/smpc.h
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@ -12,6 +12,8 @@
#pragma once
#include "screen.h"
#include "bus/sat_ctrl/ctrl.h"
#include "machine/nvram.h"
//**************************************************************************
@ -72,9 +74,11 @@ public:
// construction/destruction
smpc_hle_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual space_config_vector memory_space_config() const override;
// I/O operations
// DECLARE_ADDRESS_MAP( io_map, 8);
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
DECLARE_WRITE8_MEMBER( ireg_w );
DECLARE_WRITE8_MEMBER( command_register_w );
DECLARE_READ8_MEMBER( oreg_r );
@ -89,29 +93,11 @@ public:
DECLARE_WRITE8_MEMBER( ddr2_w );
DECLARE_WRITE8_MEMBER( iosel_w );
DECLARE_WRITE8_MEMBER( exle_w );
DECLARE_INPUT_CHANGED_MEMBER( trigger_nmi_r );
// TODO: public stuff & trampolines that should be internal to the device
DECLARE_WRITE8_MEMBER( write );
DECLARE_READ8_MEMBER( read );
void sr_set(uint8_t data);
void sr_ack();
void sf_ack(bool cd_enable);
void sf_set();
void master_sh2_reset(bool state);
void master_sh2_nmi();
void slave_sh2_reset(bool state);
void sound_reset(bool state);
void system_reset(bool state);
void dot_select_request(bool state);
void system_halt_request(bool state);
void irq_request();
bool get_nmi_status();
void m68k_reset_trigger();
bool get_iosel(bool which);
uint8_t get_ddr(bool which);
uint8_t get_ireg(uint8_t offset);
void set_oreg(uint8_t offset,uint8_t data);
// system delegation
template <class Object> static devcb_base &set_master_reset_handler(device_t &device, Object &&cb) { return downcast<smpc_hle_device &>(device).m_mshres.set_callback(std::forward<Object>(cb)); }
@ -132,29 +118,36 @@ public:
// interrupt handler
template <class Object> static devcb_base &set_interrupt_handler(device_t &device, Object &&cb) { return downcast<smpc_hle_device &>(device).m_irq_line.set_callback(std::forward<Object>(cb)); }
static void static_set_screentag(device_t &device, const char *tag);
static void static_set_region_code(device_t &device, uint8_t rgn);
static void static_set_control_port_tags(device_t &device, const char *tag1, const char *tag2);
protected:
// device-level overrides
// virtual void device_validity_check(validity_checker &valid) const override;
// virtual void device_add_mconfig() override;
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
virtual space_config_vector memory_space_config() const override;
private:
const address_space_config m_space_config;
enum {
COMMAND_ID = 1,
RTC_ID,
INTBACK_ID
INTBACK_ID,
SNDRES_ID
};
const address_space_config m_space_config;
emu_timer *m_cmd_timer;
emu_timer *m_rtc_timer;
emu_timer *m_intback_timer;
emu_timer *m_sndres_timer;
const char *m_ctrl1_tag;
const char *m_ctrl2_tag;
bool m_has_ctrl_ports;
bool m_sf;
bool m_cd_sf;
uint8_t m_sr;
@ -166,6 +159,7 @@ private:
uint8_t m_intback_buf[3];
uint8_t m_oreg[32];
uint8_t m_rtc_data[7];
uint8_t m_smem[4];
uint8_t m_comreg;
// in usec
// timing table, from manual in usec
@ -186,13 +180,26 @@ private:
bool m_command_in_progress;
bool m_NMI_reset;
bool m_cur_dotsel;
void master_sh2_nmi();
void irq_request();
bool get_nmi_status();
void resolve_intback();
void intback_continue_request();
void handle_rtc_increment();
void read_saturn_ports();
void sr_set(uint8_t data);
void sr_ack();
void sf_ack(bool cd_enable);
void sf_set();
int DectoBCD(int num);
int m_intback_stage;
int m_pmode;
uint8_t m_region_code;
required_device<nvram_device> m_smpc_nv;
devcb_write_line m_mshres;
devcb_write_line m_mshnmi;
devcb_write_line m_sshres;
@ -207,7 +214,9 @@ private:
devcb_write8 m_pdr1_write;
devcb_write8 m_pdr2_write;
devcb_write_line m_irq_line;
saturn_control_port_device *m_ctrl1;
saturn_control_port_device *m_ctrl2;
screen_device *m_screen;
};

89
src/mame/drivers/saturn.cpp
View File

@ -457,10 +457,10 @@ public:
: saturn_state(mconfig, type, tag)
, m_exp(*this, "exp")
, m_nvram(*this, "nvram")
, m_smpc_nv(*this, "smpc_nv")
, m_ctrl1(*this, "ctrl1")
, m_ctrl2(*this, "ctrl2")
{ }
DECLARE_INPUT_CHANGED_MEMBER(nmi_reset);
DECLARE_INPUT_CHANGED_MEMBER(tray_open);
DECLARE_INPUT_CHANGED_MEMBER(tray_close);
@ -477,12 +477,23 @@ public:
DECLARE_DRIVER_INIT(saturnus);
DECLARE_DRIVER_INIT(saturneu);
DECLARE_DRIVER_INIT(saturnjp);
DECLARE_READ8_MEMBER(saturn_pdr1_direct_r);
DECLARE_READ8_MEMBER(saturn_pdr2_direct_r);
DECLARE_WRITE8_MEMBER(saturn_pdr1_direct_w);
DECLARE_WRITE8_MEMBER(saturn_pdr2_direct_w);
uint8_t m_direct_mux[2];
uint8_t saturn_direct_port_read(bool which);
uint8_t smpc_direct_mode(uint16_t in_value, bool which);
uint8_t smpc_th_control_mode(uint16_t in_value, bool which);
void nvram_init(nvram_device &nvram, void *data, size_t size);
required_device<sat_cart_slot_device> m_exp;
required_device<nvram_device> m_nvram;
required_device<nvram_device> m_smpc_nv; // TODO: move this in the base class saturn_state and add it to stv in MAME
required_device<saturn_control_port_device> m_ctrl1;
required_device<saturn_control_port_device> m_ctrl2;
};
@ -503,7 +514,7 @@ READ32_MEMBER( sat_console_state::abus_dummy_r )
static ADDRESS_MAP_START( saturn_mem, AS_PROGRAM, 32, sat_console_state )
AM_RANGE(0x00000000, 0x0007ffff) AM_ROM AM_SHARE("share6") AM_WRITENOP // bios
AM_RANGE(0x00100000, 0x0010007f) AM_READWRITE8(saturn_SMPC_r, saturn_SMPC_w,0xffffffff)
AM_RANGE(0x00100000, 0x0010007f) AM_DEVREADWRITE8("smpc", smpc_hle_device, read, write, 0xffffffff)
AM_RANGE(0x00180000, 0x0018ffff) AM_READWRITE8(saturn_backupram_r, saturn_backupram_w,0xffffffff) AM_SHARE("share1")
AM_RANGE(0x00200000, 0x002fffff) AM_RAM AM_MIRROR(0x20100000) AM_SHARE("workram_l")
AM_RANGE(0x01000000, 0x017fffff) AM_WRITE(saturn_minit_w)
@ -547,18 +558,6 @@ static ADDRESS_MAP_START( scudsp_data, AS_DATA, 32, sat_console_state )
ADDRESS_MAP_END
INPUT_CHANGED_MEMBER(sat_console_state::nmi_reset)
{
/* TODO: correct? */
if(!m_NMI_reset)
return;
/* TODO: NMI doesn't stay held on SH-2 core so we can't use ASSERT_LINE/CLEAR_LINE with that yet */
if(newval)
m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
}
INPUT_CHANGED_MEMBER(sat_console_state::tray_open)
{
if(newval)
@ -573,7 +572,7 @@ INPUT_CHANGED_MEMBER(sat_console_state::tray_close)
static INPUT_PORTS_START( saturn )
PORT_START("RESET") /* hardwired buttons */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CHANGED_MEMBER(DEVICE_SELF, sat_console_state, nmi_reset,0) PORT_NAME("Reset Button")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CHANGED_MEMBER("smpc", smpc_hle_device, trigger_nmi_r, 0) PORT_NAME("Reset Button")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CHANGED_MEMBER(DEVICE_SELF, sat_console_state, tray_open,0) PORT_NAME("Tray Open Button")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CHANGED_MEMBER(DEVICE_SELF, sat_console_state, tray_close,0) PORT_NAME("Tray Close")
@ -663,7 +662,6 @@ MACHINE_START_MEMBER(sat_console_state, saturn)
m_slave->space(AS_PROGRAM).nop_readwrite(0x04000000, 0x047fffff);
m_nvram->set_base(m_backupram.get(), 0x8000);
m_smpc_nv->set_base(&m_smpc.SMEM, 4);
if (m_exp)
{
@ -713,25 +711,13 @@ MACHINE_START_MEMBER(sat_console_state, saturn)
// save states
save_pointer(NAME(m_scu_regs.get()), 0x100/4);
save_pointer(NAME(m_scsp_regs.get()), 0x1000/2);
save_item(NAME(m_NMI_reset));
save_item(NAME(m_en_68k));
// save_item(NAME(m_smpc.IOSEL1));
// save_item(NAME(m_smpc.IOSEL2));
// save_item(NAME(m_smpc.EXLE1));
// save_item(NAME(m_smpc.EXLE2));
// save_item(NAME(m_smpc.PDR1));
// save_item(NAME(m_smpc.PDR2));
// save_item(NAME(m_port_sel));
// save_item(NAME(mux_data));
save_item(NAME(m_scsp_last_line));
save_item(NAME(m_smpc.intback_stage));
save_item(NAME(m_smpc.pmode));
// save_item(NAME(m_smpc.SR));
save_item(NAME(m_smpc.SMEM));
machine().add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(&sat_console_state::stvcd_exit, this));
m_audiocpu->set_reset_callback(write_line_delegate(FUNC(sat_console_state::m68k_reset_callback),this));
// TODO: trampoline
m_audiocpu->set_reset_callback(write_line_delegate(FUNC(saturn_state::m68k_reset_callback),this));
}
/* Die Hard Trilogy tests RAM address 0x25e7ffe bit 2 with Slave during FRT minit irq, in-development tool for breaking execution of it? */
@ -753,13 +739,9 @@ MACHINE_RESET_MEMBER(sat_console_state,saturn)
m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
m_scudsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
// m_smpc.SR = 0x40; // this bit is always on according to docs
scu_reset();
m_en_68k = 0;
m_NMI_reset = 0;
// m_smpc.slave_on = 0;
//memset(stv_m_workram_l, 0, 0x100000);
//memset(stv_m_workram_h, 0, 0x100000);
@ -773,27 +755,27 @@ MACHINE_RESET_MEMBER(sat_console_state,saturn)
m_vdp2.old_tvmd = -1;
}
READ8_MEMBER( saturn_state::saturn_pdr1_direct_r )
READ8_MEMBER( sat_console_state::saturn_pdr1_direct_r )
{
return saturn_direct_port_read(false);
}
READ8_MEMBER( saturn_state::saturn_pdr2_direct_r )
READ8_MEMBER( sat_console_state::saturn_pdr2_direct_r )
{
return saturn_direct_port_read(true);
}
WRITE8_MEMBER( saturn_state::saturn_pdr1_direct_w )
WRITE8_MEMBER( sat_console_state::saturn_pdr1_direct_w )
{
m_direct_mux[0] = data;
}
WRITE8_MEMBER( saturn_state::saturn_pdr2_direct_w )
WRITE8_MEMBER( sat_console_state::saturn_pdr2_direct_w )
{
m_direct_mux[1] = data;
}
inline uint8_t saturn_state::saturn_direct_port_read(bool which)
inline uint8_t sat_console_state::saturn_direct_port_read(bool which)
{
// bail out if direct mode is disabled
if(m_smpc_hle->get_iosel(which) == false)
@ -818,7 +800,7 @@ inline uint8_t saturn_state::saturn_direct_port_read(bool which)
return res;
}
uint8_t saturn_state::smpc_th_control_mode(uint16_t in_value, bool which)
uint8_t sat_console_state::smpc_th_control_mode(uint16_t in_value, bool which)
{
uint8_t res = 0;
uint8_t th = (m_direct_mux[which] >> 5) & 3;
@ -856,7 +838,7 @@ uint8_t saturn_state::smpc_th_control_mode(uint16_t in_value, bool which)
return res;
}
uint8_t saturn_state::smpc_direct_mode(uint16_t in_value,bool which)
uint8_t sat_console_state::smpc_direct_mode(uint16_t in_value,bool which)
{
uint8_t hshake = (m_direct_mux[which] >> 5) & 3;
const int shift_bit[4] = { 4, 12, 8, 0 };
@ -891,10 +873,11 @@ static MACHINE_CONFIG_START( saturn )
// SMPC MCU, running at 4 MHz (+ custom RTC device that runs at 32.768 KHz)
MCFG_SMPC_HLE_ADD("smpc", XTAL_4MHz)
MCFG_SMPC_HLE_PDR1_IN_CB(READ8(saturn_state, saturn_pdr1_direct_r))
MCFG_SMPC_HLE_PDR2_IN_CB(READ8(saturn_state, saturn_pdr2_direct_r))
MCFG_SMPC_HLE_PDR1_OUT_CB(WRITE8(saturn_state, saturn_pdr1_direct_w))
MCFG_SMPC_HLE_PDR2_OUT_CB(WRITE8(saturn_state, saturn_pdr2_direct_w))
smpc_hle_device::static_set_control_port_tags(*device, "ctrl1", "ctrl2");
MCFG_SMPC_HLE_PDR1_IN_CB(READ8(sat_console_state, saturn_pdr1_direct_r))
MCFG_SMPC_HLE_PDR2_IN_CB(READ8(sat_console_state, saturn_pdr2_direct_r))
MCFG_SMPC_HLE_PDR1_OUT_CB(WRITE8(sat_console_state, saturn_pdr1_direct_w))
MCFG_SMPC_HLE_PDR2_OUT_CB(WRITE8(sat_console_state, saturn_pdr2_direct_w))
MCFG_SMPC_HLE_MASTER_RESET_CB(WRITELINE(saturn_state, master_sh2_reset_w))
MCFG_SMPC_HLE_MASTER_NMI_CB(WRITELINE(saturn_state, master_sh2_nmi_w))
MCFG_SMPC_HLE_SLAVE_RESET_CB(WRITELINE(saturn_state, slave_sh2_reset_w))
@ -908,7 +891,6 @@ static MACHINE_CONFIG_START( saturn )
MCFG_MACHINE_RESET_OVERRIDE(sat_console_state,saturn)
MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram", sat_console_state, nvram_init)
MCFG_NVRAM_ADD_0FILL("smpc_nv") // TODO: default for each region (+ move it inside SMPC when converted to device)
MCFG_TIMER_DRIVER_ADD("sector_timer", sat_console_state, stv_sector_cb)
MCFG_TIMER_DRIVER_ADD("sh1_cmd", sat_console_state, stv_sh1_sim)
@ -961,6 +943,9 @@ MACHINE_CONFIG_DERIVED( saturnus, saturn )
MCFG_SATURN_CARTRIDGE_ADD("exp", saturn_cart, nullptr)
MCFG_SOFTWARE_LIST_ADD("cart_list","sat_cart")
MCFG_DEVICE_MODIFY("smpc")
smpc_hle_device::static_set_region_code(*device, 4);
MACHINE_CONFIG_END
MACHINE_CONFIG_DERIVED( saturneu, saturn )
@ -974,6 +959,8 @@ MACHINE_CONFIG_DERIVED( saturneu, saturn )
MCFG_SATURN_CARTRIDGE_ADD("exp", saturn_cart, nullptr)
MCFG_SOFTWARE_LIST_ADD("cart_list","sat_cart")
MCFG_DEVICE_MODIFY("smpc")
smpc_hle_device::static_set_region_code(*device, 12);
MACHINE_CONFIG_END
MACHINE_CONFIG_DERIVED( saturnjp, saturn )
@ -987,12 +974,14 @@ MACHINE_CONFIG_DERIVED( saturnjp, saturn )
MCFG_SATURN_CARTRIDGE_ADD("exp", saturn_cart, nullptr)
MCFG_SOFTWARE_LIST_ADD("cart_list","sat_cart")
MCFG_DEVICE_MODIFY("smpc")
smpc_hle_device::static_set_region_code(*device, 1);
MACHINE_CONFIG_END
void sat_console_state::saturn_init_driver(int rgn)
{
m_saturn_region = rgn;
// m_saturn_region = rgn;
m_vdp2.pal = (rgn == 12) ? 1 : 0;
// set compatible options

12
src/mame/drivers/stv.cpp
View File

@ -982,7 +982,7 @@ DRIVER_INIT_MEMBER(stv_state, hopper)
static ADDRESS_MAP_START( stv_mem, AS_PROGRAM, 32, stv_state )
AM_RANGE(0x00000000, 0x0007ffff) AM_ROM AM_SHARE("share6") // bios
AM_RANGE(0x00100000, 0x0010007f) AM_READWRITE8(stv_SMPC_r, stv_SMPC_w,0xffffffff)
AM_RANGE(0x00100000, 0x0010007f) AM_DEVREADWRITE8("smpc", smpc_hle_device, read, write, 0xffffffff)
AM_RANGE(0x00180000, 0x0018ffff) AM_READWRITE8(saturn_backupram_r,saturn_backupram_w,0xffffffff) AM_SHARE("share1")
AM_RANGE(0x00200000, 0x002fffff) AM_RAM AM_MIRROR(0x20100000) AM_SHARE("workram_l")
// AM_RANGE(0x00400000, 0x0040001f) AM_READWRITE(stv_ioga_r32, stv_io_w32) AM_SHARE("ioga") AM_MIRROR(0x20) /* installed with per-game specific */
@ -1096,6 +1096,7 @@ static MACHINE_CONFIG_START( stv )
MCFG_SCUDSP_OUT_DMA_CB(WRITE16(saturn_state, scudsp_dma_w))
MCFG_SMPC_HLE_ADD("smpc", XTAL_4MHz)
smpc_hle_device::static_set_region_code(*device, 0);
MCFG_SMPC_HLE_PDR1_IN_CB(READ8(stv_state, pdr1_input_r))
MCFG_SMPC_HLE_PDR2_IN_CB(READ8(stv_state, pdr2_input_r))
MCFG_SMPC_HLE_PDR1_OUT_CB(WRITE8(stv_state, pdr1_output_w))
@ -1236,7 +1237,6 @@ MACHINE_RESET_MEMBER(stv_state,stv)
m_en_68k = 0;
m_NMI_reset = 0;
m_port_sel = m_mux_data = 0;
@ -1293,16 +1293,8 @@ MACHINE_START_MEMBER(stv_state,stv)
// save states
save_pointer(NAME(m_scu_regs.get()), 0x100/4);
save_pointer(NAME(m_scsp_regs.get()), 0x1000/2);
save_item(NAME(m_NMI_reset));
save_item(NAME(m_en_68k));
save_item(NAME(m_prev_gamebank_select));
// save_item(NAME(scanline));
// save_item(NAME(m_smpc.IOSEL1));
// save_item(NAME(m_smpc.IOSEL2));
// save_item(NAME(m_smpc.EXLE1));
// save_item(NAME(m_smpc.EXLE2));
// save_item(NAME(m_smpc.PDR1));
// save_item(NAME(m_smpc.PDR2));
save_item(NAME(m_port_sel));
save_item(NAME(m_mux_data));
save_item(NAME(m_scsp_last_line));

61
src/mame/includes/saturn.h
View File

@ -43,9 +43,7 @@ public:
m_scudsp(*this, "scudsp"),
m_eeprom(*this, "eeprom"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette"),
m_ctrl1(*this, "ctrl1"),
m_ctrl2(*this, "ctrl2")
m_palette(*this, "palette")
{
}
@ -65,7 +63,6 @@ public:
std::unique_ptr<uint32_t[]> m_vdp1_vram;
std::unique_ptr<uint16_t[]> m_vdp1_regs;
uint8_t m_NMI_reset;
uint8_t m_en_68k;
@ -127,28 +124,6 @@ public:
int old_tvmd;
}m_vdp2;
struct {
// uint8_t IOSEL1;
// uint8_t IOSEL2;
// uint8_t EXLE1;
// uint8_t EXLE2;
// uint8_t PDR1;
// uint8_t PDR2;
// uint8_t DDR1;
// uint8_t DDR2;
// uint8_t SF;
// uint8_t SR;
// uint8_t IREG[7];
uint8_t intback_buf[7];
// uint8_t OREG[32];
int intback_stage;
int pmode;
uint8_t SMEM[4];
uint8_t intback;
uint8_t rtc_data[7];
// uint8_t slave_on;
}m_smpc;
/* Saturn specific*/
int m_saturn_region;
uint8_t m_cart_type;
@ -169,8 +144,6 @@ public:
optional_device<eeprom_serial_93cxx_device> m_eeprom;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
optional_device<saturn_control_port_device> m_ctrl1;
optional_device<saturn_control_port_device> m_ctrl2;
bitmap_rgb32 m_tmpbitmap;
DECLARE_VIDEO_START(stv_vdp2);
@ -201,10 +174,6 @@ public:
DECLARE_WRITE8_MEMBER(scsp_irq);
int m_scsp_last_line;
TIMER_CALLBACK_MEMBER( smpc_audio_reset_line_pulse );
DECLARE_READ8_MEMBER( saturn_SMPC_r );
DECLARE_WRITE8_MEMBER( saturn_SMPC_w );
DECLARE_READ16_MEMBER ( saturn_vdp1_regs_r );
DECLARE_READ32_MEMBER ( saturn_vdp1_vram_r );
DECLARE_READ32_MEMBER ( saturn_vdp1_framebuffer0_r );
@ -660,25 +629,6 @@ public:
DECLARE_READ16_MEMBER(scudsp_dma_r);
DECLARE_WRITE16_MEMBER(scudsp_dma_w);
// FROM smpc.c
void smpc_master_on();
TIMER_CALLBACK_MEMBER( smpc_slave_enable );
TIMER_CALLBACK_MEMBER( smpc_sound_enable );
TIMER_CALLBACK_MEMBER( smpc_cd_enable );
void smpc_system_reset();
TIMER_CALLBACK_MEMBER( smpc_change_clock );
TIMER_CALLBACK_MEMBER( stv_intback_peripheral );
TIMER_CALLBACK_MEMBER( stv_smpc_intback );
TIMER_CALLBACK_MEMBER( intback_peripheral );
TIMER_CALLBACK_MEMBER( saturn_smpc_intback );
void smpc_rtc_write();
void smpc_memory_setting();
void smpc_nmi_req();
TIMER_CALLBACK_MEMBER( smpc_nmi_set );
void smpc_comreg_exec(address_space &space, uint8_t data, uint8_t is_stv);
DECLARE_READ8_MEMBER( stv_SMPC_r );
DECLARE_WRITE8_MEMBER( stv_SMPC_w );
// SMPC HLE delegates
DECLARE_WRITE_LINE_MEMBER(master_sh2_reset_w);
DECLARE_WRITE_LINE_MEMBER(master_sh2_nmi_w);
@ -688,14 +638,7 @@ public:
DECLARE_WRITE_LINE_MEMBER(system_halt_w);
DECLARE_WRITE_LINE_MEMBER(dot_select_w);
DECLARE_WRITE_LINE_MEMBER(smpc_irq_w);
DECLARE_READ8_MEMBER(saturn_pdr1_direct_r);
DECLARE_READ8_MEMBER(saturn_pdr2_direct_r);
DECLARE_WRITE8_MEMBER(saturn_pdr1_direct_w);
DECLARE_WRITE8_MEMBER(saturn_pdr2_direct_w);
uint8_t m_direct_mux[2];
uint8_t saturn_direct_port_read(bool which);
uint8_t smpc_direct_mode(uint16_t in_value, bool which);
uint8_t smpc_th_control_mode(uint16_t in_value, bool which);
void debug_scudma_command(int ref, const std::vector<std::string> &params);
void debug_scuirq_command(int ref, const std::vector<std::string> &params);

6
src/mame/machine/saturn.cpp
View File

@ -660,12 +660,10 @@ void saturn_state::scu_reset(void)
}
/* Official documentation says that the "RESET/TAS opcodes aren't supported", but Out Run definitely contradicts with it.
Since that m68k can't reset itself via the RESET opcode I suppose that the SMPC actually do it by reading an i/o
connected to this opcode. */
WRITE_LINE_MEMBER(saturn_state::m68k_reset_callback)
{
machine().scheduler().timer_set(attotime::from_usec(100), timer_expired_delegate(FUNC(saturn_state::smpc_audio_reset_line_pulse), this));
m_smpc_hle->m68k_reset_trigger();
printf("m68k RESET opcode triggered\n");
}