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https://github.com/holub/mame
synced 2025-05-31 18:11:50 +03:00
Fixed GRCG hook-up in PC-9821
This commit is contained in:
Angelo Salese
parent
18fbeeeec8
commit
0af0e5f218
@ -24,7 +24,7 @@
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- Mugen no Shinzou II - The Prince of Darkness: dies on IPLPRO loading, presumably a wd17xx core bug;
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- Multiplan: random hangs/crashes after you set the RTC, sometimes it loads properly;
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- Murder Club: has lots of CG artifacts, FDC issue?
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- Orbit 3: floppy issue makes it to throw a game over as soon as you start a game;
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- Orrbit 3: floppy issue makes it to throw a game over as soon as you start a game;
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- Penguin Kun Wars: has a bug with window effects ("Push space or trigger" msg on the bottom"), needs investigation;
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- Sound Gal Music Editor: wants a "master disk", that apparently isn't available;
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- Yukar K2 (normal version): moans about something, DFJustin: "please put the system disk back to normal", disk write-protected?
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@ -87,6 +87,7 @@
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- Bishoujo Audition: Moans with a "(program) ended. remove the floppy disk and turn off the poewr."
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- Bishoujo Hunter ZX: Doesn't color cycle at intro (seems stuck?), doesn't clear text selection at new game screen;
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- Bishoujo Shanshinkan: has white rectangles all over the place;
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- Bishoujo Tsuushin: hangs with a beep while writing some intro text;
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- Dragon Buster: slight issue with window masking;
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- Far Side Moon: doesn't detect sound board (tied to 0x00ec ports)
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@ -428,7 +429,6 @@ public:
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UINT8 *m_ide_ram;
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UINT8 *m_unk_rom;
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UINT8 *m_ext_gvram;
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UINT8 *m_vram256;
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UINT8 m_pc9821_window_bank;
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UINT8 m_joy_sel;
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UINT8 m_ext2_ff;
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@ -499,15 +499,13 @@ public:
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DECLARE_WRITE8_MEMBER(pc9821_video_ff_w);
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DECLARE_READ8_MEMBER(pc9821_a0_r);
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DECLARE_WRITE8_MEMBER(pc9821_a0_w);
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DECLARE_READ8_MEMBER(pc9821_pit_r);
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DECLARE_WRITE8_MEMBER(pc9821_pit_w);
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DECLARE_READ8_MEMBER(pc9801rs_pit_mirror_r);
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DECLARE_WRITE8_MEMBER(pc9801rs_pit_mirror_w);
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DECLARE_READ8_MEMBER(ide_status_r);
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DECLARE_READ8_MEMBER(pc9801rs_access_ctrl_r);
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DECLARE_WRITE8_MEMBER(pc9801rs_access_ctrl_w);
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DECLARE_READ8_MEMBER(pc9821_memory_r);
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DECLARE_WRITE8_MEMBER(pc9821_memory_w);
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DECLARE_READ8_MEMBER(pc9821_vram256_r);
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DECLARE_WRITE8_MEMBER(pc9821_vram256_w);
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DECLARE_READ8_MEMBER(opn_porta_r);
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DECLARE_WRITE8_MEMBER(opn_portb_w);
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// DECLARE_READ8_MEMBER(pc9801_ext_opna_r);
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@ -2050,6 +2048,39 @@ READ8_MEMBER( pc9801_state::pc9801rs_midi_r )
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return 0xff;
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}
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READ8_MEMBER(pc9801_state::pc9801rs_pit_mirror_r)
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{
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if((offset & 1) == 0)
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{
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printf("Read to undefined port [%04x]\n",offset+0x3fd8);
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return 0xff;
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}
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else // odd
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{
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if(offset & 0x08)
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printf("Read to undefined port [%02x]\n",offset+0x3fd8);
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else
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return pit8253_r(machine().device("pit8253"), space, (offset & 6) >> 1);
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}
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return 0xff;
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}
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WRITE8_MEMBER(pc9801_state::pc9801rs_pit_mirror_w)
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{
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if((offset & 1) == 0)
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{
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printf("Write to undefined port [%04x] <- %02x\n",offset+0x3fd8,data);
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}
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else // odd
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{
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if(offset < 0x08)
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pit8253_w(machine().device("pit8253"), space, (offset & 6) >> 1, data);
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else
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printf("Write to undefined port [%04x] <- %02x\n",offset+0x3fd8,data);
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}
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}
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static ADDRESS_MAP_START( pc9801rs_map, AS_PROGRAM, 32, pc9801_state )
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AM_RANGE(0x00000000, 0xffffffff) AM_READWRITE8(pc9801rs_memory_r,pc9801rs_memory_w,0xffffffff)
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ADDRESS_MAP_END
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@ -2076,6 +2107,7 @@ static ADDRESS_MAP_START( pc9801rs_io, AS_IO, 32, pc9801_state )
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// AM_RANGE(0x0188, 0x018f) AM_READWRITE8(pc9801_opn_r, pc9801_opn_w, 0xffffffff) //ym2203 opn / <undefined>
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AM_RANGE(0x0438, 0x043b) AM_READWRITE8(pc9801rs_access_ctrl_r,pc9801rs_access_ctrl_w,0xffffffff)
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AM_RANGE(0x043c, 0x043f) AM_WRITE8(pc9801rs_bank_w, 0xffffffff) //ROM/RAM bank
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AM_RANGE(0x3fd8, 0x3fdf) AM_READWRITE8(pc9801rs_pit_mirror_r, pc9801rs_pit_mirror_w, 0xffffffff) // <undefined> / pit mirror ports
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AM_RANGE(0x7fd8, 0x7fdf) AM_READWRITE8(pc9801_mouse_r, pc9801_mouse_w, 0xffffffff) // <undefined> / mouse ppi8255 ports
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// AM_RANGE(0xa460, 0xa463) AM_READWRITE8(pc9801_ext_opna_r, pc9801_ext_opna_w, 0xffffffff)
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AM_RANGE(0xbfd8, 0xbfdf) AM_WRITE8(pc9801rs_mouse_freq_w, 0xffffffff)
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@ -2139,6 +2171,7 @@ static ADDRESS_MAP_START( pc9801ux_io, AS_IO, 16, pc9801_state )
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// AM_RANGE(0x0188, 0x018f) AM_READWRITE8(pc9801_opn_r, pc9801_opn_w, 0xffff) //ym2203 opn / <undefined>
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AM_RANGE(0x0438, 0x043b) AM_READWRITE8(pc9801rs_access_ctrl_r,pc9801rs_access_ctrl_w,0xffff)
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AM_RANGE(0x043c, 0x043f) AM_WRITE8(pc9801rs_bank_w, 0xffff) //ROM/RAM bank
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AM_RANGE(0x3fd8, 0x3fdf) AM_READWRITE8(pc9801rs_pit_mirror_r, pc9801rs_pit_mirror_w, 0xffff) // <undefined> / pit mirror ports
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AM_RANGE(0x7fd8, 0x7fdf) AM_READWRITE8(pc9801_mouse_r, pc9801_mouse_w, 0xffff) // <undefined> / mouse ppi8255 ports
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// AM_RANGE(0xa460, 0xa463) AM_READWRITE8(pc9801_ext_opna_r, pc9801_ext_opna_w, 0xffff)
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@ -2154,25 +2187,6 @@ ADDRESS_MAP_END
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READ8_MEMBER(pc9801_state::pc9821_ide_r) { return m_ide_rom[offset]; }
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READ8_MEMBER(pc9801_state::pc9821_unkrom_r) { return m_unk_rom[offset]; }
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READ8_MEMBER(pc9801_state::pc9821_vram256_r)
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{
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if(m_ex_video_ff[ANALOG_256_MODE])
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return m_vram256[offset];
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return m_pc9801rs_grcg_r(offset & 0x7fff,0);
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}
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WRITE8_MEMBER(pc9801_state::pc9821_vram256_w)
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{
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if(m_ex_video_ff[ANALOG_256_MODE])
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{
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m_vram256[offset] = data;
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return;
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}
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m_pc9801rs_grcg_w(offset & 0x7fff,0,data);
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}
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/* Note: not hooking this up causes "MEMORY ERROR" at POST */
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READ8_MEMBER(pc9801_state::pc9821_ideram_r) { return m_ide_ram[offset]; }
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WRITE8_MEMBER(pc9801_state::pc9821_ideram_w) { m_ide_ram[offset] = data; }
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@ -2195,11 +2209,13 @@ READ8_MEMBER(pc9801_state::pc9821_memory_r)
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// else if(offset >= 0x00080000 && offset <= 0x0009ffff) { return pc9821_winram_r(space,offset & 0x1ffff); }
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else if(offset >= 0x000a0000 && offset <= 0x000a3fff) { return pc9801_tvram_r(space,offset-0xa0000); }
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else if(offset >= 0x000a4000 && offset <= 0x000a4fff) { return pc9801rs_knjram_r(space,offset & 0xfff); }
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else if(offset >= 0x000a8000 && offset <= 0x000bffff) { return pc9801_gvram_r(space,offset-0xa8000); }
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else if(offset >= 0x000a8000 && offset <= 0x000affff) { return m_pc9801rs_grcg_r(offset & 0x7fff,1); }
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else if(offset >= 0x000b0000 && offset <= 0x000b7fff) { return m_pc9801rs_grcg_r(offset & 0x7fff,2); }
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else if(offset >= 0x000b8000 && offset <= 0x000bffff) { return m_pc9801rs_grcg_r(offset & 0x7fff,3); }
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else if(offset >= 0x000cc000 && offset <= 0x000cffff) { return pc9821_unkrom_r(space,offset & 0x3fff); }
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else if(offset >= 0x000d8000 && offset <= 0x000d9fff) { return pc9821_ide_r(space,offset & 0x1fff); }
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else if(offset >= 0x000da000 && offset <= 0x000dbfff) { return pc9821_ideram_r(space,offset & 0x1fff); }
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else if(offset >= 0x000e0000 && offset <= 0x000e7fff) { return pc9821_vram256_r(space,offset & 0x1ffff); }
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else if(offset >= 0x000e0000 && offset <= 0x000e7fff) { return m_pc9801rs_grcg_r(offset & 0x7fff,0); }
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else if(offset >= 0x000e0000 && offset <= 0x000fffff) { return pc9801rs_ipl_r(space,offset & 0x1ffff); }
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else if(offset >= 0x00100000 && offset <= 0x00100000+m_ram_size-1) { return pc9801rs_ex_wram_r(space,offset-0x00100000); }
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else if(offset >= 0x00f00000 && offset <= 0x00f9ffff) { return pc9821_ext_gvram_r(space,offset-0x00f00000); }
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@ -2224,11 +2240,13 @@ WRITE8_MEMBER(pc9801_state::pc9821_memory_w)
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// else if(offset >= 0x00080000 && offset <= 0x0009ffff) { pc9821_winram_w(space,offset & 0x1ffff,data); }
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else if(offset >= 0x000a0000 && offset <= 0x000a3fff) { pc9801_tvram_w(space,offset-0xa0000,data); }
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else if(offset >= 0x000a4000 && offset <= 0x000a4fff) { pc9801rs_knjram_w(space,offset & 0xfff,data); }
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else if(offset >= 0x000a8000 && offset <= 0x000bffff) { pc9801_gvram_w(space,offset-0xa8000,data); }
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else if(offset >= 0x000a8000 && offset <= 0x000affff) { m_pc9801rs_grcg_w(offset & 0x7fff,1,data); }
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else if(offset >= 0x000b0000 && offset <= 0x000b7fff) { m_pc9801rs_grcg_w(offset & 0x7fff,2,data); }
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else if(offset >= 0x000b8000 && offset <= 0x000bffff) { m_pc9801rs_grcg_w(offset & 0x7fff,3,data); }
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else if(offset >= 0x000cc000 && offset <= 0x000cffff) { /* TODO: shadow ROM */ }
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else if(offset >= 0x000d8000 && offset <= 0x000d9fff) { /* TODO: shadow ROM */ }
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else if(offset >= 0x000da000 && offset <= 0x000dbfff) { pc9821_ideram_w(space,offset & 0x1fff,data); }
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else if(offset >= 0x000e0000 && offset <= 0x000e7fff) { pc9821_vram256_w(space,offset & 0x1ffff,data); }
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else if(offset >= 0x000e0000 && offset <= 0x000e7fff) { m_pc9801rs_grcg_w(offset & 0x7fff,0,data); }
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else if(offset >= 0x000e8000 && offset <= 0x000fffff) { /* TODO: shadow ROM */ }
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else if(offset >= 0x00100000 && offset <= 0x00100000+m_ram_size-1) { pc9801rs_ex_wram_w(space,offset-0x00100000,data); }
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else if(offset >= 0x00f00000 && offset <= 0x00f9ffff) { pc9821_ext_gvram_w(space,offset-0x00f00000,data); }
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@ -2302,39 +2320,6 @@ WRITE8_MEMBER(pc9801_state::pc9821_a0_w)
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pc9801rs_a0_w(space,offset,data);
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}
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READ8_MEMBER(pc9801_state::pc9821_pit_r)
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{
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if((offset & 1) == 0)
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{
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printf("Read to undefined port [%04x]\n",offset+0x3fd8);
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return 0xff;
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}
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else // odd
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{
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if(offset & 0x08)
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printf("Read to undefined port [%02x]\n",offset+0x3fd8);
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else
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return pit8253_r(machine().device("pit8253"), space, (offset & 6) >> 1);
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}
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return 0xff;
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}
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WRITE8_MEMBER(pc9801_state::pc9821_pit_w)
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{
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if((offset & 1) == 0)
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{
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printf("Write to undefined port [%04x] <- %02x\n",offset+0x3fd8,data);
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}
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else // odd
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{
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if(offset < 0x08)
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pit8253_w(machine().device("pit8253"), space, (offset & 6) >> 1, data);
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else
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printf("Write to undefined port [%04x] <- %02x\n",offset+0x3fd8,data);
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}
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}
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READ8_MEMBER(pc9801_state::ide_status_r)
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{
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return 0x50; // status
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@ -2492,7 +2477,7 @@ static ADDRESS_MAP_START( pc9821_io, AS_IO, 32, pc9801_state )
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// AM_RANGE(0x0c2d, 0x0c2d) cs4231 PCM board hi byte control
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// AM_RANGE(0x0cc0, 0x0cc7) SCSI interface / <undefined>
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// AM_RANGE(0x0cfc, 0x0cff) PCI bus
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AM_RANGE(0x3fd8, 0x3fdf) AM_READWRITE8(pc9821_pit_r, pc9821_pit_w, 0xffffffff) // <undefined> / pit mirror ports
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AM_RANGE(0x3fd8, 0x3fdf) AM_READWRITE8(pc9801rs_pit_mirror_r, pc9801rs_pit_mirror_w, 0xffffffff) // <undefined> / pit mirror ports
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AM_RANGE(0x7fd8, 0x7fdf) AM_READWRITE8(pc9801_mouse_r, pc9801_mouse_w, 0xffffffff) // <undefined> / mouse ppi8255 ports
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AM_RANGE(0x841c, 0x841f) AM_READWRITE8(sdip_0_r,sdip_0_w,0xffffffff)
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AM_RANGE(0x851c, 0x851f) AM_READWRITE8(sdip_1_r,sdip_1_w,0xffffffff)
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@ -3477,14 +3462,12 @@ MACHINE_START_MEMBER(pc9801_state,pc9821)
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MACHINE_START_CALL_MEMBER(pc9801rs);
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m_ide_ram = auto_alloc_array(machine(), UINT8, 0x2000);
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m_vram256 = auto_alloc_array(machine(), UINT8, 0x8000);
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m_ext_gvram = auto_alloc_array(machine(), UINT8, 0xa0000);
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m_ide_rom = memregion("ide")->base();
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m_unk_rom = memregion("unkrom")->base();
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state_save_register_global_pointer(machine(), m_sdip, 24);
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state_save_register_global_pointer(machine(), m_ide_ram, 0x2000);
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state_save_register_global_pointer(machine(), m_vram256, 0x8000);
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state_save_register_global_pointer(machine(), m_ext_gvram, 0xa0000);
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}
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