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mc68hc11: fixed the I/O system by changing the has_io flag with a has_extended_io flag (switch between 0x40 and 0x100 I/O registers), the latter is used by the Taito JC HC11 CPU only at the current time.

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This commit is contained in:
Angelo Salese 2009-06-26 19:46:06 +00:00
parent 77330f38ee
commit 0b0d5876cb
4 changed files with 26 additions and 10 deletions
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29
src/emu/cpu/mc68hc11/mc68hc11.c
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@ -67,7 +67,7 @@ struct _hc11_state
int ram_position; int ram_position;
int reg_position; int reg_position;
UINT8 *internal_ram; UINT8 *internal_ram;
int has_io; // I/O enable flag int has_extended_io; // extended I/O enable flag
int internal_ram_size; int internal_ram_size;
UINT8 wait_state,stop_state; UINT8 wait_state,stop_state;
}; };
@ -98,8 +98,16 @@ static UINT8 hc11_regs_r(hc11_state *cpustate, UINT32 address)
return 0; return 0;
case 0x02: /* PIOC */ case 0x02: /* PIOC */
return 0; return 0;
case 0x03: /* PORTC */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTC);
case 0x04: /* PORTB */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTB);
case 0x08: /* PORTD */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTD);
case 0x09: /* DDRD */ case 0x09: /* DDRD */
return 0; return 0;
case 0x0a: /* PORTE */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTE);
case 0x28: /* SPCR1 */ case 0x28: /* SPCR1 */
return 0; return 0;
case 0x30: /* ADCTL */ case 0x30: /* ADCTL */
@ -194,12 +202,21 @@ static void hc11_regs_w(hc11_state *cpustate, UINT32 address, UINT8 value)
case 0x01: /* DDRA */ case 0x01: /* DDRA */
//mame_printf_debug("HC11: ddra = %02X\n", value); //mame_printf_debug("HC11: ddra = %02X\n", value);
return; return;
case 0x03: /* PORTC */
memory_write_byte(cpustate->io, MC68HC11_IO_PORTC, value);
return;
case 0x04: /* PORTC */
memory_write_byte(cpustate->io, MC68HC11_IO_PORTB, value);
return;
case 0x08: /* PORTD */ case 0x08: /* PORTD */
memory_write_byte(cpustate->io, MC68HC11_IO_PORTD, value); memory_write_byte(cpustate->io, MC68HC11_IO_PORTD, value); //mask & 0x3f?
return; return;
case 0x09: /* DDRD */ case 0x09: /* DDRD */
//mame_printf_debug("HC11: ddrd = %02X\n", value); //mame_printf_debug("HC11: ddrd = %02X\n", value);
return; return;
case 0x0a: /* PORTE */
memory_write_byte(cpustate->io, MC68HC11_IO_PORTE, value);
return;
case 0x22: /* TMSK1 */ case 0x22: /* TMSK1 */
return; return;
case 0x24: /* TMSK2 */ case 0x24: /* TMSK2 */
@ -288,7 +305,7 @@ INLINE UINT16 FETCH16(hc11_state *cpustate)
INLINE UINT8 READ8(hc11_state *cpustate, UINT32 address) INLINE UINT8 READ8(hc11_state *cpustate, UINT32 address)
{ {
if(address >= cpustate->reg_position && address < cpustate->reg_position+0x100 && cpustate->has_io) if(address >= cpustate->reg_position && address < cpustate->reg_position+(cpustate->has_extended_io ? 0x100 : 0x40))
{ {
return hc11_regs_r(cpustate, address); return hc11_regs_r(cpustate, address);
} }
@ -301,7 +318,7 @@ INLINE UINT8 READ8(hc11_state *cpustate, UINT32 address)
INLINE void WRITE8(hc11_state *cpustate, UINT32 address, UINT8 value) INLINE void WRITE8(hc11_state *cpustate, UINT32 address, UINT8 value)
{ {
if(address >= cpustate->reg_position && address < cpustate->reg_position+0x100 && cpustate->has_io) if(address >= cpustate->reg_position && address < cpustate->reg_position+(cpustate->has_extended_io ? 0x100 : 0x40))
{ {
hc11_regs_w(cpustate, address, value); hc11_regs_w(cpustate, address, value);
return; return;
@ -371,13 +388,13 @@ static CPU_INIT( hc11 )
if(conf) if(conf)
{ {
cpustate->has_io = conf->has_io; cpustate->has_extended_io = conf->has_extended_io;
cpustate->internal_ram_size = conf->internal_ram_size; cpustate->internal_ram_size = conf->internal_ram_size;
} }
else else
{ {
/* defaults it to the HC11M0 version for now (I might strip this down on a later date) */ /* defaults it to the HC11M0 version for now (I might strip this down on a later date) */
cpustate->has_io = 1; cpustate->has_extended_io = 1;
cpustate->internal_ram_size = 1280; cpustate->internal_ram_size = 1280;
} }

2
src/emu/cpu/mc68hc11/mc68hc11.h
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@ -35,7 +35,7 @@ CPU_GET_INFO( mc68hc11 );
typedef struct _hc11_config hc11_config; typedef struct _hc11_config hc11_config;
struct _hc11_config struct _hc11_config
{ {
int has_io; // I/O enable flag int has_extended_io; // I/O enable flag
int internal_ram_size; int internal_ram_size;
}; };

3
src/mame/drivers/hitpoker.c
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@ -447,10 +447,9 @@ static const ay8910_interface ay8910_config =
DEVCB_NULL DEVCB_NULL
}; };
/* For whatever reason the MCU capabilities are disabled, might be a version without it or the engineers programmed the MCU to not have it. */
static const hc11_config hitpoker_config = static const hc11_config hitpoker_config =
{ {
1, //has internal I/O 0, //has extended internal I/O
0x100 //internal RAM size 0x100 //internal RAM size
}; };

2
src/mame/drivers/taitojc.c
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@ -1295,7 +1295,7 @@ static INTERRUPT_GEN( taitojc_int6 )
static const hc11_config taitojc_config = static const hc11_config taitojc_config =
{ {
1, //has internal I/O 1, //has extended I/O
1280 //internal RAM size 1280 //internal RAM size
}; };