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https://github.com/holub/mame
synced 2025-06-07 13:23:50 +03:00
-dpb7000: Fixed disk loading of brushes. Fixed stepped brush accesses via BIXOS and BIYOS. [Lord Nightmare, Happy, Ryan Holtz]
This commit is contained in:
parent
8971f091b7
commit
0b625de8c1
@ -45,7 +45,7 @@
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#define LOG_ALL (LOG_UNKNOWN | LOG_CSR | LOG_CTRLBUS | LOG_SYS_CTRL | LOG_FDC_CTRL | LOG_FDC_PORT | LOG_FDC_CMD | LOG_FDC_MECH | LOG_BRUSH_ADDR | \
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#define LOG_ALL (LOG_UNKNOWN | LOG_CSR | LOG_CTRLBUS | LOG_SYS_CTRL | LOG_FDC_CTRL | LOG_FDC_PORT | LOG_FDC_CMD | LOG_FDC_MECH | LOG_BRUSH_ADDR | \
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LOG_STORE_ADDR | LOG_COMBINER | LOG_SIZE_CARD | LOG_FILTER_CARD)
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LOG_STORE_ADDR | LOG_COMBINER | LOG_SIZE_CARD | LOG_FILTER_CARD)
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#define VERBOSE (LOG_ALL &~ LOG_FDC_CTRL)
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#define VERBOSE (0)//(LOG_ALL &~ LOG_FDC_CTRL)
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#include "logmacro.h"
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#include "logmacro.h"
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class dpb7000_state : public driver_device
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class dpb7000_state : public driver_device
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@ -1162,24 +1162,39 @@ void dpb7000_state::handle_command(uint16_t data)
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{
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{
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if (!BIT(data, 5 + i) && m_cxpos[i] < 800 && m_cypos[i] < 768)
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if (!BIT(data, 5 + i) && m_cxpos[i] < 800 && m_cypos[i] < 768)
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{
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{
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uint16_t bxlen = (((m_bxlen << 3) | (m_bixos & 7)) >> (m_bif & 3)) & 0xfff;
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uint16_t bxlen = m_bxlen;//(((m_bxlen << 3) | (m_bixos & 7)) >> (m_bif & 3)) & 0xfff;
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uint16_t bylen = (((m_bylen << 3) | (m_biyos & 7)) >> ((m_bif >> 2) & 3)) & 0xfff;
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uint16_t bylen = m_bylen;//(((m_bylen << 3) | (m_biyos & 7)) >> ((m_bif >> 2) & 3)) & 0xfff;
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for (uint16_t y = m_cypos[i], by = bylen; by != 0x1000 && y < 768; by++, y++)
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for (uint16_t y = m_cypos[i], bly = bylen; bly != 0x1000 && y < 768; bly++, y++)
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{
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{
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uint8_t *lum = &m_framestore_lum[i][y * 800];
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uint8_t *lum = &m_framestore_lum[i][y * 800];
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uint8_t *chr = &m_framestore_chr[i][y * 800];
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uint8_t *chr = &m_framestore_chr[i][y * 800];
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for (uint16_t x = m_cxpos[i], bx = bxlen; bx != 0x1000 && x < 800; bx++, x++)
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for (uint16_t x = m_cxpos[i], blx = bxlen; blx != 0x1000 && x < 800; blx++, x++)
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{
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{
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if (BIT(data, 13)) // Fixed Colour Select
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if (BIT(data, 13)) // Fixed Colour Select
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{
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{
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uint8_t y = 0x00;
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uint8_t y = m_bs_y_latch;
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uint8_t u = 0x80;
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uint8_t u = m_bs_u_latch;
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uint8_t v = 0x80;
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uint8_t v = m_bs_v_latch;
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if (!BIT(data, 12)) // Brush Zero
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if (!BIT(data, 12)) // Brush Zero
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{
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{
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y = m_bs_y_latch;
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y = 0x00;
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u = m_bs_u_latch;
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u = 0x80;
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v = m_bs_v_latch;
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v = 0x80;
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}
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else if (!BIT(data, 9))
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{
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uint16_t bx = ((((blx - bxlen) << 3) | (m_bixos & 7)) >> (3 - (m_bif & 3))) & 0xfff;
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uint16_t by = ((((bly - bylen) << 3) | (m_biyos & 7)) >> ((3 - (m_bif >> 2)) & 3)) & 0xfff;
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// TODO: Actual Brush Processor functionality
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uint16_t lum_sum = lum[x] + m_brushstore_lum[by * 256 + bx];
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uint16_t chr_sum = chr[x] + m_brushstore_chr[by * 256 + bx];
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y = lum_sum > 0xff ? 0xff : (uint16_t)lum_sum;
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uint8_t chr_clamped = chr_sum > 0xff ? 0xff : (uint16_t)chr_sum;
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if (m_cxpos[i] & 1)
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v = chr_clamped;
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else
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u = chr_clamped;
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}
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}
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lum[x] = y;
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lum[x] = y;
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chr[x] = (m_cxpos[i] & 1) ? v : u;
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chr[x] = (m_cxpos[i] & 1) ? v : u;
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@ -1316,6 +1331,7 @@ void dpb7000_state::cpu_ctrlbus_w(uint16_t data)
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LOGMASKED(LOG_CTRLBUS, "%s: Disk Sequencer Card Command: Read Track\n", machine().describe_context());
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LOGMASKED(LOG_CTRLBUS, "%s: Disk Sequencer Card Command: Read Track\n", machine().describe_context());
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if (!BIT(m_diskseq_status_out, 3))
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if (!BIT(m_diskseq_status_out, 3))
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{
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{
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m_diskbuf_data_count = 0x2700;
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m_line_count = 0;
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m_line_count = 0;
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m_line_clock = 0;
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m_line_clock = 0;
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m_diskseq_cyl_read_pending = true;
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m_diskseq_cyl_read_pending = true;
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@ -1326,6 +1342,7 @@ void dpb7000_state::cpu_ctrlbus_w(uint16_t data)
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LOGMASKED(LOG_CTRLBUS, "%s: Disk Sequencer Card Command: Disc Clear, Read Track\n", machine().describe_context());
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LOGMASKED(LOG_CTRLBUS, "%s: Disk Sequencer Card Command: Disc Clear, Read Track\n", machine().describe_context());
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if (!BIT(m_diskseq_status_out, 3))
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if (!BIT(m_diskseq_status_out, 3))
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{
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{
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m_diskbuf_data_count = 0x2700;
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m_diskseq_cyl_read_pending = true;
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m_diskseq_cyl_read_pending = true;
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m_fdd_side = 0;
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m_fdd_side = 0;
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}
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}
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@ -1517,7 +1534,7 @@ uint16_t dpb7000_state::cpu_sysctrl_r()
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const uint16_t ctrl = m_sys_ctrl &~ SYSCTRL_AUTO_START;
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const uint16_t ctrl = m_sys_ctrl &~ SYSCTRL_AUTO_START;
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const uint16_t auto_start = m_auto_start->read() ? SYSCTRL_AUTO_START : 0;
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const uint16_t auto_start = m_auto_start->read() ? SYSCTRL_AUTO_START : 0;
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const uint16_t ret = ctrl | auto_start;
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const uint16_t ret = ctrl | auto_start;
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LOGMASKED(LOG_SYS_CTRL, "%s: CPU read from System Control: %04x\n", machine().describe_context(), ret);
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//LOGMASKED(LOG_SYS_CTRL, "%s: CPU read from System Control: %04x\n", machine().describe_context(), ret);
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return ret;
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return ret;
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}
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}
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@ -1551,16 +1568,8 @@ uint8_t dpb7000_state::fdd_ctrl_r()
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void dpb7000_state::advance_line_count()
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void dpb7000_state::advance_line_count()
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{
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{
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m_bxlen_counter = m_bxlen;
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m_bylen_counter++;
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if (m_bylen_counter == 0x1000)
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{
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m_diskseq_cyl_read_pending = false;
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}
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m_line_length = 0;
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m_line_length = 0;
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m_line_count++;
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m_line_count++;
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toggle_line_clock();
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toggle_line_clock();
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}
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}
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@ -1571,8 +1580,8 @@ void dpb7000_state::toggle_line_clock()
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void dpb7000_state::process_sample()
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void dpb7000_state::process_sample()
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{
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{
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const uint16_t x = (m_bxlen_counter - m_bxlen) ^ 7;
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const uint16_t x = (m_bxlen_counter - m_bxlen);
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const uint16_t y = (m_bylen_counter - m_bylen) ^ 7;
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const uint16_t y = (m_bylen_counter - m_bylen);
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//printf("Processing sample %d,%d (%04x:%04x, %04x:%04x) LC:%d\n", x, y, m_bxlen_counter, m_bxlen, m_bylen_counter, m_bylen, m_line_count);
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//printf("Processing sample %d,%d (%04x:%04x, %04x:%04x) LC:%d\n", x, y, m_bxlen_counter, m_bxlen, m_bylen_counter, m_bylen, m_line_count);
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if (BIT(m_brush_addr_func, 7))
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if (BIT(m_brush_addr_func, 7))
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m_brushstore_lum[y * 256 + x] = m_incoming_lum;
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m_brushstore_lum[y * 256 + x] = m_incoming_lum;
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@ -1582,7 +1591,12 @@ void dpb7000_state::process_sample()
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m_bxlen_counter++;
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m_bxlen_counter++;
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if (m_bxlen_counter == 0x1000)
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if (m_bxlen_counter == 0x1000)
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{
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{
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advance_line_count();
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m_bxlen_counter = m_bxlen;
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m_bylen_counter++;
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if (m_bylen_counter == 0x1000)
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{
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m_diskseq_cyl_read_pending = false;
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}
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}
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}
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}
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}
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@ -1662,6 +1676,7 @@ void dpb7000_state::fdd_index_callback(floppy_image_device *floppy, int state)
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{
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{
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case 4: // Read Track
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case 4: // Read Track
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case 6: // Disc Clear, Read Track
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case 6: // Disc Clear, Read Track
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m_diskbuf_data_count--;
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process_byte_from_disc(data_byte);
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process_byte_from_disc(data_byte);
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if (!m_diskseq_cyl_read_pending)
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if (!m_diskseq_cyl_read_pending)
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{
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{
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@ -1669,14 +1684,15 @@ void dpb7000_state::fdd_index_callback(floppy_image_device *floppy, int state)
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m_fdd_side = 2;
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m_fdd_side = 2;
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//printf("\nThe whole world has betrayed me!\n");
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//printf("\nThe whole world has betrayed me!\n");
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}
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}
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else if (m_fdd_side == 0 && m_line_count == 13)
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else if (m_fdd_side == 0 && m_diskbuf_data_count == 0)
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{
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{
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curr_bit = -1;
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curr_bit = -1;
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m_floppy->ss_w(1);
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m_floppy->ss_w(1);
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m_fdd_side++;
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m_fdd_side++;
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m_diskbuf_data_count = 0x2400;
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//printf("\nCatch you on the flip side!\n");
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//printf("\nCatch you on the flip side!\n");
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}
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}
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else if (m_fdd_side == 1 && m_line_count == 25)
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else if (m_fdd_side == 1 && m_diskbuf_data_count == 0)
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{
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{
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curr_bit = -1;
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curr_bit = -1;
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m_fdd_side++;
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m_fdd_side++;
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@ -1707,7 +1723,7 @@ void dpb7000_state::fdd_index_callback(floppy_image_device *floppy, int state)
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m_fdd_side++;
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m_fdd_side++;
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//printf("\nCatch you on the flip side!\n");
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//printf("\nCatch you on the flip side!\n");
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}
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}
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else if(m_diskbuf_ram_addr >= 0x4800 && m_fdd_side == 1)
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else if(m_diskbuf_ram_addr >= 0x4B00 && m_fdd_side == 1)
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{
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{
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// If we've read the side 1 portion of the cylinder, yield out, we're done
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// If we've read the side 1 portion of the cylinder, yield out, we're done
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curr_bit = -1;
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curr_bit = -1;
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