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misc cleanup (nw)

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This commit is contained in:
Vas Crabb 2019-10-06 04:55:09 +11:00
parent 2ea3b4d7b9
commit 0b72efe507
5 changed files with 475 additions and 529 deletions
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836
src/devices/bus/isa/aga.cpp
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File diff suppressed because it is too large Load Diff

42
src/devices/bus/isa/aga.h
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@ -27,27 +27,30 @@
#include "video/mc6845.h"
#include "emupal.h"
enum AGA_MODE { AGA_OFF, AGA_COLOR, AGA_MONO };
// ======================> isa8_aga_device
class isa8_aga_device :
public device_t,
public device_isa8_card_interface
{
public:
enum mode_t { AGA_OFF, AGA_COLOR, AGA_MONO };
// construction/destruction
isa8_aga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
isa8_aga_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER( pc_aga_mda_r );
DECLARE_WRITE8_MEMBER( pc_aga_mda_w );
DECLARE_READ8_MEMBER( pc_aga_cga_r );
DECLARE_WRITE8_MEMBER( pc_aga_cga_w );
void set_palette_luts(void);
void pc_aga_set_mode(AGA_MODE mode);
void set_palette_luts();
void pc_aga_set_mode(mode_t mode);
DECLARE_WRITE8_MEMBER( pc_aga_videoram_w );
DECLARE_READ8_MEMBER( pc_aga_videoram_r );
MC6845_UPDATE_ROW( aga_update_row );
MC6845_UPDATE_ROW( mda_text_inten_update_row );
MC6845_UPDATE_ROW( mda_text_blink_update_row );
MC6845_UPDATE_ROW( cga_text_inten_update_row );
@ -59,12 +62,12 @@ public:
MC6845_UPDATE_ROW( cga_gfx_2bpp_update_row );
MC6845_UPDATE_ROW( cga_gfx_1bpp_update_row );
DECLARE_WRITE_LINE_MEMBER( hsync_changed );
DECLARE_WRITE_LINE_MEMBER( vsync_changed );
required_device<palette_device> m_palette;
required_device<mc6845_device> m_mc6845;
protected:
isa8_aga_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
virtual void device_start() override;
@ -75,8 +78,8 @@ protected:
required_ioport m_cga_config;
int m_update_row_type;
AGA_MODE m_mode;
int m_update_row_type;
mode_t m_mode;
uint8_t m_mda_mode_control;
uint8_t m_mda_status;
uint8_t *m_mda_chr_gen;
@ -86,7 +89,7 @@ protected:
uint8_t m_cga_status;
uint8_t *m_cga_chr_gen;
int m_framecnt;
int m_framecnt;
uint8_t m_vsync;
uint8_t m_hsync;
@ -94,17 +97,8 @@ protected:
uint8_t m_cga_palette_lut_2bpp[4];
std::unique_ptr<uint8_t[]> m_videoram;
private:
MC6845_UPDATE_ROW( aga_update_row );
DECLARE_WRITE_LINE_MEMBER( hsync_changed );
DECLARE_WRITE_LINE_MEMBER( vsync_changed );
};
// device type definition
DECLARE_DEVICE_TYPE(ISA8_AGA, isa8_aga_device)
// ======================> isa8_aga_pc200_device
class isa8_aga_pc200_device :
public isa8_aga_device
@ -112,16 +106,15 @@ class isa8_aga_pc200_device :
public:
// construction/destruction
isa8_aga_pc200_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// optional information overrides
virtual const tiny_rom_entry *device_rom_region() const override;
protected:
DECLARE_READ8_MEMBER( pc200_videoram_r );
DECLARE_WRITE8_MEMBER( pc200_videoram_w );
DECLARE_WRITE8_MEMBER( pc200_cga_w );
DECLARE_READ8_MEMBER( pc200_cga_r );
protected:
// device-level overrides
virtual const tiny_rom_entry *device_rom_region() const override;
virtual void device_start() override;
uint8_t m_port8;
@ -129,7 +122,8 @@ protected:
uint8_t m_porte;
};
// device type definition
DECLARE_DEVICE_TYPE(ISA8_AGA, isa8_aga_device)
DECLARE_DEVICE_TYPE(ISA8_AGA_PC200, isa8_aga_pc200_device)
#endif // MAME_BUS_ISA_AGA_H

18
src/mame/drivers/europc.cpp
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@ -80,7 +80,7 @@ private:
uint8_t m_jim_data[16];
uint8_t m_jim_state;
AGA_MODE m_jim_mode;
isa8_aga_device::mode_t m_jim_mode;
int m_port61; // bit 0,1 must be 0 for startup; reset?
uint8_t m_rtc_data[0x10];
int m_rtc_reg;
@ -187,16 +187,16 @@ WRITE8_MEMBER( europc_pc_state::europc_jim_w )
switch (data)
{
case 0x1f:
case 0x0b: m_jim_mode = AGA_MONO; break;
case 0x0b: m_jim_mode = isa8_aga_device::AGA_MONO; break;
case 0xe: //80 columns?
case 0xd: //40 columns?
case 0x18:
case 0x1a: m_jim_mode = AGA_COLOR; break;
default: m_jim_mode = AGA_OFF; break;
case 0x1a: m_jim_mode = isa8_aga_device::AGA_COLOR; break;
default: m_jim_mode = isa8_aga_device::AGA_OFF; break;
}
}
// mode= data&0x10?AGA_COLOR:AGA_MONO;
// mode= data&0x10?AGA_COLOR:AGA_OFF;
// mode = (data & 0x10) ? isa8_aga_device::AGA_COLOR : isa8_aga_device::AGA_MONO;
// mode = (data & 0x10) ? isa8_aga_device::AGA_COLOR : isa8_aga_device::AGA_OFF;
if (data & 0x80) m_jim_state = 0;
break;
case 4:
@ -237,9 +237,9 @@ READ8_MEMBER( europc_pc_state::europc_jim2_r )
m_jim_state = 0;
switch (m_jim_mode)
{
case AGA_COLOR: return 0x87; // for color;
case AGA_MONO: return 0x90; //for mono
case AGA_OFF: return 0x80; // for vram
case isa8_aga_device::AGA_COLOR: return 0x87; // for color;
case isa8_aga_device::AGA_MONO: return 0x90; //for mono
case isa8_aga_device::AGA_OFF: return 0x80; // for vram
// return 0x97; //for error
}
}

70
src/mame/drivers/h01x.cpp
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@ -376,13 +376,13 @@ INPUT_PORTS_END
void h01x_state::machine_start()
{
m_cassette_data_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(h01x_state::cassette_data_callback),this));
m_cassette_data_timer->adjust( attotime::zero, 0, attotime::from_hz(11025) );
m_cassette_data_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(h01x_state::cassette_data_callback), this));
m_cassette_data_timer->adjust(attotime::zero, 0, attotime::from_hz(11025));
}
void h01x_state::machine_reset()
{
m_bank = 0x00;
m_bank = 0x00;
m_rom_ptr = m_rom->base();
m_hzrom_ptr = m_hzrom->base();
@ -421,10 +421,10 @@ WRITE8_MEMBER( h01x_state::port_64_w )
WRITE8_MEMBER( h01x_state::port_70_w )
{
m_bank = data&0xC0;
m_bank = data & 0xc0;
// bit5, speaker
m_speaker->level_w(BIT(data,5));
m_speaker->level_w(BIT(data, 5));
// bit4, cassette
m_cassette->output(BIT(data, 4) ? 1.0 : -1.0);
@ -436,7 +436,7 @@ READ8_MEMBER( h01x_state::port_50_r )
// bit 7, cassette input
//return (m_cassette->input() > 0.04) ? 0x7f : 0xff;
return (m_cassette_data ? 0xff : 0x7f);
return m_cassette_data ? 0xff : 0x7f;
}
@ -464,63 +464,61 @@ WRITE8_MEMBER(h01x_state::mem_4000_w)
// 0x8000 --- 0xBFFF
READ8_MEMBER(h01x_state::mem_8000_r)
{
u8 result = 0xff;
switch(m_bank) {
case 0xC0:
return m_hzrom_ptr[offset];
case 0x40:
if((offset&0xf000) == 0x3000) {
//for(int i=0; i<11; i++) {
for(int i=0; i<11; i++) {
if(!BIT(offset, i))
result &= m_io_keyboard[i]->read();
}
switch (m_bank) {
case 0xc0:
return m_hzrom_ptr[offset];
case 0x40:
if ((offset & 0xf000) == 0x3000) {
u8 result = 0xff;
for (int i = 0; i < 11; i++) {
if (!BIT(offset, i))
result &= m_io_keyboard[i]->read();
}
return result;
case 0x00:
return m_ram_ptr[offset + 0x4000];
default:
} else {
return 0xff;
}
case 0x00:
return m_ram_ptr[offset + 0x4000];
default:
return 0xff;
}
}
WRITE8_MEMBER(h01x_state::mem_8000_w)
{
if(m_bank == 0x00)
m_ram_ptr[offset+0x4000] = data;
if (m_bank == 0x00)
m_ram_ptr[offset + 0x4000] = data;
}
// 0xC000 --- 0xFFFF
READ8_MEMBER(h01x_state::mem_c000_r)
{
if(m_bank == 0xC0) {
if (m_bank == 0xc0)
return m_hzrom_ptr[offset + 0x4000];
} else {
if(m_bank == 0x40)
return m_vram_ptr[offset];
else
return 0xff;
}
else if (m_bank == 0x40)
return m_vram_ptr[offset];
else
return 0xff;
}
WRITE8_MEMBER(h01x_state::mem_c000_w)
{
if(m_bank == 0x40)
m_vram_ptr[offset] = (data&0x0f)|0xf0;
if (m_bank == 0x40)
m_vram_ptr[offset] = (data & 0x0f) | 0xf0;
}
TIMER_CALLBACK_MEMBER(h01x_state::cassette_data_callback)
{
/* This does all baud rates. 250 baud (trs80), and 500 baud (all others) set bit 7 of "cassette_data".
1500 baud (trs80m3, trs80m4) is interrupt-driven and uses bit 0 of "cassette_data" */
/* This does all baud rates. 250 baud (trs80), and 500 baud (all others) set bit 7 of "cassette_data".
1500 baud (trs80m3, trs80m4) is interrupt-driven and uses bit 0 of "cassette_data" */
double new_val = (m_cassette->input());
double new_val = m_cassette->input();
/* Check for HI-LO transition */
if ( m_old_cassette_val > -0.2 && new_val < -0.2 )
if (m_old_cassette_val > -0.2 && new_val < -0.2)
m_cassette_data = true;
m_old_cassette_val = new_val;

38
src/mame/drivers/igs017.cpp
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@ -98,7 +98,7 @@ public:
void data_w(u8 data);
u8 data_r();
void set_m3_bits(int m3, u8 b0, u8 b1, u8 b2, u8 b3);
template <unsigned N> void set_m3_bits(u8 b0, u8 b1, u8 b2, u8 b3);
void set_mf_bits(u8 b0, u8 b1, u8 b2, u8 b3);
void set_val_xor(u16 val_xor);
@ -123,12 +123,12 @@ private:
u16 m_val_xor;
};
void igs_bitswap_device::set_m3_bits(int m3, u8 b0, u8 b1, u8 b2, u8 b3)
template <unsigned N> void igs_bitswap_device::set_m3_bits(u8 b0, u8 b1, u8 b2, u8 b3)
{
m_m3_bits[m3][0] = b0;
m_m3_bits[m3][1] = b1;
m_m3_bits[m3][2] = b2;
m_m3_bits[m3][3] = b3;
m_m3_bits[N][0] = b0;
m_m3_bits[N][1] = b1;
m_m3_bits[N][2] = b2;
m_m3_bits[N][3] = b3;
#if 0
printf("igs_bitswap: INIT m3_bits[%x] =", m3);
@ -3518,10 +3518,10 @@ void igs017_state::iqblocka(machine_config &config)
m_igs_bitswap->out_pa_callback().set(FUNC(igs017_state::iqblocka_keyin_w));
m_igs_bitswap->set_val_xor(0x15d6);
m_igs_bitswap->set_mf_bits(3, 5, 9, 11);
m_igs_bitswap->set_m3_bits(0, ~5, 8, ~10, ~15);
m_igs_bitswap->set_m3_bits(1, 3, ~8, ~12, ~15);
m_igs_bitswap->set_m3_bits(2, 2, ~6, ~11, ~15);
m_igs_bitswap->set_m3_bits(3, 0, ~1, ~3, ~15);
m_igs_bitswap->set_m3_bits<0>(~5, 8, ~10, ~15);
m_igs_bitswap->set_m3_bits<1>( 3, ~8, ~12, ~15);
m_igs_bitswap->set_m3_bits<2>( 2, ~6, ~11, ~15);
m_igs_bitswap->set_m3_bits<3>( 0, ~1, ~3, ~15);
IGS_INCDEC(config, m_igs_incdec, 0);
@ -3547,6 +3547,7 @@ void igs017_state::iqblocka(machine_config &config)
void igs017_state::iqblockf(machine_config &config)
{
iqblocka(config);
// tweaked protection bitswap
m_igs_bitswap->out_pb_callback().set(FUNC(igs017_state::iqblockf_keyout_w));
m_igs_bitswap->set_mf_bits(0, 5, 9, 13);
@ -3555,12 +3556,13 @@ void igs017_state::iqblockf(machine_config &config)
void igs017_state::genius6(machine_config &config)
{
iqblockf(config);
// tweaked protection bitswap
m_igs_bitswap->set_mf_bits(2, 7, 9, 13);
m_igs_bitswap->set_m3_bits(0, ~5, 6, ~7, ~15);
m_igs_bitswap->set_m3_bits(1, 1, ~6, ~9, ~15);
m_igs_bitswap->set_m3_bits(2, 4, ~8, ~12, ~15);
m_igs_bitswap->set_m3_bits(3, 3, ~5, ~6, ~15);
m_igs_bitswap->set_m3_bits<0>(~5, 6, ~7, ~15);
m_igs_bitswap->set_m3_bits<1>( 1, ~6, ~9, ~15);
m_igs_bitswap->set_m3_bits<2>( 4, ~8, ~12, ~15);
m_igs_bitswap->set_m3_bits<3>( 3, ~5, ~6, ~15);
}
void igs017_state::starzan(machine_config &config)
@ -3689,10 +3691,10 @@ void igs017_state::lhzb2a(machine_config &config)
IGS_BITSWAP(config, m_igs_bitswap, 0);
m_igs_bitswap->set_val_xor(0x289a);
m_igs_bitswap->set_mf_bits(4, 7, 10, 13);
m_igs_bitswap->set_m3_bits(0, ~3, 8, ~12, ~15);
m_igs_bitswap->set_m3_bits(1, ~3, ~6, ~9, ~15);
m_igs_bitswap->set_m3_bits(2, ~3, 4, ~5, ~15);
m_igs_bitswap->set_m3_bits(3, ~9, ~11, 12, ~15);
m_igs_bitswap->set_m3_bits<0>(~3, 8, ~12, ~15);
m_igs_bitswap->set_m3_bits<1>(~3, ~6, ~9, ~15);
m_igs_bitswap->set_m3_bits<2>(~3, 4, ~5, ~15);
m_igs_bitswap->set_m3_bits<3>(~9, ~11, 12, ~15);
IGS_INCDEC(config, m_igs_incdec, 0);