mirror of
https://github.com/holub/mame
synced 2025-07-02 08:39:21 +03:00
misc cleanup (nw)
This commit is contained in:
parent
2ea3b4d7b9
commit
0b72efe507
@ -9,6 +9,9 @@
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#include "aga.h"
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#include "aga.h"
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#include "video/cgapal.h"
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#include "video/cgapal.h"
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//#define VERBOSE 1
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#include "logmacro.h"
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#define CGA_HCLK (XTAL(14'318'181)/8)
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#define CGA_HCLK (XTAL(14'318'181)/8)
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#define CGA_LCLK (XTAL(14'318'181)/16)
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#define CGA_LCLK (XTAL(14'318'181)/16)
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@ -51,7 +54,9 @@ INPUT_PORTS_END
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#define CGA_MONITOR (m_cga_config->read()&0x1C)
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#define CGA_MONITOR (m_cga_config->read()&0x1C)
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#define CGA_MONITOR_COMPOSITE 0x08 /* Colour composite */
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#define CGA_MONITOR_COMPOSITE 0x08 /* Colour composite */
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DEFINE_DEVICE_TYPE(ISA8_AGA, isa8_aga_device, "aga", "AGA")
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DEFINE_DEVICE_TYPE(ISA8_AGA, isa8_aga_device, "isa_aga", "AGA")
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DEFINE_DEVICE_TYPE(ISA8_AGA_PC200, isa8_aga_pc200_device, "isa_aga_pc200", "AGA PC200")
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//-------------------------------------------------
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//-------------------------------------------------
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// isa8_aga_device - constructor
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// isa8_aga_device - constructor
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@ -89,7 +94,7 @@ isa8_aga_device::isa8_aga_device(const machine_config &mconfig, device_type type
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void isa8_aga_device::device_start()
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void isa8_aga_device::device_start()
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{
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{
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if (m_palette != nullptr && !m_palette->started())
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if (m_palette && !m_palette->started())
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throw device_missing_dependencies();
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throw device_missing_dependencies();
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m_mode = AGA_COLOR;
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m_mode = AGA_COLOR;
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@ -103,20 +108,13 @@ void isa8_aga_device::device_start()
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m_isa->install_device(0x3d0, 0x3df, read8_delegate(FUNC(isa8_aga_device::pc_aga_cga_r), this), write8_delegate(FUNC(isa8_aga_device::pc_aga_cga_w), this));
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m_isa->install_device(0x3d0, 0x3df, read8_delegate(FUNC(isa8_aga_device::pc_aga_cga_r), this), write8_delegate(FUNC(isa8_aga_device::pc_aga_cga_w), this));
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/* Initialise the cga palette */
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/* Initialise the cga palette */
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int i;
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for ( i = 0; i < CGA_PALETTE_SETS * 16; i++ )
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for (int i = 0; i < CGA_PALETTE_SETS * 16; i++)
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{
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m_palette->set_pen_color(i, cga_palette[i][0], cga_palette[i][1], cga_palette[i][2]);
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m_palette->set_pen_color(i, cga_palette[i][0], cga_palette[i][1], cga_palette[i][2]);
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}
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i = 0x8000;
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for (int i = 0x8000, r = 0; r < 32; r++) {
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for ( int r = 0; r < 32; r++ )
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for (int g = 0; g < 32; g++) {
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{
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for (int b = 0; b < 32; b++) {
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for ( int g = 0; g < 32; g++ )
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{
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for ( int b = 0; b < 32; b++ )
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{
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m_palette->set_pen_color(i, r << 3, g << 3, b << 3);
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m_palette->set_pen_color(i, r << 3, g << 3, b << 3);
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i++;
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i++;
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}
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}
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@ -125,7 +123,7 @@ void isa8_aga_device::device_start()
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uint8_t *gfx = &memregion("gfx1")->base()[0x8000];
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uint8_t *gfx = &memregion("gfx1")->base()[0x8000];
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/* just a plain bit pattern for graphics data generation */
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/* just a plain bit pattern for graphics data generation */
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for (i = 0; i < 256; i++)
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for (int i = 0; i < 256; i++)
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gfx[i] = i;
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gfx[i] = i;
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}
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}
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@ -146,8 +144,6 @@ ioport_constructor isa8_aga_device::device_input_ports() const
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DEFINE_DEVICE_TYPE(ISA8_AGA_PC200, isa8_aga_pc200_device, "aga_pc200", "AGA PC200")
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//-------------------------------------------------
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//-------------------------------------------------
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// isa8_aga_pc200_device - constructor
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// isa8_aga_pc200_device - constructor
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//-------------------------------------------------
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//-------------------------------------------------
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@ -176,7 +172,7 @@ const tiny_rom_entry *isa8_aga_pc200_device::device_rom_region() const
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void isa8_aga_pc200_device::device_start()
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void isa8_aga_pc200_device::device_start()
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{
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{
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if (m_palette != nullptr && !m_palette->started())
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if (m_palette && !m_palette->started())
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throw device_missing_dependencies();
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throw device_missing_dependencies();
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m_mode = AGA_COLOR;
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m_mode = AGA_COLOR;
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@ -186,24 +182,17 @@ void isa8_aga_pc200_device::device_start()
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set_isa_device();
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set_isa_device();
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m_isa->install_memory(0xb0000, 0xbffff, read8_delegate(FUNC(isa8_aga_pc200_device::pc200_videoram_r),this), write8_delegate(FUNC(isa8_aga_pc200_device::pc200_videoram_w),this));
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m_isa->install_memory(0xb0000, 0xbffff, read8_delegate(FUNC(isa8_aga_pc200_device::pc200_videoram_r),this), write8_delegate(FUNC(isa8_aga_pc200_device::pc200_videoram_w),this));
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m_isa->install_device(0x3b0, 0x3bf, read8_delegate( FUNC(isa8_aga_device::pc_aga_mda_r), this ), write8_delegate( FUNC(isa8_aga_device::pc_aga_mda_w), this ) );
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m_isa->install_device(0x3b0, 0x3bf, read8_delegate(FUNC(isa8_aga_pc200_device::pc_aga_mda_r), this), write8_delegate(FUNC(isa8_aga_pc200_device::pc_aga_mda_w), this));
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m_isa->install_device(0x3d0, 0x3df, read8_delegate(FUNC(isa8_aga_pc200_device::pc200_cga_r), this), write8_delegate(FUNC(isa8_aga_pc200_device::pc200_cga_w), this));
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m_isa->install_device(0x3d0, 0x3df, read8_delegate(FUNC(isa8_aga_pc200_device::pc200_cga_r), this), write8_delegate(FUNC(isa8_aga_pc200_device::pc200_cga_w), this));
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/* Initialise the cga palette */
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/* Initialise the cga palette */
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int i;
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for ( i = 0; i < CGA_PALETTE_SETS * 16; i++ )
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for (int i = 0; i < CGA_PALETTE_SETS * 16; i++)
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{
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m_palette->set_pen_color(i, cga_palette[i][0], cga_palette[i][1], cga_palette[i][2]);
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m_palette->set_pen_color(i, cga_palette[i][0], cga_palette[i][1], cga_palette[i][2]);
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}
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i = 0x8000;
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for (int i = 0x8000, r = 0; r < 32; r++) {
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for ( int r = 0; r < 32; r++ )
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for (int g = 0; g < 32; g++) {
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{
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for (int b = 0; b < 32; b++) {
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for ( int g = 0; g < 32; g++ )
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{
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for ( int b = 0; b < 32; b++ )
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{
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m_palette->set_pen_color(i, r << 3, g << 3, b << 3);
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m_palette->set_pen_color(i, r << 3, g << 3, b << 3);
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i++;
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i++;
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}
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}
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@ -212,7 +201,7 @@ void isa8_aga_pc200_device::device_start()
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uint8_t *gfx = &memregion("gfx1")->base()[0x8000];
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uint8_t *gfx = &memregion("gfx1")->base()[0x8000];
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/* just a plain bit pattern for graphics data generation */
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/* just a plain bit pattern for graphics data generation */
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for (i = 0; i < 256; i++)
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for (int i = 0; i < 256; i++)
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gfx[i] = i;
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gfx[i] = i;
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}
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}
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@ -226,10 +215,8 @@ WRITE_LINE_MEMBER( isa8_aga_device::vsync_changed )
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{
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{
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m_vsync = state ? 8 : 0;
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m_vsync = state ? 8 : 0;
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if (state)
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if (state)
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{
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m_framecnt++;
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m_framecnt++;
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}
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}
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}
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MC6845_UPDATE_ROW( isa8_aga_device::aga_update_row )
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MC6845_UPDATE_ROW( isa8_aga_device::aga_update_row )
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@ -237,8 +224,7 @@ MC6845_UPDATE_ROW( isa8_aga_device::aga_update_row )
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if (m_update_row_type == -1)
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if (m_update_row_type == -1)
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return;
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return;
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switch (m_update_row_type)
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switch (m_update_row_type) {
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{
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case MDA_TEXT_INTEN:
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case MDA_TEXT_INTEN:
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mda_text_inten_update_row(bitmap, cliprect, ma, ra, y, x_count, cursor_x, de, hbp, vbp);
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mda_text_inten_update_row(bitmap, cliprect, ma, ra, y, x_count, cursor_x, de, hbp, vbp);
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break;
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break;
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@ -300,24 +286,22 @@ void isa8_aga_device::device_add_mconfig(machine_config &config)
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/* colors need fixing in the mda_text_* functions ! */
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/* colors need fixing in the mda_text_* functions ! */
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MC6845_UPDATE_ROW( isa8_aga_device::mda_text_inten_update_row )
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MC6845_UPDATE_ROW( isa8_aga_device::mda_text_inten_update_row )
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{
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{
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const rgb_t *palette = m_palette->palette()->entry_list_raw();
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rgb_t const *const palette = m_palette->palette()->entry_list_raw();
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uint8_t *videoram = m_videoram.get();
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uint8_t const *const videoram = m_videoram.get();
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uint32_t *p = &bitmap.pix32(y);
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uint32_t *p = &bitmap.pix32(y);
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uint16_t chr_base = ( ra & 0x08 ) ? 0x800 | ( ra & 0x07 ) : ra;
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uint16_t const chr_base = (ra & 0x08) ? 0x800 | (ra & 0x07) : ra;
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int i;
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if (y == 0) logerror("mda_text_inten_update_row\n");
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if (y == 0) logerror("mda_text_inten_update_row\n");
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for ( i = 0; i < x_count; i++ ) {
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for (int i = 0; i < x_count; i++) {
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uint16_t offset = ( ( ma + i ) << 1 ) & 0x0FFF;
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uint16_t const offset = ((ma + i) << 1) & 0x0fff;
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uint8_t chr = videoram[ offset ];
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uint8_t const chr = videoram[offset];
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uint8_t attr = videoram[ offset + 1 ];
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uint8_t const attr = videoram[offset + 1];
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uint8_t data = m_mda_chr_gen[chr_base + chr * 8];
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uint8_t data = m_mda_chr_gen[chr_base + chr * 8];
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uint8_t fg = (attr & 0x08) ? 3 : 2;
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uint8_t fg = (attr & 0x08) ? 3 : 2;
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uint8_t bg = 0;
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uint8_t bg = 0;
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if ( ( attr & ~0x88 ) == 0 ) {
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if (!(attr & ~0x88))
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data = 0x00;
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data = 0x00;
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}
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switch (attr) {
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switch (attr) {
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case 0x70:
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case 0x70:
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@ -328,206 +312,192 @@ MC6845_UPDATE_ROW( isa8_aga_device::mda_text_inten_update_row )
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bg = 2;
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bg = 2;
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fg = 1;
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fg = 1;
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break;
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break;
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case 0xF0:
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case 0xf0:
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bg = 3;
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bg = 3;
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fg = 0;
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fg = 0;
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break;
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break;
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case 0xF8:
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case 0xf8:
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bg = 3;
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bg = 3;
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fg = 1;
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fg = 1;
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break;
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break;
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}
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}
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if ( i == cursor_x || ( attr & 0x07 ) == 0x01 ) {
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if (i == cursor_x || (attr & 0x07) == 0x01)
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data = 0xFF;
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data = 0xff;
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}
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*p = palette[( data & 0x80 ) ? fg : bg]; p++;
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*p++ = palette[BIT(data, 7) ? fg : bg];
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*p = palette[( data & 0x40 ) ? fg : bg]; p++;
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*p++ = palette[BIT(data, 6) ? fg : bg];
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*p = palette[( data & 0x20 ) ? fg : bg]; p++;
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*p++ = palette[BIT(data, 5) ? fg : bg];
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*p = palette[( data & 0x10 ) ? fg : bg]; p++;
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*p++ = palette[BIT(data, 4) ? fg : bg];
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*p = palette[( data & 0x08 ) ? fg : bg]; p++;
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*p++ = palette[BIT(data, 3) ? fg : bg];
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*p = palette[( data & 0x04 ) ? fg : bg]; p++;
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*p++ = palette[BIT(data, 2) ? fg : bg];
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*p = palette[( data & 0x02 ) ? fg : bg]; p++;
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*p++ = palette[BIT(data, 1) ? fg : bg];
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*p = palette[( data & 0x01 ) ? fg : bg]; p++;
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*p++ = palette[BIT(data, 0) ? fg : bg];
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if ( ( chr & 0xE0 ) == 0xC0 ) {
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if ((chr & 0xe0) == 0xc0)
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*p = palette[( data & 0x01 ) ? fg : bg]; p++;
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*p++ = palette[BIT(data, 0) ? fg : bg];
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} else {
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else
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*p = palette[bg]; p++;
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*p++ = palette[bg];
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}
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}
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}
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}
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}
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MC6845_UPDATE_ROW( isa8_aga_device::mda_text_blink_update_row )
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MC6845_UPDATE_ROW( isa8_aga_device::mda_text_blink_update_row )
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{
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{
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uint8_t *videoram = m_videoram.get();
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uint8_t const *const videoram = m_videoram.get();
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const rgb_t *palette = m_palette->palette()->entry_list_raw();
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rgb_t const *const palette = m_palette->palette()->entry_list_raw();
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uint32_t *p = &bitmap.pix32(y);
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uint32_t *p = &bitmap.pix32(y);
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uint16_t chr_base = ( ra & 0x08 ) ? 0x800 | ( ra & 0x07 ) : ra;
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uint16_t const chr_base = (ra & 0x08) ? 0x800 | (ra & 0x07) : ra;
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int i;
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if (y == 0) logerror("mda_text_blink_update_row\n");
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if (y == 0) logerror("mda_text_blink_update_row\n");
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for ( i = 0; i < x_count; i++ ) {
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for (int i = 0; i < x_count; i++) {
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uint16_t offset = ( ( ma + i ) << 1 ) & 0x0FFF;
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uint16_t const offset = ((ma + i) << 1) & 0x0fff;
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uint8_t chr = videoram[ offset ];
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uint8_t const chr = videoram[offset];
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uint8_t attr = videoram[ offset + 1 ];
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uint8_t const attr = videoram[offset + 1];
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uint8_t data = m_mda_chr_gen[chr_base + chr * 8];
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uint8_t data = m_mda_chr_gen[chr_base + chr * 8];
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uint8_t fg = (attr & 0x08) ? 3 : 2;
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uint8_t fg = (attr & 0x08) ? 3 : 2;
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uint8_t bg = 0;
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uint8_t bg = 0;
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if ( ( attr & ~0x88 ) == 0 ) {
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if (!(attr & ~0x88))
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data = 0x00;
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data = 0x00;
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}
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switch (attr) {
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switch (attr) {
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case 0x70:
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case 0x70:
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case 0xF0:
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case 0xf0:
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bg = 2;
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bg = 2;
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fg = 0;
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fg = 0;
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break;
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break;
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case 0x78:
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case 0x78:
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case 0xF8:
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case 0xf8:
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bg = 2;
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bg = 2;
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fg = 1;
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fg = 1;
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break;
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break;
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}
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}
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if (i == cursor_x) {
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if (i == cursor_x) {
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data = 0xFF;
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data = 0xff;
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} else {
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} else {
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if ( ( attr & 0x07 ) == 0x01 ) {
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if ((attr & 0x07) == 0x01)
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data = 0xFF;
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data = 0xff;
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}
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if ((attr & 0x80) && (m_framecnt & 0x40))
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if ( ( attr & 0x80 ) && ( m_framecnt & 0x40 ) ) {
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data = 0x00;
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data = 0x00;
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}
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}
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}
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*p = palette[( data & 0x80 ) ? fg : bg]; p++;
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*p++ = palette[BIT(data, 7) ? fg : bg];
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*p = palette[( data & 0x40 ) ? fg : bg]; p++;
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*p++ = palette[BIT(data, 6) ? fg : bg];
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*p = palette[( data & 0x20 ) ? fg : bg]; p++;
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*p++ = palette[BIT(data, 5) ? fg : bg];
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*p = palette[( data & 0x10 ) ? fg : bg]; p++;
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*p++ = palette[BIT(data, 4) ? fg : bg];
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*p = palette[( data & 0x08 ) ? fg : bg]; p++;
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*p++ = palette[BIT(data, 3) ? fg : bg];
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*p = palette[( data & 0x04 ) ? fg : bg]; p++;
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*p++ = palette[BIT(data, 2) ? fg : bg];
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*p = palette[( data & 0x02 ) ? fg : bg]; p++;
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*p++ = palette[BIT(data, 1) ? fg : bg];
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*p = palette[( data & 0x01 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 0) ? fg : bg];
|
||||||
if ( ( chr & 0xE0 ) == 0xC0 ) {
|
if ((chr & 0xe0) == 0xc0)
|
||||||
*p = palette[( data & 0x01 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 0) ? fg : bg];
|
||||||
} else {
|
else
|
||||||
*p = palette[bg]; p++;
|
*p++ = palette[bg];
|
||||||
}
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
MC6845_UPDATE_ROW( isa8_aga_device::cga_text_inten_update_row )
|
MC6845_UPDATE_ROW( isa8_aga_device::cga_text_inten_update_row )
|
||||||
{
|
{
|
||||||
uint8_t *videoram = m_videoram.get();
|
uint8_t const *const videoram = m_videoram.get();
|
||||||
const rgb_t *palette = m_palette->palette()->entry_list_raw();
|
rgb_t const *const palette = m_palette->palette()->entry_list_raw();
|
||||||
uint32_t *p = &bitmap.pix32(y);
|
uint32_t *p = &bitmap.pix32(y);
|
||||||
int i;
|
|
||||||
|
|
||||||
if (y == 0) logerror("cga_text_inten_update_row\n");
|
if (y == 0) logerror("cga_text_inten_update_row\n");
|
||||||
for ( i = 0; i < x_count; i++ ) {
|
for (int i = 0; i < x_count; i++) {
|
||||||
uint16_t offset = ( ( ma + i ) << 1 ) & 0x3fff;
|
uint16_t const offset = ((ma + i) << 1 ) & 0x3fff;
|
||||||
uint8_t chr = videoram[ offset ];
|
uint8_t const chr = videoram[offset];
|
||||||
uint8_t attr = videoram[ offset +1 ];
|
uint8_t const attr = videoram[offset + 1];
|
||||||
uint8_t data = m_cga_chr_gen[chr * 16 + ra];
|
uint8_t data = m_cga_chr_gen[chr * 16 + ra];
|
||||||
uint16_t fg = attr & 0x0F;
|
uint16_t fg = attr & 0x0f;
|
||||||
uint16_t bg = (attr >> 4) & 0x07;
|
uint16_t bg = (attr >> 4) & 0x07;
|
||||||
|
|
||||||
if ( i == cursor_x ) {
|
if (i == cursor_x)
|
||||||
data = 0xFF;
|
data = 0xff;
|
||||||
}
|
|
||||||
|
|
||||||
*p = palette[( data & 0x80 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 7) ? fg : bg];
|
||||||
*p = palette[( data & 0x40 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 6) ? fg : bg];
|
||||||
*p = palette[( data & 0x20 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 5) ? fg : bg];
|
||||||
*p = palette[( data & 0x10 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 4) ? fg : bg];
|
||||||
*p = palette[( data & 0x08 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 3) ? fg : bg];
|
||||||
*p = palette[( data & 0x04 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 2) ? fg : bg];
|
||||||
*p = palette[( data & 0x02 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 1) ? fg : bg];
|
||||||
*p = palette[( data & 0x01 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 0) ? fg : bg];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
MC6845_UPDATE_ROW( isa8_aga_device::cga_text_inten_alt_update_row )
|
MC6845_UPDATE_ROW( isa8_aga_device::cga_text_inten_alt_update_row )
|
||||||
{
|
{
|
||||||
const rgb_t *palette = m_palette->palette()->entry_list_raw();
|
rgb_t const *const palette = m_palette->palette()->entry_list_raw();
|
||||||
uint8_t *videoram = m_videoram.get();
|
uint8_t const *const videoram = m_videoram.get();
|
||||||
uint32_t *p = &bitmap.pix32(y);
|
uint32_t *p = &bitmap.pix32(y);
|
||||||
int i;
|
|
||||||
|
|
||||||
if (y == 0) logerror("cga_text_inten_alt_update_row\n");
|
if (y == 0) logerror("cga_text_inten_alt_update_row\n");
|
||||||
for ( i = 0; i < x_count; i++ ) {
|
for (int i = 0; i < x_count; i++) {
|
||||||
uint16_t offset = ( ( ma + i ) << 1 ) & 0x3fff;
|
uint16_t const offset = ((ma + i) << 1) & 0x3fff;
|
||||||
uint8_t chr = videoram[ offset ];
|
uint8_t const chr = videoram[offset];
|
||||||
uint8_t attr = videoram[ offset +1 ];
|
uint8_t const attr = videoram[offset + 1];
|
||||||
uint8_t data = m_cga_chr_gen[chr * 16 + ra];
|
uint8_t data = m_cga_chr_gen[chr * 16 + ra];
|
||||||
uint16_t fg = attr & 0x0F;
|
uint16_t fg = attr & 0x0f;
|
||||||
|
|
||||||
if ( i == cursor_x ) {
|
if (i == cursor_x)
|
||||||
data = 0xFF;
|
data = 0xff;
|
||||||
}
|
|
||||||
|
|
||||||
*p = palette[( data & 0x80 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 7) ? fg : 0];
|
||||||
*p = palette[( data & 0x40 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 6) ? fg : 0];
|
||||||
*p = palette[( data & 0x20 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 5) ? fg : 0];
|
||||||
*p = palette[( data & 0x10 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 4) ? fg : 0];
|
||||||
*p = palette[( data & 0x08 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 3) ? fg : 0];
|
||||||
*p = palette[( data & 0x04 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 2) ? fg : 0];
|
||||||
*p = palette[( data & 0x02 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 1) ? fg : 0];
|
||||||
*p = palette[( data & 0x01 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 0) ? fg : 0];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
MC6845_UPDATE_ROW( isa8_aga_device::cga_text_blink_update_row )
|
MC6845_UPDATE_ROW( isa8_aga_device::cga_text_blink_update_row )
|
||||||
{
|
{
|
||||||
const rgb_t *palette = m_palette->palette()->entry_list_raw();
|
rgb_t const *const palette = m_palette->palette()->entry_list_raw();
|
||||||
uint8_t *videoram = m_videoram.get();
|
uint8_t const *const videoram = m_videoram.get();
|
||||||
uint32_t *p = &bitmap.pix32(y);
|
uint32_t *p = &bitmap.pix32(y);
|
||||||
int i;
|
|
||||||
|
|
||||||
for ( i = 0; i < x_count; i++ ) {
|
for (int i = 0; i < x_count; i++) {
|
||||||
uint16_t offset = ( ( ma + i ) << 1 ) & 0x3fff;
|
uint16_t const offset = ((ma + i) << 1) & 0x3fff;
|
||||||
uint8_t chr = videoram[ offset ];
|
uint8_t const chr = videoram[offset];
|
||||||
uint8_t attr = videoram[ offset +1 ];
|
uint8_t const attr = videoram[offset + 1];
|
||||||
uint8_t data = m_cga_chr_gen[chr * 16 + ra];
|
uint8_t data = m_cga_chr_gen[chr * 16 + ra];
|
||||||
uint16_t fg = attr & 0x0F;
|
uint16_t fg = attr & 0x0f;
|
||||||
uint16_t bg = (attr >> 4) & 0x07;
|
uint16_t bg = (attr >> 4) & 0x07;
|
||||||
|
|
||||||
if (i == cursor_x) {
|
if (i == cursor_x) {
|
||||||
data = 0xFF;
|
data = 0xff;
|
||||||
} else {
|
} else {
|
||||||
if ( ( attr & 0x80 ) && ( m_framecnt & 0x10 ) ) {
|
if ((attr & 0x80) && (m_framecnt & 0x10))
|
||||||
data = 0x00;
|
data = 0x00;
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
*p = palette[( data & 0x80 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 7) ? fg : bg];
|
||||||
*p = palette[( data & 0x40 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 6) ? fg : bg];
|
||||||
*p = palette[( data & 0x20 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 5) ? fg : bg];
|
||||||
*p = palette[( data & 0x10 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 4) ? fg : bg];
|
||||||
*p = palette[( data & 0x08 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 3) ? fg : bg];
|
||||||
*p = palette[( data & 0x04 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 2) ? fg : bg];
|
||||||
*p = palette[( data & 0x02 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 1) ? fg : bg];
|
||||||
*p = palette[( data & 0x01 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 0) ? fg : bg];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
MC6845_UPDATE_ROW( isa8_aga_device::cga_text_blink_alt_update_row )
|
MC6845_UPDATE_ROW( isa8_aga_device::cga_text_blink_alt_update_row )
|
||||||
{
|
{
|
||||||
const rgb_t *palette = m_palette->palette()->entry_list_raw();
|
rgb_t const *const palette = m_palette->palette()->entry_list_raw();
|
||||||
uint8_t *videoram = m_videoram.get();
|
uint8_t const *const videoram = m_videoram.get();
|
||||||
uint32_t *p = &bitmap.pix32(y);
|
uint32_t *p = &bitmap.pix32(y);
|
||||||
int i;
|
|
||||||
|
|
||||||
if (y == 0) logerror("cga_text_blink_alt_update_row\n");
|
if (y == 0) logerror("cga_text_blink_alt_update_row\n");
|
||||||
for ( i = 0; i < x_count; i++ ) {
|
for (int i = 0; i < x_count; i++) {
|
||||||
uint16_t offset = ( ( ma + i ) << 1 ) & 0x3fff;
|
uint16_t const offset = ((ma + i) << 1) & 0x3fff;
|
||||||
uint8_t chr = videoram[ offset ];
|
uint8_t const chr = videoram[offset];
|
||||||
uint8_t attr = videoram[ offset +1 ];
|
uint8_t const attr = videoram[offset + 1];
|
||||||
uint8_t data = m_cga_chr_gen[chr * 16 + ra];
|
uint8_t data = m_cga_chr_gen[chr * 16 + ra];
|
||||||
uint16_t fg = attr & 0x07;
|
uint16_t fg = attr & 0x07;
|
||||||
uint16_t bg = 0;
|
uint16_t bg = 0;
|
||||||
@ -541,135 +511,131 @@ MC6845_UPDATE_ROW( isa8_aga_device::cga_text_blink_alt_update_row )
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
*p = palette[( data & 0x80 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 7) ? fg : bg];
|
||||||
*p = palette[( data & 0x40 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 6) ? fg : bg];
|
||||||
*p = palette[( data & 0x20 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 5) ? fg : bg];
|
||||||
*p = palette[( data & 0x10 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 4) ? fg : bg];
|
||||||
*p = palette[( data & 0x08 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 3) ? fg : bg];
|
||||||
*p = palette[( data & 0x04 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 2) ? fg : bg];
|
||||||
*p = palette[( data & 0x02 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 1) ? fg : bg];
|
||||||
*p = palette[( data & 0x01 ) ? fg : bg]; p++;
|
*p++ = palette[BIT(data, 0) ? fg : bg];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
MC6845_UPDATE_ROW( isa8_aga_device::cga_gfx_4bppl_update_row )
|
MC6845_UPDATE_ROW( isa8_aga_device::cga_gfx_4bppl_update_row )
|
||||||
{
|
{
|
||||||
const rgb_t *palette = m_palette->palette()->entry_list_raw();
|
rgb_t const *const palette = m_palette->palette()->entry_list_raw();
|
||||||
uint8_t *videoram = m_videoram.get();
|
uint8_t const *const videoram = m_videoram.get();
|
||||||
uint32_t *p = &bitmap.pix32(y);
|
uint32_t *p = &bitmap.pix32(y);
|
||||||
int i;
|
|
||||||
|
|
||||||
if (y == 0) logerror("cga_gfx_4bppl_update_row\n");
|
if (y == 0) logerror("cga_gfx_4bppl_update_row\n");
|
||||||
for ( i = 0; i < x_count; i++ ) {
|
for (int i = 0; i < x_count; i++) {
|
||||||
uint16_t offset = ( ( ( ma + i ) << 1 ) & 0x1fff ) | ( ( y & 1 ) << 13 );
|
uint16_t const offset = (((ma + i) << 1) & 0x1fff) | ((y & 1) << 13);
|
||||||
uint8_t data = videoram[offset];
|
uint8_t data = videoram[offset];
|
||||||
|
|
||||||
*p = palette[data >> 4]; p++;
|
*p++ = palette[data >> 4];
|
||||||
*p = palette[data >> 4]; p++;
|
*p++ = palette[data >> 4];
|
||||||
*p = palette[data & 0x0F]; p++;
|
*p++ = palette[data & 0x0f];
|
||||||
*p = palette[data & 0x0F]; p++;
|
*p++ = palette[data & 0x0f];
|
||||||
|
|
||||||
data = videoram[offset + 1];
|
data = videoram[offset + 1];
|
||||||
|
|
||||||
*p = palette[data >> 4]; p++;
|
*p++ = palette[data >> 4];
|
||||||
*p = palette[data >> 4]; p++;
|
*p++ = palette[data >> 4];
|
||||||
*p = palette[data & 0x0F]; p++;
|
*p++ = palette[data & 0x0f];
|
||||||
*p = palette[data & 0x0F]; p++;
|
*p++ = palette[data & 0x0f];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
MC6845_UPDATE_ROW( isa8_aga_device::cga_gfx_4bpph_update_row )
|
MC6845_UPDATE_ROW( isa8_aga_device::cga_gfx_4bpph_update_row )
|
||||||
{
|
{
|
||||||
uint8_t *videoram = m_videoram.get();
|
uint8_t const *const videoram = m_videoram.get();
|
||||||
const rgb_t *palette = m_palette->palette()->entry_list_raw();
|
rgb_t const *const palette = m_palette->palette()->entry_list_raw();
|
||||||
uint32_t *p = &bitmap.pix32(y);
|
uint32_t *p = &bitmap.pix32(y);
|
||||||
int i;
|
|
||||||
|
|
||||||
if (y == 0) logerror("cga_gfx_4bpph_update_row\n");
|
if (y == 0) logerror("cga_gfx_4bpph_update_row\n");
|
||||||
for ( i = 0; i < x_count; i++ ) {
|
for (int i = 0; i < x_count; i++) {
|
||||||
uint16_t offset = ( ( ( ma + i ) << 1 ) & 0x1fff ) | ( ( y & 1 ) << 13 );
|
uint16_t const offset = (((ma + i) << 1) & 0x1fff) | ((y & 1) << 13);
|
||||||
uint8_t data = videoram[offset];
|
uint8_t data = videoram[offset];
|
||||||
|
|
||||||
*p = palette[data >> 4]; p++;
|
*p++ = palette[data >> 4];
|
||||||
*p = palette[data >> 4]; p++;
|
*p++ = palette[data >> 4];
|
||||||
*p = palette[data >> 4]; p++;
|
*p++ = palette[data >> 4];
|
||||||
*p = palette[data >> 4]; p++;
|
*p++ = palette[data >> 4];
|
||||||
*p = palette[data & 0x0F]; p++;
|
*p++ = palette[data & 0x0f];
|
||||||
*p = palette[data & 0x0F]; p++;
|
*p++ = palette[data & 0x0f];
|
||||||
*p = palette[data & 0x0F]; p++;
|
*p++ = palette[data & 0x0f];
|
||||||
*p = palette[data & 0x0F]; p++;
|
*p++ = palette[data & 0x0f];
|
||||||
|
|
||||||
data = videoram[offset + 1];
|
data = videoram[offset + 1];
|
||||||
|
|
||||||
*p = palette[data >> 4]; p++;
|
*p++ = palette[data >> 4];
|
||||||
*p = palette[data >> 4]; p++;
|
*p++ = palette[data >> 4];
|
||||||
*p = palette[data >> 4]; p++;
|
*p++ = palette[data >> 4];
|
||||||
*p = palette[data >> 4]; p++;
|
*p++ = palette[data >> 4];
|
||||||
*p = palette[data & 0x0F]; p++;
|
*p++ = palette[data & 0x0f];
|
||||||
*p = palette[data & 0x0F]; p++;
|
*p++ = palette[data & 0x0f];
|
||||||
*p = palette[data & 0x0F]; p++;
|
*p++ = palette[data & 0x0f];
|
||||||
*p = palette[data & 0x0F]; p++;
|
*p++ = palette[data & 0x0f];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
MC6845_UPDATE_ROW( isa8_aga_device::cga_gfx_2bpp_update_row )
|
MC6845_UPDATE_ROW( isa8_aga_device::cga_gfx_2bpp_update_row )
|
||||||
{
|
{
|
||||||
uint8_t *videoram = m_videoram.get();
|
uint8_t const *const videoram = m_videoram.get();
|
||||||
const rgb_t *palette = m_palette->palette()->entry_list_raw();
|
rgb_t const *const palette = m_palette->palette()->entry_list_raw();
|
||||||
uint32_t *p = &bitmap.pix32(y);
|
uint32_t *p = &bitmap.pix32(y);
|
||||||
int i;
|
|
||||||
|
|
||||||
//if (y == 0) logerror("cga_gfx_2bpp_update_row\n");
|
//if (y == 0) logerror("cga_gfx_2bpp_update_row\n");
|
||||||
for ( i = 0; i < x_count; i++ ) {
|
for (int i = 0; i < x_count; i++) {
|
||||||
uint16_t offset = ( ( ( ma + i ) << 1 ) & 0x1fff ) | ( ( y & 1 ) << 13 );
|
uint16_t const offset = (((ma + i) << 1) & 0x1fff) | ((y & 1) << 13);
|
||||||
uint8_t data = videoram[offset];
|
uint8_t data = videoram[offset];
|
||||||
|
|
||||||
*p = palette[m_cga_palette_lut_2bpp[ ( data >> 6 ) & 0x03 ]]; p++;
|
*p++ = palette[m_cga_palette_lut_2bpp[(data >> 6) & 0x03]];
|
||||||
*p = palette[m_cga_palette_lut_2bpp[ ( data >> 4 ) & 0x03 ]]; p++;
|
*p++ = palette[m_cga_palette_lut_2bpp[(data >> 4) & 0x03]];
|
||||||
*p = palette[m_cga_palette_lut_2bpp[ ( data >> 2 ) & 0x03 ]]; p++;
|
*p++ = palette[m_cga_palette_lut_2bpp[(data >> 2) & 0x03]];
|
||||||
*p = palette[m_cga_palette_lut_2bpp[ data & 0x03 ]]; p++;
|
*p++ = palette[m_cga_palette_lut_2bpp[(data >> 0) & 0x03]];
|
||||||
|
|
||||||
data = videoram[offset + 1];
|
data = videoram[offset + 1];
|
||||||
|
|
||||||
*p = palette[m_cga_palette_lut_2bpp[ ( data >> 6 ) & 0x03 ]]; p++;
|
*p++ = palette[m_cga_palette_lut_2bpp[(data >> 6) & 0x03]];
|
||||||
*p = palette[m_cga_palette_lut_2bpp[ ( data >> 4 ) & 0x03 ]]; p++;
|
*p++ = palette[m_cga_palette_lut_2bpp[(data >> 4) & 0x03]];
|
||||||
*p = palette[m_cga_palette_lut_2bpp[ ( data >> 2 ) & 0x03 ]]; p++;
|
*p++ = palette[m_cga_palette_lut_2bpp[(data >> 2) & 0x03]];
|
||||||
*p = palette[m_cga_palette_lut_2bpp[ data & 0x03 ]]; p++;
|
*p++ = palette[m_cga_palette_lut_2bpp[(data >> 0) & 0x03]];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
MC6845_UPDATE_ROW( isa8_aga_device::cga_gfx_1bpp_update_row )
|
MC6845_UPDATE_ROW( isa8_aga_device::cga_gfx_1bpp_update_row )
|
||||||
{
|
{
|
||||||
uint8_t *videoram = m_videoram.get();
|
uint8_t const *const videoram = m_videoram.get();
|
||||||
const rgb_t *palette = m_palette->palette()->entry_list_raw();
|
rgb_t const *const palette = m_palette->palette()->entry_list_raw();
|
||||||
uint32_t *p = &bitmap.pix32(y);
|
uint32_t *p = &bitmap.pix32(y);
|
||||||
uint8_t fg = m_cga_color_select & 0x0F;
|
uint8_t const fg = m_cga_color_select & 0x0f;
|
||||||
int i;
|
|
||||||
|
|
||||||
if (y == 0) logerror("cga_gfx_1bpp_update_row\n");
|
if (y == 0) logerror("cga_gfx_1bpp_update_row\n");
|
||||||
for ( i = 0; i < x_count; i++ ) {
|
for (int i = 0; i < x_count; i++) {
|
||||||
uint16_t offset = ( ( ( ma + i ) << 1 ) & 0x1fff ) | ( ( ra & 1 ) << 13 );
|
uint16_t const offset = (((ma + i) << 1) & 0x1fff) | ((ra & 1) << 13);
|
||||||
uint8_t data = videoram[offset];
|
uint8_t data = videoram[offset];
|
||||||
|
|
||||||
*p = palette[( data & 0x80 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 7) ? fg : 0];
|
||||||
*p = palette[( data & 0x40 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 6) ? fg : 0];
|
||||||
*p = palette[( data & 0x20 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 5) ? fg : 0];
|
||||||
*p = palette[( data & 0x10 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 4) ? fg : 0];
|
||||||
*p = palette[( data & 0x08 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 3) ? fg : 0];
|
||||||
*p = palette[( data & 0x04 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 2) ? fg : 0];
|
||||||
*p = palette[( data & 0x02 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 1) ? fg : 0];
|
||||||
*p = palette[( data & 0x01 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 0) ? fg : 0];
|
||||||
|
|
||||||
data = videoram[offset + 1];
|
data = videoram[offset + 1];
|
||||||
|
|
||||||
*p = palette[( data & 0x80 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 7) ? fg : 0];
|
||||||
*p = palette[( data & 0x40 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 6) ? fg : 0];
|
||||||
*p = palette[( data & 0x20 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 5) ? fg : 0];
|
||||||
*p = palette[( data & 0x10 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 4) ? fg : 0];
|
||||||
*p = palette[( data & 0x08 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 3) ? fg : 0];
|
||||||
*p = palette[( data & 0x04 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 2) ? fg : 0];
|
||||||
*p = palette[( data & 0x02 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 1) ? fg : 0];
|
||||||
*p = palette[( data & 0x01 ) ? fg : 0]; p++;
|
*p++ = palette[BIT(data, 0) ? fg : 0];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -681,11 +647,10 @@ MC6845_UPDATE_ROW( isa8_aga_device::cga_gfx_1bpp_update_row )
|
|||||||
|
|
||||||
READ8_MEMBER( isa8_aga_device::pc_aga_mda_r )
|
READ8_MEMBER( isa8_aga_device::pc_aga_mda_r )
|
||||||
{
|
{
|
||||||
uint8_t data = 0xFF;
|
uint8_t data = 0xff;
|
||||||
|
|
||||||
if (m_mode == AGA_MONO) {
|
if (m_mode == AGA_MONO) {
|
||||||
switch( offset )
|
switch (offset) {
|
||||||
{
|
|
||||||
case 0: case 2: case 4: case 6:
|
case 0: case 2: case 4: case 6:
|
||||||
/* return last written mc6845 address value here? */
|
/* return last written mc6845 address value here? */
|
||||||
break;
|
break;
|
||||||
@ -704,8 +669,7 @@ READ8_MEMBER ( isa8_aga_device::pc_aga_mda_r )
|
|||||||
WRITE8_MEMBER( isa8_aga_device::pc_aga_mda_w )
|
WRITE8_MEMBER( isa8_aga_device::pc_aga_mda_w )
|
||||||
{
|
{
|
||||||
if (m_mode == AGA_MONO) {
|
if (m_mode == AGA_MONO) {
|
||||||
switch( offset )
|
switch (offset) {
|
||||||
{
|
|
||||||
case 0: case 2: case 4: case 6:
|
case 0: case 2: case 4: case 6:
|
||||||
m_mc6845->address_w(data);
|
m_mc6845->address_w(data);
|
||||||
break;
|
break;
|
||||||
@ -715,8 +679,7 @@ WRITE8_MEMBER ( isa8_aga_device::pc_aga_mda_w )
|
|||||||
case 8:
|
case 8:
|
||||||
m_mda_mode_control = data;
|
m_mda_mode_control = data;
|
||||||
|
|
||||||
switch (m_mda_mode_control & 0x2a)
|
switch (m_mda_mode_control & 0x2a) {
|
||||||
{
|
|
||||||
case 0x08:
|
case 0x08:
|
||||||
m_update_row_type = MDA_TEXT_INTEN;
|
m_update_row_type = MDA_TEXT_INTEN;
|
||||||
break;
|
break;
|
||||||
@ -733,7 +696,7 @@ WRITE8_MEMBER ( isa8_aga_device::pc_aga_mda_w )
|
|||||||
|
|
||||||
READ8_MEMBER( isa8_aga_device::pc_aga_cga_r )
|
READ8_MEMBER( isa8_aga_device::pc_aga_cga_r )
|
||||||
{
|
{
|
||||||
uint8_t data = 0xFF;
|
uint8_t data = 0xff;
|
||||||
|
|
||||||
if (m_mode == AGA_COLOR) {
|
if (m_mode == AGA_COLOR) {
|
||||||
switch (offset) {
|
switch (offset) {
|
||||||
@ -751,39 +714,28 @@ READ8_MEMBER ( isa8_aga_device::pc_aga_cga_r )
|
|||||||
return data;
|
return data;
|
||||||
}
|
}
|
||||||
|
|
||||||
void isa8_aga_device::set_palette_luts(void)
|
void isa8_aga_device::set_palette_luts()
|
||||||
{
|
{
|
||||||
/* Setup 2bpp palette lookup table */
|
/* Setup 2bpp palette lookup table */
|
||||||
if (m_cga_mode_control & 0x10)
|
if (m_cga_mode_control & 0x10)
|
||||||
{
|
|
||||||
m_cga_palette_lut_2bpp[0] = 0;
|
m_cga_palette_lut_2bpp[0] = 0;
|
||||||
}
|
|
||||||
else
|
else
|
||||||
{
|
|
||||||
m_cga_palette_lut_2bpp[0] = m_cga_color_select & 0x0F;
|
m_cga_palette_lut_2bpp[0] = m_cga_color_select & 0x0F;
|
||||||
}
|
|
||||||
if ( m_cga_mode_control & 0x04 )
|
if (m_cga_mode_control & 0x04) {
|
||||||
{
|
|
||||||
m_cga_palette_lut_2bpp[1] = ((m_cga_color_select & 0x10) >> 1) | 3;
|
m_cga_palette_lut_2bpp[1] = ((m_cga_color_select & 0x10) >> 1) | 3;
|
||||||
m_cga_palette_lut_2bpp[2] = ((m_cga_color_select & 0x10) >> 1) | 4;
|
m_cga_palette_lut_2bpp[2] = ((m_cga_color_select & 0x10) >> 1) | 4;
|
||||||
m_cga_palette_lut_2bpp[3] = ((m_cga_color_select & 0x10) >> 1) | 7;
|
m_cga_palette_lut_2bpp[3] = ((m_cga_color_select & 0x10) >> 1) | 7;
|
||||||
}
|
} else if (m_cga_color_select & 0x20) {
|
||||||
else
|
|
||||||
{
|
|
||||||
if ( m_cga_color_select & 0x20 )
|
|
||||||
{
|
|
||||||
m_cga_palette_lut_2bpp[1] = ((m_cga_color_select & 0x10) >> 1) | 3;
|
m_cga_palette_lut_2bpp[1] = ((m_cga_color_select & 0x10) >> 1) | 3;
|
||||||
m_cga_palette_lut_2bpp[2] = ((m_cga_color_select & 0x10) >> 1) | 5;
|
m_cga_palette_lut_2bpp[2] = ((m_cga_color_select & 0x10) >> 1) | 5;
|
||||||
m_cga_palette_lut_2bpp[3] = ((m_cga_color_select & 0x10) >> 1) | 7;
|
m_cga_palette_lut_2bpp[3] = ((m_cga_color_select & 0x10) >> 1) | 7;
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
m_cga_palette_lut_2bpp[1] = ((m_cga_color_select & 0x10) >> 1) | 2;
|
m_cga_palette_lut_2bpp[1] = ((m_cga_color_select & 0x10) >> 1) | 2;
|
||||||
m_cga_palette_lut_2bpp[2] = ((m_cga_color_select & 0x10) >> 1) | 4;
|
m_cga_palette_lut_2bpp[2] = ((m_cga_color_select & 0x10) >> 1) | 4;
|
||||||
m_cga_palette_lut_2bpp[3] = ((m_cga_color_select & 0x10) >> 1) | 6;
|
m_cga_palette_lut_2bpp[3] = ((m_cga_color_select & 0x10) >> 1) | 6;
|
||||||
}
|
}
|
||||||
}
|
LOG("2bpp lut set to %d,%d,%d,%d\n", m_cga_palette_lut_2bpp[0], m_cga_palette_lut_2bpp[1], m_cga_palette_lut_2bpp[2], m_cga_palette_lut_2bpp[3]);
|
||||||
//logerror("2bpp lut set to %d,%d,%d,%d\n", cga.palette_lut_2bpp[0], cga.palette_lut_2bpp[1], cga.palette_lut_2bpp[2], cga.palette_lut_2bpp[3]);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -800,45 +752,43 @@ WRITE8_MEMBER (isa8_aga_device:: pc_aga_cga_w )
|
|||||||
case 8:
|
case 8:
|
||||||
m_cga_mode_control = data;
|
m_cga_mode_control = data;
|
||||||
|
|
||||||
//logerror("mode set to %02X\n", m_cga_mode_control & 0x3F );
|
LOG("mode set to %02X\n", m_cga_mode_control & 0x3f);
|
||||||
switch ( m_cga_mode_control & 0x3F ) {
|
switch (m_cga_mode_control & 0x3f) {
|
||||||
case 0x08: case 0x09: case 0x0C: case 0x0D:
|
case 0x08: case 0x09: case 0x0c: case 0x0d:
|
||||||
m_mc6845->set_hpixels_per_column(8);
|
m_mc6845->set_hpixels_per_column(8);
|
||||||
m_update_row_type = CGA_TEXT_INTEN;
|
m_update_row_type = CGA_TEXT_INTEN;
|
||||||
break;
|
break;
|
||||||
case 0x0A: case 0x0B: case 0x2A: case 0x2B:
|
case 0x0a: case 0x0b: case 0x2a: case 0x2b:
|
||||||
m_mc6845->set_hpixels_per_column(8);
|
m_mc6845->set_hpixels_per_column(8);
|
||||||
if ( CGA_MONITOR == CGA_MONITOR_COMPOSITE ) {
|
if (CGA_MONITOR == CGA_MONITOR_COMPOSITE)
|
||||||
m_update_row_type = CGA_GFX_4BPPL;
|
m_update_row_type = CGA_GFX_4BPPL;
|
||||||
} else {
|
else
|
||||||
m_update_row_type = CGA_GFX_2BPP;
|
m_update_row_type = CGA_GFX_2BPP;
|
||||||
}
|
|
||||||
break;
|
break;
|
||||||
case 0x0E: case 0x0F: case 0x2E: case 0x2F:
|
case 0x0e: case 0x0f: case 0x2e: case 0x2f:
|
||||||
m_mc6845->set_hpixels_per_column(8);
|
m_mc6845->set_hpixels_per_column(8);
|
||||||
m_update_row_type = CGA_GFX_2BPP;
|
m_update_row_type = CGA_GFX_2BPP;
|
||||||
break;
|
break;
|
||||||
case 0x18: case 0x19: case 0x1C: case 0x1D:
|
case 0x18: case 0x19: case 0x1c: case 0x1d:
|
||||||
m_mc6845->set_hpixels_per_column(8);
|
m_mc6845->set_hpixels_per_column(8);
|
||||||
m_update_row_type = CGA_TEXT_INTEN_ALT;
|
m_update_row_type = CGA_TEXT_INTEN_ALT;
|
||||||
break;
|
break;
|
||||||
case 0x1A: case 0x1B: case 0x3A: case 0x3B:
|
case 0x1a: case 0x1b: case 0x3a: case 0x3b:
|
||||||
m_mc6845->set_hpixels_per_column(8);
|
m_mc6845->set_hpixels_per_column(8);
|
||||||
if ( CGA_MONITOR == CGA_MONITOR_COMPOSITE ) {
|
if (CGA_MONITOR == CGA_MONITOR_COMPOSITE)
|
||||||
m_update_row_type = CGA_GFX_4BPPH;
|
m_update_row_type = CGA_GFX_4BPPH;
|
||||||
} else {
|
else
|
||||||
m_update_row_type = CGA_GFX_1BPP;
|
m_update_row_type = CGA_GFX_1BPP;
|
||||||
}
|
|
||||||
break;
|
break;
|
||||||
case 0x1E: case 0x1F: case 0x3E: case 0x3F:
|
case 0x1e: case 0x1f: case 0x3e: case 0x3f:
|
||||||
m_mc6845->set_hpixels_per_column(16);
|
m_mc6845->set_hpixels_per_column(16);
|
||||||
m_update_row_type = CGA_GFX_1BPP;
|
m_update_row_type = CGA_GFX_1BPP;
|
||||||
break;
|
break;
|
||||||
case 0x28: case 0x29: case 0x2C: case 0x2D:
|
case 0x28: case 0x29: case 0x2c: case 0x2d:
|
||||||
m_mc6845->set_hpixels_per_column(8);
|
m_mc6845->set_hpixels_per_column(8);
|
||||||
m_update_row_type = CGA_TEXT_BLINK;
|
m_update_row_type = CGA_TEXT_BLINK;
|
||||||
break;
|
break;
|
||||||
case 0x38: case 0x39: case 0x3C: case 0x3D:
|
case 0x38: case 0x39: case 0x3c: case 0x3d:
|
||||||
m_mc6845->set_hpixels_per_column(8);
|
m_mc6845->set_hpixels_per_column(8);
|
||||||
m_update_row_type = CGA_TEXT_BLINK_ALT;
|
m_update_row_type = CGA_TEXT_BLINK_ALT;
|
||||||
break;
|
break;
|
||||||
@ -859,7 +809,7 @@ WRITE8_MEMBER (isa8_aga_device:: pc_aga_cga_w )
|
|||||||
|
|
||||||
/*************************************/
|
/*************************************/
|
||||||
|
|
||||||
void isa8_aga_device::pc_aga_set_mode( AGA_MODE mode)
|
void isa8_aga_device::pc_aga_set_mode(mode_t mode)
|
||||||
{
|
{
|
||||||
m_mode = mode;
|
m_mode = mode;
|
||||||
|
|
||||||
@ -886,7 +836,8 @@ WRITE8_MEMBER ( isa8_aga_device::pc_aga_videoram_w )
|
|||||||
case AGA_MONO:
|
case AGA_MONO:
|
||||||
m_videoram[offset] = data;
|
m_videoram[offset] = data;
|
||||||
break;
|
break;
|
||||||
case AGA_OFF: break;
|
case AGA_OFF:
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -894,11 +845,13 @@ READ8_MEMBER( isa8_aga_device::pc_aga_videoram_r )
|
|||||||
{
|
{
|
||||||
switch (m_mode) {
|
switch (m_mode) {
|
||||||
case AGA_COLOR:
|
case AGA_COLOR:
|
||||||
if (offset>=0x8000) return m_videoram[offset-0x8000];
|
if (offset >= 0x8000)
|
||||||
|
return m_videoram[offset-0x8000];
|
||||||
return 0;
|
return 0;
|
||||||
case AGA_MONO:
|
case AGA_MONO:
|
||||||
return m_videoram[offset];
|
return m_videoram[offset];
|
||||||
case AGA_OFF: break;
|
case AGA_OFF:
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
@ -908,7 +861,8 @@ READ8_MEMBER( isa8_aga_pc200_device::pc200_videoram_r )
|
|||||||
switch (m_mode)
|
switch (m_mode)
|
||||||
{
|
{
|
||||||
default:
|
default:
|
||||||
if (offset>=0x8000) return m_videoram[offset-0x8000];
|
if (offset >= 0x8000)
|
||||||
|
return m_videoram[offset - 0x8000];
|
||||||
return 0;
|
return 0;
|
||||||
case AGA_MONO:
|
case AGA_MONO:
|
||||||
return m_videoram[offset];
|
return m_videoram[offset];
|
||||||
@ -917,8 +871,7 @@ READ8_MEMBER( isa8_aga_pc200_device::pc200_videoram_r )
|
|||||||
|
|
||||||
WRITE8_MEMBER ( isa8_aga_pc200_device::pc200_videoram_w )
|
WRITE8_MEMBER ( isa8_aga_pc200_device::pc200_videoram_w )
|
||||||
{
|
{
|
||||||
switch (m_mode)
|
switch (m_mode) {
|
||||||
{
|
|
||||||
default:
|
default:
|
||||||
if (offset >= 0x8000)
|
if (offset >= 0x8000)
|
||||||
m_videoram[offset - 0x8000] = data;
|
m_videoram[offset - 0x8000] = data;
|
||||||
@ -952,8 +905,7 @@ WRITE8_MEMBER( isa8_aga_pc200_device::pc200_cga_w )
|
|||||||
* Bit 1: Select MDA
|
* Bit 1: Select MDA
|
||||||
* Bit 0: Select external display (monitor) rather than internal display
|
* Bit 0: Select external display (monitor) rather than internal display
|
||||||
* (TV for PC200; LCD for PPC512) */
|
* (TV for PC200; LCD for PPC512) */
|
||||||
if ((m_porte & 7) != (data & 7))
|
if ((m_porte & 7) != (data & 7)) {
|
||||||
{
|
|
||||||
if (data & 4)
|
if (data & 4)
|
||||||
pc_aga_set_mode(AGA_OFF);
|
pc_aga_set_mode(AGA_OFF);
|
||||||
else if (data & 2)
|
else if (data & 2)
|
||||||
|
@ -27,27 +27,30 @@
|
|||||||
#include "video/mc6845.h"
|
#include "video/mc6845.h"
|
||||||
#include "emupal.h"
|
#include "emupal.h"
|
||||||
|
|
||||||
enum AGA_MODE { AGA_OFF, AGA_COLOR, AGA_MONO };
|
|
||||||
|
|
||||||
// ======================> isa8_aga_device
|
|
||||||
|
|
||||||
class isa8_aga_device :
|
class isa8_aga_device :
|
||||||
public device_t,
|
public device_t,
|
||||||
public device_isa8_card_interface
|
public device_isa8_card_interface
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
|
enum mode_t { AGA_OFF, AGA_COLOR, AGA_MONO };
|
||||||
|
|
||||||
// construction/destruction
|
// construction/destruction
|
||||||
isa8_aga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
isa8_aga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||||
|
|
||||||
|
protected:
|
||||||
|
isa8_aga_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||||
|
|
||||||
DECLARE_READ8_MEMBER( pc_aga_mda_r );
|
DECLARE_READ8_MEMBER( pc_aga_mda_r );
|
||||||
DECLARE_WRITE8_MEMBER( pc_aga_mda_w );
|
DECLARE_WRITE8_MEMBER( pc_aga_mda_w );
|
||||||
DECLARE_READ8_MEMBER( pc_aga_cga_r );
|
DECLARE_READ8_MEMBER( pc_aga_cga_r );
|
||||||
DECLARE_WRITE8_MEMBER( pc_aga_cga_w );
|
DECLARE_WRITE8_MEMBER( pc_aga_cga_w );
|
||||||
void set_palette_luts(void);
|
void set_palette_luts();
|
||||||
void pc_aga_set_mode(AGA_MODE mode);
|
void pc_aga_set_mode(mode_t mode);
|
||||||
DECLARE_WRITE8_MEMBER( pc_aga_videoram_w );
|
DECLARE_WRITE8_MEMBER( pc_aga_videoram_w );
|
||||||
DECLARE_READ8_MEMBER( pc_aga_videoram_r );
|
DECLARE_READ8_MEMBER( pc_aga_videoram_r );
|
||||||
|
|
||||||
|
MC6845_UPDATE_ROW( aga_update_row );
|
||||||
MC6845_UPDATE_ROW( mda_text_inten_update_row );
|
MC6845_UPDATE_ROW( mda_text_inten_update_row );
|
||||||
MC6845_UPDATE_ROW( mda_text_blink_update_row );
|
MC6845_UPDATE_ROW( mda_text_blink_update_row );
|
||||||
MC6845_UPDATE_ROW( cga_text_inten_update_row );
|
MC6845_UPDATE_ROW( cga_text_inten_update_row );
|
||||||
@ -59,12 +62,12 @@ public:
|
|||||||
MC6845_UPDATE_ROW( cga_gfx_2bpp_update_row );
|
MC6845_UPDATE_ROW( cga_gfx_2bpp_update_row );
|
||||||
MC6845_UPDATE_ROW( cga_gfx_1bpp_update_row );
|
MC6845_UPDATE_ROW( cga_gfx_1bpp_update_row );
|
||||||
|
|
||||||
|
DECLARE_WRITE_LINE_MEMBER( hsync_changed );
|
||||||
|
DECLARE_WRITE_LINE_MEMBER( vsync_changed );
|
||||||
|
|
||||||
required_device<palette_device> m_palette;
|
required_device<palette_device> m_palette;
|
||||||
required_device<mc6845_device> m_mc6845;
|
required_device<mc6845_device> m_mc6845;
|
||||||
|
|
||||||
protected:
|
|
||||||
isa8_aga_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
|
||||||
|
|
||||||
// device-level overrides
|
// device-level overrides
|
||||||
virtual void device_start() override;
|
virtual void device_start() override;
|
||||||
|
|
||||||
@ -76,7 +79,7 @@ protected:
|
|||||||
required_ioport m_cga_config;
|
required_ioport m_cga_config;
|
||||||
|
|
||||||
int m_update_row_type;
|
int m_update_row_type;
|
||||||
AGA_MODE m_mode;
|
mode_t m_mode;
|
||||||
uint8_t m_mda_mode_control;
|
uint8_t m_mda_mode_control;
|
||||||
uint8_t m_mda_status;
|
uint8_t m_mda_status;
|
||||||
uint8_t *m_mda_chr_gen;
|
uint8_t *m_mda_chr_gen;
|
||||||
@ -94,17 +97,8 @@ protected:
|
|||||||
uint8_t m_cga_palette_lut_2bpp[4];
|
uint8_t m_cga_palette_lut_2bpp[4];
|
||||||
|
|
||||||
std::unique_ptr<uint8_t[]> m_videoram;
|
std::unique_ptr<uint8_t[]> m_videoram;
|
||||||
|
|
||||||
private:
|
|
||||||
MC6845_UPDATE_ROW( aga_update_row );
|
|
||||||
DECLARE_WRITE_LINE_MEMBER( hsync_changed );
|
|
||||||
DECLARE_WRITE_LINE_MEMBER( vsync_changed );
|
|
||||||
};
|
};
|
||||||
|
|
||||||
// device type definition
|
|
||||||
DECLARE_DEVICE_TYPE(ISA8_AGA, isa8_aga_device)
|
|
||||||
|
|
||||||
// ======================> isa8_aga_pc200_device
|
|
||||||
|
|
||||||
class isa8_aga_pc200_device :
|
class isa8_aga_pc200_device :
|
||||||
public isa8_aga_device
|
public isa8_aga_device
|
||||||
@ -112,16 +106,15 @@ class isa8_aga_pc200_device :
|
|||||||
public:
|
public:
|
||||||
// construction/destruction
|
// construction/destruction
|
||||||
isa8_aga_pc200_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
isa8_aga_pc200_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||||
// optional information overrides
|
|
||||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
|
||||||
|
|
||||||
|
protected:
|
||||||
DECLARE_READ8_MEMBER( pc200_videoram_r );
|
DECLARE_READ8_MEMBER( pc200_videoram_r );
|
||||||
DECLARE_WRITE8_MEMBER( pc200_videoram_w );
|
DECLARE_WRITE8_MEMBER( pc200_videoram_w );
|
||||||
DECLARE_WRITE8_MEMBER( pc200_cga_w );
|
DECLARE_WRITE8_MEMBER( pc200_cga_w );
|
||||||
DECLARE_READ8_MEMBER( pc200_cga_r );
|
DECLARE_READ8_MEMBER( pc200_cga_r );
|
||||||
|
|
||||||
protected:
|
|
||||||
// device-level overrides
|
// device-level overrides
|
||||||
|
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||||
virtual void device_start() override;
|
virtual void device_start() override;
|
||||||
|
|
||||||
uint8_t m_port8;
|
uint8_t m_port8;
|
||||||
@ -129,7 +122,8 @@ protected:
|
|||||||
uint8_t m_porte;
|
uint8_t m_porte;
|
||||||
};
|
};
|
||||||
|
|
||||||
// device type definition
|
|
||||||
|
DECLARE_DEVICE_TYPE(ISA8_AGA, isa8_aga_device)
|
||||||
DECLARE_DEVICE_TYPE(ISA8_AGA_PC200, isa8_aga_pc200_device)
|
DECLARE_DEVICE_TYPE(ISA8_AGA_PC200, isa8_aga_pc200_device)
|
||||||
|
|
||||||
#endif // MAME_BUS_ISA_AGA_H
|
#endif // MAME_BUS_ISA_AGA_H
|
||||||
|
@ -80,7 +80,7 @@ private:
|
|||||||
|
|
||||||
uint8_t m_jim_data[16];
|
uint8_t m_jim_data[16];
|
||||||
uint8_t m_jim_state;
|
uint8_t m_jim_state;
|
||||||
AGA_MODE m_jim_mode;
|
isa8_aga_device::mode_t m_jim_mode;
|
||||||
int m_port61; // bit 0,1 must be 0 for startup; reset?
|
int m_port61; // bit 0,1 must be 0 for startup; reset?
|
||||||
uint8_t m_rtc_data[0x10];
|
uint8_t m_rtc_data[0x10];
|
||||||
int m_rtc_reg;
|
int m_rtc_reg;
|
||||||
@ -187,16 +187,16 @@ WRITE8_MEMBER( europc_pc_state::europc_jim_w )
|
|||||||
switch (data)
|
switch (data)
|
||||||
{
|
{
|
||||||
case 0x1f:
|
case 0x1f:
|
||||||
case 0x0b: m_jim_mode = AGA_MONO; break;
|
case 0x0b: m_jim_mode = isa8_aga_device::AGA_MONO; break;
|
||||||
case 0xe: //80 columns?
|
case 0xe: //80 columns?
|
||||||
case 0xd: //40 columns?
|
case 0xd: //40 columns?
|
||||||
case 0x18:
|
case 0x18:
|
||||||
case 0x1a: m_jim_mode = AGA_COLOR; break;
|
case 0x1a: m_jim_mode = isa8_aga_device::AGA_COLOR; break;
|
||||||
default: m_jim_mode = AGA_OFF; break;
|
default: m_jim_mode = isa8_aga_device::AGA_OFF; break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
// mode= data&0x10?AGA_COLOR:AGA_MONO;
|
// mode = (data & 0x10) ? isa8_aga_device::AGA_COLOR : isa8_aga_device::AGA_MONO;
|
||||||
// mode= data&0x10?AGA_COLOR:AGA_OFF;
|
// mode = (data & 0x10) ? isa8_aga_device::AGA_COLOR : isa8_aga_device::AGA_OFF;
|
||||||
if (data & 0x80) m_jim_state = 0;
|
if (data & 0x80) m_jim_state = 0;
|
||||||
break;
|
break;
|
||||||
case 4:
|
case 4:
|
||||||
@ -237,9 +237,9 @@ READ8_MEMBER( europc_pc_state::europc_jim2_r )
|
|||||||
m_jim_state = 0;
|
m_jim_state = 0;
|
||||||
switch (m_jim_mode)
|
switch (m_jim_mode)
|
||||||
{
|
{
|
||||||
case AGA_COLOR: return 0x87; // for color;
|
case isa8_aga_device::AGA_COLOR: return 0x87; // for color;
|
||||||
case AGA_MONO: return 0x90; //for mono
|
case isa8_aga_device::AGA_MONO: return 0x90; //for mono
|
||||||
case AGA_OFF: return 0x80; // for vram
|
case isa8_aga_device::AGA_OFF: return 0x80; // for vram
|
||||||
// return 0x97; //for error
|
// return 0x97; //for error
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -421,7 +421,7 @@ WRITE8_MEMBER( h01x_state::port_64_w )
|
|||||||
|
|
||||||
WRITE8_MEMBER( h01x_state::port_70_w )
|
WRITE8_MEMBER( h01x_state::port_70_w )
|
||||||
{
|
{
|
||||||
m_bank = data&0xC0;
|
m_bank = data & 0xc0;
|
||||||
|
|
||||||
// bit5, speaker
|
// bit5, speaker
|
||||||
m_speaker->level_w(BIT(data, 5));
|
m_speaker->level_w(BIT(data, 5));
|
||||||
@ -436,7 +436,7 @@ READ8_MEMBER( h01x_state::port_50_r )
|
|||||||
// bit 7, cassette input
|
// bit 7, cassette input
|
||||||
//return (m_cassette->input() > 0.04) ? 0x7f : 0xff;
|
//return (m_cassette->input() > 0.04) ? 0x7f : 0xff;
|
||||||
|
|
||||||
return (m_cassette_data ? 0xff : 0x7f);
|
return m_cassette_data ? 0xff : 0x7f;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -464,20 +464,20 @@ WRITE8_MEMBER(h01x_state::mem_4000_w)
|
|||||||
// 0x8000 --- 0xBFFF
|
// 0x8000 --- 0xBFFF
|
||||||
READ8_MEMBER(h01x_state::mem_8000_r)
|
READ8_MEMBER(h01x_state::mem_8000_r)
|
||||||
{
|
{
|
||||||
u8 result = 0xff;
|
|
||||||
|
|
||||||
switch (m_bank) {
|
switch (m_bank) {
|
||||||
case 0xC0:
|
case 0xc0:
|
||||||
return m_hzrom_ptr[offset];
|
return m_hzrom_ptr[offset];
|
||||||
case 0x40:
|
case 0x40:
|
||||||
if ((offset & 0xf000) == 0x3000) {
|
if ((offset & 0xf000) == 0x3000) {
|
||||||
//for(int i=0; i<11; i++) {
|
u8 result = 0xff;
|
||||||
for (int i = 0; i < 11; i++) {
|
for (int i = 0; i < 11; i++) {
|
||||||
if (!BIT(offset, i))
|
if (!BIT(offset, i))
|
||||||
result &= m_io_keyboard[i]->read();
|
result &= m_io_keyboard[i]->read();
|
||||||
}
|
}
|
||||||
}
|
|
||||||
return result;
|
return result;
|
||||||
|
} else {
|
||||||
|
return 0xff;
|
||||||
|
}
|
||||||
case 0x00:
|
case 0x00:
|
||||||
return m_ram_ptr[offset + 0x4000];
|
return m_ram_ptr[offset + 0x4000];
|
||||||
default:
|
default:
|
||||||
@ -495,15 +495,13 @@ WRITE8_MEMBER(h01x_state::mem_8000_w)
|
|||||||
// 0xC000 --- 0xFFFF
|
// 0xC000 --- 0xFFFF
|
||||||
READ8_MEMBER(h01x_state::mem_c000_r)
|
READ8_MEMBER(h01x_state::mem_c000_r)
|
||||||
{
|
{
|
||||||
if(m_bank == 0xC0) {
|
if (m_bank == 0xc0)
|
||||||
return m_hzrom_ptr[offset + 0x4000];
|
return m_hzrom_ptr[offset + 0x4000];
|
||||||
} else {
|
else if (m_bank == 0x40)
|
||||||
if(m_bank == 0x40)
|
|
||||||
return m_vram_ptr[offset];
|
return m_vram_ptr[offset];
|
||||||
else
|
else
|
||||||
return 0xff;
|
return 0xff;
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
WRITE8_MEMBER(h01x_state::mem_c000_w)
|
WRITE8_MEMBER(h01x_state::mem_c000_w)
|
||||||
{
|
{
|
||||||
@ -517,7 +515,7 @@ TIMER_CALLBACK_MEMBER(h01x_state::cassette_data_callback)
|
|||||||
/* This does all baud rates. 250 baud (trs80), and 500 baud (all others) set bit 7 of "cassette_data".
|
/* This does all baud rates. 250 baud (trs80), and 500 baud (all others) set bit 7 of "cassette_data".
|
||||||
1500 baud (trs80m3, trs80m4) is interrupt-driven and uses bit 0 of "cassette_data" */
|
1500 baud (trs80m3, trs80m4) is interrupt-driven and uses bit 0 of "cassette_data" */
|
||||||
|
|
||||||
double new_val = (m_cassette->input());
|
double new_val = m_cassette->input();
|
||||||
|
|
||||||
/* Check for HI-LO transition */
|
/* Check for HI-LO transition */
|
||||||
if (m_old_cassette_val > -0.2 && new_val < -0.2)
|
if (m_old_cassette_val > -0.2 && new_val < -0.2)
|
||||||
|
@ -98,7 +98,7 @@ public:
|
|||||||
void data_w(u8 data);
|
void data_w(u8 data);
|
||||||
u8 data_r();
|
u8 data_r();
|
||||||
|
|
||||||
void set_m3_bits(int m3, u8 b0, u8 b1, u8 b2, u8 b3);
|
template <unsigned N> void set_m3_bits(u8 b0, u8 b1, u8 b2, u8 b3);
|
||||||
void set_mf_bits(u8 b0, u8 b1, u8 b2, u8 b3);
|
void set_mf_bits(u8 b0, u8 b1, u8 b2, u8 b3);
|
||||||
void set_val_xor(u16 val_xor);
|
void set_val_xor(u16 val_xor);
|
||||||
|
|
||||||
@ -123,12 +123,12 @@ private:
|
|||||||
u16 m_val_xor;
|
u16 m_val_xor;
|
||||||
};
|
};
|
||||||
|
|
||||||
void igs_bitswap_device::set_m3_bits(int m3, u8 b0, u8 b1, u8 b2, u8 b3)
|
template <unsigned N> void igs_bitswap_device::set_m3_bits(u8 b0, u8 b1, u8 b2, u8 b3)
|
||||||
{
|
{
|
||||||
m_m3_bits[m3][0] = b0;
|
m_m3_bits[N][0] = b0;
|
||||||
m_m3_bits[m3][1] = b1;
|
m_m3_bits[N][1] = b1;
|
||||||
m_m3_bits[m3][2] = b2;
|
m_m3_bits[N][2] = b2;
|
||||||
m_m3_bits[m3][3] = b3;
|
m_m3_bits[N][3] = b3;
|
||||||
|
|
||||||
#if 0
|
#if 0
|
||||||
printf("igs_bitswap: INIT m3_bits[%x] =", m3);
|
printf("igs_bitswap: INIT m3_bits[%x] =", m3);
|
||||||
@ -3518,10 +3518,10 @@ void igs017_state::iqblocka(machine_config &config)
|
|||||||
m_igs_bitswap->out_pa_callback().set(FUNC(igs017_state::iqblocka_keyin_w));
|
m_igs_bitswap->out_pa_callback().set(FUNC(igs017_state::iqblocka_keyin_w));
|
||||||
m_igs_bitswap->set_val_xor(0x15d6);
|
m_igs_bitswap->set_val_xor(0x15d6);
|
||||||
m_igs_bitswap->set_mf_bits(3, 5, 9, 11);
|
m_igs_bitswap->set_mf_bits(3, 5, 9, 11);
|
||||||
m_igs_bitswap->set_m3_bits(0, ~5, 8, ~10, ~15);
|
m_igs_bitswap->set_m3_bits<0>(~5, 8, ~10, ~15);
|
||||||
m_igs_bitswap->set_m3_bits(1, 3, ~8, ~12, ~15);
|
m_igs_bitswap->set_m3_bits<1>( 3, ~8, ~12, ~15);
|
||||||
m_igs_bitswap->set_m3_bits(2, 2, ~6, ~11, ~15);
|
m_igs_bitswap->set_m3_bits<2>( 2, ~6, ~11, ~15);
|
||||||
m_igs_bitswap->set_m3_bits(3, 0, ~1, ~3, ~15);
|
m_igs_bitswap->set_m3_bits<3>( 0, ~1, ~3, ~15);
|
||||||
|
|
||||||
IGS_INCDEC(config, m_igs_incdec, 0);
|
IGS_INCDEC(config, m_igs_incdec, 0);
|
||||||
|
|
||||||
@ -3547,6 +3547,7 @@ void igs017_state::iqblocka(machine_config &config)
|
|||||||
void igs017_state::iqblockf(machine_config &config)
|
void igs017_state::iqblockf(machine_config &config)
|
||||||
{
|
{
|
||||||
iqblocka(config);
|
iqblocka(config);
|
||||||
|
|
||||||
// tweaked protection bitswap
|
// tweaked protection bitswap
|
||||||
m_igs_bitswap->out_pb_callback().set(FUNC(igs017_state::iqblockf_keyout_w));
|
m_igs_bitswap->out_pb_callback().set(FUNC(igs017_state::iqblockf_keyout_w));
|
||||||
m_igs_bitswap->set_mf_bits(0, 5, 9, 13);
|
m_igs_bitswap->set_mf_bits(0, 5, 9, 13);
|
||||||
@ -3555,12 +3556,13 @@ void igs017_state::iqblockf(machine_config &config)
|
|||||||
void igs017_state::genius6(machine_config &config)
|
void igs017_state::genius6(machine_config &config)
|
||||||
{
|
{
|
||||||
iqblockf(config);
|
iqblockf(config);
|
||||||
|
|
||||||
// tweaked protection bitswap
|
// tweaked protection bitswap
|
||||||
m_igs_bitswap->set_mf_bits(2, 7, 9, 13);
|
m_igs_bitswap->set_mf_bits(2, 7, 9, 13);
|
||||||
m_igs_bitswap->set_m3_bits(0, ~5, 6, ~7, ~15);
|
m_igs_bitswap->set_m3_bits<0>(~5, 6, ~7, ~15);
|
||||||
m_igs_bitswap->set_m3_bits(1, 1, ~6, ~9, ~15);
|
m_igs_bitswap->set_m3_bits<1>( 1, ~6, ~9, ~15);
|
||||||
m_igs_bitswap->set_m3_bits(2, 4, ~8, ~12, ~15);
|
m_igs_bitswap->set_m3_bits<2>( 4, ~8, ~12, ~15);
|
||||||
m_igs_bitswap->set_m3_bits(3, 3, ~5, ~6, ~15);
|
m_igs_bitswap->set_m3_bits<3>( 3, ~5, ~6, ~15);
|
||||||
}
|
}
|
||||||
|
|
||||||
void igs017_state::starzan(machine_config &config)
|
void igs017_state::starzan(machine_config &config)
|
||||||
@ -3689,10 +3691,10 @@ void igs017_state::lhzb2a(machine_config &config)
|
|||||||
IGS_BITSWAP(config, m_igs_bitswap, 0);
|
IGS_BITSWAP(config, m_igs_bitswap, 0);
|
||||||
m_igs_bitswap->set_val_xor(0x289a);
|
m_igs_bitswap->set_val_xor(0x289a);
|
||||||
m_igs_bitswap->set_mf_bits(4, 7, 10, 13);
|
m_igs_bitswap->set_mf_bits(4, 7, 10, 13);
|
||||||
m_igs_bitswap->set_m3_bits(0, ~3, 8, ~12, ~15);
|
m_igs_bitswap->set_m3_bits<0>(~3, 8, ~12, ~15);
|
||||||
m_igs_bitswap->set_m3_bits(1, ~3, ~6, ~9, ~15);
|
m_igs_bitswap->set_m3_bits<1>(~3, ~6, ~9, ~15);
|
||||||
m_igs_bitswap->set_m3_bits(2, ~3, 4, ~5, ~15);
|
m_igs_bitswap->set_m3_bits<2>(~3, 4, ~5, ~15);
|
||||||
m_igs_bitswap->set_m3_bits(3, ~9, ~11, 12, ~15);
|
m_igs_bitswap->set_m3_bits<3>(~9, ~11, 12, ~15);
|
||||||
|
|
||||||
IGS_INCDEC(config, m_igs_incdec, 0);
|
IGS_INCDEC(config, m_igs_incdec, 0);
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user