Sprinter/mame
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Pointer-ified the jaguar CPU core.

Browse Source
This commit is contained in:
Aaron Giles 2008-11-20 17:07:08 +00:00
parent e23c6d6676
commit 0bf352e5e8
6 changed files with 862 additions and 927 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1727
src/emu/cpu/jaguar/jaguar.c
View File

File diff suppressed because it is too large Load Diff

26
src/emu/cpu/jaguar/jaguar.h
View File

@ -14,11 +14,6 @@
#include "cpuintrf.h"
/***************************************************************************
COMPILE-TIME DEFINITIONS
***************************************************************************/
/***************************************************************************
GLOBAL CONSTANTS
***************************************************************************/
@ -27,6 +22,7 @@
#define JAGUAR_VARIANT_DSP 1
/***************************************************************************
REGISTER ENUMERATION
***************************************************************************/
@ -71,17 +67,22 @@ enum
};
/***************************************************************************
CONFIGURATION STRUCTURE
***************************************************************************/
typedef struct _jaguar_cpu_core jaguar_cpu_core;
struct _jaguar_cpu_core
typedef void (*jaguar_int_func)(const device_config *device);
typedef struct _jaguar_cpu_config jaguar_cpu_config;
struct _jaguar_cpu_config
{
void (*cpu_int_callback)(void);
jaguar_int_func cpu_int_callback;
};
/***************************************************************************
INTERRUPT CONSTANTS
***************************************************************************/
@ -94,17 +95,18 @@ struct _jaguar_cpu_core
#define JAGUAR_IRQ5 5 /* IRQ5 */
/***************************************************************************
PUBLIC FUNCTIONS
***************************************************************************/
extern CPU_GET_INFO( jaguargpu );
extern void jaguargpu_ctrl_w(int cpunum, offs_t offset, UINT32 data, UINT32 mem_mask);
extern UINT32 jaguargpu_ctrl_r(int cpunum, offs_t offset);
extern void jaguargpu_ctrl_w(const device_config *device, offs_t offset, UINT32 data, UINT32 mem_mask);
extern UINT32 jaguargpu_ctrl_r(const device_config *device, offs_t offset);
extern CPU_GET_INFO( jaguardsp );
extern void jaguardsp_ctrl_w(int cpunum, offs_t offset, UINT32 data, UINT32 mem_mask);
extern UINT32 jaguardsp_ctrl_r(int cpunum, offs_t offset);
extern void jaguardsp_ctrl_w(const device_config *device, offs_t offset, UINT32 data, UINT32 mem_mask);
extern UINT32 jaguardsp_ctrl_r(const device_config *device, offs_t offset);
#endif /* __JAGUAR_H__ */

4
src/mame/audio/jaguar.c
View File

@ -363,11 +363,11 @@ WRITE32_HANDLER( jaguar_jerry_regs32_w )
static WRITE32_HANDLER( dsp_flags_w )
{
/* write the data through */
jaguardsp_ctrl_w(2, offset, data, mem_mask);
jaguardsp_ctrl_w(space->machine->cpu[2], offset, data, mem_mask);
/* if they were clearing the A2S interrupt, see if we are headed for the spin */
/* loop with R22 != 0; if we are, just start spinning again */
if (cpunum_get_active() == 2 && ACCESSING_BITS_8_15 && (data & 0x400))
if (space->cpu == space->machine->cpu[2] && ACCESSING_BITS_8_15 && (data & 0x400))
{
/* see if we're going back to the spin loop */
if (!(data & 0x04000) && cpu_get_reg(space->cpu, JAGUAR_R22) != 0)

20
src/mame/drivers/cojag.c
View File

@ -368,8 +368,8 @@ static MACHINE_RESET( cojag )
jaguar_dsp_resume(machine);
/* halt the CPUs */
jaguargpu_ctrl_w(1, G_CTRL, 0, 0xffffffff);
jaguardsp_ctrl_w(2, D_CTRL, 0, 0xffffffff);
jaguargpu_ctrl_w(machine->cpu[1], G_CTRL, 0, 0xffffffff);
jaguardsp_ctrl_w(machine->cpu[2], D_CTRL, 0, 0xffffffff);
/* init the sound system */
cojag_sound_reset();
@ -418,8 +418,8 @@ static WRITE32_HANDLER( misc_control_w )
jaguar_dsp_resume(space->machine);
/* halt the CPUs */
jaguargpu_ctrl_w(1, G_CTRL, 0, 0xffffffff);
jaguardsp_ctrl_w(2, D_CTRL, 0, 0xffffffff);
jaguargpu_ctrl_w(space->machine->cpu[1], G_CTRL, 0, 0xffffffff);
jaguardsp_ctrl_w(space->machine->cpu[2], D_CTRL, 0, 0xffffffff);
}
/* adjust banking */
@ -442,13 +442,13 @@ static WRITE32_HANDLER( misc_control_w )
static READ32_HANDLER( gpuctrl_r )
{
return jaguargpu_ctrl_r(1, offset);
return jaguargpu_ctrl_r(space->machine->cpu[1], offset);
}
static WRITE32_HANDLER( gpuctrl_w )
{
jaguargpu_ctrl_w(1, offset, data, mem_mask);
jaguargpu_ctrl_w(space->machine->cpu[1], offset, data, mem_mask);
}
@ -461,13 +461,13 @@ static WRITE32_HANDLER( gpuctrl_w )
static READ32_HANDLER( dspctrl_r )
{
return jaguardsp_ctrl_r(2, offset);
return jaguardsp_ctrl_r(space->machine->cpu[2], offset);
}
static WRITE32_HANDLER( dspctrl_w )
{
jaguardsp_ctrl_w(2, offset, data, mem_mask);
jaguardsp_ctrl_w(space->machine->cpu[2], offset, data, mem_mask);
}
@ -1090,13 +1090,13 @@ static const r3000_cpu_core config =
};
static const jaguar_cpu_core gpu_config =
static const jaguar_cpu_config gpu_config =
{
jaguar_gpu_cpu_int
};
static const jaguar_cpu_core dsp_config =
static const jaguar_cpu_config dsp_config =
{
jaguar_dsp_cpu_int
};

4
src/mame/includes/jaguar.h
View File

@ -51,8 +51,8 @@ WRITE32_HANDLER( jaguar_serial_w );
void jaguar_gpu_suspend(running_machine *machine);
void jaguar_gpu_resume(running_machine *machine);
void jaguar_gpu_cpu_int(void);
void jaguar_dsp_cpu_int(void);
void jaguar_gpu_cpu_int(const device_config *device);
void jaguar_dsp_cpu_int(const device_config *device);
READ32_HANDLER( jaguar_blitter_r );
WRITE32_HANDLER( jaguar_blitter_w );

8
src/mame/video/jaguar.c
View File

@ -335,17 +335,17 @@ static void update_cpu_irq(running_machine *machine)
}
void jaguar_gpu_cpu_int(void)
void jaguar_gpu_cpu_int(const device_config *device)
{
cpu_irq_state |= 2;
update_cpu_irq(Machine);
update_cpu_irq(device->machine);
}
void jaguar_dsp_cpu_int(void)
void jaguar_dsp_cpu_int(const device_config *device)
{
cpu_irq_state |= 16;
update_cpu_irq(Machine);
update_cpu_irq(device->machine);
}