mirror of
https://github.com/holub/mame
synced 2025-05-08 07:11:42 +03:00
Replaced Namco 52xx sound simulation with emulation of the MCU.
Updated polepos and bosco drivers to use the new 52xx sound
emulation, wiring up the output through the discrete mixer that
Derrick had already plumbed but left disabled.
This required several MB88xx changes/fixes:
- internal timer support now works; prescaler is guessed based
on Pole Position sample playback frequency
- external counter support works
- a basic mechanism for reading serial input has been added; it
is not sufficient for a full implementation, but good enough
to sample the SI pin at startup
- fixed TSTS/TSTV to clear their respective flags
- fixed CI and CYI to compute imm-reg instead of reg-imm
- added masking of the PA register upon RTI/RTS to prevent bogus
PC values
This commit is contained in:
Aaron Giles
parent
4fca3801e9
commit
0c0affd00e
4
.gitattributes
vendored
4
.gitattributes
vendored
@ -835,8 +835,6 @@ src/emu/sound/n63701x.c svneol=native#text/plain
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src/emu/sound/n63701x.h svneol=native#text/plain
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src/emu/sound/namco.c svneol=native#text/plain
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src/emu/sound/namco.h svneol=native#text/plain
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src/emu/sound/namco52.c svneol=native#text/plain
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src/emu/sound/namco52.h svneol=native#text/plain
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src/emu/sound/nes_apu.c svneol=native#text/plain
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src/emu/sound/nes_apu.h svneol=native#text/plain
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src/emu/sound/nes_defs.h svneol=native#text/plain
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@ -1157,6 +1155,8 @@ src/mame/audio/mcr.h svneol=native#text/plain
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src/mame/audio/meadows.c svneol=native#text/plain
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src/mame/audio/mw8080bw.c svneol=native#text/plain
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src/mame/audio/n8080.c svneol=native#text/plain
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src/mame/audio/namco52.c svneol=native#text/plain
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src/mame/audio/namco52.h svneol=native#text/plain
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src/mame/audio/namco54.c svneol=native#text/plain
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src/mame/audio/namco54.h svneol=native#text/plain
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src/mame/audio/namcoc7x.c svneol=native#text/plain
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@ -16,6 +16,22 @@
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#include "debugger.h"
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#include "mb88xx.h"
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/***************************************************************************
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CONSTANTS
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***************************************************************************/
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#define SERIAL_PRESCALE 6 /* guess */
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#define TIMER_PRESCALE 32 /* guess */
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#define SERIAL_DISABLE_THRESH 1000 /* at this value, we give up driving the serial port */
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#define INT_CAUSE_SERIAL 0x01
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#define INT_CAUSE_TIMER 0x02
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#define INT_CAUSE_EXTERNAL 0x04
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/***************************************************************************
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STRUCTURES & TYPEDEFS
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***************************************************************************/
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@ -43,15 +59,19 @@ struct _mb88_state
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/* Timer registers */
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UINT8 TH; /* Timer High: 4 bits */
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UINT8 TL; /* Timer Low: 4 bits */
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UINT8 TP; /* Timer Prescale: 6 bits? */
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UINT8 ctr; /* current external counter value */
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/* Serial registers */
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UINT8 SB; /* Serial buffer: 4 bits */
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UINT16 SBcount; /* number of bits received */
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emu_timer *serial;
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/* PLA configuration */
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UINT8 * PLA;
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/* IRQ handling */
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int pending_interrupt;
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UINT8 pending_interrupt;
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cpu_irq_callback irqcallback;
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const device_config *device;
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const address_space *program;
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@ -73,6 +93,8 @@ INLINE mb88_state *get_safe_token(const device_config *device)
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return (mb88_state *)device->token;
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}
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static TIMER_CALLBACK( serial_timer );
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/***************************************************************************
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MACROS
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***************************************************************************/
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@ -125,6 +147,8 @@ static CPU_INIT( mb88 )
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cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
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cpustate->data = memory_find_address_space(device, ADDRESS_SPACE_DATA);
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cpustate->io = memory_find_address_space(device, ADDRESS_SPACE_IO);
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cpustate->serial = timer_alloc(device->machine, serial_timer, (void *)device);
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state_save_register_device_item(device, 0, cpustate->PC);
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state_save_register_device_item(device, 0, cpustate->PA);
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@ -145,7 +169,10 @@ static CPU_INIT( mb88 )
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state_save_register_device_item(device, 0, cpustate->pio);
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state_save_register_device_item(device, 0, cpustate->TH);
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state_save_register_device_item(device, 0, cpustate->TL);
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state_save_register_device_item(device, 0, cpustate->TP);
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state_save_register_device_item(device, 0, cpustate->ctr);
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state_save_register_device_item(device, 0, cpustate->SB);
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state_save_register_device_item(device, 0, cpustate->SBcount);
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state_save_register_device_item(device, 0, cpustate->pending_interrupt);
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}
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@ -156,7 +183,6 @@ static CPU_RESET( mb88 )
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/* zero registers and flags */
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cpustate->PC = 0;
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cpustate->PA = 0;
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cpustate->PA = 0;
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cpustate->SP[0] = cpustate->SP[1] = cpustate->SP[2] = cpustate->SP[3] = 0;
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cpustate->SI = 0;
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cpustate->A = 0;
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@ -171,7 +197,9 @@ static CPU_RESET( mb88 )
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cpustate->pio = 0;
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cpustate->TH = 0;
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cpustate->TL = 0;
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cpustate->TP = 0;
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cpustate->SB = 0;
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cpustate->SBcount = 0;
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cpustate->pending_interrupt = 0;
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}
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@ -179,6 +207,32 @@ static CPU_RESET( mb88 )
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CORE EXECUTION LOOP
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***************************************************************************/
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static TIMER_CALLBACK( serial_timer )
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{
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mb88_state *cpustate = get_safe_token((const device_config *)ptr);
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cpustate->SBcount++;
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/* if we get too many interrupts with no servicing, disable the timer
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until somebody does something */
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if (cpustate->SBcount >= SERIAL_DISABLE_THRESH)
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timer_adjust_oneshot(cpustate->serial, attotime_never, 0);
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/* only read if not full; this is needed by the Namco 52xx to ensure that
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the program can write to S and recover the value even if serial is enabled */
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if (!cpustate->sf)
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{
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cpustate->SB = (cpustate->SB >> 1) | (READPORT(MB88_PORTSI) ? 8 : 0);
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if (cpustate->SBcount >= 4)
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{
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cpustate->sf = 1;
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cpustate->pending_interrupt |= INT_CAUSE_SERIAL;
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}
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}
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}
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static int pla( mb88_state *cpustate, int inA, int inB )
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{
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int index = ((inB&1) << 4) | (inA&0x0f);
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@ -194,22 +248,66 @@ static void set_irq_line(mb88_state *cpustate, int state)
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/* on falling edge trigger interrupt */
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if ( (cpustate->pio & 0x04) && cpustate->nf && state == CLEAR_LINE )
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{
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cpustate->pending_interrupt = 1;
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cpustate->pending_interrupt |= INT_CAUSE_EXTERNAL;
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}
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cpustate->nf = (state != CLEAR_LINE) ? 1 : 0;
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}
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static void update_pio( mb88_state *cpustate )
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static void update_pio_enable( mb88_state *cpustate, UINT8 newpio )
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{
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/* update interrupts, serial and timer flags */
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if ( (cpustate->pio & 0x04) && cpustate->pending_interrupt )
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/* if the serial state has changed, configure the timer */
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if ((cpustate->pio ^ newpio) & 0x30)
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{
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/* no vectors supported, just do the callback to clear irq_state if needed */
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if (cpustate->irqcallback)
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if ((newpio & 0x30) == 0)
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timer_adjust_oneshot(cpustate->serial, attotime_never, 0);
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else if ((newpio & 0x30) == 0x20)
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timer_adjust_periodic(cpustate->serial, ATTOTIME_IN_HZ(cpustate->device->clock / SERIAL_PRESCALE), 0, ATTOTIME_IN_HZ(cpustate->device->clock / SERIAL_PRESCALE));
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else
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fatalerror("mb88xx: update_pio_enable set serial enable to unsupported value %02X\n", newpio & 0x30);
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}
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cpustate->pio = newpio;
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}
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static void increment_timer( mb88_state *cpustate )
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{
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cpustate->TL = (cpustate->TL + 1) & 0x0f;
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if (cpustate->TL == 0)
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{
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cpustate->TH = (cpustate->TH + 1) & 0x0f;
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if (cpustate->TH == 0)
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{
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cpustate->vf = 1;
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cpustate->pending_interrupt |= INT_CAUSE_TIMER;
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}
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}
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}
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static void update_pio( mb88_state *cpustate, int cycles )
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{
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/* TODO: improve/validate serial and timer support */
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/* internal clock enable */
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if ( cpustate->pio & 0x80 )
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{
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cpustate->TP += cycles;
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while (cpustate->TP >= TIMER_PRESCALE)
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{
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cpustate->TP -= TIMER_PRESCALE;
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increment_timer(cpustate);
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}
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}
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/* process pending interrupts */
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if (cpustate->pending_interrupt & cpustate->pio)
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{
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/* if we have a live external source, call the irqcallback */
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if (cpustate->pending_interrupt & cpustate->pio & INT_CAUSE_EXTERNAL)
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(*cpustate->irqcallback)(cpustate->device, 0);
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cpustate->pending_interrupt = 0;
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cpustate->SP[cpustate->SI] = GETPC();
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cpustate->SP[cpustate->SI] |= TEST_CF() << 15;
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cpustate->SP[cpustate->SI] |= TEST_ZF() << 14;
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@ -219,14 +317,24 @@ static void update_pio( mb88_state *cpustate )
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cpustate->PA = 0x00;
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cpustate->st = 1;
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cpustate->pending_interrupt = 0;
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CYCLES(3); /* ? */
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}
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/* TODO: add support for serial and timer */
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}
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void mb88_external_clock_w(const device_config *device, int state)
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{
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mb88_state *cpustate = get_safe_token(device);
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if (state != cpustate->ctr)
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{
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cpustate->ctr = state;
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/* on a falling clock, increment the timer, but only if enabled */
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if (cpustate->ctr == 0 && (cpustate->pio & 0x40))
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increment_timer(cpustate);
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}
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}
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static CPU_EXECUTE( mb88 )
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{
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mb88_state *cpustate = get_safe_token(device);
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@ -497,10 +605,19 @@ static CPU_EXECUTE( mb88 )
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case 0x26: /* tstv ZCS:..x */
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cpustate->st = cpustate->vf ^ 1;
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cpustate->vf = 0;
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break;
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case 0x27: /* tsts ZCS:..x */
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cpustate->st = cpustate->sf ^ 1;
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if (cpustate->sf)
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{
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/* re-enable the timer if we disabled it previously */
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if (cpustate->SBcount >= SERIAL_DISABLE_THRESH)
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timer_adjust_periodic(cpustate->serial, ATTOTIME_IN_HZ(cpustate->device->clock / SERIAL_PRESCALE), 0, ATTOTIME_IN_HZ(cpustate->device->clock / SERIAL_PRESCALE));
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cpustate->SBcount = 0;
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}
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cpustate->sf = 0;
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break;
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case 0x28: /* tstc ZCS:..x */
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@ -526,7 +643,7 @@ static CPU_EXECUTE( mb88 )
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case 0x2c: /* rts ZCS:... */
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cpustate->SI = ( cpustate->SI - 1 ) & 3;
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cpustate->PC = cpustate->SP[cpustate->SI] & 0x3f;
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cpustate->PA = cpustate->SP[cpustate->SI] >> 6;
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cpustate->PA = (cpustate->SP[cpustate->SI] >> 6) & 0x1f;
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cpustate->st = 1;
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break;
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@ -572,7 +689,7 @@ static CPU_EXECUTE( mb88 )
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/* restore address and saved state flags on the top bits of the stack */
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cpustate->SI = ( cpustate->SI - 1 ) & 3;
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cpustate->PC = cpustate->SP[cpustate->SI] & 0x3f;
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cpustate->PA = cpustate->SP[cpustate->SI] >> 6;
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cpustate->PA = (cpustate->SP[cpustate->SI] >> 6) & 0x1f;
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cpustate->st = (cpustate->SP[cpustate->SI] >> 13)&1;
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cpustate->zf = (cpustate->SP[cpustate->SI] >> 14)&1;
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cpustate->cf = (cpustate->SP[cpustate->SI] >> 15)&1;
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@ -586,14 +703,14 @@ static CPU_EXECUTE( mb88 )
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break;
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case 0x3e: /* en imm ZCS:... */
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cpustate->pio |= READOP(GETPC());
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update_pio_enable(cpustate, cpustate->pio | READOP(GETPC()));
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INCPC();
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oc = 2;
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cpustate->st = 1;
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break;
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case 0x3f: /* dis imm ZCS:... */
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cpustate->pio &= ~(READOP(GETPC()));
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update_pio_enable(cpustate, cpustate->pio & ~(READOP(GETPC())));
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INCPC();
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oc = 2;
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cpustate->st = 1;
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@ -707,7 +824,7 @@ static CPU_EXECUTE( mb88 )
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case 0xa4: case 0xa5: case 0xa6: case 0xa7:
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case 0xa8: case 0xa9: case 0xaa: case 0xab:
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case 0xac: case 0xad: case 0xae: case 0xaf: /* cyi ZCS:xxx */
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arg = cpustate->Y - (opcode & 0x0f);
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arg = (opcode & 0x0f) - cpustate->Y;
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UPDATE_CF(arg);
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arg &= 0x0f;
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UPDATE_ST_Z(arg);
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@ -718,7 +835,7 @@ static CPU_EXECUTE( mb88 )
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case 0xb4: case 0xb5: case 0xb6: case 0xb7:
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case 0xb8: case 0xb9: case 0xba: case 0xbb:
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case 0xbc: case 0xbd: case 0xbe: case 0xbf: /* ci ZCS:xxx */
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arg = cpustate->A - (opcode & 0x0f);
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arg = (opcode & 0x0f) - cpustate->A;
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UPDATE_CF(arg);
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arg &= 0x0f;
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UPDATE_ST_Z(arg);
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@ -738,7 +855,7 @@ static CPU_EXECUTE( mb88 )
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CYCLES( oc );
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/* update interrupts, serial and timer flags */
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update_pio(cpustate);
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update_pio(cpustate, oc);
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}
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return cycles - cpustate->icount;
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@ -26,7 +26,8 @@ enum
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MB88_PORTR0, /* R0-R3, 4 bits */
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MB88_PORTR1, /* R4-R7, 4 bits */
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MB88_PORTR2, /* R8-R11, 4 bits */
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MB88_PORTR3 /* R12-R15, 4 bits */
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MB88_PORTR3, /* R12-R15, 4 bits */
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MB88_PORTSI /* SI, 1 bit */
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};
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/***************************************************************************
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@ -78,4 +79,6 @@ CPU_GET_INFO( mb8844 );
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CPU_DISASSEMBLE( mb88 );
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void mb88_external_clock_w(const device_config *device, int state);
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#endif /* __MB88XX_H__ */
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@ -1,253 +0,0 @@
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/***************************************************************************
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Namco 52XX
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This instance of the Fujitsu MB8843 MCU is programmed to act as a sample player.
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It is used by just two games: Bosconian and Pole Position.
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A0-A15 = address to read from sample ROMs
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D0-D7 = data freom sample ROMs
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CMD = command from CPU (sample to play, 0 = none)
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OUT = sound output
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+------+
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EXTAL|1 42|Vcc
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XTAL|2 41|CMD3
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/RESET|3 40|CMD2
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/IRQ|4 39|CMD1
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n.c.|5 38|CMD0
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[2] |6 37|A7
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n.c.|7 36|A6
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[1] |8 35|A5
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OUT0|9 34|A4
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OUT1|10 33|A3
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OUT2|11 32|A2
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OUT3|12 31|A1
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A8|13 30|A0
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A9|14 29|D7
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A10|15 28|D6
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A11|16 27|D5
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[3]A12|17 26|D4
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[3]A13|18 25|D3
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[3]A14|19 24|D2
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[3]A15|20 23|D1
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GND|21 22|D0
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+------+
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[1] in polepos, GND; in bosco, 4kHz output from a 555 timer
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[2] in polepos, +5V; in bosco, GND
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[3] in polepos, these are true address lines, in bosco they are chip select lines
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(each one select one of the four ROM chips). Behaviour related to [2]?
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TODO:
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- the purpose of the 555 timer in bosco is unknown; maybe modulate the output?
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Jan 12, 2005. The 555 is probably an external playback frequency.
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***************************************************************************/
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#include "sndintrf.h"
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#include "streams.h"
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#include "filter.h"
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#include "namco52.h"
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#include "cpu/mb88xx/mb88xx.h"
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typedef struct _namco_52xx namco_52xx;
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struct _namco_52xx
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{
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const namco_52xx_interface *intf; /* pointer to our config data */
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UINT8 *rom; /* pointer to sample ROM */
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UINT32 rom_len;
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sound_stream * stream; /* the output stream */
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double n52_pb_cycle; /* playback clock time based on machine sample rate */
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double n52_step; /* playback clock step based on machine sample rate */
|
||||
/* n52_pb_cycle is incremented by n52_step every machine-sample.
|
||||
* At every integer value of n52_pb_cycle the next 4bit value is used. */
|
||||
INT32 n52_start; /* current effect start position in the ROM */
|
||||
INT32 n52_end; /* current effect end position in the ROM */
|
||||
INT32 n52_length; /* # of 4bit samples in current effect */
|
||||
INT32 n52_pos; /* current 4bit sample of effect */
|
||||
filter2_context n52_hp_filter;
|
||||
filter2_context n52_lp_filter;
|
||||
};
|
||||
|
||||
|
||||
INLINE namco_52xx *get_safe_token(const device_config *device)
|
||||
{
|
||||
assert(device != NULL);
|
||||
assert(device->token != NULL);
|
||||
assert(device->type == SOUND);
|
||||
assert(sound_get_type(device) == SOUND_NAMCO_52XX);
|
||||
return (namco_52xx *)device->token;
|
||||
}
|
||||
|
||||
|
||||
static void namco_52xx_reset(namco_52xx *chip);
|
||||
|
||||
|
||||
static STREAM_UPDATE( namco_52xx_stream_update_one )
|
||||
{
|
||||
namco_52xx *chip = (namco_52xx *)param;
|
||||
int i, rom_pos, whole_pb_cycles, buf;
|
||||
stream_sample_t *buffer = outputs[0];
|
||||
|
||||
if (chip->n52_start >= chip->n52_end)
|
||||
{
|
||||
memset(buffer, 0, samples * sizeof(*buffer));
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < samples; i++)
|
||||
{
|
||||
chip->n52_pb_cycle += chip->n52_step;
|
||||
if (chip->n52_pb_cycle >= 1)
|
||||
{
|
||||
whole_pb_cycles = (int)chip->n52_pb_cycle;
|
||||
chip->n52_pos += whole_pb_cycles;
|
||||
chip->n52_pb_cycle -= whole_pb_cycles;
|
||||
}
|
||||
|
||||
if (chip->n52_pos > chip->n52_length)
|
||||
{
|
||||
/* sample done */
|
||||
memset(&buffer[i], 0, (samples - i) * sizeof(INT16));
|
||||
i = samples;
|
||||
namco_52xx_reset(chip);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* filter and fill the buffer */
|
||||
rom_pos = chip->n52_start + (chip->n52_pos >> 1);
|
||||
/* get the 4bit sample from rom and shift to +7/-8 value */
|
||||
chip->n52_hp_filter.x0 = (((chip->n52_pos & 1) ? chip->rom[rom_pos] >> 4 : chip->rom[rom_pos]) & 0x0f) - 0x08;
|
||||
filter2_step(&chip->n52_hp_filter);
|
||||
chip->n52_lp_filter.x0 = chip->n52_hp_filter.y0;
|
||||
filter2_step(&chip->n52_lp_filter);
|
||||
/* convert 4bit filtered to 16bit allowing room for filter gain */
|
||||
buf = (int)(chip->n52_lp_filter.y0 * 0x0fff);
|
||||
if (buf > 32767) buf = 32767;
|
||||
if (buf < -32768) buf = -32768;
|
||||
buffer[i] = buf;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void namco_52xx_reset(namco_52xx *chip)
|
||||
{
|
||||
chip->n52_pb_cycle = chip->n52_start = chip->n52_end = chip->n52_length = chip->n52_pos = 0;
|
||||
|
||||
filter2_reset(&chip->n52_hp_filter);
|
||||
filter2_reset(&chip->n52_lp_filter);
|
||||
}
|
||||
|
||||
static DEVICE_RESET( namco_52xx )
|
||||
{
|
||||
namco_52xx_reset(get_safe_token(device));
|
||||
}
|
||||
|
||||
static DEVICE_START( namco_52xx )
|
||||
{
|
||||
namco_52xx *chip = get_safe_token(device);
|
||||
int rate = device->clock/32;
|
||||
|
||||
chip->intf = (const namco_52xx_interface *)device->static_config;
|
||||
chip->rom = device->region;
|
||||
chip->rom_len = device->regionbytes;
|
||||
|
||||
if (chip->intf->play_rate == 0)
|
||||
{
|
||||
/* If play clock is 0 (grounded) then default to internal clock */
|
||||
chip->n52_step = (double)device->clock / 384 / rate;
|
||||
}
|
||||
else
|
||||
{
|
||||
chip->n52_step = chip->intf->play_rate / rate;
|
||||
}
|
||||
filter2_setup(device, FILTER_HIGHPASS, chip->intf->hp_filt_fc, Q_TO_DAMP(chip->intf->hp_filt_q), 1, &chip->n52_hp_filter);
|
||||
filter2_setup(device, FILTER_LOWPASS, chip->intf->lp_filt_fc, Q_TO_DAMP(chip->intf->lp_filt_q), chip->intf->filt_gain, &chip->n52_lp_filter);
|
||||
|
||||
|
||||
chip->stream = stream_create(device, 0, 1, rate, chip, namco_52xx_stream_update_one);
|
||||
|
||||
namco_52xx_reset(chip);
|
||||
|
||||
state_save_register_device_item(device, 0, chip->n52_pb_cycle);
|
||||
state_save_register_device_item(device, 0, chip->n52_step);
|
||||
state_save_register_device_item(device, 0, chip->n52_start);
|
||||
state_save_register_device_item(device, 0, chip->n52_end);
|
||||
state_save_register_device_item(device, 0, chip->n52_length);
|
||||
state_save_register_device_item(device, 0, chip->n52_pos);
|
||||
}
|
||||
|
||||
|
||||
WRITE8_DEVICE_HANDLER( namco_52xx_write )
|
||||
{
|
||||
namco_52xx *chip = get_safe_token(device);
|
||||
data &= 0x0f;
|
||||
|
||||
if (data != 0)
|
||||
{
|
||||
stream_update(chip->stream);
|
||||
|
||||
chip->n52_start = chip->rom[data-1] + (chip->rom[data-1+0x10] << 8);
|
||||
chip->n52_end = chip->rom[data] + (chip->rom[data+0x10] << 8);
|
||||
|
||||
if (chip->n52_end >= chip->rom_len)
|
||||
chip->n52_end = chip->rom_len;
|
||||
|
||||
chip->n52_length = (chip->n52_end - chip->n52_start) * 2;
|
||||
chip->n52_pos = 0;
|
||||
chip->n52_pb_cycle= 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**************************************************************************
|
||||
* Generic get_info
|
||||
**************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START( namco_52xx_map_io, ADDRESS_SPACE_IO, 8 )
|
||||
// AM_RANGE(MB88_PORTK, MB88_PORTK) AM_READ(namco_52xx_K_r)
|
||||
// AM_RANGE(MB88_PORTO, MB88_PORTO) AM_WRITE(namco_52xx_O_w)
|
||||
// AM_RANGE(MB88_PORTR0, MB88_PORTR0) AM_READ(namco_52xx_R0_r)
|
||||
// AM_RANGE(MB88_PORTR2, MB88_PORTR2) AM_READ(namco_52xx_R2_r)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
static MACHINE_DRIVER_START( namco_52xx )
|
||||
MDRV_CPU_ADD("mcu", MB8843, DERIVED_CLOCK(1,1)) /* parent clock, internally divided by 6 */
|
||||
MDRV_CPU_IO_MAP(namco_52xx_map_io)
|
||||
MDRV_CPU_FLAGS(CPU_DISABLE) /* not implemented yet */
|
||||
MACHINE_DRIVER_END
|
||||
|
||||
|
||||
ROM_START( namco_52xx )
|
||||
ROM_REGION( 0x400, "mcu", ROMREGION_LOADBYNAME )
|
||||
ROM_LOAD( "52xx.bin", 0x0000, 0x0400, CRC(3257d11e) SHA1(4883b2fdbc99eb7b9906357fcc53915842c2c186) )
|
||||
ROM_END
|
||||
|
||||
|
||||
DEVICE_GET_INFO( namco_52xx )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(namco_52xx); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers --- */
|
||||
case DEVINFO_PTR_ROM_REGION: info->romregion = ROM_NAME(namco_52xx); break;
|
||||
case DEVINFO_PTR_MACHINE_CONFIG: info->machine_config = MACHINE_DRIVER_NAME(namco_52xx); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( namco_52xx ); break;
|
||||
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME( namco_52xx ); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case DEVINFO_STR_NAME: strcpy(info->s, "Namco 52XX"); break;
|
||||
case DEVINFO_STR_FAMILY: strcpy(info->s, "Namco custom"); break;
|
||||
case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
|
||||
case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
|
||||
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
|
||||
}
|
||||
}
|
||||
@ -1,38 +0,0 @@
|
||||
#pragma once
|
||||
|
||||
#ifndef __NAMCO52_H__
|
||||
#define __NAMCO52_H__
|
||||
|
||||
/* While a little confusing, this interface uses 2 gains.
|
||||
*
|
||||
* "mixing_level" is the relative level of the signal
|
||||
* compared to other effects before entering the filter.
|
||||
*
|
||||
* "filt_gain" is the combined gain of the filters.
|
||||
*
|
||||
* If I did not do it this way, then the filters could
|
||||
* cause the signal to go beyond the 16bit range.
|
||||
*
|
||||
* If "play_rate" is 0 (ground) then the sample clock rate
|
||||
* defaults to the 52xx internal sample clock. (baseclock/384)
|
||||
*/
|
||||
|
||||
typedef struct _namco_52xx_interface namco_52xx_interface;
|
||||
struct _namco_52xx_interface
|
||||
{
|
||||
double play_rate; /* Playback frequency */
|
||||
double hp_filt_fc;
|
||||
double hp_filt_q;
|
||||
double lp_filt_fc;
|
||||
double lp_filt_q;
|
||||
double filt_gain;
|
||||
};
|
||||
|
||||
|
||||
WRITE8_DEVICE_HANDLER( namco_52xx_write );
|
||||
|
||||
|
||||
DEVICE_GET_INFO( namco_52xx );
|
||||
#define SOUND_NAMCO_52XX DEVICE_GET_INFO_NAME( namco_52xx )
|
||||
|
||||
#endif /* __NAMCO52_H__ */
|
||||
@ -303,7 +303,6 @@ endif
|
||||
SOUNDDEFS += -DHAS_NAMCO=$(if $(filter NAMCO,$(SOUNDS)),1,0)
|
||||
SOUNDDEFS += -DHAS_NAMCO_15XX=$(if $(filter NAMCO_15XX,$(SOUNDS)),1,0)
|
||||
SOUNDDEFS += -DHAS_NAMCO_CUS30=$(if $(filter NAMCO_CUS30,$(SOUNDS)),1,0)
|
||||
SOUNDDEFS += -DHAS_NAMCO_52XX=$(if $(filter NAMCO_52XX,$(SOUNDS)),1,0)
|
||||
SOUNDDEFS += -DHAS_NAMCO_63701X=$(if $(filter NAMCO_63701X,$(SOUNDS)),1,0)
|
||||
SOUNDDEFS += -DHAS_C140=$(if $(filter C140,$(SOUNDS)),1,0)
|
||||
SOUNDDEFS += -DHAS_C352=$(if $(filter C352,$(SOUNDS)),1,0)
|
||||
@ -312,10 +311,6 @@ ifneq ($(filter NAMCO NAMCO_15XX NAMCO_CUS30,$(SOUNDS)),)
|
||||
SOUNDOBJS += $(SOUNDOBJ)/namco.o
|
||||
endif
|
||||
|
||||
ifneq ($(filter NAMCO_52XX,$(SOUNDS)),)
|
||||
SOUNDOBJS += $(SOUNDOBJ)/namco52.o
|
||||
endif
|
||||
|
||||
ifneq ($(filter NAMCO_63701X,$(SOUNDS)),)
|
||||
SOUNDOBJS += $(SOUNDOBJ)/n63701x.o
|
||||
endif
|
||||
|
||||
@ -4,6 +4,7 @@
|
||||
****************************************************************************/
|
||||
|
||||
#include "driver.h"
|
||||
#include "namco52.h"
|
||||
#include "namco54.h"
|
||||
#include "galaga.h"
|
||||
|
||||
@ -132,7 +133,7 @@ DISCRETE_SOUND_START(bosco)
|
||||
DISCRETE_INPUT_DATA(NAMCO_54XX_0_DATA(NODE_01))
|
||||
DISCRETE_INPUT_DATA(NAMCO_54XX_1_DATA(NODE_01))
|
||||
DISCRETE_INPUT_DATA(NAMCO_54XX_2_DATA(NODE_01))
|
||||
DISCRETE_INPUT_DATA(NAMCO_54XX_P_DATA(NODE_01))
|
||||
DISCRETE_INPUT_DATA(NAMCO_52XX_P_DATA(NODE_04))
|
||||
|
||||
/************************************************
|
||||
* CHANL1 sound
|
||||
@ -179,21 +180,20 @@ DISCRETE_SOUND_START(bosco)
|
||||
/************************************************
|
||||
* CHANL4 sound
|
||||
************************************************/
|
||||
/* disabled until 52XX is emulated */
|
||||
/* this circuit was simulated in SPICE and an equivalent filter circuit generated */
|
||||
DISCRETE_DAC_R1(NODE_50,
|
||||
0, /* ENAB */
|
||||
NAMCO_54XX_P_DATA(NODE_01),
|
||||
1, /* ENAB */
|
||||
NAMCO_52XX_P_DATA(NODE_04),
|
||||
4, /* 4V - unmeasured*/
|
||||
&bosco_52xx_dac)
|
||||
DISCRETE_FILTER2(NODE_51,
|
||||
0, /* ENAB */
|
||||
1, /* ENAB */
|
||||
NODE_50, /* INP0 */
|
||||
80, /* FREQ */
|
||||
1.0 / 0.3, /* DAMP */
|
||||
DISC_FILTER_HIGHPASS)
|
||||
DISCRETE_FILTER2(NODE_52,
|
||||
0, /* ENAB */
|
||||
1, /* ENAB */
|
||||
NODE_51, /* INP0 */
|
||||
2400, /* FREQ */
|
||||
1.0 / 0.9, /* DAMP */
|
||||
|
||||
274
src/mame/audio/namco52.c
Normal file
274
src/mame/audio/namco52.c
Normal file
@ -0,0 +1,274 @@
|
||||
/***************************************************************************
|
||||
|
||||
Namco 52XX
|
||||
|
||||
This instance of the Fujitsu MB8843 MCU is programmed to act as a sample player.
|
||||
It is used by just two games: Bosconian and Pole Position.
|
||||
|
||||
A0-A15 = address to read from sample ROMs
|
||||
D0-D7 = data freom sample ROMs
|
||||
CMD = command from CPU (sample to play, 0 = none)
|
||||
OUT = sound output
|
||||
|
||||
+------+
|
||||
EXTAL|1 42|Vcc
|
||||
XTAL|2 41|CMD3
|
||||
/RESET|3 40|CMD2
|
||||
/IRQ|4 39|CMD1
|
||||
n.c.|5 38|CMD0
|
||||
[2] |6 37|A7
|
||||
n.c.|7 36|A6
|
||||
[1] |8 35|A5
|
||||
OUT0|9 34|A4
|
||||
OUT1|10 33|A3
|
||||
OUT2|11 32|A2
|
||||
OUT3|12 31|A1
|
||||
A8|13 30|A0
|
||||
A9|14 29|D7
|
||||
A10|15 28|D6
|
||||
A11|16 27|D5
|
||||
[3]A12|17 26|D4
|
||||
[3]A13|18 25|D3
|
||||
[3]A14|19 24|D2
|
||||
[3]A15|20 23|D1
|
||||
GND|21 22|D0
|
||||
+------+
|
||||
|
||||
[1] in polepos, GND; in bosco, 4kHz output from a 555 timer
|
||||
[2] in polepos, +5V; in bosco, GND
|
||||
[3] in polepos, these are true address lines, in bosco they are chip select lines
|
||||
(each one select one of the four ROM chips). Behaviour related to [2]
|
||||
|
||||
|
||||
CMD0-CMD3 -> K0-K3
|
||||
D0-D3 -> R0-R3
|
||||
D4-D7 -> R4-R7
|
||||
A0-A3 -> R8-R11
|
||||
A4-A7 -> R12-R15
|
||||
A8-A11 -> O0-O3
|
||||
A12-A15 -> O4-O7
|
||||
OUT0-OUT3 -> P0-P3
|
||||
/TC -> [1]
|
||||
SI -> [2]
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#include "driver.h"
|
||||
#include "namco52.h"
|
||||
#include "cpu/mb88xx/mb88xx.h"
|
||||
|
||||
typedef struct _namco_52xx_state namco_52xx_state;
|
||||
struct _namco_52xx_state
|
||||
{
|
||||
const device_config *cpu;
|
||||
const device_config *discrete;
|
||||
int basenode;
|
||||
devcb_resolved_read8 romread;
|
||||
devcb_resolved_read8 si;
|
||||
UINT8 latched_cmd;
|
||||
UINT32 address;
|
||||
};
|
||||
|
||||
INLINE namco_52xx_state *get_safe_token(const device_config *device)
|
||||
{
|
||||
assert(device != NULL);
|
||||
assert(device->token != NULL);
|
||||
assert(device->type == NAMCO_52XX);
|
||||
|
||||
return (namco_52xx_state *)device->token;
|
||||
}
|
||||
|
||||
|
||||
|
||||
static TIMER_CALLBACK( namco_52xx_latch_callback )
|
||||
{
|
||||
namco_52xx_state *state = get_safe_token((const device_config *)ptr);
|
||||
state->latched_cmd = param;
|
||||
}
|
||||
|
||||
static READ8_HANDLER( namco_52xx_K_r )
|
||||
{
|
||||
namco_52xx_state *state = get_safe_token(space->cpu->owner);
|
||||
return state->latched_cmd & 0x0f;
|
||||
}
|
||||
|
||||
static READ8_HANDLER( namco_52xx_SI_r )
|
||||
{
|
||||
namco_52xx_state *state = get_safe_token(space->cpu->owner);
|
||||
return devcb_call_read8(&state->si, 0) ? 1 : 0;
|
||||
}
|
||||
|
||||
static READ8_HANDLER( namco_52xx_R0_r )
|
||||
{
|
||||
namco_52xx_state *state = get_safe_token(space->cpu->owner);
|
||||
return devcb_call_read8(&state->romread, state->address) & 0x0f;
|
||||
}
|
||||
|
||||
static READ8_HANDLER( namco_52xx_R1_r )
|
||||
{
|
||||
namco_52xx_state *state = get_safe_token(space->cpu->owner);
|
||||
return devcb_call_read8(&state->romread, state->address) >> 4;
|
||||
}
|
||||
|
||||
|
||||
static WRITE8_HANDLER( namco_52xx_P_w )
|
||||
{
|
||||
namco_52xx_state *state = get_safe_token(space->cpu->owner);
|
||||
discrete_sound_w(state->discrete, NAMCO_52XX_P_DATA(state->basenode), data & 0x0f);
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( namco_52xx_R2_w )
|
||||
{
|
||||
namco_52xx_state *state = get_safe_token(space->cpu->owner);
|
||||
state->address = (state->address & 0xfff0) | ((data & 0xf) << 0);
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( namco_52xx_R3_w )
|
||||
{
|
||||
namco_52xx_state *state = get_safe_token(space->cpu->owner);
|
||||
state->address = (state->address & 0xff0f) | ((data & 0xf) << 4);
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( namco_52xx_O_w )
|
||||
{
|
||||
namco_52xx_state *state = get_safe_token(space->cpu->owner);
|
||||
if (data & 0x10)
|
||||
state->address = (state->address & 0x0fff) | ((data & 0xf) << 12);
|
||||
else
|
||||
state->address = (state->address & 0xf0ff) | ((data & 0xf) << 8);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
static TIMER_CALLBACK( namco_52xx_irq_clear )
|
||||
{
|
||||
namco_52xx_state *state = get_safe_token((const device_config *)ptr);
|
||||
cpu_set_input_line(state->cpu, 0, CLEAR_LINE);
|
||||
}
|
||||
|
||||
WRITE8_DEVICE_HANDLER( namco_52xx_write )
|
||||
{
|
||||
namco_52xx_state *state = get_safe_token(device);
|
||||
|
||||
timer_call_after_resynch(device->machine, (void *)device, data, namco_52xx_latch_callback);
|
||||
|
||||
cpu_set_input_line(state->cpu, 0, ASSERT_LINE);
|
||||
|
||||
// The execution time of one instruction is ~4us, so we must make sure to
|
||||
// give the cpu time to poll the /IRQ input before we clear it.
|
||||
// The input clock to the 06XX interface chip is 64H, that is
|
||||
// 18432000/6/64 = 48kHz, so it makes sense for the irq line to be
|
||||
// asserted for one clock cycle ~= 21us.
|
||||
|
||||
/* the 52xx uses TSTI to check for an interrupt; it also may be handling
|
||||
a timer interrupt, so we need to ensure the IRQ line is held long enough */
|
||||
timer_set(device->machine, ATTOTIME_IN_USEC(5*21), (void *)device, 0, namco_52xx_irq_clear);
|
||||
}
|
||||
|
||||
|
||||
static TIMER_CALLBACK( external_clock_pulse )
|
||||
{
|
||||
namco_52xx_state *state = get_safe_token((const device_config *)ptr);
|
||||
mb88_external_clock_w(state->cpu, 1);
|
||||
mb88_external_clock_w(state->cpu, 0);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
DEVICE INTERFACE
|
||||
***************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START( namco_52xx_map_io, ADDRESS_SPACE_IO, 8 )
|
||||
AM_RANGE(MB88_PORTK, MB88_PORTK) AM_READ(namco_52xx_K_r)
|
||||
AM_RANGE(MB88_PORTO, MB88_PORTO) AM_WRITE(namco_52xx_O_w)
|
||||
AM_RANGE(MB88_PORTP, MB88_PORTP) AM_WRITE(namco_52xx_P_w)
|
||||
AM_RANGE(MB88_PORTSI, MB88_PORTSI) AM_READ(namco_52xx_SI_r)
|
||||
AM_RANGE(MB88_PORTR0, MB88_PORTR0) AM_READ(namco_52xx_R0_r)
|
||||
AM_RANGE(MB88_PORTR1, MB88_PORTR1) AM_READ(namco_52xx_R1_r)
|
||||
AM_RANGE(MB88_PORTR2, MB88_PORTR2) AM_WRITE(namco_52xx_R2_w)
|
||||
AM_RANGE(MB88_PORTR3, MB88_PORTR3) AM_WRITE(namco_52xx_R3_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
static MACHINE_DRIVER_START( namco_52xx )
|
||||
MDRV_CPU_ADD("mcu", MB8843, DERIVED_CLOCK(1,1)) /* parent clock, internally divided by 6 */
|
||||
MDRV_CPU_IO_MAP(namco_52xx_map_io)
|
||||
MACHINE_DRIVER_END
|
||||
|
||||
|
||||
ROM_START( namco_52xx )
|
||||
ROM_REGION( 0x400, "mcu", ROMREGION_LOADBYNAME )
|
||||
ROM_LOAD( "52xx.bin", 0x0000, 0x0400, CRC(3257d11e) SHA1(4883b2fdbc99eb7b9906357fcc53915842c2c186) )
|
||||
ROM_END
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
device start callback
|
||||
-------------------------------------------------*/
|
||||
|
||||
static DEVICE_START( namco_52xx )
|
||||
{
|
||||
namco_52xx_interface *intf = (namco_52xx_interface *)device->static_config;
|
||||
namco_52xx_state *state = get_safe_token(device);
|
||||
astring *tempstring = astring_alloc();
|
||||
|
||||
/* find our CPU */
|
||||
state->cpu = cputag_get_cpu(device->machine, device_build_tag(tempstring, device, "mcu"));
|
||||
assert(state->cpu != NULL);
|
||||
astring_free(tempstring);
|
||||
|
||||
/* find the attached discrete sound device */
|
||||
assert(intf->discrete != NULL);
|
||||
state->discrete = devtag_get_device(device->machine, intf->discrete);
|
||||
assert(state->discrete != NULL);
|
||||
state->basenode = intf->firstnode;
|
||||
|
||||
/* resolve our read/write callbacks */
|
||||
devcb_resolve_read8(&state->romread, &intf->romread, device);
|
||||
devcb_resolve_read8(&state->si, &intf->si, device);
|
||||
|
||||
/* start the external clock */
|
||||
if (intf->extclock != 0)
|
||||
timer_pulse(device->machine, attotime_make(0, intf->extclock), (void *)device, 0, external_clock_pulse);
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
device reset callback
|
||||
-------------------------------------------------*/
|
||||
|
||||
static DEVICE_RESET( namco_52xx )
|
||||
{
|
||||
// namco_52xx_state *state = get_safe_token(device);
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
device get info callback
|
||||
-------------------------------------------------*/
|
||||
|
||||
DEVICE_GET_INFO( namco_52xx )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(namco_52xx_state); break;
|
||||
case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers --- */
|
||||
case DEVINFO_PTR_ROM_REGION: info->romregion = ROM_NAME(namco_52xx); break;
|
||||
case DEVINFO_PTR_MACHINE_CONFIG: info->machine_config = MACHINE_DRIVER_NAME(namco_52xx); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(namco_52xx); break;
|
||||
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(namco_52xx); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case DEVINFO_STR_NAME: strcpy(info->s, "Namco 52xx"); break;
|
||||
case DEVINFO_STR_FAMILY: strcpy(info->s, "Namco I/O"); break;
|
||||
case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
|
||||
case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
|
||||
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
|
||||
}
|
||||
}
|
||||
39
src/mame/audio/namco52.h
Normal file
39
src/mame/audio/namco52.h
Normal file
@ -0,0 +1,39 @@
|
||||
#ifndef NAMCO52_H
|
||||
#define NAMCO52_H
|
||||
|
||||
#include "sound/discrete.h"
|
||||
#include "devcb.h"
|
||||
|
||||
|
||||
typedef struct _namco_52xx_interface namco_52xx_interface;
|
||||
struct _namco_52xx_interface
|
||||
{
|
||||
const char * discrete; /* name of the discrete sound device */
|
||||
int firstnode; /* index of the first node */
|
||||
attoseconds_t extclock; /* external clock period */
|
||||
devcb_read8 romread; /* ROM read handler */
|
||||
devcb_read8 si; /* SI (pin 6) read handler */
|
||||
};
|
||||
|
||||
|
||||
#define MDRV_NAMCO_52XX_ADD(_tag, _clock, _interface) \
|
||||
MDRV_DEVICE_ADD(_tag, NAMCO_52XX, _clock) \
|
||||
MDRV_DEVICE_CONFIG(_interface)
|
||||
|
||||
#define MDRV_NAMCO_52XX_REMOVE(_tag) \
|
||||
MDRV_DEVICE_REMOVE(_tag)
|
||||
|
||||
|
||||
WRITE8_DEVICE_HANDLER( namco_52xx_write );
|
||||
|
||||
|
||||
/* device get info callback */
|
||||
#define NAMCO_52XX DEVICE_GET_INFO_NAME(namco_52xx)
|
||||
DEVICE_GET_INFO( namco_52xx );
|
||||
|
||||
|
||||
/* discrete nodes */
|
||||
#define NAMCO_52XX_P_DATA(base) (base)
|
||||
|
||||
|
||||
#endif /* NAMCO52_H */
|
||||
@ -6,6 +6,7 @@
|
||||
#include "streams.h"
|
||||
#include "sound/filter.h"
|
||||
#include "machine/rescap.h"
|
||||
#include "namco52.h"
|
||||
#include "namco54.h"
|
||||
#include "polepos.h"
|
||||
|
||||
@ -253,7 +254,7 @@ DISCRETE_SOUND_START(polepos)
|
||||
DISCRETE_INPUT_DATA(NAMCO_54XX_0_DATA(NODE_01))
|
||||
DISCRETE_INPUT_DATA(NAMCO_54XX_1_DATA(NODE_01))
|
||||
DISCRETE_INPUT_DATA(NAMCO_54XX_2_DATA(NODE_01))
|
||||
DISCRETE_INPUT_DATA(NAMCO_54XX_P_DATA(NODE_01))
|
||||
DISCRETE_INPUT_DATA(NAMCO_52XX_P_DATA(NODE_04))
|
||||
|
||||
/************************************************
|
||||
* CHANL1 sound
|
||||
@ -312,25 +313,24 @@ DISCRETE_SOUND_START(polepos)
|
||||
/************************************************
|
||||
* CHANL4 sound
|
||||
************************************************/
|
||||
/* disabled until 52XX is emulated */
|
||||
/* this circuit was simulated in SPICE and an equivalent filter circuit generated */
|
||||
DISCRETE_DAC_R1(NODE_50,
|
||||
0, /* ENAB */
|
||||
NAMCO_54XX_P_DATA(NODE_01),
|
||||
1, /* ENAB */
|
||||
NAMCO_52XX_P_DATA(NODE_04),
|
||||
4, /* 4V - unmeasured*/
|
||||
&polepos_52xx_dac)
|
||||
/* fake it so 0 is now vRef */
|
||||
DISCRETE_ADDER2(NODE_51,
|
||||
0, /* ENAB */
|
||||
1, /* ENAB */
|
||||
NODE_50, -POLEPOS_VREF)
|
||||
DISCRETE_FILTER2(NODE_52,
|
||||
0, /* ENAB */
|
||||
1, /* ENAB */
|
||||
NODE_51, /* INP0 */
|
||||
100, /* FREQ */
|
||||
1.0 / 0.3, /* DAMP */
|
||||
DISC_FILTER_HIGHPASS)
|
||||
DISCRETE_FILTER2(NODE_53,
|
||||
0, /* ENAB */
|
||||
1, /* ENAB */
|
||||
NODE_52, /* INP0 */
|
||||
1200, /* FREQ */
|
||||
1.0 / 0.8, /* DAMP */
|
||||
@ -340,7 +340,7 @@ DISCRETE_SOUND_START(polepos)
|
||||
0.5 /* overall filter GAIN */)
|
||||
/* clamp to the maximum of the op-amp shifted by vRef */
|
||||
DISCRETE_CLAMP(POLEPOS_CHANL4_SND,
|
||||
0, /* ENAB */
|
||||
1, /* ENAB */
|
||||
NODE_54, /* IN0 */
|
||||
0, /* MIN */
|
||||
5.0 - OP_AMP_VP_RAIL_OFFSET - POLEPOS_VREF, /* MAX */
|
||||
@ -352,5 +352,5 @@ DISCRETE_SOUND_START(polepos)
|
||||
DISCRETE_OUTPUT(POLEPOS_CHANL1_SND, 32767/2)
|
||||
DISCRETE_OUTPUT(POLEPOS_CHANL2_SND, 32767/2)
|
||||
DISCRETE_OUTPUT(POLEPOS_CHANL3_SND, 32767/2)
|
||||
// DISCRETE_OUTPUT(POLEPOS_CHANL4_SND, 32767/2)
|
||||
DISCRETE_OUTPUT(POLEPOS_CHANL4_SND, 32767/2)
|
||||
DISCRETE_SOUND_END
|
||||
|
||||
@ -704,7 +704,7 @@ TODO:
|
||||
#include "machine/namco53.h"
|
||||
#include "includes/galaga.h"
|
||||
#include "sound/namco.h"
|
||||
#include "sound/namco52.h"
|
||||
#include "audio/namco52.h"
|
||||
#include "machine/rescap.h"
|
||||
#include "sound/samples.h"
|
||||
#include "audio/namco54.h"
|
||||
@ -812,6 +812,37 @@ static const namco_51xx_interface namco_51xx_intf =
|
||||
};
|
||||
|
||||
|
||||
static READ8_DEVICE_HANDLER( namco_52xx_rom_r )
|
||||
{
|
||||
UINT32 length = memory_region_length(device->machine, "52xx");
|
||||
//printf("ROM read %04X\n", offset);
|
||||
if (!(offset & 0x1000))
|
||||
offset = (offset & 0xfff) | 0x0000;
|
||||
else if (!(offset & 0x2000))
|
||||
offset = (offset & 0xfff) | 0x1000;
|
||||
else if (!(offset & 0x4000))
|
||||
offset = (offset & 0xfff) | 0x2000;
|
||||
else if (!(offset & 0x8000))
|
||||
offset = (offset & 0xfff) | 0x3000;
|
||||
return (offset < length) ? memory_region(device->machine, "52xx")[offset] : 0xff;
|
||||
}
|
||||
|
||||
static READ8_DEVICE_HANDLER( namco_52xx_si_r )
|
||||
{
|
||||
/* pulled to GND */
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const namco_52xx_interface namco_52xx_intf =
|
||||
{
|
||||
"discrete", /* name of the discrete sound device */
|
||||
NODE_04, /* index of the first node */
|
||||
ATTOSECONDS_IN_NSEC(PERIOD_OF_555_ASTABLE_NSEC(RES_K(33), RES_K(10), CAP_U(0.0047))), /* external clock rate */
|
||||
DEVCB_HANDLER(namco_52xx_rom_r), /* ROM read handler */
|
||||
DEVCB_HANDLER(namco_52xx_si_r) /* SI (pin 6) read handler */
|
||||
};
|
||||
|
||||
|
||||
static READ8_DEVICE_HANDLER( custom_mod_r )
|
||||
{
|
||||
/* MOD0-2 is connected to K1-3; K0 is left unconnected */
|
||||
@ -1608,20 +1639,6 @@ static const namco_interface namco_config =
|
||||
0 /* stereo */
|
||||
};
|
||||
|
||||
/* Only used by bosco. After filtering the 4V 52xx output,
|
||||
* the signal is 1V, or 25%. The relative volume between
|
||||
* 52xx & 54xx is the same.
|
||||
*/
|
||||
static const namco_52xx_interface namco_52xx_config =
|
||||
{
|
||||
4000, /* Playback frequency - from 555 timer 6M */
|
||||
80, /* High pass filter fc */
|
||||
0.3, /* High pass filter Q */
|
||||
2400, /* Low pass filter fc */
|
||||
0.9, /* Low pass filter Q */
|
||||
.25 /* Combined gain of both filters */
|
||||
};
|
||||
|
||||
static const char *const battles_sample_names[] =
|
||||
{
|
||||
"*battles",
|
||||
@ -1655,10 +1672,11 @@ static MACHINE_DRIVER_START( bosco )
|
||||
MDRV_NAMCO_50XX_ADD("50xx_1", MASTER_CLOCK/12) /* 1.536 MHz */
|
||||
MDRV_NAMCO_50XX_ADD("50xx_2", MASTER_CLOCK/12) /* 1.536 MHz */
|
||||
MDRV_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/12, namco_51xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_52XX_ADD("52xx", MASTER_CLOCK/12, namco_52xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/12, "discrete", NODE_01) /* 1.536 MHz */
|
||||
|
||||
MDRV_NAMCO_06XX_ADD("06xx_0", "maincpu", "51xx", NULL, "50xx_1", "54xx")
|
||||
MDRV_NAMCO_06XX_ADD("06xx_1", "sub", "50xx_2", "namco52", NULL, NULL)
|
||||
MDRV_NAMCO_06XX_ADD("06xx_0", "maincpu", "51xx", NULL, "50xx_1", "54xx")
|
||||
MDRV_NAMCO_06XX_ADD("06xx_1", "sub", "50xx_2", "52xx", NULL, NULL)
|
||||
|
||||
MDRV_WATCHDOG_VBLANK_INIT(8)
|
||||
MDRV_QUANTUM_TIME(HZ(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
|
||||
@ -1689,10 +1707,6 @@ static MACHINE_DRIVER_START( bosco )
|
||||
MDRV_SOUND_CONFIG(namco_config)
|
||||
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.90 * 10.0 / 16.0)
|
||||
|
||||
MDRV_SOUND_ADD("namco52", NAMCO_52XX, MASTER_CLOCK/12) /* 1.536 MHz */
|
||||
MDRV_SOUND_CONFIG(namco_52xx_config)
|
||||
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.90)
|
||||
|
||||
/* discrete circuit on the 54XX outputs */
|
||||
MDRV_SOUND_ADD("discrete", DISCRETE, 0)
|
||||
MDRV_SOUND_CONFIG_DISCRETE(bosco)
|
||||
@ -1958,7 +1972,7 @@ ROM_START( bosco )
|
||||
ROM_LOAD( "prom.1d", 0x0000, 0x0100, CRC(de2316c6) SHA1(0e55c56046331888d1d3f0d9823d2ceb203e7d3f) )
|
||||
ROM_LOAD( "prom.5c", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */
|
||||
|
||||
ROM_REGION( 0x3000, "namco52", 0 ) /* ROMs for digitised speech */
|
||||
ROM_REGION( 0x3000, "52xx", 0 ) /* ROMs for digitised speech */
|
||||
ROM_LOAD( "4900.5n", 0x0000, 0x1000, CRC(09acc978) SHA1(2b264aaeb6eba70ad91593413dca733990e5467b) )
|
||||
ROM_LOAD( "5000.5m", 0x1000, 0x1000, CRC(e571e959) SHA1(9c81d7bec73bc605f7dd9a089171b0f34c4bb09a) )
|
||||
ROM_LOAD( "5100.5l", 0x2000, 0x1000, CRC(17ac9511) SHA1(266f3fae90d2fe38d109096d352863a52b379899) )
|
||||
@ -1997,7 +2011,7 @@ ROM_START( boscoo )
|
||||
ROM_LOAD( "prom.1d", 0x0000, 0x0100, CRC(de2316c6) SHA1(0e55c56046331888d1d3f0d9823d2ceb203e7d3f) )
|
||||
ROM_LOAD( "prom.5c", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */
|
||||
|
||||
ROM_REGION( 0x3000, "namco52", 0 ) /* ROMs for digitised speech */
|
||||
ROM_REGION( 0x3000, "52xx", 0 ) /* ROMs for digitised speech */
|
||||
ROM_LOAD( "4900.5n", 0x0000, 0x1000, CRC(09acc978) SHA1(2b264aaeb6eba70ad91593413dca733990e5467b) )
|
||||
ROM_LOAD( "5000.5m", 0x1000, 0x1000, CRC(e571e959) SHA1(9c81d7bec73bc605f7dd9a089171b0f34c4bb09a) )
|
||||
ROM_LOAD( "5100.5l", 0x2000, 0x1000, CRC(17ac9511) SHA1(266f3fae90d2fe38d109096d352863a52b379899) )
|
||||
@ -2036,7 +2050,7 @@ ROM_START( boscoo2 )
|
||||
ROM_LOAD( "prom.1d", 0x0000, 0x0100, CRC(de2316c6) SHA1(0e55c56046331888d1d3f0d9823d2ceb203e7d3f) )
|
||||
ROM_LOAD( "prom.5c", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */
|
||||
|
||||
ROM_REGION( 0x3000, "namco52", 0 ) /* ROMs for digitised speech */
|
||||
ROM_REGION( 0x3000, "52xx", 0 ) /* ROMs for digitised speech */
|
||||
ROM_LOAD( "4900.5n", 0x0000, 0x1000, CRC(09acc978) SHA1(2b264aaeb6eba70ad91593413dca733990e5467b) )
|
||||
ROM_LOAD( "5000.5m", 0x1000, 0x1000, CRC(e571e959) SHA1(9c81d7bec73bc605f7dd9a089171b0f34c4bb09a) )
|
||||
ROM_LOAD( "5100.5l", 0x2000, 0x1000, CRC(17ac9511) SHA1(266f3fae90d2fe38d109096d352863a52b379899) )
|
||||
@ -2082,7 +2096,7 @@ ROM_START( boscomd )
|
||||
ROM_LOAD( "prom.1d", 0x0000, 0x0100, CRC(de2316c6) SHA1(0e55c56046331888d1d3f0d9823d2ceb203e7d3f) )
|
||||
ROM_LOAD( "prom.5c", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */
|
||||
|
||||
ROM_REGION( 0x3000, "namco52", 0 ) /* ROMs for digitised speech */
|
||||
ROM_REGION( 0x3000, "52xx", 0 ) /* ROMs for digitised speech */
|
||||
ROM_LOAD( "4900.5n", 0x0000, 0x1000, CRC(09acc978) SHA1(2b264aaeb6eba70ad91593413dca733990e5467b) )
|
||||
ROM_LOAD( "5000.5m", 0x1000, 0x1000, CRC(e571e959) SHA1(9c81d7bec73bc605f7dd9a089171b0f34c4bb09a) )
|
||||
ROM_LOAD( "5100.5l", 0x2000, 0x1000, CRC(17ac9511) SHA1(266f3fae90d2fe38d109096d352863a52b379899) )
|
||||
@ -2124,7 +2138,7 @@ ROM_START( boscomdo )
|
||||
ROM_LOAD( "prom.1d", 0x0000, 0x0100, CRC(de2316c6) SHA1(0e55c56046331888d1d3f0d9823d2ceb203e7d3f) )
|
||||
ROM_LOAD( "prom.5c", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */
|
||||
|
||||
ROM_REGION( 0x3000, "namco52", 0 ) /* ROMs for digitised speech */
|
||||
ROM_REGION( 0x3000, "52xx", 0 ) /* ROMs for digitised speech */
|
||||
ROM_LOAD( "4900.5n", 0x0000, 0x1000, CRC(09acc978) SHA1(2b264aaeb6eba70ad91593413dca733990e5467b) )
|
||||
ROM_LOAD( "5000.5m", 0x1000, 0x1000, CRC(e571e959) SHA1(9c81d7bec73bc605f7dd9a089171b0f34c4bb09a) )
|
||||
ROM_LOAD( "5100.5l", 0x2000, 0x1000, CRC(17ac9511) SHA1(266f3fae90d2fe38d109096d352863a52b379899) )
|
||||
|
||||
@ -219,8 +219,8 @@ Notes:
|
||||
#include "machine/namco51.h"
|
||||
#include "machine/namco53.h"
|
||||
#include "sound/namco.h"
|
||||
#include "sound/namco52.h"
|
||||
#include "sound/samples.h"
|
||||
#include "audio/namco52.h"
|
||||
#include "audio/namco54.h"
|
||||
#include "polepos.h"
|
||||
|
||||
@ -379,6 +379,29 @@ static const namco_51xx_interface namco_51xx_intf =
|
||||
};
|
||||
|
||||
|
||||
static READ8_DEVICE_HANDLER( namco_52xx_rom_r )
|
||||
{
|
||||
UINT32 length = memory_region_length(device->machine, "52xx");
|
||||
logerror("ROM @ %04X\n", offset);
|
||||
return (offset < length) ? memory_region(device->machine, "52xx")[offset] : 0xff;
|
||||
}
|
||||
|
||||
static READ8_DEVICE_HANDLER( namco_52xx_si_r )
|
||||
{
|
||||
/* pulled to +5V */
|
||||
return 1;
|
||||
}
|
||||
|
||||
static const namco_52xx_interface namco_52xx_intf =
|
||||
{
|
||||
"discrete", /* name of the discrete sound device */
|
||||
NODE_04, /* index of the first node */
|
||||
0, /* external clock rate */
|
||||
DEVCB_HANDLER(namco_52xx_rom_r), /* ROM read handler */
|
||||
DEVCB_HANDLER(namco_52xx_si_r) /* SI (pin 6) read handler */
|
||||
};
|
||||
|
||||
|
||||
static READ8_DEVICE_HANDLER( namco_53xx_k_r )
|
||||
{
|
||||
/* hardwired to 0 */
|
||||
@ -873,36 +896,6 @@ static const namco_interface namco_config =
|
||||
1 /* stereo */
|
||||
};
|
||||
|
||||
/* The 52xx output is 4Vpp. After filtering it is 2Vpp.
|
||||
* The output of the 54xx is 4Vpp. After filtering it is clamped to +1.5/-2.
|
||||
* So we need to make the 52xx volume 50% of the 54xx volume.
|
||||
* 52xx and 54xx ouputs are mixed together to create an output called GAINx.
|
||||
* This has a total resistance to the final op-amp of 13605 when the unemulated 4066
|
||||
* panning circuit is at full volume. The engine sound has a resistance of 17492.
|
||||
* These values include 250 ohms of the 4066 when needed.
|
||||
* This all means that the engine sound is 77% of the 54xx.
|
||||
*
|
||||
* Jan 13/05 D.R. - not sure about the following info.
|
||||
* The Sound Buffers and Multiplexer circuit on sheet 7B is not emulated.
|
||||
* Basically it is a quadraphonic 16 level mixer with a 4-bit DAC (R81-85).
|
||||
* It mixes/pans the combined 52xx & 54xx output.
|
||||
* The 4 speaker sit down game uses the full quad output.
|
||||
* The 2 speaker stand up game combine RF-RR and LF-LR through the speakers.
|
||||
*
|
||||
* I set the base 54xx level at 80 and the other sounds realtive to that,
|
||||
* to allow headroom when more the one effect is played.
|
||||
*/
|
||||
|
||||
static const namco_52xx_interface namco_52xx_config =
|
||||
{
|
||||
0, /* Use internal Playback frequency */
|
||||
100, /* High pass filter fc */
|
||||
0.3, /* High pass filter Q */
|
||||
1200, /* Low pass filter fc */
|
||||
0.8, /* Low pass filter Q */
|
||||
.5 /* Combined gain of both filters */
|
||||
};
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* Machine driver
|
||||
@ -925,10 +918,11 @@ static MACHINE_DRIVER_START( polepos )
|
||||
MDRV_CPU_VBLANK_INT("screen", irq0_line_assert)
|
||||
|
||||
MDRV_NAMCO_51XX_ADD("51xx", 18432000/12, namco_51xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_52XX_ADD("52xx", 18432000/12, namco_52xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_53XX_ADD("53xx", 18432000/12, namco_53xx_intf) /* 1.536 MHz */
|
||||
MDRV_NAMCO_54XX_ADD("54xx", 18432000/12, "discrete", NODE_01) /* 1.536 MHz */
|
||||
|
||||
MDRV_NAMCO_06XX_ADD("06xx", "maincpu", "51xx", "53xx", "namco52", "54xx")
|
||||
MDRV_NAMCO_06XX_ADD("06xx", "maincpu", "51xx", "53xx", "52xx", "54xx")
|
||||
|
||||
MDRV_WATCHDOG_VBLANK_INIT(16) // 128V clocks the same as VBLANK
|
||||
|
||||
@ -961,11 +955,6 @@ static MACHINE_DRIVER_START( polepos )
|
||||
MDRV_SOUND_ROUTE(0, "lspeaker", 0.80)
|
||||
MDRV_SOUND_ROUTE(1, "rspeaker", 0.80)
|
||||
|
||||
MDRV_SOUND_ADD("namco52", NAMCO_52XX, 24576000/16) /* 1.536 MHz */
|
||||
MDRV_SOUND_CONFIG(namco_52xx_config)
|
||||
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.80)
|
||||
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.80)
|
||||
|
||||
/* discrete circuit on the 54XX outputs */
|
||||
MDRV_SOUND_ADD("discrete", DISCRETE, 0)
|
||||
MDRV_SOUND_CONFIG_DISCRETE(polepos)
|
||||
@ -1053,7 +1042,7 @@ ROM_START( polepos )
|
||||
ROM_LOAD( "136014.110", 0x0000, 0x2000, CRC(b5ad4d5f) SHA1(c07e77a050200d6fe9952031f971ca35f4d15ff8) ) /* engine sound */
|
||||
ROM_LOAD( "136014.111", 0x2000, 0x2000, CRC(8fdd2f6f) SHA1(3818dc94c60cd78c4212ab7a4367cf3d98166ee6) ) /* engine sound */
|
||||
|
||||
ROM_REGION( 0x8000, "namco52", 0 )
|
||||
ROM_REGION( 0x8000, "52xx", 0 )
|
||||
ROM_LOAD( "pp1_11.2e", 0x0000, 0x2000, CRC(45b9bfeb) SHA1(ff8c690471944d414931fb88666594ef608997f8) ) /* voice */
|
||||
ROM_LOAD( "pp1_12.2f", 0x2000, 0x2000, CRC(a31b4be5) SHA1(38298093bb97ea8647fe187359cae05b65e1c616) ) /* voice */
|
||||
ROM_LOAD( "pp1_13.1e", 0x4000, 0x2000, CRC(a4237466) SHA1(88a397276038cc2fc05f2c18472e6b7cef167f2e) ) /* voice */
|
||||
@ -1137,7 +1126,7 @@ ROM_START( poleposa )
|
||||
ROM_LOAD( "136014.110", 0x0000, 0x2000, CRC(b5ad4d5f) SHA1(c07e77a050200d6fe9952031f971ca35f4d15ff8) ) /* engine sound */
|
||||
ROM_LOAD( "136014.111", 0x2000, 0x2000, CRC(8fdd2f6f) SHA1(3818dc94c60cd78c4212ab7a4367cf3d98166ee6) ) /* engine sound */
|
||||
|
||||
ROM_REGION( 0x6000, "namco52", 0 )
|
||||
ROM_REGION( 0x6000, "52xx", 0 )
|
||||
ROM_LOAD( "136014.106", 0x0000, 0x2000, CRC(5b4cf05e) SHA1(52342572940489175607bbf5b6cfd05ee9b0f004) ) /* voice */
|
||||
|
||||
/* unknown or unused (P)ROM data */
|
||||
@ -1216,7 +1205,7 @@ ROM_START( polepos1 )
|
||||
ROM_LOAD( "136014.110", 0x0000, 0x2000, CRC(b5ad4d5f) SHA1(c07e77a050200d6fe9952031f971ca35f4d15ff8) ) /* engine sound */
|
||||
ROM_LOAD( "136014.111", 0x2000, 0x2000, CRC(8fdd2f6f) SHA1(3818dc94c60cd78c4212ab7a4367cf3d98166ee6) ) /* engine sound */
|
||||
|
||||
ROM_REGION( 0x6000, "namco52", 0 )
|
||||
ROM_REGION( 0x6000, "52xx", 0 )
|
||||
ROM_LOAD( "136014.106", 0x0000, 0x2000, CRC(5b4cf05e) SHA1(52342572940489175607bbf5b6cfd05ee9b0f004) ) /* voice */
|
||||
|
||||
/* unknown or unused (P)ROM data */
|
||||
@ -1392,7 +1381,7 @@ ROM_START( topracer )
|
||||
ROM_LOAD( "136014.110", 0x0000, 0x2000, CRC(b5ad4d5f) SHA1(c07e77a050200d6fe9952031f971ca35f4d15ff8) ) /* engine sound */
|
||||
ROM_LOAD( "136014.111", 0x2000, 0x2000, CRC(8fdd2f6f) SHA1(3818dc94c60cd78c4212ab7a4367cf3d98166ee6) ) /* engine sound */
|
||||
|
||||
ROM_REGION( 0x6000, "namco52", 0 )
|
||||
ROM_REGION( 0x6000, "52xx", 0 )
|
||||
ROM_LOAD( "136014.106", 0x0000, 0x2000, CRC(5b4cf05e) SHA1(52342572940489175607bbf5b6cfd05ee9b0f004) ) /* voice */
|
||||
|
||||
/* unknown or unused (P)ROM data */
|
||||
@ -1466,7 +1455,7 @@ ROM_START( topracra )
|
||||
ROM_LOAD( "136014.110", 0x0000, 0x2000, CRC(b5ad4d5f) SHA1(c07e77a050200d6fe9952031f971ca35f4d15ff8) ) /* engine sound */
|
||||
ROM_LOAD( "136014.111", 0x2000, 0x2000, CRC(8fdd2f6f) SHA1(3818dc94c60cd78c4212ab7a4367cf3d98166ee6) ) /* engine sound */
|
||||
|
||||
ROM_REGION( 0x8000, "namco52", 0 )
|
||||
ROM_REGION( 0x8000, "52xx", 0 )
|
||||
ROM_LOAD( "pp1_11.2e", 0x0000, 0x2000, CRC(45b9bfeb) SHA1(ff8c690471944d414931fb88666594ef608997f8) ) /* voice */
|
||||
ROM_LOAD( "pp1_12.2f", 0x2000, 0x2000, CRC(a31b4be5) SHA1(38298093bb97ea8647fe187359cae05b65e1c616) ) /* voice */
|
||||
ROM_LOAD( "pp1_13.1e", 0x4000, 0x2000, CRC(a4237466) SHA1(88a397276038cc2fc05f2c18472e6b7cef167f2e) ) /* voice */
|
||||
@ -1543,7 +1532,7 @@ ROM_START( topracrb )
|
||||
ROM_LOAD( "tr15.a8", 0x0000, 0x2000, CRC(b5ad4d5f) SHA1(c07e77a050200d6fe9952031f971ca35f4d15ff8) ) /* engine sound */
|
||||
ROM_LOAD( "tr16.b9", 0x2000, 0x2000, CRC(8fdd2f6f) SHA1(3818dc94c60cd78c4212ab7a4367cf3d98166ee6) ) /* engine sound */
|
||||
|
||||
ROM_REGION( 0x6000, "namco52", 0 )
|
||||
ROM_REGION( 0x6000, "52xx", 0 )
|
||||
ROM_LOAD( "tr11.b1", 0x0000, 0x2000, CRC(5b4cf05e) SHA1(52342572940489175607bbf5b6cfd05ee9b0f004) ) /* voice */
|
||||
|
||||
/* unknown or unused (P)ROM data */
|
||||
@ -1626,7 +1615,7 @@ ROM_START( polepos2 )
|
||||
ROM_LOAD( "136014.181", 0x0000, 0x2000, CRC(7d93bc1c) SHA1(dad7c0aa24aef593c84e21f7f8858ca7ada86364) ) /* engine sound */
|
||||
ROM_LOAD( "136014.182", 0x2000, 0x2000, CRC(7d93bc1c) SHA1(dad7c0aa24aef593c84e21f7f8858ca7ada86364) ) /* engine sound */
|
||||
|
||||
ROM_REGION( 0x8000, "namco52", 0 )
|
||||
ROM_REGION( 0x8000, "52xx", 0 )
|
||||
ROM_LOAD( "pp1_11.2e", 0x0000, 0x2000, CRC(45b9bfeb) SHA1(ff8c690471944d414931fb88666594ef608997f8) ) /* voice */
|
||||
ROM_LOAD( "pp1_12.2f", 0x2000, 0x2000, CRC(a31b4be5) SHA1(38298093bb97ea8647fe187359cae05b65e1c616) ) /* voice */
|
||||
ROM_LOAD( "pp1_13.1e", 0x4000, 0x2000, CRC(a4237466) SHA1(88a397276038cc2fc05f2c18472e6b7cef167f2e) ) /* voice */
|
||||
@ -1718,7 +1707,7 @@ ROM_START( poleps2a )
|
||||
ROM_LOAD( "136014.181", 0x0000, 0x2000, CRC(7d93bc1c) SHA1(dad7c0aa24aef593c84e21f7f8858ca7ada86364) ) /* engine sound */
|
||||
ROM_LOAD( "136014.182", 0x2000, 0x2000, CRC(7d93bc1c) SHA1(dad7c0aa24aef593c84e21f7f8858ca7ada86364) ) /* engine sound */
|
||||
|
||||
ROM_REGION( 0x6000, "namco52", 0 )
|
||||
ROM_REGION( 0x6000, "52xx", 0 )
|
||||
ROM_LOAD( "136014.106", 0x0000, 0x2000, CRC(5b4cf05e) SHA1(52342572940489175607bbf5b6cfd05ee9b0f004) ) /* voice */
|
||||
|
||||
/* unknown or unused (P)ROM data */
|
||||
@ -1802,7 +1791,7 @@ ROM_START( poleps2b )
|
||||
ROM_LOAD( "136014.181", 0x0000, 0x2000, CRC(7d93bc1c) SHA1(dad7c0aa24aef593c84e21f7f8858ca7ada86364) ) /* engine sound */
|
||||
ROM_LOAD( "136014.182", 0x2000, 0x2000, CRC(7d93bc1c) SHA1(dad7c0aa24aef593c84e21f7f8858ca7ada86364) ) /* engine sound */
|
||||
|
||||
ROM_REGION( 0x6000, "namco52", 0 )
|
||||
ROM_REGION( 0x6000, "52xx", 0 )
|
||||
ROM_LOAD( "136014.106", 0x0000, 0x2000, CRC(5b4cf05e) SHA1(52342572940489175607bbf5b6cfd05ee9b0f004) ) /* voice */
|
||||
|
||||
/* unknown or unused (P)ROM data */
|
||||
|
||||
@ -71,7 +71,7 @@ For the 54XX, see audio/namco54.c
|
||||
#include "machine/namco50.h"
|
||||
#include "machine/namco51.h"
|
||||
#include "machine/namco53.h"
|
||||
#include "sound/namco52.h"
|
||||
#include "audio/namco52.h"
|
||||
#include "audio/namco54.h"
|
||||
|
||||
|
||||
@ -261,6 +261,8 @@ static DEVICE_START( namco_06xx )
|
||||
state->read[devnum] = namco_51xx_read;
|
||||
state->write[devnum] = namco_51xx_write;
|
||||
}
|
||||
else if (type == NAMCO_52XX)
|
||||
state->write[devnum] = namco_52xx_write;
|
||||
else if (type == NAMCO_53XX)
|
||||
{
|
||||
state->read[devnum] = namco_53xx_read;
|
||||
@ -268,8 +270,6 @@ static DEVICE_START( namco_06xx )
|
||||
}
|
||||
else if (type == NAMCO_54XX)
|
||||
state->write[devnum] = namco_54xx_write;
|
||||
else if (type == SOUND && sound_get_type(state->device[devnum]) == SOUND_NAMCO_52XX)
|
||||
state->write[devnum] = namco_52xx_write;
|
||||
else
|
||||
fatalerror("Unknown device type %s connected to Namco 06xx", devtype_get_name(type));
|
||||
}
|
||||
|
||||
@ -113,7 +113,7 @@ TODO:
|
||||
#include "machine/namco50.h"
|
||||
#include "machine/namco51.h"
|
||||
#include "machine/namco53.h"
|
||||
#include "sound/namco52.h"
|
||||
#include "audio/namco52.h"
|
||||
#include "audio/namco54.h"
|
||||
|
||||
|
||||
|
||||
@ -944,6 +944,7 @@ $(MAMEOBJ)/namco.a: \
|
||||
$(MACHINE)/namco50.o \
|
||||
$(MACHINE)/namco51.o \
|
||||
$(MACHINE)/namco53.o \
|
||||
$(AUDIO)/namco52.o \
|
||||
$(AUDIO)/namco54.o \
|
||||
$(AUDIO)/namcoc7x.o \
|
||||
$(VIDEO)/bosco.o \
|
||||
|
||||
Loading…
Reference in New Issue
Block a user