converted c65 and sbc6510 to use modern CIA implementation. nw.

sbc6510 seems to work as before, and c65 is as broken as before.
OTOH amiga family of drivers resisted fiercely to my attempts of conversion, 
so I guess that someone else will have to look at the drivers in order to kill 
the old 6526cia.c code in favor of the modern mos6526.c code (even if
the latter is slower)
This commit is contained in:
Fabio Priuli 2013-06-05 14:28:10 +00:00
parent 636876c2d7
commit 0c11377dde
5 changed files with 34 additions and 66 deletions

View File

@ -53,7 +53,7 @@ bus serial (available in all modes), a Fast and a Burst serial bus
#include "emu.h"
#include "cpu/m6502/m4510.h"
#include "sound/mos6581.h"
#include "machine/6526cia.h"
#include "machine/mos6526.h"
#include "machine/cbmipt.h"
#include "video/vic4567.h"
#include "includes/cbm.h"
@ -204,7 +204,7 @@ PALETTE_INIT_MEMBER(c65_state,c65)
int c65_state::c64_paddle_read( device_t *device, address_space &space, int which )
{
int pot1 = 0xff, pot2 = 0xff, pot3 = 0xff, pot4 = 0xff, temp;
UINT8 cia0porta = mos6526_pa_r(machine().device("cia_0"), space, 0);
UINT8 cia0porta = machine().device<mos6526_device>("cia_0")->pa_r(space, 0);
int controller1 = ioport("CTRLSEL")->read() & 0x07;
int controller2 = ioport("CTRLSEL")->read() & 0x70;
/* Notice that only a single input is defined for Mouse & Lightpen in both ports */
@ -434,8 +434,12 @@ static MACHINE_CONFIG_START( c65, c65_state )
MCFG_QUICKLOAD_ADD("quickload", c65_state, cbm_c65, "p00,prg", CBM_QUICKLOAD_DELAY_SECONDS)
/* cia */
MCFG_LEGACY_MOS6526R1_ADD("cia_0", 3500000, 60, c65_cia0)
MCFG_LEGACY_MOS6526R1_ADD("cia_1", 3500000, 60, c65_cia1)
MCFG_MOS6526_ADD("cia_0", 3500000, 60, WRITELINE(c65_state, c65_cia0_interrupt))
MCFG_MOS6526_PORT_A_CALLBACKS(READ8(c65_state, c65_cia0_port_a_r), NULL)
MCFG_MOS6526_PORT_B_CALLBACKS(READ8(c65_state, c65_cia0_port_b_r), WRITE8(c65_state, c65_cia0_port_b_w), NULL)
MCFG_MOS6526_ADD("cia_1", 3500000, 60, WRITELINE(c65_state, c65_cia1_interrupt))
MCFG_MOS6526_PORT_A_CALLBACKS(READ8(c65_state, c65_cia1_port_a_r), WRITE8(c65_state, c65_cia1_port_a_w))
/* floppy from serial bus */
MCFG_CBM_IEC_ADD(NULL)
@ -465,8 +469,12 @@ static MACHINE_CONFIG_DERIVED( c65pal, c65 )
/* cia */
MCFG_DEVICE_REMOVE("cia_0")
MCFG_DEVICE_REMOVE("cia_1")
MCFG_LEGACY_MOS6526R1_ADD("cia_0", 3500000, 50, c65_cia0)
MCFG_LEGACY_MOS6526R1_ADD("cia_1", 3500000, 50, c65_cia1)
MCFG_MOS6526_ADD("cia_0", 3500000, 50, WRITELINE(c65_state, c65_cia0_interrupt))
MCFG_MOS6526_PORT_A_CALLBACKS(READ8(c65_state, c65_cia0_port_a_r), NULL)
MCFG_MOS6526_PORT_B_CALLBACKS(READ8(c65_state, c65_cia0_port_b_r), WRITE8(c65_state, c65_cia0_port_b_w), NULL)
MCFG_MOS6526_ADD("cia_1", 3500000, 50, WRITELINE(c65_state, c65_cia1_interrupt))
MCFG_MOS6526_PORT_A_CALLBACKS(READ8(c65_state, c65_cia1_port_a_r), WRITE8(c65_state, c65_cia1_port_a_w))
MACHINE_CONFIG_END

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@ -50,7 +50,7 @@ ToDo:
#include "emu.h"
#include "cpu/m6502/m6510.h"
#include "machine/6526cia.h"
#include "machine/mos6526.h"
#include "sound/ay8910.h"
#include "machine/terminal.h"
@ -60,8 +60,8 @@ class sbc6510_state : public driver_device
public:
sbc6510_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_terminal(*this, TERMINAL_TAG) ,
m_maincpu(*this, "maincpu") { }
m_maincpu(*this, "maincpu") ,
m_terminal(*this, TERMINAL_TAG) { }
DECLARE_READ8_MEMBER(a2_r);
DECLARE_WRITE8_MEMBER(a2_w);
@ -72,13 +72,13 @@ public:
UINT8 m_term_data;
UINT8 m_key_row;
UINT8 m_2;
required_device<generic_terminal_device> m_terminal;
virtual void machine_start();
virtual void machine_reset();
protected:
ioport_port *m_io_port[8];
required_device<cpu_device> m_maincpu;
required_device<generic_terminal_device> m_terminal;
};
@ -87,9 +87,9 @@ static ADDRESS_MAP_START( sbc6510_mem, AS_PROGRAM, 8, sbc6510_state )
AM_RANGE(0x0000, 0x0001) AM_RAM
AM_RANGE(0x0002, 0x0002) AM_READWRITE(a2_r,a2_w)
AM_RANGE(0x0003, 0xdfff) AM_RAM
AM_RANGE(0xE000, 0xE00F) AM_MIRROR(0x1f0) AM_DEVREADWRITE_LEGACY("cia6526", mos6526_r, mos6526_w)
AM_RANGE(0xE800, 0xE800) AM_MIRROR(0x1ff) AM_DEVWRITE("ay8910", ay8910_device, address_w)
AM_RANGE(0xEA00, 0xEA00) AM_MIRROR(0x1ff) AM_DEVREADWRITE("ay8910", ay8910_device, data_r, data_w)
AM_RANGE(0xe000, 0xe00f) AM_MIRROR(0x1f0) AM_DEVREADWRITE("cia6526", mos6526_device, read, write)
AM_RANGE(0xe800, 0xe800) AM_MIRROR(0x1ff) AM_DEVWRITE("ay8910", ay8910_device, address_w)
AM_RANGE(0xea00, 0xea00) AM_MIRROR(0x1ff) AM_DEVREADWRITE("ay8910", ay8910_device, data_r, data_w)
AM_RANGE(0xf000, 0xffff) AM_ROM
ADDRESS_MAP_END
@ -255,18 +255,6 @@ WRITE8_MEMBER( sbc6510_state::key_w )
m_key_row = data;
}
const legacy_mos6526_interface cia_intf =
{
DEVCB_CPU_INPUT_LINE("maincpu", M6510_IRQ_LINE), // irq
DEVCB_NULL, // pc (timer related) not connected
DEVCB_NULL, // cnt (serial related) not connected
DEVCB_NULL, // sp (serial related) not connected
DEVCB_NULL, // port A in
DEVCB_DRIVER_MEMBER(sbc6510_state, key_w), // port A out
DEVCB_DRIVER_MEMBER(sbc6510_state, key_r), // port B in
DEVCB_NULL // port B out
};
static MACHINE_CONFIG_START( sbc6510, sbc6510_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu",M6510, XTAL_1MHz)
@ -282,7 +270,9 @@ static MACHINE_CONFIG_START( sbc6510, sbc6510_state )
MCFG_SOUND_CONFIG(sbc6510_ay_interface)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
MCFG_LEGACY_MOS6526R1_ADD("cia6526", XTAL_1MHz, 50, cia_intf)
MCFG_MOS6526_ADD("cia6526", XTAL_1MHz, 50, INPUTLINE("maincpu", M6510_IRQ_LINE))
MCFG_MOS6526_PORT_A_CALLBACKS(NULL, WRITE8(sbc6510_state, key_w))
MCFG_MOS6526_PORT_B_CALLBACKS(READ8(sbc6510_state, key_r), NULL, NULL)
MACHINE_CONFIG_END
/* ROM definition */

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@ -6,7 +6,6 @@
#include "emu.h"
#include "machine/cbm_snqk.h"
#include "cpu/m6502/m8502.h"
#include "machine/6526cia.h"
#include "machine/c64exp.h"
#include "machine/c64user.h"
#include "machine/cbmiec.h"

View File

@ -7,7 +7,7 @@
#ifndef C65_H_
#define C65_H_
#include "machine/6526cia.h"
#include "machine/mos6526.h"
#include "machine/cbmiec.h"
#include "imagedev/cartslot.h"
#include "imagedev/snapquik.h"
@ -117,6 +117,7 @@ public:
expansion_ram_t m_expansion_ram;
int m_io_on;
int m_io_dc00_on;
int m_cia0_irq, m_cia1_irq;
DECLARE_DRIVER_INIT(c65);
DECLARE_DRIVER_INIT(c65pal);
@ -181,10 +182,6 @@ public:
required_device<ram_device> m_ram;
};
/*----------- defined in machine/c65.c -----------*/
extern const legacy_mos6526_interface c65_cia0;
extern const legacy_mos6526_interface c65_cia1;
MACHINE_CONFIG_EXTERN( c64_cartslot );
#endif /* C65_H_ */

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@ -40,14 +40,11 @@
void c65_state::c65_nmi( )
{
device_t *cia_1 = machine().device("cia_1");
int cia1irq = mos6526_irq_r(cia_1);
if (m_nmilevel != (ioport("SPECIAL")->read() & 0x80) || cia1irq) /* KEY_RESTORE */
if (m_nmilevel != (ioport("SPECIAL")->read() & 0x80) || m_cia1_irq) /* KEY_RESTORE */
{
m_maincpu->set_input_line(INPUT_LINE_NMI, (ioport("SPECIAL")->read() & 0x80) || cia1irq);
m_maincpu->set_input_line(INPUT_LINE_NMI, (ioport("SPECIAL")->read() & 0x80) || m_cia1_irq);
m_nmilevel = (ioport("SPECIAL")->read() & 0x80) || cia1irq;
m_nmilevel = (ioport("SPECIAL")->read() & 0x80) || m_cia1_irq;
}
}
@ -70,7 +67,7 @@ void c65_state::c65_nmi( )
READ8_MEMBER(c65_state::c65_cia0_port_a_r)
{
UINT8 cia0portb = mos6526_pb_r(machine().device("cia_0"), space, 0);
UINT8 cia0portb = machine().device<mos6526_device>("cia_0")->pb_r(space, 0);
return cbm_common_cia0_port_a_r(machine().device("cia_0"), cia0portb);
}
@ -78,7 +75,7 @@ READ8_MEMBER(c65_state::c65_cia0_port_a_r)
READ8_MEMBER(c65_state::c65_cia0_port_b_r)
{
UINT8 value = 0xff;
UINT8 cia0porta = mos6526_pa_r(machine().device("cia_0"), space, 0);
UINT8 cia0porta = machine().device<mos6526_device>("cia_0")->pa_r(space, 0);
value &= cbm_common_cia0_port_b_r(machine().device("cia_0"), cia0porta);
@ -108,34 +105,22 @@ void c65_state::c65_irq( int level )
/* is this correct for c65 as well as c64? */
WRITE_LINE_MEMBER(c65_state::c65_cia0_interrupt)
{
m_cia0_irq = state;
c65_irq(state || m_vicirq);
}
/* is this correct for c65 as well as c64? */
WRITE_LINE_MEMBER(c65_state::c65_vic_interrupt)
{
device_t *cia_0 = machine().device("cia_0");
#if 1
if (state != m_vicirq)
{
c65_irq (state || mos6526_irq_r(cia_0));
c65_irq (state || m_cia0_irq);
m_vicirq = state;
}
#endif
}
const legacy_mos6526_interface c65_cia0 =
{
DEVCB_DRIVER_LINE_MEMBER(c65_state, c65_cia0_interrupt),
DEVCB_NULL, /* pc_func */
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(c65_state,c65_cia0_port_a_r),
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(c65_state,c65_cia0_port_b_r),
DEVCB_DRIVER_MEMBER(c65_state,c65_cia0_port_b_w)
};
/*
* CIA 1 - Port A
* bit 7 serial bus data input
@ -185,21 +170,10 @@ WRITE8_MEMBER(c65_state::c65_cia1_port_a_w)
WRITE_LINE_MEMBER(c65_state::c65_cia1_interrupt)
{
m_cia1_irq = state;
c65_nmi();
}
const legacy_mos6526_interface c65_cia1 =
{
DEVCB_DRIVER_LINE_MEMBER(c65_state,c65_cia1_interrupt),
DEVCB_NULL, /* pc_func */
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(c65_state,c65_cia1_port_a_r),
DEVCB_DRIVER_MEMBER(c65_state,c65_cia1_port_a_w),
DEVCB_NULL,
DEVCB_NULL
};
/***********************************************
Memory Handlers