From 0c3f8a22b5294aef919214ac2d05775ca8003ab0 Mon Sep 17 00:00:00 2001 From: yz70s Date: Sun, 25 Jun 2017 14:57:18 +0200 Subject: [PATCH] lpci/i82371sb.cpp: add boot_state_hook devcb to receive writes to debug port 0x80 (nw) --- src/devices/bus/lpci/i82371sb.cpp | 7 +++++++ src/devices/bus/lpci/i82371sb.h | 7 +++++++ 2 files changed, 14 insertions(+) diff --git a/src/devices/bus/lpci/i82371sb.cpp b/src/devices/bus/lpci/i82371sb.cpp index 4b3744721df..3ea30c60061 100644 --- a/src/devices/bus/lpci/i82371sb.cpp +++ b/src/devices/bus/lpci/i82371sb.cpp @@ -30,6 +30,7 @@ DEFINE_DEVICE_TYPE(I82371SB, i82371sb_device, "i82371sb", "Intel 82371SB") i82371sb_device::i82371sb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : southbridge_device(mconfig, I82371SB, tag, owner, clock) , pci_device_interface( mconfig, *this ) + , m_boot_state_hook(*this) { } @@ -147,6 +148,7 @@ void i82371sb_device::pci_write(pci_bus_device *pcibus, int function, int offset void i82371sb_device::device_start() { southbridge_device::device_start(); + m_boot_state_hook.resolve_safe(); /* setup save states */ save_item(NAME(m_regs)); } @@ -179,3 +181,8 @@ void i82371sb_device::device_reset() m_regs[2][0x08] = 0x0c030000; m_regs[2][0x0c] = 0x00000000; } + +void i82371sb_device::port80_debug_write(uint8_t value) +{ + m_boot_state_hook((offs_t)0, value); +} \ No newline at end of file diff --git a/src/devices/bus/lpci/i82371sb.h b/src/devices/bus/lpci/i82371sb.h index c9d71a817b7..e4add02c206 100644 --- a/src/devices/bus/lpci/i82371sb.h +++ b/src/devices/bus/lpci/i82371sb.h @@ -24,6 +24,8 @@ public: // construction/destruction i82371sb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + template static devcb_base &set_boot_state_hook(device_t &device, Object &&cb) { return downcast(device).m_boot_state_hook.set_callback(std::forward(cb)); } + virtual uint32_t pci_read(pci_bus_device *pcibus, int function, int offset, uint32_t mem_mask) override; virtual void pci_write(pci_bus_device *pcibus, int function, int offset, uint32_t data, uint32_t mem_mask) override; @@ -31,6 +33,7 @@ protected: // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void port80_debug_write(uint8_t value) override; uint32_t pci_isa_r(device_t *busdevice, int offset, uint32_t mem_mask); void pci_isa_w(device_t *busdevice, int offset, uint32_t data, uint32_t mem_mask); @@ -42,10 +45,14 @@ protected: void pci_usb_w(device_t *busdevice, int offset, uint32_t data, uint32_t mem_mask); private: uint32_t m_regs[3][0x400/4]; + devcb_write8 m_boot_state_hook; }; // device type definition extern const device_type I82371SB; DECLARE_DEVICE_TYPE(I82371SB, i82371sb_device) +#define MCFG_I82371SB_BOOT_STATE_HOOK(_devcb) \ + devcb = &i82371sb_device::set_boot_state_hook(*device, DEVCB_##_devcb); + #endif // MAME_BUS_LPCI_I82371SB_H