mirror of
https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
m6801: Use devcb for ports; remove I/O space and MCFG_ macros (nw)
This commit is contained in:
AJR
parent
e6ec242699
commit
0d01ce1c25
@ -58,19 +58,6 @@ void adam_digital_data_pack_device::adam_ddp_mem(address_map &map)
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map(0xf800, 0xffff).rom().region(M6801_TAG, 0);
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}
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//-------------------------------------------------
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// ADDRESS_MAP( adam_ddp_io )
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//-------------------------------------------------
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void adam_digital_data_pack_device::adam_ddp_io(address_map &map)
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{
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map(M6801_PORT1, M6801_PORT1).w(FUNC(adam_digital_data_pack_device::p1_w));
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map(M6801_PORT2, M6801_PORT2).rw(FUNC(adam_digital_data_pack_device::p2_r), FUNC(adam_digital_data_pack_device::p2_w));
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map(M6801_PORT3, M6801_PORT3).noprw(); // Multiplexed Address/Data
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map(M6801_PORT4, M6801_PORT4).r(FUNC(adam_digital_data_pack_device::p4_r)).nopw();
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}
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static const struct CassetteOptions adam_cassette_options =
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{
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2, /* channels */
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@ -84,9 +71,13 @@ static const struct CassetteOptions adam_cassette_options =
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//-------------------------------------------------
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MACHINE_CONFIG_START(adam_digital_data_pack_device::device_add_mconfig)
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MCFG_DEVICE_ADD(M6801_TAG, M6801, XTAL(4'000'000))
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MCFG_DEVICE_PROGRAM_MAP(adam_ddp_mem)
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MCFG_DEVICE_IO_MAP(adam_ddp_io)
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M6801(config, m_maincpu, XTAL(4'000'000));
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m_maincpu->set_addrmap(AS_PROGRAM, &adam_digital_data_pack_device::adam_ddp_mem);
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m_maincpu->out_p1_cb().set(FUNC(adam_digital_data_pack_device::p1_w));
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m_maincpu->in_p2_cb().set(FUNC(adam_digital_data_pack_device::p2_r));
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m_maincpu->out_p2_cb().set(FUNC(adam_digital_data_pack_device::p2_w));
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// Port 3 = Multiplexed Address/Data
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m_maincpu->in_p4_cb().set(FUNC(adam_digital_data_pack_device::p4_r));
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MCFG_CASSETTE_ADD("cassette")
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MCFG_CASSETTE_FORMATS(coleco_adam_cassette_formats)
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@ -43,7 +43,7 @@ protected:
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virtual void adamnet_reset_w(int state) override;
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private:
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required_device<cpu_device> m_maincpu;
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required_device<m6801_cpu_device> m_maincpu;
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required_device<cassette_image_device> m_ddp0;
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required_device<cassette_image_device> m_ddp1;
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@ -56,7 +56,6 @@ private:
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DECLARE_WRITE8_MEMBER( p2_w );
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DECLARE_READ8_MEMBER( p4_r );
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void adam_ddp_io(address_map &map);
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void adam_ddp_mem(address_map &map);
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};
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@ -96,19 +96,6 @@ void adam_fdc_device::adam_fdc_mem(address_map &map)
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}
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//-------------------------------------------------
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// ADDRESS_MAP( fdc6801_io )
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//-------------------------------------------------
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void adam_fdc_device::adam_fdc_io(address_map &map)
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{
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map(M6801_PORT1, M6801_PORT1).rw(FUNC(adam_fdc_device::p1_r), FUNC(adam_fdc_device::p1_w));
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map(M6801_PORT2, M6801_PORT2).rw(FUNC(adam_fdc_device::p2_r), FUNC(adam_fdc_device::p2_w));
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map(M6801_PORT3, M6801_PORT3);
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map(M6801_PORT4, M6801_PORT4);
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}
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//-------------------------------------------------
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// floppy_format_type floppy_formats
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//-------------------------------------------------
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@ -131,7 +118,10 @@ void adam_fdc_device::device_add_mconfig(machine_config &config)
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{
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M6801(config, m_maincpu, 4_MHz_XTAL),
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m_maincpu->set_addrmap(AS_PROGRAM, &adam_fdc_device::adam_fdc_mem);
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m_maincpu->set_addrmap(AS_IO, &adam_fdc_device::adam_fdc_io);
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m_maincpu->in_p1_cb().set(FUNC(adam_fdc_device::p1_r));
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m_maincpu->out_p1_cb().set(FUNC(adam_fdc_device::p1_w));
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m_maincpu->in_p2_cb().set(FUNC(adam_fdc_device::p2_r));
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m_maincpu->out_p2_cb().set(FUNC(adam_fdc_device::p2_w));
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WD2793(config, m_fdc, 4_MHz_XTAL / 4);
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m_fdc->intrq_wr_callback().set_inputline(m_maincpu, INPUT_LINE_NMI);
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@ -44,7 +44,7 @@ protected:
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virtual void adamnet_reset_w(int state) override;
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private:
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required_device<cpu_device> m_maincpu;
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required_device<m6801_cpu_device> m_maincpu;
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required_device<wd2793_device> m_fdc;
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required_device<floppy_connector> m_connector;
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floppy_image_device *m_floppy;
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@ -59,7 +59,6 @@ private:
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DECLARE_READ8_MEMBER( p2_r );
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DECLARE_WRITE8_MEMBER( p2_w );
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void adam_fdc_io(address_map &map);
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void adam_fdc_mem(address_map &map);
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};
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@ -58,28 +58,22 @@ void adam_keyboard_device::adam_kb_mem(address_map &map)
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}
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//-------------------------------------------------
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// ADDRESS_MAP( adam_kb_io )
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//-------------------------------------------------
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void adam_keyboard_device::adam_kb_io(address_map &map)
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{
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map(M6801_PORT1, M6801_PORT1).r(FUNC(adam_keyboard_device::p1_r));
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map(M6801_PORT2, M6801_PORT2).rw(FUNC(adam_keyboard_device::p2_r), FUNC(adam_keyboard_device::p2_w));
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map(M6801_PORT3, M6801_PORT3).rw(FUNC(adam_keyboard_device::p3_r), FUNC(adam_keyboard_device::p3_w));
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map(M6801_PORT4, M6801_PORT4).rw(FUNC(adam_keyboard_device::p4_r), FUNC(adam_keyboard_device::p4_w));
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}
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//-------------------------------------------------
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// device_add_mconfig - add device configuration
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//-------------------------------------------------
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MACHINE_CONFIG_START(adam_keyboard_device::device_add_mconfig)
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MCFG_DEVICE_ADD(M6801_TAG, M6801, XTAL(4'000'000))
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MCFG_DEVICE_PROGRAM_MAP(adam_kb_mem)
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MCFG_DEVICE_IO_MAP(adam_kb_io)
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MACHINE_CONFIG_END
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void adam_keyboard_device::device_add_mconfig(machine_config &config)
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{
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M6801(config, m_maincpu, XTAL(4'000'000));
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m_maincpu->set_addrmap(AS_PROGRAM, &adam_keyboard_device::adam_kb_mem);
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m_maincpu->in_p1_cb().set(FUNC(adam_keyboard_device::p1_r));
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m_maincpu->in_p2_cb().set(FUNC(adam_keyboard_device::p2_r));
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m_maincpu->out_p2_cb().set(FUNC(adam_keyboard_device::p2_w));
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m_maincpu->in_p3_cb().set(FUNC(adam_keyboard_device::p3_r));
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m_maincpu->out_p3_cb().set(FUNC(adam_keyboard_device::p3_w));
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m_maincpu->in_p4_cb().set(FUNC(adam_keyboard_device::p4_r));
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m_maincpu->out_p4_cb().set(FUNC(adam_keyboard_device::p4_w));
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}
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//-------------------------------------------------
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@ -42,12 +42,11 @@ protected:
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virtual void adamnet_reset_w(int state) override;
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private:
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required_device<cpu_device> m_maincpu;
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required_device<m6801_cpu_device> m_maincpu;
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required_ioport_array<13> m_y;
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uint16_t m_key_y;
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// not really public
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DECLARE_READ8_MEMBER( p1_r );
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DECLARE_READ8_MEMBER( p2_r );
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DECLARE_WRITE8_MEMBER( p2_w );
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@ -56,7 +55,6 @@ private:
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DECLARE_READ8_MEMBER( p4_r );
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DECLARE_WRITE8_MEMBER( p4_w );
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void adam_kb_io(address_map &map);
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void adam_kb_mem(address_map &map);
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};
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@ -58,29 +58,22 @@ void adam_printer_device::adam_prn_mem(address_map &map)
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}
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//-------------------------------------------------
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// ADDRESS_MAP( adam_prn_io )
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//-------------------------------------------------
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void adam_printer_device::adam_prn_io(address_map &map)
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{
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map(M6801_PORT1, M6801_PORT1).w(FUNC(adam_printer_device::p1_w));
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map(M6801_PORT2, M6801_PORT2).rw(FUNC(adam_printer_device::p2_r), FUNC(adam_printer_device::p2_w));
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map(M6801_PORT3, M6801_PORT3).r(FUNC(adam_printer_device::p3_r));
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map(M6801_PORT4, M6801_PORT4).rw(FUNC(adam_printer_device::p4_r), FUNC(adam_printer_device::p4_w));
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}
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//-------------------------------------------------
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// device_add_mconfig - add device configuration
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//-------------------------------------------------
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MACHINE_CONFIG_START(adam_printer_device::device_add_mconfig)
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MCFG_DEVICE_ADD(M6801_TAG, M6801, XTAL(4'000'000))
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MCFG_DEVICE_PROGRAM_MAP(adam_prn_mem)
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MCFG_DEVICE_IO_MAP(adam_prn_io)
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MCFG_DEVICE_DISABLE() // TODO
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MACHINE_CONFIG_END
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void adam_printer_device::device_add_mconfig(machine_config &config)
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{
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M6801(config, m_maincpu, XTAL(4'000'000));
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m_maincpu->set_addrmap(AS_PROGRAM, &adam_printer_device::adam_prn_mem);
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m_maincpu->out_p1_cb().set(FUNC(adam_printer_device::p1_w));
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m_maincpu->in_p2_cb().set(FUNC(adam_printer_device::p2_r));
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m_maincpu->out_p2_cb().set(FUNC(adam_printer_device::p2_w));
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m_maincpu->in_p3_cb().set(FUNC(adam_printer_device::p3_r));
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m_maincpu->in_p4_cb().set(FUNC(adam_printer_device::p4_r));
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m_maincpu->out_p4_cb().set(FUNC(adam_printer_device::p4_w));
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m_maincpu->set_disable(); // TODO
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}
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@ -41,7 +41,7 @@ protected:
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virtual void adamnet_reset_w(int state) override;
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private:
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required_device<cpu_device> m_maincpu;
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required_device<m6801_cpu_device> m_maincpu;
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DECLARE_WRITE8_MEMBER( p1_w );
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DECLARE_READ8_MEMBER( p2_r );
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@ -50,7 +50,6 @@ private:
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DECLARE_READ8_MEMBER( p4_r );
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DECLARE_WRITE8_MEMBER( p4_w );
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void adam_prn_io(address_map &map);
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void adam_prn_mem(address_map &map);
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};
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@ -60,27 +60,18 @@ void adam_spi_device::adam_spi_mem(address_map &map)
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}
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//-------------------------------------------------
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// ADDRESS_MAP( adam_spi_io )
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//-------------------------------------------------
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void adam_spi_device::adam_spi_io(address_map &map)
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{
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map(M6801_PORT2, M6801_PORT2).rw(FUNC(adam_spi_device::p2_r), FUNC(adam_spi_device::p2_w));
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}
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//-------------------------------------------------
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// device_add_mconfig - add device configuration
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//-------------------------------------------------
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MACHINE_CONFIG_START(adam_spi_device::device_add_mconfig)
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MCFG_DEVICE_ADD(M6801_TAG, M6801, XTAL(4'000'000))
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MCFG_DEVICE_PROGRAM_MAP(adam_spi_mem)
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MCFG_DEVICE_IO_MAP(adam_spi_io)
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MCFG_DEVICE_DISABLE()
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M6801(config, m_maincpu, XTAL(4'000'000));
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m_maincpu->set_addrmap(AS_PROGRAM, &adam_spi_device::adam_spi_mem);
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m_maincpu->in_p2_cb().set(FUNC(adam_spi_device::p2_r));
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m_maincpu->out_p2_cb().set(FUNC(adam_spi_device::p2_w));
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m_maincpu->set_disable();
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MCFG_DEVICE_ADD(MC2661_TAG, MC2661, XTAL(4'915'200))
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MC2661(config, MC2661_TAG, XTAL(4'915'200));
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RS232_PORT(config, RS232_TAG, default_rs232_devices, nullptr);
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@ -44,12 +44,11 @@ protected:
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virtual void adamnet_reset_w(int state) override;
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private:
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required_device<cpu_device> m_maincpu;
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required_device<m6801_cpu_device> m_maincpu;
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DECLARE_READ8_MEMBER( p2_r );
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DECLARE_WRITE8_MEMBER( p2_w );
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void adam_spi_io(address_map &map);
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void adam_spi_mem(address_map &map);
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};
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@ -35,12 +35,6 @@ void epson_pf10_device::cpu_mem(address_map &map)
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map(0xe000, 0xffff).rom().region("maincpu", 0);
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}
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void epson_pf10_device::cpu_io(address_map &map)
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{
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map(M6801_PORT1, M6801_PORT1).rw(FUNC(epson_pf10_device::port1_r), FUNC(epson_pf10_device::port1_w));
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map(M6801_PORT2, M6801_PORT2).rw(FUNC(epson_pf10_device::port2_r), FUNC(epson_pf10_device::port2_w));
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}
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//-------------------------------------------------
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// rom_region - device-specific ROM region
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@ -67,10 +61,13 @@ static void pf10_floppies(device_slot_interface &device)
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}
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MACHINE_CONFIG_START(epson_pf10_device::device_add_mconfig)
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MCFG_DEVICE_ADD("maincpu", HD6303Y, XTAL(4'915'200)) // HD63A03XF
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MCFG_DEVICE_PROGRAM_MAP(cpu_mem)
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MCFG_DEVICE_IO_MAP(cpu_io)
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MCFG_M6801_SER_TX(WRITELINE(DEVICE_SELF, epson_pf10_device, hd6303_tx_w))
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HD6303Y(config, m_cpu, XTAL(4'915'200)); // HD63A03XF
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m_cpu->set_addrmap(AS_PROGRAM, &epson_pf10_device::cpu_mem);
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m_cpu->in_p1_cb().set(FUNC(epson_pf10_device::port1_r));
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m_cpu->out_p1_cb().set(FUNC(epson_pf10_device::port1_w));
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m_cpu->in_p2_cb().set(FUNC(epson_pf10_device::port2_r));
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m_cpu->out_p2_cb().set(FUNC(epson_pf10_device::port2_w));
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m_cpu->out_ser_tx_cb().set(FUNC(epson_pf10_device::hd6303_tx_w));
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UPD765A(config, m_fdc, false, true);
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MCFG_FLOPPY_DRIVE_ADD("upd765a:0", pf10_floppies, "smd165", floppy_image_device::default_floppy_formats)
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@ -62,7 +62,6 @@ private:
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DECLARE_READ8_MEMBER( port2_r );
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DECLARE_WRITE8_MEMBER( port2_w );
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void cpu_io(address_map &map);
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void cpu_mem(address_map &map);
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required_device<hd6303y_cpu_device> m_cpu;
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@ -276,7 +276,8 @@ m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, const char *ta
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m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const op_func *insn, const uint8_t *cycles, address_map_constructor internal)
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: m6800_cpu_device(mconfig, type, tag, owner, clock, insn, cycles, internal)
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, m_io_config("io", ENDIANNESS_BIG, 8, 9, 0)
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, m_in_port_func{{*this}, {*this}, {*this}, {*this}}
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, m_out_port_func{{*this}, {*this}, {*this}, {*this}}
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, m_out_sc2_func(*this)
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, m_out_sertx_func(*this)
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{
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@ -312,13 +313,6 @@ hd6303y_cpu_device::hd6303y_cpu_device(const machine_config &mconfig, const char
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{
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}
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device_memory_interface::space_config_vector m6801_cpu_device::memory_space_config() const
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{
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auto r = m6800_cpu_device::memory_space_config();
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r.emplace_back(std::make_pair(AS_IO, &m_io_config));
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return r;
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}
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void m6801_cpu_device::m6800_check_irq2()
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{
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if ((m_tcsr & (TCSR_EICI|TCSR_ICF)) == (TCSR_EICI|TCSR_ICF))
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@ -359,10 +353,10 @@ void m6801_cpu_device::check_timer_event()
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TAKE_OCI;
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// if output on P21 is enabled, let's do it
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if (m_port2_ddr & 2)
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if (m_port_ddr[1] & 2)
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{
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m_port2_data &= ~2;
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m_port2_data |= (m_tcsr & TCSR_OLVL) << 1;
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m_port_data[1] &= ~2;
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m_port_data[1] |= (m_tcsr & TCSR_OLVL) << 1;
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m_port2_written = 1;
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write_port2();
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}
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@ -443,7 +437,7 @@ void m6801_cpu_device::set_rmcr(uint8_t data)
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int m6801_cpu_device::m6800_rx()
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{
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return (m_io->read_byte(M6801_PORT2) & M6801_PORT2_IO3) >> 3;
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return (m_in_port_func[1]() & M6801_PORT2_IO3) >> 3;
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}
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void m6801_cpu_device::serial_transmit()
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@ -453,7 +447,7 @@ void m6801_cpu_device::serial_transmit()
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if (m_trcsr & M6801_TRCSR_TE)
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{
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||||
// force Port 2 bit 4 as output
|
||||
m_port2_ddr |= M6801_PORT2_IO4;
|
||||
m_port_ddr[1] |= M6801_PORT2_IO4;
|
||||
|
||||
switch (m_txstate)
|
||||
{
|
||||
@ -656,9 +650,9 @@ void m6801_cpu_device::execute_set_input(int irqline, int state)
|
||||
if (!m_port3_latched && (m_p3csr & M6801_P3CSR_LE))
|
||||
{
|
||||
// latch input data to port 3
|
||||
m_port3_data = (m_io->read_byte(M6801_PORT3) & (m_port3_ddr ^ 0xff)) | (m_port3_data & m_port3_ddr);
|
||||
m_port_data[2] = (m_in_port_func[2]() & (m_port_ddr[2] ^ 0xff)) | (m_port_data[2] & m_port_ddr[2]);
|
||||
m_port3_latched = 1;
|
||||
LOGPORT("Latched Port 3 Data: %02x\n", m_port3_data);
|
||||
LOGPORT("Latched Port 3 Data: %02x\n", m_port_data[2]);
|
||||
|
||||
// set IS3 flag bit
|
||||
m_p3csr |= M6801_P3CSR_IS3_FLAG;
|
||||
@ -696,32 +690,33 @@ void m6801_cpu_device::execute_set_input(int irqline, int state)
|
||||
}
|
||||
|
||||
|
||||
void m6801_cpu_device::device_resolve_objects()
|
||||
{
|
||||
for (auto &cb : m_in_port_func)
|
||||
cb.resolve_safe(0xff);
|
||||
for (auto &cb : m_out_port_func)
|
||||
cb.resolve_safe();
|
||||
m_out_sc2_func.resolve_safe();
|
||||
m_out_sertx_func.resolve_safe();
|
||||
}
|
||||
|
||||
|
||||
void m6801_cpu_device::device_start()
|
||||
{
|
||||
m6800_cpu_device::device_start();
|
||||
|
||||
m_io = &space(AS_IO);
|
||||
|
||||
m_out_sc2_func.resolve_safe();
|
||||
m_out_sertx_func.resolve_safe();
|
||||
m_sci_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(m6801_cpu_device::sci_tick),this));
|
||||
|
||||
m_port4_ddr = 0;
|
||||
m_port4_data = 0;
|
||||
m_port_ddr[3] = 0;
|
||||
m_port_data[3] = 0;
|
||||
m_input_capture = 0;
|
||||
m_rdr = 0;
|
||||
m_tdr = 0;
|
||||
m_rmcr = 0;
|
||||
m_ram_ctrl = 0;
|
||||
|
||||
save_item(NAME(m_port1_ddr));
|
||||
save_item(NAME(m_port2_ddr));
|
||||
save_item(NAME(m_port3_ddr));
|
||||
save_item(NAME(m_port4_ddr));
|
||||
save_item(NAME(m_port1_data));
|
||||
save_item(NAME(m_port2_data));
|
||||
save_item(NAME(m_port3_data));
|
||||
save_item(NAME(m_port4_data));
|
||||
save_item(NAME(m_port_ddr));
|
||||
save_item(NAME(m_port_data));
|
||||
save_item(NAME(m_p3csr));
|
||||
save_item(NAME(m_tcsr));
|
||||
save_item(NAME(m_pending_tcsr));
|
||||
@ -767,10 +762,10 @@ void m6801_cpu_device::device_reset()
|
||||
m_irq_state[M6801_TIN_LINE] = 0;
|
||||
m_sc1_state = 0;
|
||||
|
||||
m_port1_ddr = 0x00;
|
||||
m_port2_ddr = 0x00;
|
||||
m_port3_ddr = 0x00;
|
||||
m_port1_data = 0;
|
||||
m_port_ddr[0] = 0x00;
|
||||
m_port_ddr[1] = 0x00;
|
||||
m_port_ddr[2] = 0x00;
|
||||
m_port_data[0] = 0;
|
||||
m_p3csr = 0x00;
|
||||
m_p3csr_is3_flag_read = 0;
|
||||
m_port2_written = 0;
|
||||
@ -805,12 +800,12 @@ void m6801_cpu_device::write_port2()
|
||||
{
|
||||
if (!m_port2_written) return;
|
||||
|
||||
uint8_t data = m_port2_data;
|
||||
uint8_t ddr = m_port2_ddr & 0x1f;
|
||||
uint8_t data = m_port_data[1];
|
||||
uint8_t ddr = m_port_ddr[1] & 0x1f;
|
||||
|
||||
if ((ddr != 0x1f) && ddr)
|
||||
{
|
||||
data = (m_port2_data & ddr) | (ddr ^ 0xff);
|
||||
data = (m_port_data[1] & ddr) | (ddr ^ 0xff);
|
||||
}
|
||||
|
||||
if (m_trcsr & M6801_TRCSR_TE)
|
||||
@ -820,7 +815,7 @@ void m6801_cpu_device::write_port2()
|
||||
|
||||
data &= 0x1f;
|
||||
|
||||
m_io->write_byte(M6801_PORT2, data);
|
||||
m_out_port_func[1](data);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -845,27 +840,27 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
|
||||
switch (offset)
|
||||
{
|
||||
case IO_P1DDR:
|
||||
data = m_port1_ddr;
|
||||
data = m_port_ddr[0];
|
||||
break;
|
||||
|
||||
case IO_P2DDR:
|
||||
data = m_port2_ddr;
|
||||
data = m_port_ddr[1];
|
||||
break;
|
||||
|
||||
case IO_P1DATA:
|
||||
if(m_port1_ddr == 0xff)
|
||||
data = m_port1_data;
|
||||
if(m_port_ddr[0] == 0xff)
|
||||
data = m_port_data[0];
|
||||
else
|
||||
data = (m_io->read_byte(M6801_PORT1) & (m_port1_ddr ^ 0xff))
|
||||
| (m_port1_data & m_port1_ddr);
|
||||
data = (m_in_port_func[0]() & (m_port_ddr[0] ^ 0xff))
|
||||
| (m_port_data[0] & m_port_ddr[0]);
|
||||
break;
|
||||
|
||||
case IO_P2DATA:
|
||||
if(m_port2_ddr == 0xff)
|
||||
data = m_port2_data;
|
||||
if(m_port_ddr[1] == 0xff)
|
||||
data = m_port_data[1];
|
||||
else
|
||||
data = (m_io->read_byte(M6801_PORT2) & (m_port2_ddr ^ 0xff))
|
||||
| (m_port2_data & m_port2_ddr);
|
||||
data = (m_in_port_func[1]() & (m_port_ddr[1] ^ 0xff))
|
||||
| (m_port_data[1] & m_port_ddr[1]);
|
||||
break;
|
||||
|
||||
case IO_P3DDR:
|
||||
@ -873,7 +868,7 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
|
||||
break;
|
||||
|
||||
case IO_P4DDR:
|
||||
data = m_port4_ddr;
|
||||
data = m_port_ddr[3];
|
||||
break;
|
||||
|
||||
case IO_P3DATA:
|
||||
@ -892,11 +887,11 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
|
||||
}
|
||||
}
|
||||
|
||||
if ((m_p3csr & M6801_P3CSR_LE) || (m_port3_ddr == 0xff))
|
||||
data = m_port3_data;
|
||||
if ((m_p3csr & M6801_P3CSR_LE) || (m_port_ddr[2] == 0xff))
|
||||
data = m_port_data[2];
|
||||
else
|
||||
data = (m_io->read_byte(M6801_PORT3) & (m_port3_ddr ^ 0xff))
|
||||
| (m_port3_data & m_port3_ddr);
|
||||
data = (m_in_port_func[2]() & (m_port_ddr[2] ^ 0xff))
|
||||
| (m_port_data[2] & m_port_ddr[2]);
|
||||
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
@ -910,11 +905,11 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
|
||||
break;
|
||||
|
||||
case IO_P4DATA:
|
||||
if(m_port4_ddr == 0xff)
|
||||
data = m_port4_data;
|
||||
if(m_port_ddr[3] == 0xff)
|
||||
data = m_port_data[3];
|
||||
else
|
||||
data = (m_io->read_byte(M6801_PORT4) & (m_port4_ddr ^ 0xff))
|
||||
| (m_port4_data & m_port4_ddr);
|
||||
data = (m_in_port_func[3]() & (m_port_ddr[3] ^ 0xff))
|
||||
| (m_port_data[3] & m_port_ddr[3]);
|
||||
break;
|
||||
|
||||
case IO_TCSR:
|
||||
@ -1055,22 +1050,19 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
|
||||
case IO_P1DDR:
|
||||
LOGPORT("Port 1 Data Direction Register: %02x\n", data);
|
||||
|
||||
if (m_port1_ddr != data)
|
||||
if (m_port_ddr[0] != data)
|
||||
{
|
||||
m_port1_ddr = data;
|
||||
if(m_port1_ddr == 0xff)
|
||||
m_io->write_byte(M6801_PORT1,m_port1_data);
|
||||
else
|
||||
m_io->write_byte(M6801_PORT1,(m_port1_data & m_port1_ddr) | (m_port1_ddr ^ 0xff));
|
||||
m_port_ddr[0] = data;
|
||||
m_out_port_func[0]((m_port_data[0] & m_port_ddr[0]) | (m_port_ddr[0] ^ 0xff));
|
||||
}
|
||||
break;
|
||||
|
||||
case IO_P2DDR:
|
||||
LOGPORT("Port 2 Data Direction Register: %02x\n", data);
|
||||
|
||||
if (m_port2_ddr != data)
|
||||
if (m_port_ddr[1] != data)
|
||||
{
|
||||
m_port2_ddr = data;
|
||||
m_port_ddr[1] = data;
|
||||
write_port2();
|
||||
}
|
||||
break;
|
||||
@ -1078,17 +1070,14 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
|
||||
case IO_P1DATA:
|
||||
LOGPORT("Port 1 Data Register: %02x\n", data);
|
||||
|
||||
m_port1_data = data;
|
||||
if(m_port1_ddr == 0xff)
|
||||
m_io->write_byte(M6801_PORT1,m_port1_data);
|
||||
else
|
||||
m_io->write_byte(M6801_PORT1,(m_port1_data & m_port1_ddr) | (m_port1_ddr ^ 0xff));
|
||||
m_port_data[0] = data;
|
||||
m_out_port_func[0]((m_port_data[0] & m_port_ddr[0]) | (m_port_ddr[0] ^ 0xff));
|
||||
break;
|
||||
|
||||
case IO_P2DATA:
|
||||
LOGPORT("Port 2 Data Register: %02x\n", data);
|
||||
|
||||
m_port2_data = data;
|
||||
m_port_data[1] = data;
|
||||
m_port2_written = 1;
|
||||
write_port2();
|
||||
break;
|
||||
@ -1096,26 +1085,20 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
|
||||
case IO_P3DDR:
|
||||
LOGPORT("Port 3 Data Direction Register: %02x\n", data);
|
||||
|
||||
if (m_port3_ddr != data)
|
||||
if (m_port_ddr[2] != data)
|
||||
{
|
||||
m_port3_ddr = data;
|
||||
if(m_port3_ddr == 0xff)
|
||||
m_io->write_byte(M6801_PORT3,m_port3_data);
|
||||
else
|
||||
m_io->write_byte(M6801_PORT3,(m_port3_data & m_port3_ddr) | (m_port3_ddr ^ 0xff));
|
||||
m_port_ddr[2] = data;
|
||||
m_out_port_func[2]((m_port_data[2] & m_port_ddr[2]) | (m_port_ddr[2] ^ 0xff));
|
||||
}
|
||||
break;
|
||||
|
||||
case IO_P4DDR:
|
||||
LOGPORT("Port 4 Data Direction Register: %02x\n", data);
|
||||
|
||||
if (m_port4_ddr != data)
|
||||
if (m_port_ddr[3] != data)
|
||||
{
|
||||
m_port4_ddr = data;
|
||||
if(m_port4_ddr == 0xff)
|
||||
m_io->write_byte(M6801_PORT4,m_port4_data);
|
||||
else
|
||||
m_io->write_byte(M6801_PORT4,(m_port4_data & m_port4_ddr) | (m_port4_ddr ^ 0xff));
|
||||
m_port_ddr[3] = data;
|
||||
m_out_port_func[3]((m_port_data[3] & m_port_ddr[3]) | (m_port_ddr[3] ^ 0xff));
|
||||
}
|
||||
break;
|
||||
|
||||
@ -1134,11 +1117,8 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
|
||||
set_os3(ASSERT_LINE);
|
||||
}
|
||||
|
||||
m_port3_data = data;
|
||||
if(m_port3_ddr == 0xff)
|
||||
m_io->write_byte(M6801_PORT3,m_port3_data);
|
||||
else
|
||||
m_io->write_byte(M6801_PORT3,(m_port3_data & m_port3_ddr) | (m_port3_ddr ^ 0xff));
|
||||
m_port_data[2] = data;
|
||||
m_out_port_func[2]((m_port_data[2] & m_port_ddr[2]) | (m_port_ddr[2] ^ 0xff));
|
||||
|
||||
if (m_p3csr & M6801_P3CSR_OSS)
|
||||
{
|
||||
@ -1149,11 +1129,8 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
|
||||
case IO_P4DATA:
|
||||
LOGPORT("Port 4 Data Register: %02x\n", data);
|
||||
|
||||
m_port4_data = data;
|
||||
if(m_port4_ddr == 0xff)
|
||||
m_io->write_byte(M6801_PORT4,m_port4_data);
|
||||
else
|
||||
m_io->write_byte(M6801_PORT4,(m_port4_data & m_port4_ddr) | (m_port4_ddr ^ 0xff));
|
||||
m_port_data[3] = data;
|
||||
m_out_port_func[3]((m_port_data[3] & m_port_ddr[3]) | (m_port_ddr[3] ^ 0xff));
|
||||
break;
|
||||
|
||||
case IO_TCSR:
|
||||
|
||||
@ -41,40 +41,33 @@ enum
|
||||
M6801_MODE_7
|
||||
};
|
||||
|
||||
enum
|
||||
{
|
||||
M6801_PORT1 = 0x100,
|
||||
M6801_PORT2,
|
||||
M6801_PORT3,
|
||||
M6801_PORT4
|
||||
};
|
||||
|
||||
|
||||
#define MCFG_M6801_SC2(_devcb) \
|
||||
downcast<m6801_cpu_device &>(*device).set_out_sc2_func(DEVCB_##_devcb);
|
||||
#define MCFG_M6801_SER_TX(_devcb) \
|
||||
downcast<m6801_cpu_device &>(*device).set_out_sertx_func(DEVCB_##_devcb);
|
||||
|
||||
|
||||
class m6801_cpu_device : public m6800_cpu_device
|
||||
{
|
||||
public:
|
||||
m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// configuration helpers
|
||||
template<class Object> devcb_base &set_out_sc2_func(Object &&cb) { return m_out_sc2_func.set_callback(std::forward<Object>(cb)); }
|
||||
template<class Object> devcb_base &set_out_sertx_func(Object &&cb) { return m_out_sertx_func.set_callback(std::forward<Object>(cb)); }
|
||||
auto in_p1_cb() { return m_in_port_func[0].bind(); }
|
||||
auto out_p1_cb() { return m_out_port_func[0].bind(); }
|
||||
auto in_p2_cb() { return m_in_port_func[1].bind(); }
|
||||
auto out_p2_cb() { return m_out_port_func[1].bind(); }
|
||||
auto in_p3_cb() { return m_in_port_func[2].bind(); }
|
||||
auto out_p3_cb() { return m_out_port_func[2].bind(); }
|
||||
auto in_p4_cb() { return m_in_port_func[3].bind(); }
|
||||
auto out_p4_cb() { return m_out_port_func[3].bind(); }
|
||||
|
||||
auto out_sc2_cb() { return m_out_sc2_func.bind(); }
|
||||
auto out_ser_tx_cb() { return m_out_sertx_func.bind(); }
|
||||
|
||||
DECLARE_READ8_MEMBER( m6801_io_r );
|
||||
DECLARE_WRITE8_MEMBER( m6801_io_w );
|
||||
|
||||
void m6801_clock_serial();
|
||||
|
||||
void m6803_mem(address_map &map);
|
||||
protected:
|
||||
m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal = address_map_constructor());
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_resolve_objects() override;
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
@ -83,28 +76,20 @@ protected:
|
||||
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); }
|
||||
virtual void execute_set_input(int inputnum, int state) override;
|
||||
|
||||
// device_memory_interface overrides
|
||||
virtual space_config_vector memory_space_config() const override;
|
||||
|
||||
// device_disasm_interface overrides
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
address_space_config m_io_config;
|
||||
void m6803_mem(address_map &map);
|
||||
|
||||
devcb_read8 m_in_port_func[4];
|
||||
devcb_write8 m_out_port_func[4];
|
||||
|
||||
devcb_write_line m_out_sc2_func;
|
||||
devcb_write_line m_out_sertx_func;
|
||||
|
||||
address_space *m_io;
|
||||
|
||||
/* internal registers */
|
||||
uint8_t m_port1_ddr;
|
||||
uint8_t m_port2_ddr;
|
||||
uint8_t m_port3_ddr;
|
||||
uint8_t m_port4_ddr;
|
||||
uint8_t m_port1_data;
|
||||
uint8_t m_port2_data;
|
||||
uint8_t m_port3_data;
|
||||
uint8_t m_port4_data;
|
||||
uint8_t m_port_ddr[4];
|
||||
uint8_t m_port_data[4];
|
||||
uint8_t m_p3csr; // Port 3 Control/Status Register
|
||||
uint8_t m_tcsr; /* Timer Control and Status Register */
|
||||
uint8_t m_pending_tcsr; /* pending IRQ flag for clear IRQflag process */
|
||||
|
||||
@ -66,12 +66,6 @@ void mpu401_device::mpu401_map(address_map &map)
|
||||
map(0xf000, 0xffff).rom().region(ROM_TAG, 0);
|
||||
}
|
||||
|
||||
void mpu401_device::mpu401_io_map(address_map &map)
|
||||
{
|
||||
map(M6801_PORT1, M6801_PORT1).rw(FUNC(mpu401_device::port1_r), FUNC(mpu401_device::port1_w));
|
||||
map(M6801_PORT2, M6801_PORT2).rw(FUNC(mpu401_device::port2_r), FUNC(mpu401_device::port2_w));
|
||||
}
|
||||
|
||||
ROM_START( mpu401 )
|
||||
ROM_REGION(0x1000, ROM_TAG, 0)
|
||||
ROM_LOAD( "roland__6801v0b55p__15179222.bin", 0x000000, 0x001000, CRC(65d3a151) SHA1(00efbfb96aeb997b69bb16981c6751d3c784bb87) ) /* Mask MCU; Label: "Roland // 6801V0B55P // 5A1 JAPAN // 15179222"; This is the final version (1.5A) of the mpu401 firmware; version is located at offsets 0x649 (0x15) and 0x64f (0x01) */
|
||||
@ -88,10 +82,13 @@ DEFINE_DEVICE_TYPE(MPU401, mpu401_device, "mpu401", "Roland MPU-401 I/O box")
|
||||
//-------------------------------------------------
|
||||
|
||||
MACHINE_CONFIG_START(mpu401_device::device_add_mconfig)
|
||||
MCFG_DEVICE_ADD(M6801_TAG, M6801, 4000000) /* 4 MHz as per schematics */
|
||||
MCFG_DEVICE_PROGRAM_MAP(mpu401_map)
|
||||
MCFG_DEVICE_IO_MAP(mpu401_io_map)
|
||||
MCFG_M6801_SER_TX(WRITELINE(MIDIOUT_TAG, midi_port_device, write_txd))
|
||||
M6801(config, m_ourcpu, 4000000); /* 4 MHz as per schematics */
|
||||
m_ourcpu->set_addrmap(AS_PROGRAM, &mpu401_device::mpu401_map);
|
||||
m_ourcpu->in_p1_cb().set(FUNC(mpu401_device::port1_r));
|
||||
m_ourcpu->out_p1_cb().set(FUNC(mpu401_device::port1_w));
|
||||
m_ourcpu->in_p2_cb().set(FUNC(mpu401_device::port2_r));
|
||||
m_ourcpu->out_p2_cb().set(FUNC(mpu401_device::port2_w));
|
||||
m_ourcpu->out_ser_tx_cb().set(MIDIOUT_TAG, FUNC(midi_port_device::write_txd));
|
||||
|
||||
MCFG_MIDI_PORT_ADD(MIDIIN_TAG, midiin_slot, "midiin")
|
||||
MCFG_MIDI_RX_HANDLER(WRITELINE(DEVICE_SELF, mpu401_device, midi_rx_w))
|
||||
|
||||
@ -43,7 +43,6 @@ private:
|
||||
DECLARE_READ8_MEMBER(port2_r);
|
||||
DECLARE_WRITE8_MEMBER(port2_w);
|
||||
|
||||
void mpu401_io_map(address_map &map);
|
||||
void mpu401_map(address_map &map);
|
||||
|
||||
required_device<m6801_cpu_device> m_ourcpu;
|
||||
|
||||
@ -383,12 +383,6 @@ void irem_audio_device::m62_sound_map(address_map &map)
|
||||
}
|
||||
|
||||
|
||||
void irem_audio_device::irem_sound_portmap(address_map &map)
|
||||
{
|
||||
map(M6801_PORT1, M6801_PORT1).rw(FUNC(irem_audio_device::m6803_port1_r), FUNC(irem_audio_device::m6803_port1_w));
|
||||
map(M6801_PORT2, M6801_PORT2).rw(FUNC(irem_audio_device::m6803_port2_r), FUNC(irem_audio_device::m6803_port2_w));
|
||||
}
|
||||
|
||||
/*
|
||||
* Original recordings:
|
||||
*
|
||||
@ -407,9 +401,12 @@ void irem_audio_device::irem_sound_portmap(address_map &map)
|
||||
MACHINE_CONFIG_START(m62_audio_device::device_add_mconfig)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("iremsound", M6803, XTAL(3'579'545)) /* verified on pcb */
|
||||
MCFG_DEVICE_PROGRAM_MAP(m62_sound_map)
|
||||
MCFG_DEVICE_IO_MAP(irem_sound_portmap)
|
||||
m6803_cpu_device &cpu(M6803(config, m_cpu, XTAL(3'579'545))); /* verified on pcb */
|
||||
cpu.set_addrmap(AS_PROGRAM, &m62_audio_device::m62_sound_map);
|
||||
cpu.in_p1_cb().set(FUNC(m62_audio_device::m6803_port1_r));
|
||||
cpu.out_p1_cb().set(FUNC(m62_audio_device::m6803_port1_w));
|
||||
cpu.in_p2_cb().set(FUNC(m62_audio_device::m6803_port2_r));
|
||||
cpu.out_p2_cb().set(FUNC(m62_audio_device::m6803_port2_w));
|
||||
|
||||
/* sound hardware */
|
||||
SPEAKER(config, "mono").front_center();
|
||||
@ -477,9 +474,12 @@ MACHINE_CONFIG_END
|
||||
MACHINE_CONFIG_START(m52_soundc_audio_device::device_add_mconfig)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("iremsound", M6803, XTAL(3'579'545)) /* verified on pcb */
|
||||
MCFG_DEVICE_IO_MAP(irem_sound_portmap)
|
||||
MCFG_DEVICE_PROGRAM_MAP(m52_small_sound_map)
|
||||
m6803_cpu_device &cpu(M6803(config, m_cpu, XTAL(3'579'545))); /* verified on pcb */
|
||||
cpu.set_addrmap(AS_PROGRAM, &m52_soundc_audio_device::m52_small_sound_map);
|
||||
cpu.in_p1_cb().set(FUNC(m52_soundc_audio_device::m6803_port1_r));
|
||||
cpu.out_p1_cb().set(FUNC(m52_soundc_audio_device::m6803_port1_w));
|
||||
cpu.in_p2_cb().set(FUNC(m52_soundc_audio_device::m6803_port2_r));
|
||||
cpu.out_p2_cb().set(FUNC(m52_soundc_audio_device::m6803_port2_w));
|
||||
|
||||
/* sound hardware */
|
||||
SPEAKER(config, "mono").front_center();
|
||||
@ -510,9 +510,12 @@ MACHINE_CONFIG_END
|
||||
MACHINE_CONFIG_START(m52_large_audio_device::device_add_mconfig) /* 10 yard fight */
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("iremsound", M6803, XTAL(3'579'545)) /* verified on pcb */
|
||||
MCFG_DEVICE_PROGRAM_MAP(m52_large_sound_map)
|
||||
MCFG_DEVICE_IO_MAP(irem_sound_portmap)
|
||||
m6803_cpu_device &cpu(M6803(config, m_cpu, XTAL(3'579'545))); /* verified on pcb */
|
||||
cpu.set_addrmap(AS_PROGRAM, &m52_large_audio_device::m52_large_sound_map);
|
||||
cpu.in_p1_cb().set(FUNC(m52_large_audio_device::m6803_port1_r));
|
||||
cpu.out_p1_cb().set(FUNC(m52_large_audio_device::m6803_port1_w));
|
||||
cpu.in_p2_cb().set(FUNC(m52_large_audio_device::m6803_port2_r));
|
||||
cpu.out_p2_cb().set(FUNC(m52_large_audio_device::m6803_port2_w));
|
||||
|
||||
/* sound hardware */
|
||||
SPEAKER(config, "mono").front_center();
|
||||
|
||||
@ -890,19 +890,6 @@ void adam_state::m6801_mem(address_map &map)
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// ADDRESS_MAP( m6801_io )
|
||||
//-------------------------------------------------
|
||||
|
||||
void adam_state::m6801_io(address_map &map)
|
||||
{
|
||||
map(M6801_PORT1, M6801_PORT1).w(FUNC(adam_state::m6801_p1_w));
|
||||
map(M6801_PORT2, M6801_PORT2).rw(FUNC(adam_state::m6801_p2_r), FUNC(adam_state::m6801_p2_w));
|
||||
map(M6801_PORT3, M6801_PORT3).rw(FUNC(adam_state::m6801_p3_r), FUNC(adam_state::m6801_p3_w));
|
||||
map(M6801_PORT4, M6801_PORT4).w(FUNC(adam_state::m6801_p4_w));
|
||||
}
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// INPUT PORTS
|
||||
@ -1045,10 +1032,15 @@ MACHINE_CONFIG_START(adam_state::adam)
|
||||
MCFG_DEVICE_PROGRAM_MAP(adam_mem)
|
||||
MCFG_DEVICE_IO_MAP(adam_io)
|
||||
|
||||
MCFG_DEVICE_ADD(M6801_TAG, M6801, XTAL(4'000'000))
|
||||
MCFG_DEVICE_PROGRAM_MAP(m6801_mem)
|
||||
MCFG_DEVICE_IO_MAP(m6801_io)
|
||||
MCFG_M6801_SC2(WRITELINE(*this, adam_state, os3_w))
|
||||
M6801(config, m_netcpu, XTAL(4'000'000));
|
||||
m_netcpu->set_addrmap(AS_PROGRAM, &adam_state::m6801_mem);
|
||||
m_netcpu->out_p1_cb().set(FUNC(adam_state::m6801_p1_w));
|
||||
m_netcpu->in_p2_cb().set(FUNC(adam_state::m6801_p2_r));
|
||||
m_netcpu->out_p2_cb().set(FUNC(adam_state::m6801_p2_w));
|
||||
m_netcpu->in_p3_cb().set(FUNC(adam_state::m6801_p3_r));
|
||||
m_netcpu->out_p3_cb().set(FUNC(adam_state::m6801_p3_w));
|
||||
m_netcpu->out_p4_cb().set(FUNC(adam_state::m6801_p4_w));
|
||||
m_netcpu->out_sc2_cb().set(FUNC(adam_state::os3_w));
|
||||
MCFG_QUANTUM_PERFECT_CPU(M6801_TAG)
|
||||
|
||||
// video hardware
|
||||
|
||||
@ -466,19 +466,6 @@ void fp_state::sound_mem(address_map &map)
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// ADDRESS_MAP( sound_io )
|
||||
//-------------------------------------------------
|
||||
|
||||
void fp_state::sound_io(address_map &map)
|
||||
{
|
||||
map(M6801_PORT1, M6801_PORT1);
|
||||
map(M6801_PORT2, M6801_PORT2);
|
||||
map(M6801_PORT3, M6801_PORT3);
|
||||
map(M6801_PORT4, M6801_PORT4);
|
||||
}
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// INPUT PORTS
|
||||
@ -587,7 +574,6 @@ MACHINE_CONFIG_START(fp_state::fp)
|
||||
|
||||
MCFG_DEVICE_ADD(HD63B01V1_TAG, HD6301, 2000000)
|
||||
MCFG_DEVICE_PROGRAM_MAP(sound_mem)
|
||||
MCFG_DEVICE_IO_MAP(sound_io)
|
||||
MCFG_DEVICE_DISABLE()
|
||||
|
||||
/* video hardware */
|
||||
|
||||
@ -1212,19 +1212,6 @@ void st_state::ikbd_map(address_map &map)
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// ADDRESS_MAP( ikbd_io_map )
|
||||
//-------------------------------------------------
|
||||
|
||||
void st_state::ikbd_io_map(address_map &map)
|
||||
{
|
||||
map(M6801_PORT1, M6801_PORT1).r(FUNC(st_state::ikbd_port1_r));
|
||||
map(M6801_PORT2, M6801_PORT2).rw(FUNC(st_state::ikbd_port2_r), FUNC(st_state::ikbd_port2_w));
|
||||
map(M6801_PORT3, M6801_PORT3).w(FUNC(st_state::ikbd_port3_w));
|
||||
map(M6801_PORT4, M6801_PORT4).rw(FUNC(st_state::ikbd_port4_r), FUNC(st_state::ikbd_port4_w));
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// ADDRESS_MAP( st_map )
|
||||
//-------------------------------------------------
|
||||
@ -2007,6 +1994,18 @@ static void atari_floppies(device_slot_interface &device)
|
||||
// MACHINE CONFIGURATION
|
||||
//**************************************************************************
|
||||
|
||||
void st_state::keyboard(machine_config &config)
|
||||
{
|
||||
hd6301_cpu_device &ikbd(HD6301(config, HD6301V1_TAG, Y2/8));
|
||||
ikbd.set_addrmap(AS_PROGRAM, &st_state::ikbd_map);
|
||||
ikbd.in_p1_cb().set(FUNC(st_state::ikbd_port1_r));
|
||||
ikbd.in_p2_cb().set(FUNC(st_state::ikbd_port2_r));
|
||||
ikbd.out_p2_cb().set(FUNC(st_state::ikbd_port2_w));
|
||||
ikbd.out_p3_cb().set(FUNC(st_state::ikbd_port3_w));
|
||||
ikbd.in_p4_cb().set(FUNC(st_state::ikbd_port4_r));
|
||||
ikbd.out_p4_cb().set(FUNC(st_state::ikbd_port4_w));
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// MACHINE_CONFIG( st )
|
||||
//-------------------------------------------------
|
||||
@ -2017,9 +2016,7 @@ MACHINE_CONFIG_START(st_state::st)
|
||||
MCFG_DEVICE_PROGRAM_MAP(st_map)
|
||||
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DRIVER(st_state,atarist_int_ack)
|
||||
|
||||
MCFG_DEVICE_ADD(HD6301V1_TAG, HD6301, Y2/8)
|
||||
MCFG_DEVICE_PROGRAM_MAP(ikbd_map)
|
||||
MCFG_DEVICE_IO_MAP(ikbd_io_map)
|
||||
keyboard(config);
|
||||
|
||||
// video hardware
|
||||
MCFG_SCREEN_ADD(SCREEN_TAG, RASTER)
|
||||
@ -2110,9 +2107,7 @@ MACHINE_CONFIG_START(megast_state::megast)
|
||||
MCFG_DEVICE_PROGRAM_MAP(megast_map)
|
||||
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DRIVER(st_state,atarist_int_ack)
|
||||
|
||||
MCFG_DEVICE_ADD(HD6301V1_TAG, HD6301, Y2/8)
|
||||
MCFG_DEVICE_PROGRAM_MAP(ikbd_map)
|
||||
MCFG_DEVICE_IO_MAP(ikbd_io_map)
|
||||
keyboard(config);
|
||||
|
||||
// video hardware
|
||||
MCFG_SCREEN_ADD(SCREEN_TAG, RASTER)
|
||||
@ -2204,9 +2199,7 @@ MACHINE_CONFIG_START(ste_state::ste)
|
||||
MCFG_DEVICE_PROGRAM_MAP(ste_map)
|
||||
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DRIVER(st_state,atarist_int_ack)
|
||||
|
||||
MCFG_DEVICE_ADD(HD6301V1_TAG, HD6301, Y2/8)
|
||||
MCFG_DEVICE_PROGRAM_MAP(ikbd_map)
|
||||
MCFG_DEVICE_IO_MAP(ikbd_io_map)
|
||||
keyboard(config);
|
||||
|
||||
// video hardware
|
||||
MCFG_SCREEN_ADD(SCREEN_TAG, RASTER)
|
||||
|
||||
@ -197,20 +197,6 @@ void baraduke_state::mcu_map(address_map &map)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(baraduke_state::readFF)
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
void baraduke_state::mcu_port_map(address_map &map)
|
||||
{
|
||||
map(M6801_PORT1, M6801_PORT1).r(FUNC(baraduke_state::inputport_r)); /* input ports read */
|
||||
map(M6801_PORT1, M6801_PORT1).w(FUNC(baraduke_state::inputport_select_w)); /* input port select */
|
||||
map(M6801_PORT2, M6801_PORT2).r(FUNC(baraduke_state::readFF)); /* leds won't work otherwise */
|
||||
map(M6801_PORT2, M6801_PORT2).w(FUNC(baraduke_state::baraduke_lamps_w)); /* lamps */
|
||||
}
|
||||
|
||||
|
||||
|
||||
static INPUT_PORTS_START( baraduke )
|
||||
PORT_START("DSWA")
|
||||
@ -384,9 +370,12 @@ MACHINE_CONFIG_START(baraduke_state::baraduke)
|
||||
MCFG_DEVICE_ADD("maincpu", MC6809E, XTAL(49'152'000)/32) // 68A09E
|
||||
MCFG_DEVICE_PROGRAM_MAP(baraduke_map)
|
||||
|
||||
MCFG_DEVICE_ADD("mcu", HD63701, XTAL(49'152'000)/8)
|
||||
MCFG_DEVICE_PROGRAM_MAP(mcu_map)
|
||||
MCFG_DEVICE_IO_MAP(mcu_port_map)
|
||||
hd63701_cpu_device &mcu(HD63701(config, m_mcu, XTAL(49'152'000)/8));
|
||||
mcu.set_addrmap(AS_PROGRAM, &baraduke_state::mcu_map);
|
||||
mcu.in_p1_cb().set(FUNC(baraduke_state::inputport_r)); /* input ports read */
|
||||
mcu.out_p1_cb().set(FUNC(baraduke_state::inputport_select_w)); /* input port select */
|
||||
mcu.in_p2_cb().set_constant(0xff); /* leds won't work otherwise */
|
||||
mcu.out_p2_cb().set(FUNC(baraduke_state::baraduke_lamps_w)); /* lamps */
|
||||
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* we need heavy synch */
|
||||
|
||||
|
||||
@ -48,6 +48,12 @@ public:
|
||||
{ }
|
||||
|
||||
void init_by6803();
|
||||
void by6803(machine_config &config);
|
||||
|
||||
DECLARE_INPUT_CHANGED_MEMBER(activity_test);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(self_test);
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(port1_r);
|
||||
DECLARE_WRITE8_MEMBER(port1_w);
|
||||
DECLARE_READ8_MEMBER(port2_r);
|
||||
@ -62,13 +68,10 @@ public:
|
||||
DECLARE_WRITE_LINE_MEMBER(pia0_ca2_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(pia0_cb2_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(pia1_cb2_w);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(activity_test);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(self_test);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(pia0_timer);
|
||||
void by6803(machine_config &config);
|
||||
void by6803_io(address_map &map);
|
||||
|
||||
void by6803_map(address_map &map);
|
||||
private:
|
||||
|
||||
uint8_t m_pia0_a;
|
||||
uint8_t m_pia0_b;
|
||||
uint8_t m_pia1_a;
|
||||
@ -101,12 +104,6 @@ void by6803_state::by6803_map(address_map &map)
|
||||
map(0x8000, 0xffff).rom();
|
||||
}
|
||||
|
||||
void by6803_state::by6803_io(address_map &map)
|
||||
{
|
||||
map(M6801_PORT1, M6801_PORT1).rw(FUNC(by6803_state::port1_r), FUNC(by6803_state::port1_w)); // P10-P17
|
||||
map(M6801_PORT2, M6801_PORT2).rw(FUNC(by6803_state::port2_r), FUNC(by6803_state::port2_w)); // P20-P24
|
||||
}
|
||||
|
||||
static INPUT_PORTS_START( by6803 )
|
||||
PORT_START("TEST")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Self Test") PORT_IMPULSE(1) PORT_CHANGED_MEMBER(DEVICE_SELF, by6803_state, self_test, 0)
|
||||
@ -380,9 +377,12 @@ TIMER_DEVICE_CALLBACK_MEMBER( by6803_state::pia0_timer )
|
||||
|
||||
MACHINE_CONFIG_START(by6803_state::by6803)
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("maincpu", M6803, XTAL(3'579'545))
|
||||
MCFG_DEVICE_PROGRAM_MAP(by6803_map)
|
||||
MCFG_DEVICE_IO_MAP(by6803_io)
|
||||
M6803(config, m_maincpu, XTAL(3'579'545));
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &by6803_state::by6803_map);
|
||||
m_maincpu->in_p1_cb().set(FUNC(by6803_state::port1_r)); // P10-P17
|
||||
m_maincpu->out_p1_cb().set(FUNC(by6803_state::port1_w)); // P10-P17
|
||||
m_maincpu->in_p2_cb().set(FUNC(by6803_state::port2_r)); // P20-P24
|
||||
m_maincpu->out_p2_cb().set(FUNC(by6803_state::port2_w)); // P20-P24
|
||||
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
|
||||
|
||||
@ -111,7 +111,6 @@ public:
|
||||
void granny_map(address_map &map);
|
||||
void main_map(address_map &map);
|
||||
void sound_map(address_map &map);
|
||||
void sound_portmap(address_map &map);
|
||||
void video_map(address_map &map);
|
||||
private:
|
||||
uint8_t m_mpu_to_vid;
|
||||
@ -192,12 +191,6 @@ void by133_state::sound_map(address_map &map)
|
||||
map(0xc000, 0xffff).rom();
|
||||
}
|
||||
|
||||
void by133_state::sound_portmap(address_map &map)
|
||||
{
|
||||
map(M6801_PORT1, M6801_PORT1).w("dac", FUNC(dac_byte_interface::data_w)); // P10-P17
|
||||
map(M6801_PORT2, M6801_PORT2).rw(FUNC(by133_state::m6803_port2_r), FUNC(by133_state::m6803_port2_w)); // P20-P24 sound command in
|
||||
}
|
||||
|
||||
|
||||
INPUT_CHANGED_MEMBER( by133_state::video_test )
|
||||
{
|
||||
@ -761,9 +754,11 @@ MACHINE_CONFIG_START(by133_state::babypac)
|
||||
MCFG_DEVICE_ADD("videocpu", MC6809, XTAL(3'579'545))
|
||||
MCFG_DEVICE_PROGRAM_MAP(video_map)
|
||||
|
||||
MCFG_DEVICE_ADD("audiocpu", M6803, XTAL(3'579'545))
|
||||
MCFG_DEVICE_PROGRAM_MAP(sound_map)
|
||||
MCFG_DEVICE_IO_MAP(sound_portmap)
|
||||
M6803(config, m_audiocpu, XTAL(3'579'545));
|
||||
m_audiocpu->set_addrmap(AS_PROGRAM, &by133_state::sound_map);
|
||||
m_audiocpu->out_p1_cb().set("dac", FUNC(dac_byte_interface::data_w)); // P10-P17
|
||||
m_audiocpu->in_p2_cb().set(FUNC(by133_state::m6803_port2_r)); // P20-P24 sound command in
|
||||
m_audiocpu->out_p2_cb().set(FUNC(by133_state::m6803_port2_w));
|
||||
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
|
||||
|
||||
@ -565,19 +565,6 @@ void hx20_state::hx20_mem(address_map &map)
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// ADDRESS_MAP( hx20_io )
|
||||
//-------------------------------------------------
|
||||
|
||||
void hx20_state::hx20_io(address_map &map)
|
||||
{
|
||||
map(M6801_PORT1, M6801_PORT1).rw(FUNC(hx20_state::main_p1_r), FUNC(hx20_state::main_p1_w));
|
||||
map(M6801_PORT2, M6801_PORT2).rw(FUNC(hx20_state::main_p2_r), FUNC(hx20_state::main_p2_w));
|
||||
map(M6801_PORT3, M6801_PORT3).noprw(); // A0-A7, D0-D7
|
||||
map(M6801_PORT4, M6801_PORT4).noprw(); // A8-A15
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// ADDRESS_MAP( hx20_sub_mem )
|
||||
//-------------------------------------------------
|
||||
@ -590,19 +577,6 @@ void hx20_state::hx20_sub_mem(address_map &map)
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// ADDRESS_MAP( hx20_sub_io )
|
||||
//-------------------------------------------------
|
||||
|
||||
void hx20_state::hx20_sub_io(address_map &map)
|
||||
{
|
||||
map(M6801_PORT1, M6801_PORT1).rw(FUNC(hx20_state::slave_p1_r), FUNC(hx20_state::slave_p1_w));
|
||||
map(M6801_PORT2, M6801_PORT2).rw(FUNC(hx20_state::slave_p2_r), FUNC(hx20_state::slave_p2_w));
|
||||
map(M6801_PORT3, M6801_PORT3).rw(FUNC(hx20_state::slave_p3_r), FUNC(hx20_state::slave_p3_w));
|
||||
map(M6801_PORT4, M6801_PORT4).rw(FUNC(hx20_state::slave_p4_r), FUNC(hx20_state::slave_p4_w));
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// ADDRESS_MAP( cm6000_mem )
|
||||
//-------------------------------------------------
|
||||
@ -896,13 +870,25 @@ void hx20_state::machine_start()
|
||||
|
||||
MACHINE_CONFIG_START(hx20_state::hx20)
|
||||
// basic machine hardware
|
||||
MCFG_DEVICE_ADD(HD6301V1_MAIN_TAG, HD63701, XTAL(2'457'600))
|
||||
MCFG_DEVICE_PROGRAM_MAP(hx20_mem)
|
||||
MCFG_DEVICE_IO_MAP(hx20_io)
|
||||
HD63701(config, m_maincpu, XTAL(2'457'600));
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &hx20_state::hx20_mem);
|
||||
m_maincpu->in_p1_cb().set(FUNC(hx20_state::main_p1_r));
|
||||
m_maincpu->out_p1_cb().set(FUNC(hx20_state::main_p1_w));
|
||||
m_maincpu->in_p2_cb().set(FUNC(hx20_state::main_p2_r));
|
||||
m_maincpu->out_p2_cb().set(FUNC(hx20_state::main_p2_w));
|
||||
// Port 3 = A0-A7, D0-D7
|
||||
// Port 4 = A8-A15
|
||||
|
||||
MCFG_DEVICE_ADD(HD6301V1_SLAVE_TAG, HD63701, XTAL(2'457'600))
|
||||
MCFG_DEVICE_PROGRAM_MAP(hx20_sub_mem)
|
||||
MCFG_DEVICE_IO_MAP(hx20_sub_io)
|
||||
HD63701(config, m_subcpu, XTAL(2'457'600));
|
||||
m_subcpu->set_addrmap(AS_PROGRAM, &hx20_state::hx20_sub_mem);
|
||||
m_subcpu->in_p1_cb().set(FUNC(hx20_state::slave_p1_r));
|
||||
m_subcpu->out_p1_cb().set(FUNC(hx20_state::slave_p1_w));
|
||||
m_subcpu->in_p2_cb().set(FUNC(hx20_state::slave_p2_r));
|
||||
m_subcpu->out_p2_cb().set(FUNC(hx20_state::slave_p2_w));
|
||||
m_subcpu->in_p3_cb().set(FUNC(hx20_state::slave_p3_r));
|
||||
m_subcpu->out_p3_cb().set(FUNC(hx20_state::slave_p3_w));
|
||||
m_subcpu->in_p4_cb().set(FUNC(hx20_state::slave_p4_r));
|
||||
m_subcpu->out_p4_cb().set(FUNC(hx20_state::slave_p4_w));
|
||||
|
||||
// video hardware
|
||||
MCFG_SCREEN_ADD(SCREEN_TAG, LCD)
|
||||
@ -959,9 +945,7 @@ MACHINE_CONFIG_END
|
||||
MACHINE_CONFIG_START(hx20_state::cm6000)
|
||||
hx20(config);
|
||||
// basic machine hardware
|
||||
MCFG_DEVICE_MODIFY(HD6301V1_MAIN_TAG)
|
||||
MCFG_DEVICE_PROGRAM_MAP(cm6000_mem)
|
||||
MCFG_DEVICE_IO_MAP(hx20_io)
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &hx20_state::cm6000_mem);
|
||||
|
||||
// optional rom
|
||||
MCFG_DEVICE_REMOVE("optrom")
|
||||
|
||||
@ -112,12 +112,6 @@ void kncljoe_state::sound_map(address_map &map)
|
||||
map(0x2000, 0x7fff).rom();
|
||||
}
|
||||
|
||||
void kncljoe_state::sound_portmap(address_map &map)
|
||||
{
|
||||
map(M6801_PORT1, M6801_PORT1).rw(FUNC(kncljoe_state::m6803_port1_r), FUNC(kncljoe_state::m6803_port1_w));
|
||||
map(M6801_PORT2, M6801_PORT2).rw(FUNC(kncljoe_state::m6803_port2_r), FUNC(kncljoe_state::m6803_port2_w));
|
||||
}
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
|
||||
@ -262,11 +256,13 @@ MACHINE_CONFIG_START(kncljoe_state::kncljoe)
|
||||
MCFG_DEVICE_PROGRAM_MAP(main_map)
|
||||
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", kncljoe_state, irq0_line_hold)
|
||||
|
||||
MCFG_DEVICE_ADD("soundcpu", M6803, XTAL(3'579'545)) /* verified on pcb */
|
||||
MCFG_DEVICE_PROGRAM_MAP(sound_map)
|
||||
MCFG_DEVICE_IO_MAP(sound_portmap)
|
||||
MCFG_DEVICE_PERIODIC_INT_DRIVER(kncljoe_state, sound_nmi, (double)3970) //measured 3.970 kHz
|
||||
|
||||
m6803_cpu_device &soundcpu(M6803(config, "soundcpu", XTAL(3'579'545))); /* verified on pcb */
|
||||
soundcpu.set_addrmap(AS_PROGRAM, &kncljoe_state::sound_map);
|
||||
soundcpu.in_p1_cb().set(FUNC(kncljoe_state::m6803_port1_r));
|
||||
soundcpu.out_p1_cb().set(FUNC(kncljoe_state::m6803_port1_w));
|
||||
soundcpu.in_p2_cb().set(FUNC(kncljoe_state::m6803_port2_r));
|
||||
soundcpu.out_p2_cb().set(FUNC(kncljoe_state::m6803_port2_w));
|
||||
soundcpu.set_periodic_int(FUNC(kncljoe_state::sound_nmi), attotime::from_hz((double)3970)); //measured 3.970 kHz
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
|
||||
@ -56,7 +56,6 @@ private:
|
||||
|
||||
void alice32_mem(address_map &map);
|
||||
void alice90_mem(address_map &map);
|
||||
void mc10_io(address_map &map);
|
||||
void mc10_mem(address_map &map);
|
||||
|
||||
// device-level overrides
|
||||
@ -306,12 +305,6 @@ void mc10_state::mc10_mem(address_map &map)
|
||||
map(0xe000, 0xffff).rom().region("maincpu", 0x0000); /* ROM */
|
||||
}
|
||||
|
||||
void mc10_state::mc10_io(address_map &map)
|
||||
{
|
||||
map(M6801_PORT1, M6801_PORT1).rw(FUNC(mc10_state::mc10_port1_r), FUNC(mc10_state::mc10_port1_w));
|
||||
map(M6801_PORT2, M6801_PORT2).rw(FUNC(mc10_state::mc10_port2_r), FUNC(mc10_state::mc10_port2_w));
|
||||
}
|
||||
|
||||
void mc10_state::alice32_mem(address_map &map)
|
||||
{
|
||||
map(0x0100, 0x2fff).noprw(); /* unused */
|
||||
@ -512,9 +505,12 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(mc10_state::mc10)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("maincpu", M6803, XTAL(3'579'545)) /* 0,894886 MHz */
|
||||
MCFG_DEVICE_PROGRAM_MAP(mc10_mem)
|
||||
MCFG_DEVICE_IO_MAP(mc10_io)
|
||||
M6803(config, m_maincpu, XTAL(3'579'545)); /* 0,894886 MHz */
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &mc10_state::mc10_mem);
|
||||
m_maincpu->in_p1_cb().set(FUNC(mc10_state::mc10_port1_r));
|
||||
m_maincpu->out_p1_cb().set(FUNC(mc10_state::mc10_port1_w));
|
||||
m_maincpu->in_p2_cb().set(FUNC(mc10_state::mc10_port2_r));
|
||||
m_maincpu->out_p2_cb().set(FUNC(mc10_state::mc10_port2_w));
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_MC6847_NTSC_ADD("screen", "mc6847")
|
||||
@ -545,10 +541,12 @@ MACHINE_CONFIG_END
|
||||
|
||||
MACHINE_CONFIG_START(mc10_state::alice32)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("maincpu", M6803, XTAL(3'579'545))
|
||||
MCFG_DEVICE_PROGRAM_MAP(alice32_mem)
|
||||
MCFG_DEVICE_IO_MAP(mc10_io)
|
||||
M6803(config, m_maincpu, XTAL(3'579'545));
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &mc10_state::alice32_mem);
|
||||
m_maincpu->in_p1_cb().set(FUNC(mc10_state::mc10_port1_r));
|
||||
m_maincpu->out_p1_cb().set(FUNC(mc10_state::mc10_port1_w));
|
||||
m_maincpu->in_p2_cb().set(FUNC(mc10_state::mc10_port2_r));
|
||||
m_maincpu->out_p2_cb().set(FUNC(mc10_state::mc10_port2_w));
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
@ -586,8 +584,7 @@ MACHINE_CONFIG_END
|
||||
|
||||
MACHINE_CONFIG_START(mc10_state::alice90)
|
||||
alice32(config);
|
||||
MCFG_DEVICE_MODIFY("maincpu")
|
||||
MCFG_DEVICE_PROGRAM_MAP(alice90_mem)
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &mc10_state::alice90_mem);
|
||||
|
||||
m_ram->set_default_size("32K");
|
||||
|
||||
|
||||
@ -449,12 +449,6 @@ void namcos1_state::mcu_map(address_map &map)
|
||||
map(0xf000, 0xffff).rom().region("mcu", 0); /* internal ROM */
|
||||
}
|
||||
|
||||
void namcos1_state::mcu_port_map(address_map &map)
|
||||
{
|
||||
map(M6801_PORT1, M6801_PORT1).portr("COIN").w(FUNC(namcos1_state::coin_w));
|
||||
map(M6801_PORT2, M6801_PORT2).nopr().w(FUNC(namcos1_state::dac_gain_w));
|
||||
}
|
||||
|
||||
|
||||
// #define PRIORITY_EASINESS_TO_PLAY
|
||||
|
||||
@ -1043,10 +1037,12 @@ MACHINE_CONFIG_START(namcos1_state::ns1)
|
||||
MCFG_DEVICE_PROGRAM_MAP(sound_map)
|
||||
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", namcos1_state, irq0_line_assert)
|
||||
|
||||
MCFG_DEVICE_ADD("mcu", HD63701, XTAL(49'152'000)/8)
|
||||
MCFG_DEVICE_PROGRAM_MAP(mcu_map)
|
||||
MCFG_DEVICE_IO_MAP(mcu_port_map)
|
||||
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", namcos1_state, irq0_line_assert)
|
||||
HD63701(config, m_mcu, XTAL(49'152'000)/8);
|
||||
m_mcu->set_addrmap(AS_PROGRAM, &namcos1_state::mcu_map);
|
||||
m_mcu->in_p1_cb().set_ioport("COIN");
|
||||
m_mcu->out_p1_cb().set(FUNC(namcos1_state::coin_w));
|
||||
m_mcu->out_p2_cb().set(FUNC(namcos1_state::dac_gain_w));
|
||||
m_mcu->set_vblank_int("screen", FUNC(namcos1_state::irq0_line_assert));
|
||||
|
||||
MCFG_DEVICE_ADD("c117", NAMCO_C117, 0)
|
||||
MCFG_DEVICE_PROGRAM_MAP(virtual_map)
|
||||
|
||||
@ -495,20 +495,6 @@ void namcos86_state::wndrmomo_mcu_map(address_map &map)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(namcos86_state::readFF)
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
void namcos86_state::mcu_port_map(address_map &map)
|
||||
{
|
||||
map(M6801_PORT1, M6801_PORT1).portr("IN2");
|
||||
map(M6801_PORT2, M6801_PORT2).r(FUNC(namcos86_state::readFF)); /* leds won't work otherwise */
|
||||
map(M6801_PORT1, M6801_PORT1).w(FUNC(namcos86_state::coin_w));
|
||||
map(M6801_PORT2, M6801_PORT2).w(FUNC(namcos86_state::led_w));
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************/
|
||||
|
||||
static INPUT_PORTS_START( hopmappy )
|
||||
@ -1072,10 +1058,13 @@ MACHINE_CONFIG_START(namcos86_state::hopmappy)
|
||||
MCFG_DEVICE_PROGRAM_MAP(hopmappy_cpu2_map)
|
||||
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", namcos86_state, irq0_line_assert)
|
||||
|
||||
MCFG_DEVICE_ADD("mcu", HD63701, XTAL(49'152'000)/8) /* or compatible 6808 with extra instructions */
|
||||
MCFG_DEVICE_PROGRAM_MAP(hopmappy_mcu_map)
|
||||
MCFG_DEVICE_IO_MAP(mcu_port_map)
|
||||
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", namcos86_state, irq0_line_hold) /* ??? */
|
||||
hd63701_cpu_device &mcu(HD63701(config, "mcu", XTAL(49'152'000)/8)); /* or compatible 6808 with extra instructions */
|
||||
mcu.set_addrmap(AS_PROGRAM, &namcos86_state::hopmappy_mcu_map);
|
||||
mcu.in_p1_cb().set_ioport("IN2");
|
||||
mcu.in_p2_cb().set_constant(0xff); /* leds won't work otherwise */
|
||||
mcu.out_p1_cb().set(FUNC(namcos86_state::coin_w));
|
||||
mcu.out_p2_cb().set(FUNC(namcos86_state::led_w));
|
||||
mcu.set_vblank_int("screen", FUNC(namcos86_state::irq0_line_hold)); /* ??? */
|
||||
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(48000)) /* heavy interleaving needed to avoid hangs in rthunder */
|
||||
|
||||
|
||||
@ -292,20 +292,6 @@ void pacland_state::mcu_map(address_map &map)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(pacland_state::readFF)
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
void pacland_state::mcu_port_map(address_map &map)
|
||||
{
|
||||
map(M6801_PORT1, M6801_PORT1).portr("IN2");
|
||||
map(M6801_PORT1, M6801_PORT1).w(FUNC(pacland_state::coin_w));
|
||||
map(M6801_PORT2, M6801_PORT2).r(FUNC(pacland_state::readFF)); /* leds won't work otherwise */
|
||||
map(M6801_PORT2, M6801_PORT2).w(FUNC(pacland_state::led_w));
|
||||
}
|
||||
|
||||
|
||||
|
||||
static INPUT_PORTS_START( pacland )
|
||||
PORT_START("DSWA")
|
||||
@ -433,9 +419,12 @@ MACHINE_CONFIG_START(pacland_state::pacland)
|
||||
MCFG_DEVICE_ADD("maincpu", MC6809E, XTAL(49'152'000)/32) /* 1.536 MHz */
|
||||
MCFG_DEVICE_PROGRAM_MAP(main_map)
|
||||
|
||||
MCFG_DEVICE_ADD("mcu", HD63701, XTAL(49'152'000)/8) /* 6.144 MHz? */
|
||||
MCFG_DEVICE_PROGRAM_MAP(mcu_map)
|
||||
MCFG_DEVICE_IO_MAP(mcu_port_map)
|
||||
HD63701(config, m_mcu, XTAL(49'152'000)/8); /* 6.144 MHz? */
|
||||
m_mcu->set_addrmap(AS_PROGRAM, &pacland_state::mcu_map);
|
||||
m_mcu->in_p1_cb().set_ioport("IN2");
|
||||
m_mcu->out_p1_cb().set(FUNC(pacland_state::coin_w));
|
||||
m_mcu->in_p2_cb().set_constant(0xff); /* leds won't work otherwise */
|
||||
m_mcu->out_p2_cb().set(FUNC(pacland_state::led_w));
|
||||
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* we need heavy synching between the MCU and the CPU */
|
||||
|
||||
|
||||
@ -547,19 +547,6 @@ void px8_state::px8_slave_mem(address_map &map)
|
||||
map(0xf000, 0xffff).rom().region(HD6303_TAG, 0); /* internal mask rom */
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
ADDRESS_MAP( px8_slave_io )
|
||||
-------------------------------------------------*/
|
||||
|
||||
void px8_state::px8_slave_io(address_map &map)
|
||||
{
|
||||
map.unmap_value_high();
|
||||
map(M6801_PORT1, M6801_PORT1);
|
||||
map(M6801_PORT2, M6801_PORT2);
|
||||
map(M6801_PORT3, M6801_PORT3);
|
||||
map(M6801_PORT4, M6801_PORT4);
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
INPUT PORTS
|
||||
***************************************************************************/
|
||||
@ -759,7 +746,6 @@ MACHINE_CONFIG_START(px8_state::px8)
|
||||
/* slave cpu (HD6303) */
|
||||
MCFG_DEVICE_ADD(HD6303_TAG, M6803, XTAL_CR1 / 4) /* 614 kHz */
|
||||
MCFG_DEVICE_PROGRAM_MAP(px8_slave_mem)
|
||||
MCFG_DEVICE_IO_MAP(px8_slave_io)
|
||||
MCFG_DEVICE_DISABLE()
|
||||
|
||||
/* sub CPU (uPD7508) */
|
||||
|
||||
@ -135,20 +135,6 @@ void skykid_state::mcu_map(address_map &map)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(skykid_state::readFF)
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
void skykid_state::mcu_port_map(address_map &map)
|
||||
{
|
||||
map(M6801_PORT1, M6801_PORT1).r(FUNC(skykid_state::inputport_r)); /* input ports read */
|
||||
map(M6801_PORT1, M6801_PORT1).w(FUNC(skykid_state::inputport_select_w)); /* input port select */
|
||||
map(M6801_PORT2, M6801_PORT2).r(FUNC(skykid_state::readFF)); /* leds won't work otherwise */
|
||||
map(M6801_PORT2, M6801_PORT2).w(FUNC(skykid_state::skykid_led_w)); /* lamps */
|
||||
}
|
||||
|
||||
|
||||
|
||||
static INPUT_PORTS_START( skykid )
|
||||
PORT_START("DSWA") /* DSW A */
|
||||
@ -441,9 +427,12 @@ MACHINE_CONFIG_START(skykid_state::skykid)
|
||||
MCFG_DEVICE_ADD("maincpu", MC6809E, XTAL(49'152'000)/32)
|
||||
MCFG_DEVICE_PROGRAM_MAP(skykid_map)
|
||||
|
||||
MCFG_DEVICE_ADD("mcu", HD63701, XTAL(49'152'000)/8) /* or compatible 6808 with extra instructions */
|
||||
MCFG_DEVICE_PROGRAM_MAP(mcu_map)
|
||||
MCFG_DEVICE_IO_MAP(mcu_port_map)
|
||||
HD63701(config, m_mcu, XTAL(49'152'000)/8); /* or compatible 6808 with extra instructions */
|
||||
m_mcu->set_addrmap(AS_PROGRAM, &skykid_state::mcu_map);
|
||||
m_mcu->in_p1_cb().set(FUNC(skykid_state::inputport_r)); /* input ports read */
|
||||
m_mcu->out_p1_cb().set(FUNC(skykid_state::inputport_select_w)); /* input port select */
|
||||
m_mcu->in_p2_cb().set_constant(0xff); /* leds won't work otherwise */
|
||||
m_mcu->out_p2_cb().set(FUNC(skykid_state::skykid_led_w)); /* lamps */
|
||||
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* we need heavy synch */
|
||||
|
||||
|
||||
@ -198,14 +198,6 @@ void tceptor_state::mcu_map(address_map &map)
|
||||
}
|
||||
|
||||
|
||||
void tceptor_state::mcu_io_map(address_map &map)
|
||||
{
|
||||
map.unmap_value_high();
|
||||
map(M6801_PORT1, M6801_PORT1).nopw();
|
||||
map(M6801_PORT2, M6801_PORT2).nopw();
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*******************************************************************/
|
||||
|
||||
@ -337,9 +329,8 @@ MACHINE_CONFIG_START(tceptor_state::tceptor)
|
||||
MCFG_DEVICE_ADD("sub", M68000, XTAL(49'152'000)/4)
|
||||
MCFG_DEVICE_PROGRAM_MAP(m68k_map)
|
||||
|
||||
MCFG_DEVICE_ADD("mcu", HD63701, XTAL(49'152'000)/8) // or compatible 6808 with extra instructions
|
||||
MCFG_DEVICE_PROGRAM_MAP(mcu_map)
|
||||
MCFG_DEVICE_IO_MAP(mcu_io_map)
|
||||
HD63701(config, m_mcu, XTAL(49'152'000)/8); // or compatible 6808 with extra instructions
|
||||
m_mcu->set_addrmap(AS_PROGRAM, &tceptor_state::mcu_map);
|
||||
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(6000))
|
||||
|
||||
|
||||
@ -115,7 +115,6 @@ public:
|
||||
void adam(machine_config &config);
|
||||
void adam_io(address_map &map);
|
||||
void adam_mem(address_map &map);
|
||||
void m6801_io(address_map &map);
|
||||
void m6801_mem(address_map &map);
|
||||
};
|
||||
|
||||
|
||||
@ -331,10 +331,11 @@ public:
|
||||
DECLARE_WRITE_LINE_MEMBER( write_monochrome );
|
||||
|
||||
void st(machine_config &config);
|
||||
void ikbd_io_map(address_map &map);
|
||||
void ikbd_map(address_map &map);
|
||||
void st_map(address_map &map);
|
||||
protected:
|
||||
void keyboard(machine_config &config);
|
||||
|
||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
|
||||
virtual void machine_start() override;
|
||||
virtual void video_start() override;
|
||||
|
||||
@ -24,7 +24,6 @@ public:
|
||||
DECLARE_WRITE8_MEMBER(baraduke_lamps_w);
|
||||
DECLARE_WRITE8_MEMBER(baraduke_irq_ack_w);
|
||||
DECLARE_READ8_MEMBER(soundkludge_r);
|
||||
DECLARE_READ8_MEMBER(readFF);
|
||||
DECLARE_READ8_MEMBER(baraduke_videoram_r);
|
||||
DECLARE_WRITE8_MEMBER(baraduke_videoram_w);
|
||||
DECLARE_READ8_MEMBER(baraduke_textram_r);
|
||||
@ -48,7 +47,6 @@ public:
|
||||
void baraduke(machine_config &config);
|
||||
void baraduke_map(address_map &map);
|
||||
void mcu_map(address_map &map);
|
||||
void mcu_port_map(address_map &map);
|
||||
|
||||
protected:
|
||||
virtual void machine_start() override;
|
||||
|
||||
@ -148,9 +148,7 @@ private:
|
||||
int m_sio_rx;
|
||||
int m_sio_pin;
|
||||
void cm6000_mem(address_map &map);
|
||||
void hx20_io(address_map &map);
|
||||
void hx20_mem(address_map &map);
|
||||
void hx20_sub_io(address_map &map);
|
||||
void hx20_sub_mem(address_map &map);
|
||||
};
|
||||
|
||||
|
||||
@ -74,5 +74,4 @@ private:
|
||||
void draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect );
|
||||
void main_map(address_map &map);
|
||||
void sound_map(address_map &map);
|
||||
void sound_portmap(address_map &map);
|
||||
};
|
||||
|
||||
@ -141,7 +141,6 @@ private:
|
||||
|
||||
void main_map(address_map &map);
|
||||
void mcu_map(address_map &map);
|
||||
void mcu_port_map(address_map &map);
|
||||
void sound_map(address_map &map);
|
||||
void sub_map(address_map &map);
|
||||
void virtual_map(address_map &map);
|
||||
|
||||
@ -45,7 +45,6 @@ private:
|
||||
DECLARE_WRITE8_MEMBER(coin_w);
|
||||
DECLARE_WRITE8_MEMBER(led_w);
|
||||
DECLARE_WRITE8_MEMBER(cus115_w);
|
||||
DECLARE_READ8_MEMBER(readFF);
|
||||
DECLARE_WRITE8_MEMBER(videoram1_w);
|
||||
DECLARE_WRITE8_MEMBER(videoram2_w);
|
||||
DECLARE_WRITE8_MEMBER(tilebank_select_w);
|
||||
@ -74,7 +73,6 @@ private:
|
||||
void genpeitd_mcu_map(address_map &map);
|
||||
void hopmappy_cpu2_map(address_map &map);
|
||||
void hopmappy_mcu_map(address_map &map);
|
||||
void mcu_port_map(address_map &map);
|
||||
void roishtar_cpu2_map(address_map &map);
|
||||
void roishtar_mcu_map(address_map &map);
|
||||
void rthunder_cpu2_map(address_map &map);
|
||||
|
||||
@ -54,7 +54,6 @@ public:
|
||||
DECLARE_WRITE8_MEMBER(led_w);
|
||||
DECLARE_WRITE8_MEMBER(irq_1_ctrl_w);
|
||||
DECLARE_WRITE8_MEMBER(irq_2_ctrl_w);
|
||||
DECLARE_READ8_MEMBER(readFF);
|
||||
DECLARE_WRITE8_MEMBER(videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(videoram2_w);
|
||||
DECLARE_WRITE8_MEMBER(scroll0_w);
|
||||
@ -77,5 +76,4 @@ public:
|
||||
void pacland(machine_config &config);
|
||||
void main_map(address_map &map);
|
||||
void mcu_map(address_map &map);
|
||||
void mcu_port_map(address_map &map);
|
||||
};
|
||||
|
||||
@ -86,7 +86,6 @@ private:
|
||||
DECLARE_PALETTE_INIT(px8);
|
||||
void px8_io(address_map &map);
|
||||
void px8_mem(address_map &map);
|
||||
void px8_slave_io(address_map &map);
|
||||
void px8_slave_mem(address_map &map);
|
||||
};
|
||||
|
||||
|
||||
@ -32,7 +32,6 @@ private:
|
||||
DECLARE_WRITE8_MEMBER(skykid_bankswitch_w);
|
||||
DECLARE_WRITE8_MEMBER(skykid_irq_1_ctrl_w);
|
||||
DECLARE_WRITE8_MEMBER(skykid_irq_2_ctrl_w);
|
||||
DECLARE_READ8_MEMBER(readFF);
|
||||
DECLARE_READ8_MEMBER(skykid_videoram_r);
|
||||
DECLARE_WRITE8_MEMBER(skykid_videoram_w);
|
||||
DECLARE_READ8_MEMBER(skykid_textram_r);
|
||||
@ -48,7 +47,6 @@ private:
|
||||
DECLARE_WRITE_LINE_MEMBER(vblank_irq);
|
||||
void draw_sprites(bitmap_ind16 &bitmap,const rectangle &cliprect);
|
||||
void mcu_map(address_map &map);
|
||||
void mcu_port_map(address_map &map);
|
||||
void skykid_map(address_map &map);
|
||||
|
||||
virtual void machine_start() override;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user