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https://github.com/holub/mame
synced 2025-04-24 09:20:02 +03:00
z80ne: kill direct update handler
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parent
fe33390d5e
commit
0d09979843
@ -112,8 +112,6 @@ public:
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uint8_t m_lx383_scan_counter;
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uint8_t m_lx383_key[LX383_KEYS];
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int m_lx383_downsampler;
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int m_nmi_delay_counter;
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int m_reset_delay_counter;
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uint8_t m_lx385_ctrl;
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emu_timer *m_cassette_timer;
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z80ne_cass_data_t m_cass_data;
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@ -126,9 +124,6 @@ public:
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DECLARE_WRITE8_MEMBER(lx385_ctrl_w);
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DECLARE_READ8_MEMBER(lx388_data_r);
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DECLARE_READ8_MEMBER(lx388_read_field_sync);
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DECLARE_DIRECT_UPDATE_MEMBER(z80ne_default);
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DECLARE_DIRECT_UPDATE_MEMBER(z80ne_nmi_delay_count);
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DECLARE_DIRECT_UPDATE_MEMBER(z80ne_reset_delay_count);
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DECLARE_DRIVER_INIT(z80netf);
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DECLARE_DRIVER_INIT(z80net);
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DECLARE_DRIVER_INIT(z80netb);
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@ -153,6 +148,8 @@ public:
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DECLARE_WRITE8_MEMBER(lx390_fdc_w);
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protected:
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
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required_device<cpu_device> m_maincpu;
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optional_device<floppy_connector> m_floppy0;
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optional_device<floppy_connector> m_floppy1;
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@ -183,6 +180,9 @@ protected:
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optional_ioport m_io_modifiers;
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optional_ioport m_io_config;
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emu_timer *m_timer_nmi;
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emu_timer *m_timer_reset;
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cassette_image_device *cassette_device_image();
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void reset_lx388();
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void reset_lx382_banking();
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@ -154,47 +154,18 @@ TIMER_CALLBACK_MEMBER(z80ne_state::z80ne_kbd_scan)
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}
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}
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DIRECT_UPDATE_MEMBER(z80ne_state::z80ne_default)
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void z80ne_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
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{
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return address;
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}
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/*
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* Handle NMI delay for single step instruction
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*/
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DIRECT_UPDATE_MEMBER(z80ne_state::z80ne_nmi_delay_count)
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{
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m_nmi_delay_counter--;
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if (!m_nmi_delay_counter)
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switch (id)
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{
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m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(&z80ne_state::z80ne_default, this));
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case 0:
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m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
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break;
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case 1:
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// switch to RAM bank at address 0x0000
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m_bank1->set_entry(0);
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break;
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}
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return address;
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}
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/*
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* Handle delayed ROM/RAM banking at RESET
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* after the first reset_delay_counter bytes have been read from ROM, switch the RAM back in
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*/
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DIRECT_UPDATE_MEMBER(z80ne_state::z80ne_reset_delay_count)
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{
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address_space &space = m_maincpu->space(AS_PROGRAM);
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/*
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* TODO: when debugger is active, his memory access causes this callback
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*
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*/
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if(!space.debugger_access())
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m_reset_delay_counter--;
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if (!m_reset_delay_counter)
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{
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/* remove this callback */
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m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(&z80ne_state::z80ne_default, this));
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/* and switch to RAM bank at address 0x0000 */
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m_bank1->set_entry( 0 ); /* RAM at 0x0000 (bank 1) */
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}
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return address;
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}
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void z80ne_state::reset_lx388()
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@ -210,15 +181,13 @@ void z80ne_state::reset_lx382_banking()
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m_bank2->set_entry(0); /* ep382 at 0x8000 */
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/* after the first 3 bytes have been read from ROM, switch the RAM back in */
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m_reset_delay_counter = 2;
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m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(&z80ne_state::z80ne_reset_delay_count, this));
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m_timer_reset->adjust(m_maincpu->cycles_to_attotime(2));
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}
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void z80ne_state::reset_lx390_banking()
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{
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m_reset_delay_counter = 0;
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switch (m_io_config->read() & 0x07) {
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switch (m_io_config->read() & 0x07)
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{
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case 0x01: /* EP382 Hex Monitor */
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if (VERBOSE)
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logerror("reset_lx390_banking: banking ep382\n");
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@ -226,9 +195,8 @@ void z80ne_state::reset_lx390_banking()
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m_bank2->set_entry(0); /* RAM at 0x0400 */
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m_bank3->set_entry(1); /* ep382 at 0x8000 */
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m_bank4->set_entry(0); /* RAM at 0xF000 */
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/* after the first 3 bytes have been read from ROM, switch the RAM back in */
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m_reset_delay_counter = 2;
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m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(&z80ne_state::z80ne_reset_delay_count, this));
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// after the first 3 bytes have been read from ROM, switch the RAM back in
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m_timer_reset->adjust(m_maincpu->cycles_to_attotime(2));
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break;
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case 0x02: /* EP548 16k BASIC */
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if (VERBOSE)
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@ -237,7 +205,6 @@ void z80ne_state::reset_lx390_banking()
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m_bank2->set_entry(1); /* ep548 at 0x0400-0x3FFF */
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m_bank3->set_entry(0); /* RAM at 0x8000 */
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m_bank4->set_entry(0); /* RAM at 0xF000 */
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m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(&z80ne_state::z80ne_default, this));
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break;
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case 0x03: /* EP390 Boot Loader for 5.5k floppy BASIC */
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if (VERBOSE)
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@ -246,7 +213,6 @@ void z80ne_state::reset_lx390_banking()
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m_bank2->set_entry(0); /* RAM at 0x0400-0x3FFF */
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m_bank3->set_entry(0); /* RAM at 0x8000 */
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m_bank4->set_entry(1); /* ep390 at 0xF000 */
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m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(&z80ne_state::z80ne_default, this));
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break;
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case 0x04: /* EP1390 Boot Loader for NE DOS 1.0/1.5 */
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if (VERBOSE)
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@ -255,7 +221,6 @@ void z80ne_state::reset_lx390_banking()
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m_bank2->set_entry(0); /* RAM at 0x0400-0x3FFF */
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m_bank3->set_entry(0); /* RAM at 0x8000 */
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m_bank4->set_entry(2); /* ep1390 at 0xF000 */
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m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(&z80ne_state::z80ne_default, this));
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break;
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case 0x05: /* EP2390 Boot Loader for NE DOS G.1 */
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if (VERBOSE)
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@ -264,7 +229,6 @@ void z80ne_state::reset_lx390_banking()
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m_bank2->set_entry(0); /* RAM at 0x0400-0x3FFF */
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m_bank3->set_entry(0); /* RAM at 0x8000 */
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m_bank4->set_entry(3); /* ep2390 at 0xF000 */
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m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(&z80ne_state::z80ne_default, this));
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break;
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}
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@ -321,7 +285,6 @@ MACHINE_RESET_MEMBER(z80ne_state,z80ne_base)
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m_ay31015->set_receiver_clock(m_cass_data.speed * 16.0);
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m_ay31015->set_transmitter_clock(m_cass_data.speed * 16.0);
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m_nmi_delay_counter = 0;
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lx385_ctrl_w(m_maincpu->space(AS_PROGRAM), 0, 0);
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}
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@ -380,11 +343,14 @@ INPUT_CHANGED_MEMBER(z80ne_state::z80ne_nmi)
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MACHINE_START_MEMBER(z80ne_state,z80ne)
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{
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LOG(("In MACHINE_START z80ne\n"));
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m_timer_nmi = timer_alloc(0);
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m_timer_reset = timer_alloc(1);
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m_lx385_ctrl = 0x1f;
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save_item(NAME(m_lx383_scan_counter));
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save_item(NAME(m_lx383_downsampler));
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save_item(NAME(m_lx383_key));
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save_item(NAME(m_nmi_delay_counter));
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m_cassette_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(z80ne_state::z80ne_cassette_tc),this));
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machine().scheduler().timer_pulse( attotime::from_hz(1000), timer_expired_delegate(FUNC(z80ne_state::z80ne_kbd_scan),this));
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}
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@ -465,9 +431,8 @@ WRITE8_MEMBER(z80ne_state::lx383_w)
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output().set_digit_value( offset, data ^ 0xff );
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else
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{
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/* after writing to port 0xF8 and the first ~M1 cycles strike a NMI for single step execution */
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m_nmi_delay_counter = 1;
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m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(&z80ne_state::z80ne_nmi_delay_count, this));
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// after writing to port 0xF8 and the first ~M1 cycles strike a NMI for single step execution
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m_timer_reset->adjust(m_maincpu->cycles_to_attotime(1));
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}
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}
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