mirror of
https://github.com/holub/mame
synced 2025-06-06 12:53:46 +03:00
various cpu lookup cleanup (nw)
This commit is contained in:
parent
5b2dde69b9
commit
0d3153e113
@ -45,8 +45,8 @@
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static void update_irq_state(running_machine &machine)
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static void update_irq_state(running_machine &machine)
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{
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{
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artmagic_state *state = machine.driver_data<artmagic_state>();
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artmagic_state *state = machine.driver_data<artmagic_state>();
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machine.device("maincpu")->execute().set_input_line(4, state->m_tms_irq ? ASSERT_LINE : CLEAR_LINE);
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state->m_maincpu->set_input_line(4, state->m_tms_irq ? ASSERT_LINE : CLEAR_LINE);
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machine.device("maincpu")->execute().set_input_line(5, state->m_hack_irq ? ASSERT_LINE : CLEAR_LINE);
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state->m_maincpu->set_input_line(5, state->m_hack_irq ? ASSERT_LINE : CLEAR_LINE);
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}
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}
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@ -104,10 +104,10 @@ MACHINE_RESET_MEMBER(atarigt_state,atarigt)
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static void cage_irq_callback(running_machine &machine, int reason)
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static void cage_irq_callback(running_machine &machine, int reason)
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{
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{
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atarigen_state *atarigen = machine.driver_data<atarigen_state>();
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atarigen_state *atarigen = machine.driver_data<atarigen_state>();
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address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
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address_space &space = atarigen->m_maincpu->space(AS_PROGRAM);
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if (reason)
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if (reason)
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atarigen->sound_int_gen(*machine.device("maincpu"));
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atarigen->sound_int_gen(atarigen->m_maincpu);
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else
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else
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atarigen->sound_int_ack_w(space,0,0);
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atarigen->sound_int_ack_w(space,0,0);
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}
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}
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@ -27,7 +27,9 @@ public:
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: driver_device(mconfig, type, tag),
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: driver_device(mconfig, type, tag),
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m_m68k_ram(*this, "m68k_ram"),
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m_m68k_ram(*this, "m68k_ram"),
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m_screen_ram(*this, "screen_ram"),
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m_screen_ram(*this, "screen_ram"),
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m_maincpu(*this, "maincpu") { }
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m_maincpu(*this, "maincpu"),
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m_dsp0(*this, "dsp0"),
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m_dsp1(*this, "dsp1") { }
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UINT8 m_r_color_table[256];
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UINT8 m_r_color_table[256];
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UINT8 m_g_color_table[256];
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UINT8 m_g_color_table[256];
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@ -68,6 +70,8 @@ public:
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void load_ldafile(address_space &space, const UINT8 *file);
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void load_ldafile(address_space &space, const UINT8 *file);
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void load_hexfile(address_space &space, const UINT8 *file);
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void load_hexfile(address_space &space, const UINT8 *file);
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_dsp0;
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optional_device<cpu_device> m_dsp1;
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};
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};
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@ -572,8 +576,8 @@ READ16_MEMBER(atarisy4_state::dsp0_status_r)
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WRITE16_MEMBER(atarisy4_state::dsp0_control_w)
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WRITE16_MEMBER(atarisy4_state::dsp0_control_w)
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{
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{
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machine().device("dsp0")->execute().set_input_line(INPUT_LINE_RESET, data & 0x01 ? CLEAR_LINE : ASSERT_LINE);
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m_dsp0->set_input_line(INPUT_LINE_RESET, data & 0x01 ? CLEAR_LINE : ASSERT_LINE);
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machine().device("dsp0")->execute().set_input_line(0, data & 0x02 ? ASSERT_LINE : CLEAR_LINE);
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m_dsp0->set_input_line(0, data & 0x02 ? ASSERT_LINE : CLEAR_LINE);
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m_csr[0] = data;
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m_csr[0] = data;
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}
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}
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@ -606,8 +610,8 @@ READ16_MEMBER(atarisy4_state::dsp1_status_r)
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WRITE16_MEMBER(atarisy4_state::dsp1_control_w)
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WRITE16_MEMBER(atarisy4_state::dsp1_control_w)
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{
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{
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machine().device("dsp1")->execute().set_input_line(INPUT_LINE_RESET, data & 0x01 ? CLEAR_LINE : ASSERT_LINE);
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m_dsp1->set_input_line(INPUT_LINE_RESET, data & 0x01 ? CLEAR_LINE : ASSERT_LINE);
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machine().device("dsp1")->execute().set_input_line(0, data & 0x02 ? ASSERT_LINE : CLEAR_LINE);
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m_dsp1->set_input_line(0, data & 0x02 ? ASSERT_LINE : CLEAR_LINE);
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m_csr[1] = data;
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m_csr[1] = data;
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}
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}
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@ -983,7 +987,7 @@ DRIVER_INIT_MEMBER(atarisy4_state,laststar)
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/* Set up the DSP */
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/* Set up the DSP */
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membank("dsp0_bank0")->set_base(m_shared_ram[0]);
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membank("dsp0_bank0")->set_base(m_shared_ram[0]);
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membank("dsp0_bank1")->set_base(&m_shared_ram[0][0x800]);
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membank("dsp0_bank1")->set_base(&m_shared_ram[0][0x800]);
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load_ldafile(machine().device("dsp0")->memory().space(AS_PROGRAM), memregion("dsp")->base());
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load_ldafile(m_dsp0->space(AS_PROGRAM), memregion("dsp")->base());
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}
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}
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DRIVER_INIT_MEMBER(atarisy4_state,airrace)
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DRIVER_INIT_MEMBER(atarisy4_state,airrace)
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@ -998,23 +1002,23 @@ DRIVER_INIT_MEMBER(atarisy4_state,airrace)
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/* Set up the first DSP */
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/* Set up the first DSP */
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membank("dsp0_bank0")->set_base(m_shared_ram[0]);
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membank("dsp0_bank0")->set_base(m_shared_ram[0]);
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membank("dsp0_bank1")->set_base(&m_shared_ram[0][0x800]);
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membank("dsp0_bank1")->set_base(&m_shared_ram[0][0x800]);
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load_ldafile(machine().device("dsp0")->memory().space(AS_PROGRAM), memregion("dsp")->base());
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load_ldafile(m_dsp0->space(AS_PROGRAM), memregion("dsp")->base());
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/* Set up the second DSP */
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/* Set up the second DSP */
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membank("dsp1_bank0")->set_base(m_shared_ram[1]);
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membank("dsp1_bank0")->set_base(m_shared_ram[1]);
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membank("dsp1_bank1")->set_base(&m_shared_ram[1][0x800]);
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membank("dsp1_bank1")->set_base(&m_shared_ram[1][0x800]);
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load_ldafile(machine().device("dsp1")->memory().space(AS_PROGRAM), memregion("dsp")->base());
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load_ldafile(m_dsp1->space(AS_PROGRAM), memregion("dsp")->base());
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}
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}
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void atarisy4_state::machine_reset()
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void atarisy4_state::machine_reset()
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{
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{
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machine().device("dsp0")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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m_dsp0->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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}
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}
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MACHINE_RESET_MEMBER(atarisy4_state,airrace)
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MACHINE_RESET_MEMBER(atarisy4_state,airrace)
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{
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{
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machine().device("dsp0")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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m_dsp0->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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machine().device("dsp1")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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m_dsp1->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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}
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}
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@ -2203,7 +2203,7 @@ DRIVER_INIT_MEMBER(balsente_state,shrike)
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address_space &space = m_maincpu->space(AS_PROGRAM);
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address_space &space = m_maincpu->space(AS_PROGRAM);
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space.install_readwrite_handler(0x9e00, 0x9fff, read8_delegate(FUNC(balsente_state::shrike_shared_6809_r),this), write8_delegate(FUNC(balsente_state::shrike_shared_6809_w),this));
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space.install_readwrite_handler(0x9e00, 0x9fff, read8_delegate(FUNC(balsente_state::shrike_shared_6809_r),this), write8_delegate(FUNC(balsente_state::shrike_shared_6809_w),this));
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space.install_write_handler(0x9e01, 0x9e01, write8_delegate(FUNC(balsente_state::shrike_sprite_select_w),this));
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space.install_write_handler(0x9e01, 0x9e01, write8_delegate(FUNC(balsente_state::shrike_sprite_select_w),this));
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machine().device("68k")->memory().space(AS_PROGRAM).install_readwrite_handler(0x10000, 0x1001f, read16_delegate(FUNC(balsente_state::shrike_io_68k_r),this), write16_delegate(FUNC(balsente_state::shrike_io_68k_w),this));
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m_68k->space(AS_PROGRAM).install_readwrite_handler(0x10000, 0x1001f, read16_delegate(FUNC(balsente_state::shrike_io_68k_r),this), write16_delegate(FUNC(balsente_state::shrike_io_68k_w),this));
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expand_roms(EXPAND_ALL); config_shooter_adc(FALSE, 32);
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expand_roms(EXPAND_ALL); config_shooter_adc(FALSE, 32);
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}
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}
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@ -587,8 +587,8 @@ READ8_MEMBER(berzerk_state::berzerk_audio_r)
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static SOUND_RESET(berzerk)
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static SOUND_RESET(berzerk)
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{
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{
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address_space &space = machine.device("maincpu")->memory().space(AS_IO);
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berzerk_state *state = machine.driver_data<berzerk_state>();
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berzerk_state *state = machine.driver_data<berzerk_state>();
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address_space &space = state->m_maincpu->space(AS_IO);
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/* clears the flip-flop controlling the volume and freq on the speech chip */
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/* clears the flip-flop controlling the volume and freq on the speech chip */
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state->berzerk_audio_w(space, 4, 0x40);
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state->berzerk_audio_w(space, 4, 0x40);
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}
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}
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@ -111,7 +111,8 @@ public:
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: driver_device(mconfig, type, tag),
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: driver_device(mconfig, type, tag),
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m_vfd0(*this, "vfd0"),
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m_vfd0(*this, "vfd0"),
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m_maincpu(*this, "maincpu"),
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m_maincpu(*this, "maincpu"),
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m_upd7759(*this, "upd") { }
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m_upd7759(*this, "upd"),
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m_adder2(*this, "adder2") { }
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optional_device<bfm_bd1_t> m_vfd0;
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optional_device<bfm_bd1_t> m_vfd0;
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@ -187,6 +188,7 @@ public:
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int sc1_find_project_string( );
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int sc1_find_project_string( );
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_maincpu;
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optional_device<upd7759_device> m_upd7759;
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optional_device<upd7759_device> m_upd7759;
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optional_device<cpu_device> m_adder2;
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};
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};
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#define VFD_RESET 0x20
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#define VFD_RESET 0x20
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@ -621,7 +623,7 @@ WRITE8_MEMBER(bfm_sc1_state::nec_latch_w)
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WRITE8_MEMBER(bfm_sc1_state::vid_uart_tx_w)
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WRITE8_MEMBER(bfm_sc1_state::vid_uart_tx_w)
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{
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{
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adder2_send(data);
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adder2_send(data);
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machine().device("adder2")->execute().set_input_line(M6809_IRQ_LINE, ASSERT_LINE );//HOLD_LINE);// trigger IRQ
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m_adder2->set_input_line(M6809_IRQ_LINE, ASSERT_LINE );//HOLD_LINE);// trigger IRQ
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}
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}
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///////////////////////////////////////////////////////////////////////////
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///////////////////////////////////////////////////////////////////////////
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@ -181,7 +181,8 @@ public:
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m_vfd0(*this, "vfd0"),
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m_vfd0(*this, "vfd0"),
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m_vfd1(*this, "vfd1"),
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m_vfd1(*this, "vfd1"),
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m_maincpu(*this, "maincpu"),
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m_maincpu(*this, "maincpu"),
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m_upd7759(*this, "upd") { }
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m_upd7759(*this, "upd"),
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m_adder2(*this, "adder2") { }
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optional_device<bfm_bd1_t> m_vfd0;
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optional_device<bfm_bd1_t> m_vfd0;
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optional_device<bfm_bd1_t> m_vfd1;
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optional_device<bfm_bd1_t> m_vfd1;
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@ -318,6 +319,7 @@ public:
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void sc2awpdmd_common_init(int reels, int decrypt);
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void sc2awpdmd_common_init(int reels, int decrypt);
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_maincpu;
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required_device<upd7759_device> m_upd7759;
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required_device<upd7759_device> m_upd7759;
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optional_device<cpu_device> m_adder2;
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};
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};
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@ -1028,7 +1030,7 @@ WRITE8_MEMBER(bfm_sc2_state::uart2data_w)
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WRITE8_MEMBER(bfm_sc2_state::vid_uart_tx_w)
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WRITE8_MEMBER(bfm_sc2_state::vid_uart_tx_w)
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{
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{
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adder2_send(data);
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adder2_send(data);
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machine().device("adder2")->execute().set_input_line(M6809_IRQ_LINE, HOLD_LINE );
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m_adder2->set_input_line(M6809_IRQ_LINE, HOLD_LINE );
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LOG_SERIAL(("sadder %02X (%c)\n",data, data ));
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LOG_SERIAL(("sadder %02X (%c)\n",data, data ));
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}
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}
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@ -893,7 +893,8 @@ void calchase_state::machine_reset()
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static void set_gate_a20(running_machine &machine, int a20)
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static void set_gate_a20(running_machine &machine, int a20)
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{
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{
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machine.device("maincpu")->execute().set_input_line(INPUT_LINE_A20, a20);
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calchase_state *drvstate = machine.driver_data<calchase_state>();
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drvstate->m_maincpu->set_input_line(INPUT_LINE_A20, a20);
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}
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}
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static void keyboard_interrupt(running_machine &machine, int state)
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static void keyboard_interrupt(running_machine &machine, int state)
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@ -213,7 +213,7 @@ READ8_MEMBER(chinagat_state::saiyugoub1_mcu_command_r )
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#if 0
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#if 0
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if (m_mcu_command == 0x78)
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if (m_mcu_command == 0x78)
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{
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{
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space.machine().device<cpu_device>("mcu")->suspend(SUSPEND_REASON_HALT, 1); /* Suspend (speed up) */
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m_mcu->suspend(SUSPEND_REASON_HALT, 1); /* Suspend (speed up) */
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}
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}
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#endif
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#endif
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return m_mcu_command;
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return m_mcu_command;
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@ -225,7 +225,7 @@ WRITE8_MEMBER(chinagat_state::saiyugoub1_mcu_command_w )
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#if 0
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#if 0
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if (data != 0x78)
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if (data != 0x78)
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{
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{
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space.machine().device<cpu_device>("mcu")->resume(SUSPEND_REASON_HALT); /* Wake up */
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m_mcu->resume(SUSPEND_REASON_HALT); /* Wake up */
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}
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}
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#endif
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#endif
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}
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}
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@ -277,7 +277,7 @@ CUSTOM_INPUT_MEMBER(cidelsa_state::cdp1869_pcb_r)
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INPUT_CHANGED_MEMBER(cidelsa_state::ef_w)
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INPUT_CHANGED_MEMBER(cidelsa_state::ef_w)
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{
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{
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machine().device(CDP1802_TAG)->execute().set_input_line((int)(FPTR)param, newval);
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m_maincpu->set_input_line((int)(FPTR)param, newval);
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}
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}
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static INPUT_PORTS_START( destryer )
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static INPUT_PORTS_START( destryer )
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@ -1530,13 +1530,13 @@ TIMER_DEVICE_CALLBACK_MEMBER(cischeat_state::bigrun_scanline)
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int scanline = param;
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int scanline = param;
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if(scanline == 240) // vblank-out irq
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if(scanline == 240) // vblank-out irq
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machine().device("cpu1")->execute().set_input_line(4, HOLD_LINE);
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m_cpu1->set_input_line(4, HOLD_LINE);
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if(scanline == 154)
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if(scanline == 154)
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machine().device("cpu1")->execute().set_input_line(2, HOLD_LINE);
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m_cpu1->set_input_line(2, HOLD_LINE);
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if(scanline == 69)
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if(scanline == 69)
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machine().device("cpu1")->execute().set_input_line(1, HOLD_LINE);
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m_cpu1->set_input_line(1, HOLD_LINE);
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}
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}
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@ -2473,7 +2473,7 @@ ROM_END
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DRIVER_INIT_MEMBER(cischeat_state,wildplt)
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DRIVER_INIT_MEMBER(cischeat_state,wildplt)
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{
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{
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machine().device("cpu1")->memory().space(AS_PROGRAM).install_read_handler(0x080000, 0x087fff, read16_delegate(FUNC(cischeat_state::wildplt_vregs_r),this));
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m_cpu1->space(AS_PROGRAM).install_read_handler(0x080000, 0x087fff, read16_delegate(FUNC(cischeat_state::wildplt_vregs_r),this));
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DRIVER_INIT_CALL(f1gpstar);
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DRIVER_INIT_CALL(f1gpstar);
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}
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}
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@ -134,8 +134,6 @@ static void coolpool_from_shiftreg(address_space &space, UINT32 address, UINT16
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MACHINE_RESET_MEMBER(coolpool_state,amerdart)
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MACHINE_RESET_MEMBER(coolpool_state,amerdart)
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{
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{
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m_dsp = machine().device("dsp");
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m_nvram_write_enable = 0;
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m_nvram_write_enable = 0;
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}
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}
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@ -204,8 +202,8 @@ WRITE16_MEMBER(coolpool_state::nvram_thrash_data_w)
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TIMER_DEVICE_CALLBACK_MEMBER(coolpool_state::amerdart_audio_int_gen)
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TIMER_DEVICE_CALLBACK_MEMBER(coolpool_state::amerdart_audio_int_gen)
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{
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{
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||||||
m_dsp->execute().set_input_line(0, ASSERT_LINE);
|
m_dsp->set_input_line(0, ASSERT_LINE);
|
||||||
m_dsp->execute().set_input_line(0, CLEAR_LINE);
|
m_dsp->set_input_line(0, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -218,7 +216,7 @@ WRITE16_MEMBER(coolpool_state::amerdart_misc_w)
|
|||||||
|
|
||||||
/* bits 10-15 are counted down over time */
|
/* bits 10-15 are counted down over time */
|
||||||
|
|
||||||
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, (data & 0x0400) ? ASSERT_LINE : CLEAR_LINE);
|
m_dsp->set_input_line(INPUT_LINE_RESET, (data & 0x0400) ? ASSERT_LINE : CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
READ16_MEMBER(coolpool_state::amerdart_dsp_bio_line_r)
|
READ16_MEMBER(coolpool_state::amerdart_dsp_bio_line_r)
|
||||||
@ -432,7 +430,7 @@ WRITE16_MEMBER(coolpool_state::coolpool_misc_w)
|
|||||||
coin_counter_w(machine(), 0, ~data & 0x0001);
|
coin_counter_w(machine(), 0, ~data & 0x0001);
|
||||||
coin_counter_w(machine(), 1, ~data & 0x0002);
|
coin_counter_w(machine(), 1, ~data & 0x0002);
|
||||||
|
|
||||||
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, (data & 0x0400) ? ASSERT_LINE : CLEAR_LINE);
|
m_dsp->set_input_line(INPUT_LINE_RESET, (data & 0x0400) ? ASSERT_LINE : CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -448,9 +446,9 @@ TIMER_CALLBACK_MEMBER(coolpool_state::deferred_iop_w)
|
|||||||
{
|
{
|
||||||
m_iop_cmd = param;
|
m_iop_cmd = param;
|
||||||
m_cmd_pending = 1;
|
m_cmd_pending = 1;
|
||||||
machine().device("dsp")->execute().set_input_line(0, HOLD_LINE); /* ??? I have no idea who should generate this! */
|
m_dsp->set_input_line(0, HOLD_LINE); /* ??? I have no idea who should generate this! */
|
||||||
/* the DSP polls the status bit so it isn't strictly */
|
/* the DSP polls the status bit so it isn't strictly */
|
||||||
/* necessary to also have an IRQ */
|
/* necessary to also have an IRQ */
|
||||||
machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(50));
|
machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(50));
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1163,7 +1161,7 @@ DRIVER_INIT_MEMBER(coolpool_state,amerdart)
|
|||||||
|
|
||||||
DRIVER_INIT_MEMBER(coolpool_state,coolpool)
|
DRIVER_INIT_MEMBER(coolpool_state,coolpool)
|
||||||
{
|
{
|
||||||
machine().device("dsp")->memory().space(AS_IO).install_read_handler(0x07, 0x07, read16_delegate(FUNC(coolpool_state::coolpool_input_r),this));
|
m_dsp->space(AS_IO).install_read_handler(0x07, 0x07, read16_delegate(FUNC(coolpool_state::coolpool_input_r),this));
|
||||||
|
|
||||||
register_state_save(machine());
|
register_state_save(machine());
|
||||||
}
|
}
|
||||||
|
@ -225,11 +225,11 @@ INTERRUPT_GEN_MEMBER(cvs_state::cvs_main_cpu_interrupt)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static void cvs_slave_cpu_interrupt( device_t *cpu, int state )
|
static void cvs_slave_cpu_interrupt( cpu_device *cpu, int state )
|
||||||
{
|
{
|
||||||
cpu->execute().set_input_line_vector(0, 0x03);
|
cpu->set_input_line_vector(0, 0x03);
|
||||||
//cpu->execute().set_input_line(0, state ? ASSERT_LINE : CLEAR_LINE);
|
//cpu->set_input_line(0, state ? ASSERT_LINE : CLEAR_LINE);
|
||||||
cpu->execute().set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
|
cpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -144,7 +144,7 @@ void darius_state::parse_control( ) /* assumes Z80 sandwiched between 68Ks */
|
|||||||
/* bit 0 enables cpu B */
|
/* bit 0 enables cpu B */
|
||||||
/* however this fails when recovering from a save state
|
/* however this fails when recovering from a save state
|
||||||
if cpu B is disabled !! */
|
if cpu B is disabled !! */
|
||||||
m_cpub->execute().set_input_line(INPUT_LINE_RESET, (m_cpua_ctrl & 0x01) ? CLEAR_LINE : ASSERT_LINE);
|
m_cpub->set_input_line(INPUT_LINE_RESET, (m_cpua_ctrl & 0x01) ? CLEAR_LINE : ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE16_MEMBER(darius_state::cpua_ctrl_w)
|
WRITE16_MEMBER(darius_state::cpua_ctrl_w)
|
||||||
@ -487,7 +487,7 @@ ADDRESS_MAP_END
|
|||||||
WRITE_LINE_MEMBER(darius_state::darius_adpcm_int)
|
WRITE_LINE_MEMBER(darius_state::darius_adpcm_int)
|
||||||
{
|
{
|
||||||
if (m_nmi_enable)
|
if (m_nmi_enable)
|
||||||
m_adpcm->execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
m_adpcm->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const msm5205_interface msm5205_config =
|
static const msm5205_interface msm5205_config =
|
||||||
@ -821,8 +821,6 @@ void darius_state::machine_start()
|
|||||||
membank("bank1")->configure_entry(4, memregion("audiocpu")->base());
|
membank("bank1")->configure_entry(4, memregion("audiocpu")->base());
|
||||||
membank("bank1")->set_entry(4);
|
membank("bank1")->set_entry(4);
|
||||||
|
|
||||||
m_cpub = machine().device("cpub");
|
|
||||||
m_adpcm = machine().device("adpcm");
|
|
||||||
m_pc080sn = machine().device("pc080sn");
|
m_pc080sn = machine().device("pc080sn");
|
||||||
m_tc0140syt = machine().device<tc0140syt_device>("tc0140syt");
|
m_tc0140syt = machine().device<tc0140syt_device>("tc0140syt");
|
||||||
|
|
||||||
|
@ -152,7 +152,7 @@ WRITE8_MEMBER(djboy_state::beast_data_w)
|
|||||||
m_data_to_beast = data;
|
m_data_to_beast = data;
|
||||||
m_z80_to_beast_full = 1;
|
m_z80_to_beast_full = 1;
|
||||||
m_beast_int0_l = 0;
|
m_beast_int0_l = 0;
|
||||||
m_beast->execute().set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
|
m_beast->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
READ8_MEMBER(djboy_state::beast_data_r)
|
READ8_MEMBER(djboy_state::beast_data_r)
|
||||||
@ -230,7 +230,7 @@ WRITE8_MEMBER(djboy_state::coin_count_w)
|
|||||||
WRITE8_MEMBER(djboy_state::trigger_nmi_on_sound_cpu2)
|
WRITE8_MEMBER(djboy_state::trigger_nmi_on_sound_cpu2)
|
||||||
{
|
{
|
||||||
soundlatch_byte_w(space, 0, data);
|
soundlatch_byte_w(space, 0, data);
|
||||||
m_cpu2->execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
m_cpu2->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
||||||
} /* trigger_nmi_on_sound_cpu2 */
|
} /* trigger_nmi_on_sound_cpu2 */
|
||||||
|
|
||||||
WRITE8_MEMBER(djboy_state::cpu2_bankswitch_w)
|
WRITE8_MEMBER(djboy_state::cpu2_bankswitch_w)
|
||||||
@ -330,7 +330,7 @@ WRITE8_MEMBER(djboy_state::beast_p1_w)
|
|||||||
if (data == 0xff)
|
if (data == 0xff)
|
||||||
{
|
{
|
||||||
m_beast_int0_l = 1;
|
m_beast_int0_l = 1;
|
||||||
m_beast->execute().set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
|
m_beast->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
m_beast_p1 = data;
|
m_beast_p1 = data;
|
||||||
@ -371,7 +371,7 @@ READ8_MEMBER(djboy_state::beast_p3_r)
|
|||||||
WRITE8_MEMBER(djboy_state::beast_p3_w)
|
WRITE8_MEMBER(djboy_state::beast_p3_w)
|
||||||
{
|
{
|
||||||
m_beast_p3 = data;
|
m_beast_p3 = data;
|
||||||
m_cpu1->execute().set_input_line(INPUT_LINE_RESET, data & 2 ? CLEAR_LINE : ASSERT_LINE);
|
m_cpu1->set_input_line(INPUT_LINE_RESET, data & 2 ? CLEAR_LINE : ASSERT_LINE);
|
||||||
}
|
}
|
||||||
/* Program/data maps are defined in the 8051 core */
|
/* Program/data maps are defined in the 8051 core */
|
||||||
|
|
||||||
@ -524,9 +524,6 @@ void djboy_state::machine_start()
|
|||||||
membank("bank3")->configure_entries(3, 5, &CPU2[0x10000], 0x4000);
|
membank("bank3")->configure_entries(3, 5, &CPU2[0x10000], 0x4000);
|
||||||
membank("bank4")->configure_entry(0, &MAIN[0x10000]); /* unsure if/how this area is banked */
|
membank("bank4")->configure_entry(0, &MAIN[0x10000]); /* unsure if/how this area is banked */
|
||||||
|
|
||||||
m_cpu1 = machine().device("cpu1");
|
|
||||||
m_cpu2 = machine().device("cpu2");
|
|
||||||
m_beast = machine().device("beast");
|
|
||||||
m_pandora = machine().device("pandora");
|
m_pandora = machine().device("pandora");
|
||||||
|
|
||||||
save_item(NAME(m_videoreg));
|
save_item(NAME(m_videoreg));
|
||||||
|
@ -402,8 +402,6 @@ INTERRUPT_GEN_MEMBER(dkong_state::s2650_interrupt)
|
|||||||
|
|
||||||
void dkong_state::dkong_init_device_driver_data( )
|
void dkong_state::dkong_init_device_driver_data( )
|
||||||
{
|
{
|
||||||
m_dev_n2a03a = machine().device("n2a03a");
|
|
||||||
m_dev_n2a03b = machine().device("n2a03b");
|
|
||||||
m_dev_6h = machine().device("ls259.6h");
|
m_dev_6h = machine().device("ls259.6h");
|
||||||
m_dev_vp2 = machine().device("virtual_p2");
|
m_dev_vp2 = machine().device("virtual_p2");
|
||||||
}
|
}
|
||||||
@ -697,13 +695,13 @@ WRITE8_MEMBER(dkong_state::dkong3_2a03_reset_w)
|
|||||||
{
|
{
|
||||||
if (data & 1)
|
if (data & 1)
|
||||||
{
|
{
|
||||||
m_dev_n2a03a->execute().set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
m_dev_n2a03a->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
||||||
m_dev_n2a03b->execute().set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
m_dev_n2a03b->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
m_dev_n2a03a->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dev_n2a03a->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
m_dev_n2a03b->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dev_n2a03b->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -175,7 +175,7 @@ TIMER_CALLBACK_MEMBER(exterm_state::sound_delayed_w)
|
|||||||
/* data is latched independently for both sound CPUs */
|
/* data is latched independently for both sound CPUs */
|
||||||
m_master_sound_latch = m_slave_sound_latch = param;
|
m_master_sound_latch = m_slave_sound_latch = param;
|
||||||
m_audiocpu->set_input_line(M6502_IRQ_LINE, ASSERT_LINE);
|
m_audiocpu->set_input_line(M6502_IRQ_LINE, ASSERT_LINE);
|
||||||
machine().device("audioslave")->execute().set_input_line(M6502_IRQ_LINE, ASSERT_LINE);
|
m_audioslave->set_input_line(M6502_IRQ_LINE, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -231,7 +231,7 @@ READ8_MEMBER(exterm_state::sound_master_latch_r)
|
|||||||
READ8_MEMBER(exterm_state::sound_slave_latch_r)
|
READ8_MEMBER(exterm_state::sound_slave_latch_r)
|
||||||
{
|
{
|
||||||
/* read latch and clear interrupt */
|
/* read latch and clear interrupt */
|
||||||
machine().device("audioslave")->execute().set_input_line(M6502_IRQ_LINE, CLEAR_LINE);
|
m_audioslave->set_input_line(M6502_IRQ_LINE, CLEAR_LINE);
|
||||||
return m_slave_sound_latch;
|
return m_slave_sound_latch;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -247,7 +247,7 @@ WRITE8_MEMBER(exterm_state::sound_slave_dac_w)
|
|||||||
READ8_MEMBER(exterm_state::sound_nmi_to_slave_r)
|
READ8_MEMBER(exterm_state::sound_nmi_to_slave_r)
|
||||||
{
|
{
|
||||||
/* a read from here triggers an NMI pulse to the slave */
|
/* a read from here triggers an NMI pulse to the slave */
|
||||||
machine().device("audioslave")->execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
m_audioslave->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
||||||
return 0xff;
|
return 0xff;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -109,7 +109,7 @@ WRITE8_MEMBER(exzisus_state::exzisus_sharedram_ac_w)
|
|||||||
// is it ok that cpub_reset refers to cpuc?
|
// is it ok that cpub_reset refers to cpuc?
|
||||||
WRITE8_MEMBER(exzisus_state::exzisus_cpub_reset_w)
|
WRITE8_MEMBER(exzisus_state::exzisus_cpub_reset_w)
|
||||||
{
|
{
|
||||||
machine().device("cpuc")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE);
|
m_cpuc->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
#if 0
|
#if 0
|
||||||
|
@ -1430,7 +1430,7 @@ WRITE32_MEMBER(firebeat_state::comm_uart_w )
|
|||||||
static void comm_uart_irq_callback(running_machine &machine, int channel, int value)
|
static void comm_uart_irq_callback(running_machine &machine, int channel, int value)
|
||||||
{
|
{
|
||||||
// TODO
|
// TODO
|
||||||
//machine.device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ2, ASSERT_LINE);
|
//m_maincpu->set_input_line(INPUT_LINE_IRQ2, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
@ -1504,20 +1504,20 @@ static void midi_uart_irq_callback(running_machine &machine, int channel, int va
|
|||||||
if ((state->m_extend_board_irq_enable & 0x02) == 0 && value != CLEAR_LINE)
|
if ((state->m_extend_board_irq_enable & 0x02) == 0 && value != CLEAR_LINE)
|
||||||
{
|
{
|
||||||
state->m_extend_board_irq_active |= 0x02;
|
state->m_extend_board_irq_active |= 0x02;
|
||||||
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ1, ASSERT_LINE);
|
state->m_maincpu->set_input_line(INPUT_LINE_IRQ1, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
|
state->m_maincpu->set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if ((state->m_extend_board_irq_enable & 0x01) == 0 && value != CLEAR_LINE)
|
if ((state->m_extend_board_irq_enable & 0x01) == 0 && value != CLEAR_LINE)
|
||||||
{
|
{
|
||||||
state->m_extend_board_irq_active |= 0x01;
|
state->m_extend_board_irq_active |= 0x01;
|
||||||
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ1, ASSERT_LINE);
|
state->m_maincpu->set_input_line(INPUT_LINE_IRQ1, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
|
state->m_maincpu->set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -218,7 +218,7 @@ MACHINE_RESET_MEMBER(gaelco3d_state,common)
|
|||||||
membank("bank1")->set_entry(0);
|
membank("bank1")->set_entry(0);
|
||||||
|
|
||||||
/* keep the TMS32031 halted until the code is ready to go */
|
/* keep the TMS32031 halted until the code is ready to go */
|
||||||
machine().device("tms")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_tms->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
|
|
||||||
for (i = 0; i < SOUND_CHANNELS; i++)
|
for (i = 0; i < SOUND_CHANNELS; i++)
|
||||||
{
|
{
|
||||||
@ -358,7 +358,7 @@ TIMER_CALLBACK_MEMBER(gaelco3d_state::delayed_sound_w)
|
|||||||
if (LOG)
|
if (LOG)
|
||||||
logerror("delayed_sound_w(%02X)\n", param);
|
logerror("delayed_sound_w(%02X)\n", param);
|
||||||
m_sound_data = param;
|
m_sound_data = param;
|
||||||
machine().device("adsp")->execute().set_input_line(ADSP2115_IRQ2, ASSERT_LINE);
|
m_adsp->set_input_line(ADSP2115_IRQ2, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -375,7 +375,7 @@ READ16_MEMBER(gaelco3d_state::sound_data_r)
|
|||||||
{
|
{
|
||||||
if (LOG)
|
if (LOG)
|
||||||
logerror("sound_data_r(%02X)\n", m_sound_data);
|
logerror("sound_data_r(%02X)\n", m_sound_data);
|
||||||
machine().device("adsp")->execute().set_input_line(ADSP2115_IRQ2, CLEAR_LINE);
|
m_adsp->set_input_line(ADSP2115_IRQ2, CLEAR_LINE);
|
||||||
return m_sound_data;
|
return m_sound_data;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -496,7 +496,7 @@ WRITE16_MEMBER(gaelco3d_state::tms_reset_w)
|
|||||||
/* it does not ever appear to be touched after that */
|
/* it does not ever appear to be touched after that */
|
||||||
if (LOG)
|
if (LOG)
|
||||||
logerror("%06X:tms_reset_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
|
logerror("%06X:tms_reset_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
|
||||||
machine().device("tms")->execute().set_input_line(INPUT_LINE_RESET, (data == 0xffff) ? CLEAR_LINE : ASSERT_LINE);
|
m_tms->set_input_line(INPUT_LINE_RESET, (data == 0xffff) ? CLEAR_LINE : ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -507,7 +507,7 @@ WRITE16_MEMBER(gaelco3d_state::tms_irq_w)
|
|||||||
if (LOG)
|
if (LOG)
|
||||||
logerror("%06X:tms_irq_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
|
logerror("%06X:tms_irq_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
|
||||||
if (ACCESSING_BITS_0_7)
|
if (ACCESSING_BITS_0_7)
|
||||||
machine().device("tms")->execute().set_input_line(0, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
|
m_tms->set_input_line(0, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -617,10 +617,8 @@ WRITE16_MEMBER(gaelco3d_state::adsp_rombank_w)
|
|||||||
|
|
||||||
TIMER_DEVICE_CALLBACK_MEMBER(gaelco3d_state::adsp_autobuffer_irq)
|
TIMER_DEVICE_CALLBACK_MEMBER(gaelco3d_state::adsp_autobuffer_irq)
|
||||||
{
|
{
|
||||||
cpu_device *adsp = machine().device<cpu_device>("adsp");
|
|
||||||
|
|
||||||
/* get the index register */
|
/* get the index register */
|
||||||
int reg = adsp->state_int(ADSP2100_I0 + m_adsp_ireg);
|
int reg = m_adsp->state_int(ADSP2100_I0 + m_adsp_ireg);
|
||||||
|
|
||||||
/* copy the current data into the buffer */
|
/* copy the current data into the buffer */
|
||||||
// logerror("ADSP buffer: I%d=%04X incs=%04X size=%04X\n", m_adsp_ireg, reg, m_adsp_incs, m_adsp_size);
|
// logerror("ADSP buffer: I%d=%04X incs=%04X size=%04X\n", m_adsp_ireg, reg, m_adsp_incs, m_adsp_size);
|
||||||
@ -637,11 +635,11 @@ TIMER_DEVICE_CALLBACK_MEMBER(gaelco3d_state::adsp_autobuffer_irq)
|
|||||||
reg = m_adsp_ireg_base;
|
reg = m_adsp_ireg_base;
|
||||||
|
|
||||||
/* generate the (internal, thats why the pulse) irq */
|
/* generate the (internal, thats why the pulse) irq */
|
||||||
generic_pulse_irq_line(*adsp, ADSP2105_IRQ1, 1);
|
generic_pulse_irq_line(m_adsp, ADSP2105_IRQ1, 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* store it */
|
/* store it */
|
||||||
adsp->set_state_int(ADSP2100_I0 + m_adsp_ireg, reg);
|
m_adsp->set_state_int(ADSP2100_I0 + m_adsp_ireg, reg);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -791,7 +791,7 @@ WRITE8_MEMBER(galaxian_state::sfx_sample_control_w)
|
|||||||
/* the inverse of bit 0 clocks the flip flop to signal an INT */
|
/* the inverse of bit 0 clocks the flip flop to signal an INT */
|
||||||
/* it is automatically cleared on the acknowledge */
|
/* it is automatically cleared on the acknowledge */
|
||||||
if ((old & 0x01) && !(data & 0x01))
|
if ((old & 0x01) && !(data & 0x01))
|
||||||
machine().device("audio2")->execute().set_input_line(0, HOLD_LINE);
|
m_audio2->set_input_line(0, HOLD_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -728,7 +728,8 @@ MACHINE_CONFIG_END
|
|||||||
|
|
||||||
static void set_gate_a20(running_machine &machine, int a20)
|
static void set_gate_a20(running_machine &machine, int a20)
|
||||||
{
|
{
|
||||||
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_A20, a20);
|
gamecstl_state *drvstate = machine.driver_data<gamecstl_state>();
|
||||||
|
drvstate->m_maincpu->set_input_line(INPUT_LINE_A20, a20);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void keyboard_interrupt(running_machine &machine, int state)
|
static void keyboard_interrupt(running_machine &machine, int state)
|
||||||
|
@ -635,7 +635,7 @@ IRQ_CALLBACK_MEMBER(gammagic_state::irq_callback)
|
|||||||
static MACHINE_START(gammagic)
|
static MACHINE_START(gammagic)
|
||||||
{
|
{
|
||||||
gammagic_state *state = machine.driver_data<gammagic_state>();
|
gammagic_state *state = machine.driver_data<gammagic_state>();
|
||||||
machine.device("maincpu")->execute().set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(gammagic_state::irq_callback),state));
|
state->m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(gammagic_state::irq_callback),state));
|
||||||
|
|
||||||
state->m_pit8254 = machine.device( "pit8254" );
|
state->m_pit8254 = machine.device( "pit8254" );
|
||||||
state->m_pic8259_1 = machine.device( "pic8259_1" );
|
state->m_pic8259_1 = machine.device( "pic8259_1" );
|
||||||
@ -749,7 +749,8 @@ static const struct pit8253_config gammagic_pit8254_config =
|
|||||||
|
|
||||||
static void set_gate_a20(running_machine &machine, int a20)
|
static void set_gate_a20(running_machine &machine, int a20)
|
||||||
{
|
{
|
||||||
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_A20, a20);
|
gammagic_state *drvstate = machine.driver_data<gammagic_state>();
|
||||||
|
drvstate->m_maincpu->set_input_line(INPUT_LINE_A20, a20);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void keyboard_interrupt(running_machine &machine, int state)
|
static void keyboard_interrupt(running_machine &machine, int state)
|
||||||
|
@ -243,6 +243,8 @@ public:
|
|||||||
m_work_ram(*this, "work_ram"),
|
m_work_ram(*this, "work_ram"),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
m_audiocpu(*this, "audiocpu"),
|
m_audiocpu(*this, "audiocpu"),
|
||||||
|
m_dsp(*this, "dsp"),
|
||||||
|
m_dsp2(*this, "dsp2"),
|
||||||
m_eeprom(*this, "eeprom") { }
|
m_eeprom(*this, "eeprom") { }
|
||||||
|
|
||||||
required_shared_ptr<UINT32> m_work_ram;
|
required_shared_ptr<UINT32> m_work_ram;
|
||||||
@ -272,6 +274,8 @@ public:
|
|||||||
TIMER_CALLBACK_MEMBER(irq_off);
|
TIMER_CALLBACK_MEMBER(irq_off);
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
required_device<cpu_device> m_audiocpu;
|
required_device<cpu_device> m_audiocpu;
|
||||||
|
required_device<cpu_device> m_dsp;
|
||||||
|
optional_device<cpu_device> m_dsp2;
|
||||||
required_device<eeprom_device> m_eeprom;
|
required_device<eeprom_device> m_eeprom;
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -285,12 +289,14 @@ WRITE32_MEMBER(gticlub_state::paletteram32_w)
|
|||||||
|
|
||||||
static void voodoo_vblank_0(device_t *device, int param)
|
static void voodoo_vblank_0(device_t *device, int param)
|
||||||
{
|
{
|
||||||
device->machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, param ? ASSERT_LINE : CLEAR_LINE);
|
gticlub_state *state = device->machine().driver_data<gticlub_state>();
|
||||||
|
state->m_maincpu->set_input_line(INPUT_LINE_IRQ0, param ? ASSERT_LINE : CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void voodoo_vblank_1(device_t *device, int param)
|
static void voodoo_vblank_1(device_t *device, int param)
|
||||||
{
|
{
|
||||||
device->machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ1, param ? ASSERT_LINE : CLEAR_LINE);
|
gticlub_state *state = device->machine().driver_data<gticlub_state>();
|
||||||
|
state->m_maincpu->set_input_line(INPUT_LINE_IRQ1, param ? ASSERT_LINE : CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
READ32_MEMBER(gticlub_state::gticlub_k001604_tile_r)
|
READ32_MEMBER(gticlub_state::gticlub_k001604_tile_r)
|
||||||
@ -722,7 +728,7 @@ static void sound_irq_callback( running_machine &machine, int irq )
|
|||||||
gticlub_state *state = machine.driver_data<gticlub_state>();
|
gticlub_state *state = machine.driver_data<gticlub_state>();
|
||||||
int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
|
int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
|
||||||
|
|
||||||
machine.device("audiocpu")->execute().set_input_line(line, ASSERT_LINE);
|
state->m_audiocpu->set_input_line(line, ASSERT_LINE);
|
||||||
machine.scheduler().timer_set(attotime::from_usec(5), timer_expired_delegate(FUNC(gticlub_state::irq_off),state), line);
|
machine.scheduler().timer_set(attotime::from_usec(5), timer_expired_delegate(FUNC(gticlub_state::irq_off),state), line);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -809,7 +815,7 @@ static const k001604_interface hangplt_k001604_intf_r =
|
|||||||
|
|
||||||
MACHINE_RESET_MEMBER(gticlub_state,gticlub)
|
MACHINE_RESET_MEMBER(gticlub_state,gticlub)
|
||||||
{
|
{
|
||||||
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
static MACHINE_CONFIG_START( gticlub, gticlub_state )
|
static MACHINE_CONFIG_START( gticlub, gticlub_state )
|
||||||
@ -890,8 +896,8 @@ static const k033906_interface hangplt_k033906_intf_1 =
|
|||||||
|
|
||||||
MACHINE_RESET_MEMBER(gticlub_state,hangplt)
|
MACHINE_RESET_MEMBER(gticlub_state,hangplt)
|
||||||
{
|
{
|
||||||
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
machine().device("dsp2")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dsp2->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const voodoo_config voodoo_l_intf =
|
static const voodoo_config voodoo_l_intf =
|
||||||
|
@ -137,7 +137,8 @@ static const ptm6840_interface ptm_intf =
|
|||||||
|
|
||||||
static void tms_interrupt(running_machine &machine, int state)
|
static void tms_interrupt(running_machine &machine, int state)
|
||||||
{
|
{
|
||||||
machine.device("maincpu")->execute().set_input_line(INT_TMS34061, state);
|
guab_state *drvstate = machine.driver_data<guab_state>();
|
||||||
|
drvstate->m_maincpu->set_input_line(INT_TMS34061, state);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct tms34061_interface tms34061intf =
|
static const struct tms34061_interface tms34061intf =
|
||||||
|
@ -157,7 +157,7 @@ GFXDECODE_END
|
|||||||
WRITE_LINE_MEMBER(hcastle_state::irqhandler)
|
WRITE_LINE_MEMBER(hcastle_state::irqhandler)
|
||||||
{
|
{
|
||||||
// hcastle_state *state = device->machine().driver_data<hcastle_state>();
|
// hcastle_state *state = device->machine().driver_data<hcastle_state>();
|
||||||
// state->m_audiocpu.device(0)->execute().set_input_line(linestate);
|
// state->m_audiocpu->set_input_line(linestate);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(hcastle_state::volume_callback)
|
WRITE8_MEMBER(hcastle_state::volume_callback)
|
||||||
|
@ -1784,11 +1784,11 @@ void hng64_state::machine_reset()
|
|||||||
|
|
||||||
KL5C80_virtual_mem_sync(this);
|
KL5C80_virtual_mem_sync(this);
|
||||||
|
|
||||||
address_space &space = machine().device<z80_device>("comm")->space(AS_PROGRAM);
|
address_space &space = m_comm->space(AS_PROGRAM);
|
||||||
space.set_direct_update_handler(direct_update_delegate(FUNC(hng64_state::KL5C80_direct_handler), this));
|
space.set_direct_update_handler(direct_update_delegate(FUNC(hng64_state::KL5C80_direct_handler), this));
|
||||||
|
|
||||||
machine().device("comm")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE); // reset the CPU and let 'er rip
|
m_comm->set_input_line(INPUT_LINE_RESET, PULSE_LINE); // reset the CPU and let 'er rip
|
||||||
// machine().device("comm")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE); // hold on there pardner...
|
// m_comm->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); // hold on there pardner...
|
||||||
|
|
||||||
// "Display List" init - ugly
|
// "Display List" init - ugly
|
||||||
m_activeBuffer = 0;
|
m_activeBuffer = 0;
|
||||||
|
@ -334,6 +334,9 @@ public:
|
|||||||
m_sharc_dataram1(*this, "sharc_dataram1") ,
|
m_sharc_dataram1(*this, "sharc_dataram1") ,
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
m_audiocpu(*this, "audiocpu"),
|
m_audiocpu(*this, "audiocpu"),
|
||||||
|
m_gn680(*this, "gn680"),
|
||||||
|
m_dsp(*this, "dsp"),
|
||||||
|
m_dsp2(*this, "dsp2"),
|
||||||
m_eeprom(*this, "eeprom"),
|
m_eeprom(*this, "eeprom"),
|
||||||
m_k037122_1(*this, "k037122_1"),
|
m_k037122_1(*this, "k037122_1"),
|
||||||
m_k037122_2(*this, "k037122_2" ) { }
|
m_k037122_2(*this, "k037122_2" ) { }
|
||||||
@ -382,6 +385,9 @@ public:
|
|||||||
void jamma_jvs_cmd_exec();
|
void jamma_jvs_cmd_exec();
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
required_device<cpu_device> m_audiocpu;
|
required_device<cpu_device> m_audiocpu;
|
||||||
|
optional_device<cpu_device> m_gn680;
|
||||||
|
required_device<cpu_device> m_dsp;
|
||||||
|
optional_device<cpu_device> m_dsp2;
|
||||||
required_device<eeprom_device> m_eeprom;
|
required_device<eeprom_device> m_eeprom;
|
||||||
optional_device<k037122_device> m_k037122_1;
|
optional_device<k037122_device> m_k037122_1;
|
||||||
optional_device<k037122_device> m_k037122_2;
|
optional_device<k037122_device> m_k037122_2;
|
||||||
@ -429,7 +435,8 @@ WRITE32_MEMBER(hornet_state::hornet_k037122_reg_w)
|
|||||||
|
|
||||||
static void voodoo_vblank_0(device_t *device, int param)
|
static void voodoo_vblank_0(device_t *device, int param)
|
||||||
{
|
{
|
||||||
device->machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, param);
|
hornet_state *drvstate = device->machine().driver_data<hornet_state>();
|
||||||
|
drvstate->m_maincpu->set_input_line(INPUT_LINE_IRQ0, param);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void voodoo_vblank_1(device_t *device, int param)
|
static void voodoo_vblank_1(device_t *device, int param)
|
||||||
@ -633,7 +640,7 @@ WRITE32_MEMBER(hornet_state::gun_w)
|
|||||||
if (mem_mask == 0xffff0000)
|
if (mem_mask == 0xffff0000)
|
||||||
{
|
{
|
||||||
m_gn680_latch = data>>16;
|
m_gn680_latch = data>>16;
|
||||||
machine().device("gn680")->execute().set_input_line(M68K_IRQ_6, HOLD_LINE);
|
m_gn680->set_input_line(M68K_IRQ_6, HOLD_LINE);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -684,7 +691,7 @@ WRITE16_MEMBER(hornet_state::gn680_sysctrl)
|
|||||||
|
|
||||||
READ16_MEMBER(hornet_state::gn680_latch_r)
|
READ16_MEMBER(hornet_state::gn680_latch_r)
|
||||||
{
|
{
|
||||||
machine().device("gn680")->execute().set_input_line(M68K_IRQ_6, CLEAR_LINE);
|
m_gn680->set_input_line(M68K_IRQ_6, CLEAR_LINE);
|
||||||
|
|
||||||
return m_gn680_latch;
|
return m_gn680_latch;
|
||||||
}
|
}
|
||||||
@ -920,7 +927,7 @@ void hornet_state::machine_reset()
|
|||||||
membank("bank1")->set_entry(0);
|
membank("bank1")->set_entry(0);
|
||||||
}
|
}
|
||||||
|
|
||||||
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
|
|
||||||
if (usr5)
|
if (usr5)
|
||||||
membank("bank5")->set_base(usr5);
|
membank("bank5")->set_base(usr5);
|
||||||
@ -952,7 +959,7 @@ static void sound_irq_callback( running_machine &machine, int irq )
|
|||||||
hornet_state *state = machine.driver_data<hornet_state>();
|
hornet_state *state = machine.driver_data<hornet_state>();
|
||||||
int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
|
int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
|
||||||
|
|
||||||
machine.device("audiocpu")->execute().set_input_line(line, ASSERT_LINE);
|
state->m_audiocpu->set_input_line(line, ASSERT_LINE);
|
||||||
state->m_sound_irq_timer->adjust(attotime::from_usec(5), line);
|
state->m_sound_irq_timer->adjust(attotime::from_usec(5), line);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1055,8 +1062,8 @@ MACHINE_RESET_MEMBER(hornet_state,hornet_2board)
|
|||||||
membank("bank1")->configure_entries(0, memregion("user3")->bytes() / 0x10000, usr3, 0x10000);
|
membank("bank1")->configure_entries(0, memregion("user3")->bytes() / 0x10000, usr3, 0x10000);
|
||||||
membank("bank1")->set_entry(0);
|
membank("bank1")->set_entry(0);
|
||||||
}
|
}
|
||||||
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
machine().device("dsp2")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dsp2->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
|
|
||||||
if (usr5)
|
if (usr5)
|
||||||
{
|
{
|
||||||
|
@ -80,7 +80,8 @@ public:
|
|||||||
m_colorram(*this, "colorram"),
|
m_colorram(*this, "colorram"),
|
||||||
m_mastercpu(*this, "master"),
|
m_mastercpu(*this, "master"),
|
||||||
m_slavecpu(*this, "slave"),
|
m_slavecpu(*this, "slave"),
|
||||||
m_soundcpu(*this, "soundcpu"){ }
|
m_mermaid(*this, "mermaid"),
|
||||||
|
m_soundcpu(*this, "soundcpu") { }
|
||||||
|
|
||||||
/* Video */
|
/* Video */
|
||||||
required_shared_ptr<UINT8> m_videoram;
|
required_shared_ptr<UINT8> m_videoram;
|
||||||
@ -101,7 +102,7 @@ public:
|
|||||||
/* Devices */
|
/* Devices */
|
||||||
required_device<cpu_device> m_mastercpu;
|
required_device<cpu_device> m_mastercpu;
|
||||||
required_device<cpu_device> m_slavecpu;
|
required_device<cpu_device> m_slavecpu;
|
||||||
device_t *m_mermaid;
|
required_device<cpu_device> m_mermaid;
|
||||||
device_t *m_pandora;
|
device_t *m_pandora;
|
||||||
DECLARE_WRITE8_MEMBER(trigger_nmi_on_slave_cpu);
|
DECLARE_WRITE8_MEMBER(trigger_nmi_on_slave_cpu);
|
||||||
DECLARE_WRITE8_MEMBER(master_bankswitch_w);
|
DECLARE_WRITE8_MEMBER(master_bankswitch_w);
|
||||||
@ -131,7 +132,7 @@ public:
|
|||||||
UINT32 screen_update_hvyunit(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
UINT32 screen_update_hvyunit(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||||
void screen_eof_hvyunit(screen_device &screen, bool state);
|
void screen_eof_hvyunit(screen_device &screen, bool state);
|
||||||
TIMER_DEVICE_CALLBACK_MEMBER(hvyunit_scanline);
|
TIMER_DEVICE_CALLBACK_MEMBER(hvyunit_scanline);
|
||||||
required_device<cpu_device> m_soundcpu;
|
required_device<cpu_device> m_soundcpu;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
@ -143,7 +144,6 @@ public:
|
|||||||
|
|
||||||
void hvyunit_state::machine_start()
|
void hvyunit_state::machine_start()
|
||||||
{
|
{
|
||||||
m_mermaid = machine().device("mermaid");
|
|
||||||
m_pandora = machine().device("pandora");
|
m_pandora = machine().device("pandora");
|
||||||
|
|
||||||
// TODO: Save state
|
// TODO: Save state
|
||||||
@ -225,7 +225,7 @@ WRITE8_MEMBER(hvyunit_state::mermaid_data_w)
|
|||||||
m_data_to_mermaid = data;
|
m_data_to_mermaid = data;
|
||||||
m_z80_to_mermaid_full = 1;
|
m_z80_to_mermaid_full = 1;
|
||||||
m_mermaid_int0_l = 0;
|
m_mermaid_int0_l = 0;
|
||||||
m_mermaid->execute().set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
|
m_mermaid->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
READ8_MEMBER(hvyunit_state::mermaid_data_r)
|
READ8_MEMBER(hvyunit_state::mermaid_data_r)
|
||||||
@ -346,7 +346,7 @@ WRITE8_MEMBER(hvyunit_state::mermaid_p1_w)
|
|||||||
if (data == 0xff)
|
if (data == 0xff)
|
||||||
{
|
{
|
||||||
m_mermaid_int0_l = 1;
|
m_mermaid_int0_l = 1;
|
||||||
m_mermaid->execute().set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
|
m_mermaid->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
m_mermaid_p[1] = data;
|
m_mermaid_p[1] = data;
|
||||||
|
@ -4061,7 +4061,7 @@ MACHINE_CONFIG_END
|
|||||||
|
|
||||||
static void sound_irq(device_t *device, int state)
|
static void sound_irq(device_t *device, int state)
|
||||||
{
|
{
|
||||||
// machine.device("maincpu")->execute().set_input_line(3, state);
|
// m_maincpu->set_input_line(3, state);
|
||||||
}
|
}
|
||||||
|
|
||||||
static MACHINE_CONFIG_DERIVED( vbowl, igs011_base )
|
static MACHINE_CONFIG_DERIVED( vbowl, igs011_base )
|
||||||
|
@ -447,8 +447,8 @@ MACHINE_RESET_MEMBER(itech32_state,drivedge)
|
|||||||
{
|
{
|
||||||
itech32_state::machine_reset();
|
itech32_state::machine_reset();
|
||||||
|
|
||||||
machine().device("dsp1")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dsp1->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
machine().device("dsp2")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dsp2->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
STOP_TMS_SPINNING(machine(), 0);
|
STOP_TMS_SPINNING(machine(), 0);
|
||||||
STOP_TMS_SPINNING(machine(), 1);
|
STOP_TMS_SPINNING(machine(), 1);
|
||||||
}
|
}
|
||||||
@ -782,8 +782,8 @@ WRITE8_MEMBER(itech32_state::firq_clear_w)
|
|||||||
|
|
||||||
WRITE32_MEMBER(itech32_state::tms_reset_assert_w)
|
WRITE32_MEMBER(itech32_state::tms_reset_assert_w)
|
||||||
{
|
{
|
||||||
machine().device("dsp1")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dsp1->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
machine().device("dsp2")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dsp2->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -792,12 +792,12 @@ WRITE32_MEMBER(itech32_state::tms_reset_clear_w)
|
|||||||
/* kludge to prevent crash on first boot */
|
/* kludge to prevent crash on first boot */
|
||||||
if ((m_tms1_ram[0] & 0xff000000) == 0)
|
if ((m_tms1_ram[0] & 0xff000000) == 0)
|
||||||
{
|
{
|
||||||
machine().device("dsp1")->execute().set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
m_dsp1->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
||||||
STOP_TMS_SPINNING(machine(), 0);
|
STOP_TMS_SPINNING(machine(), 0);
|
||||||
}
|
}
|
||||||
if ((m_tms2_ram[0] & 0xff000000) == 0)
|
if ((m_tms2_ram[0] & 0xff000000) == 0)
|
||||||
{
|
{
|
||||||
machine().device("dsp2")->execute().set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
m_dsp2->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
||||||
STOP_TMS_SPINNING(machine(), 1);
|
STOP_TMS_SPINNING(machine(), 1);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -4151,8 +4151,8 @@ DRIVER_INIT_MEMBER(itech32_state,drivedge)
|
|||||||
m_planes = 1;
|
m_planes = 1;
|
||||||
m_is_drivedge = 1;
|
m_is_drivedge = 1;
|
||||||
|
|
||||||
machine().device("dsp1")->memory().space(AS_PROGRAM).install_read_handler(0x8382, 0x8382, read32_delegate(FUNC(itech32_state::drivedge_tms1_speedup_r),this));
|
m_dsp1->space(AS_PROGRAM).install_read_handler(0x8382, 0x8382, read32_delegate(FUNC(itech32_state::drivedge_tms1_speedup_r),this));
|
||||||
machine().device("dsp2")->memory().space(AS_PROGRAM).install_read_handler(0x8382, 0x8382, read32_delegate(FUNC(itech32_state::drivedge_tms2_speedup_r),this));
|
m_dsp2->space(AS_PROGRAM).install_read_handler(0x8382, 0x8382, read32_delegate(FUNC(itech32_state::drivedge_tms2_speedup_r),this));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -39,6 +39,9 @@ class jangou_state : public driver_device
|
|||||||
public:
|
public:
|
||||||
jangou_state(const machine_config &mconfig, device_type type, const char *tag)
|
jangou_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||||
: driver_device(mconfig, type, tag),
|
: driver_device(mconfig, type, tag),
|
||||||
|
m_cpu_0(*this, "cpu0"),
|
||||||
|
m_cpu_1(*this, "cpu1"),
|
||||||
|
m_nsc(*this, "nsc"),
|
||||||
m_msm(*this, "msm") { }
|
m_msm(*this, "msm") { }
|
||||||
|
|
||||||
/* sound-related */
|
/* sound-related */
|
||||||
@ -56,10 +59,10 @@ public:
|
|||||||
UINT8 m_z80_latch;
|
UINT8 m_z80_latch;
|
||||||
|
|
||||||
/* devices */
|
/* devices */
|
||||||
device_t *m_cpu_0;
|
required_device<cpu_device> m_cpu_0;
|
||||||
device_t *m_cpu_1;
|
optional_device<cpu_device> m_cpu_1;
|
||||||
device_t *m_cvsd;
|
device_t *m_cvsd;
|
||||||
device_t *m_nsc;
|
optional_device<cpu_device> m_nsc;
|
||||||
|
|
||||||
/* video-related */
|
/* video-related */
|
||||||
UINT8 m_pen_data[0x10];
|
UINT8 m_pen_data[0x10];
|
||||||
@ -316,12 +319,12 @@ READ8_MEMBER(jangou_state::input_system_r)
|
|||||||
WRITE8_MEMBER(jangou_state::sound_latch_w)
|
WRITE8_MEMBER(jangou_state::sound_latch_w)
|
||||||
{
|
{
|
||||||
soundlatch_byte_w(space, 0, data & 0xff);
|
soundlatch_byte_w(space, 0, data & 0xff);
|
||||||
m_cpu_1->execute().set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
|
m_cpu_1->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
READ8_MEMBER(jangou_state::sound_latch_r)
|
READ8_MEMBER(jangou_state::sound_latch_r)
|
||||||
{
|
{
|
||||||
m_cpu_1->execute().set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
|
m_cpu_1->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
|
||||||
return soundlatch_byte_r(space, 0);
|
return soundlatch_byte_r(space, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -339,7 +342,7 @@ TIMER_CALLBACK_MEMBER(jangou_state::cvsd_bit_timer_callback)
|
|||||||
|
|
||||||
/* Trigger an IRQ for every 8 shifted bits */
|
/* Trigger an IRQ for every 8 shifted bits */
|
||||||
if ((++m_cvsd_shift_cnt & 7) == 0)
|
if ((++m_cvsd_shift_cnt & 7) == 0)
|
||||||
m_cpu_1->execute().set_input_line(0, HOLD_LINE);
|
m_cpu_1->set_input_line(0, HOLD_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -356,7 +359,7 @@ WRITE_LINE_MEMBER(jangou_state::jngolady_vclk_cb)
|
|||||||
else
|
else
|
||||||
{
|
{
|
||||||
msm5205_data_w(m_msm, m_adpcm_byte & 0xf);
|
msm5205_data_w(m_msm, m_adpcm_byte & 0xf);
|
||||||
m_cpu_1->execute().set_input_line(0, HOLD_LINE);
|
m_cpu_1->set_input_line(0, HOLD_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
m_msm5205_vclk_toggle ^= 1;
|
m_msm5205_vclk_toggle ^= 1;
|
||||||
@ -376,7 +379,7 @@ READ8_MEMBER(jangou_state::master_com_r)
|
|||||||
|
|
||||||
WRITE8_MEMBER(jangou_state::master_com_w)
|
WRITE8_MEMBER(jangou_state::master_com_w)
|
||||||
{
|
{
|
||||||
m_nsc->execute().set_input_line(0, HOLD_LINE);
|
m_nsc->set_input_line(0, HOLD_LINE);
|
||||||
m_nsc_latch = data;
|
m_nsc_latch = data;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -918,10 +921,7 @@ static SOUND_START( jangou )
|
|||||||
|
|
||||||
MACHINE_START_MEMBER(jangou_state,common)
|
MACHINE_START_MEMBER(jangou_state,common)
|
||||||
{
|
{
|
||||||
m_cpu_0 = machine().device("cpu0");
|
|
||||||
m_cpu_1 = machine().device("cpu1");
|
|
||||||
m_cvsd = machine().device("cvsd");
|
m_cvsd = machine().device("cvsd");
|
||||||
m_nsc = machine().device("nsc");
|
|
||||||
|
|
||||||
save_item(NAME(m_pen_data));
|
save_item(NAME(m_pen_data));
|
||||||
save_item(NAME(m_blit_data));
|
save_item(NAME(m_blit_data));
|
||||||
@ -1356,7 +1356,7 @@ READ8_MEMBER(jangou_state::jngolady_rng_r)
|
|||||||
|
|
||||||
DRIVER_INIT_MEMBER(jangou_state,jngolady)
|
DRIVER_INIT_MEMBER(jangou_state,jngolady)
|
||||||
{
|
{
|
||||||
machine().device("nsc")->memory().space(AS_PROGRAM).install_read_handler(0x08, 0x08, read8_delegate(FUNC(jangou_state::jngolady_rng_r),this) );
|
m_nsc->space(AS_PROGRAM).install_read_handler(0x08, 0x08, read8_delegate(FUNC(jangou_state::jngolady_rng_r),this) );
|
||||||
}
|
}
|
||||||
|
|
||||||
DRIVER_INIT_MEMBER(jangou_state,luckygrl)
|
DRIVER_INIT_MEMBER(jangou_state,luckygrl)
|
||||||
|
@ -61,7 +61,8 @@ enum int_levels
|
|||||||
|
|
||||||
static void tms_interrupt(running_machine &machine, int state)
|
static void tms_interrupt(running_machine &machine, int state)
|
||||||
{
|
{
|
||||||
machine.device("maincpu")->execute().set_input_line(INT_TMS34061, state);
|
jpmsys5_state *drvstate = machine.driver_data<jpmsys5_state>();
|
||||||
|
drvstate->m_maincpu->set_input_line(INT_TMS34061, state);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct tms34061_interface tms34061intf =
|
static const struct tms34061_interface tms34061intf =
|
||||||
|
@ -23,12 +23,12 @@ Main CPU:
|
|||||||
|
|
||||||
WRITE8_MEMBER(kingofb_state::video_interrupt_w)
|
WRITE8_MEMBER(kingofb_state::video_interrupt_w)
|
||||||
{
|
{
|
||||||
m_video_cpu->execute().set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
m_video_cpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(kingofb_state::sprite_interrupt_w)
|
WRITE8_MEMBER(kingofb_state::sprite_interrupt_w)
|
||||||
{
|
{
|
||||||
m_sprite_cpu->execute().set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
m_sprite_cpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(kingofb_state::scroll_interrupt_w)
|
WRITE8_MEMBER(kingofb_state::scroll_interrupt_w)
|
||||||
@ -450,9 +450,6 @@ INTERRUPT_GEN_MEMBER(kingofb_state::kingofb_interrupt)
|
|||||||
|
|
||||||
void kingofb_state::machine_start()
|
void kingofb_state::machine_start()
|
||||||
{
|
{
|
||||||
m_video_cpu = machine().device("video");
|
|
||||||
m_sprite_cpu = machine().device("sprite");
|
|
||||||
|
|
||||||
save_item(NAME(m_nmi_enable));
|
save_item(NAME(m_nmi_enable));
|
||||||
save_item(NAME(m_palette_bank));
|
save_item(NAME(m_palette_bank));
|
||||||
}
|
}
|
||||||
|
@ -831,11 +831,12 @@ READ32_MEMBER(konamigx_state::sound020_r)
|
|||||||
|
|
||||||
INLINE void write_snd_020(running_machine &machine, int reg, int val)
|
INLINE void write_snd_020(running_machine &machine, int reg, int val)
|
||||||
{
|
{
|
||||||
|
konamigx_state *state = machine.driver_data<konamigx_state>();
|
||||||
sndto000[reg] = val;
|
sndto000[reg] = val;
|
||||||
|
|
||||||
if (reg == 7)
|
if (reg == 7)
|
||||||
{
|
{
|
||||||
machine.device("soundcpu")->execute().set_input_line(1, HOLD_LINE);
|
state->m_soundcpu->set_input_line(1, HOLD_LINE);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1256,28 +1257,28 @@ INTERRUPT_GEN_MEMBER(konamigx_state::tms_sync)
|
|||||||
|
|
||||||
READ16_MEMBER(konamigx_state::tms57002_data_word_r)
|
READ16_MEMBER(konamigx_state::tms57002_data_word_r)
|
||||||
{
|
{
|
||||||
return machine().device<tms57002_device>("dasp")->data_r(space, 0);
|
return m_dasp->data_r(space, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE16_MEMBER(konamigx_state::tms57002_data_word_w)
|
WRITE16_MEMBER(konamigx_state::tms57002_data_word_w)
|
||||||
{
|
{
|
||||||
if (ACCESSING_BITS_0_7)
|
if (ACCESSING_BITS_0_7)
|
||||||
machine().device<tms57002_device>("dasp")->data_w(space, 0, data);
|
m_dasp->data_w(space, 0, data);
|
||||||
}
|
}
|
||||||
|
|
||||||
READ16_MEMBER(konamigx_state::tms57002_status_word_r)
|
READ16_MEMBER(konamigx_state::tms57002_status_word_r)
|
||||||
{
|
{
|
||||||
return (machine().device<tms57002_device>("dasp")->dready_r(space, 0) ? 4 : 0) |
|
return (m_dasp->dready_r(space, 0) ? 4 : 0) |
|
||||||
(machine().device<tms57002_device>("dasp")->empty_r(space, 0) ? 1 : 0);
|
(m_dasp->empty_r(space, 0) ? 1 : 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE16_MEMBER(konamigx_state::tms57002_control_word_w)
|
WRITE16_MEMBER(konamigx_state::tms57002_control_word_w)
|
||||||
{
|
{
|
||||||
if (ACCESSING_BITS_0_7)
|
if (ACCESSING_BITS_0_7)
|
||||||
{
|
{
|
||||||
machine().device<tms57002_device>("dasp")->pload_w(space, 0, data & 4);
|
m_dasp->pload_w(space, 0, data & 4);
|
||||||
machine().device<tms57002_device>("dasp")->cload_w(space, 0, data & 8);
|
m_dasp->cload_w(space, 0, data & 8);
|
||||||
machine().device("dasp")->execute().set_input_line(INPUT_LINE_RESET, !(data & 16) ? ASSERT_LINE : CLEAR_LINE);
|
m_dasp->set_input_line(INPUT_LINE_RESET, !(data & 16) ? ASSERT_LINE : CLEAR_LINE);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -3643,7 +3644,7 @@ MACHINE_RESET_MEMBER(konamigx_state,konamigx)
|
|||||||
|
|
||||||
// sound CPU initially disabled?
|
// sound CPU initially disabled?
|
||||||
m_soundcpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
m_soundcpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
||||||
machine().device("dasp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dasp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
|
|
||||||
if (!strcmp(machine().system().name, "tkmmpzdm"))
|
if (!strcmp(machine().system().name, "tkmmpzdm"))
|
||||||
{
|
{
|
||||||
|
@ -56,20 +56,20 @@ WRITE16_MEMBER(lockon_state::adrst_w)
|
|||||||
m_ctrl_reg = data & 0xff;
|
m_ctrl_reg = data & 0xff;
|
||||||
|
|
||||||
/* Bus mastering for shared access */
|
/* Bus mastering for shared access */
|
||||||
m_ground->execute().set_input_line(INPUT_LINE_HALT, data & 0x04 ? ASSERT_LINE : CLEAR_LINE);
|
m_ground->set_input_line(INPUT_LINE_HALT, data & 0x04 ? ASSERT_LINE : CLEAR_LINE);
|
||||||
m_object->execute().set_input_line(INPUT_LINE_HALT, data & 0x20 ? ASSERT_LINE : CLEAR_LINE);
|
m_object->set_input_line(INPUT_LINE_HALT, data & 0x20 ? ASSERT_LINE : CLEAR_LINE);
|
||||||
m_audiocpu->set_input_line(INPUT_LINE_HALT, data & 0x40 ? CLEAR_LINE : ASSERT_LINE);
|
m_audiocpu->set_input_line(INPUT_LINE_HALT, data & 0x40 ? CLEAR_LINE : ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
READ16_MEMBER(lockon_state::main_gnd_r)
|
READ16_MEMBER(lockon_state::main_gnd_r)
|
||||||
{
|
{
|
||||||
address_space &gndspace = m_ground->memory().space(AS_PROGRAM);
|
address_space &gndspace = m_ground->space(AS_PROGRAM);
|
||||||
return gndspace.read_word(V30_GND_ADDR | offset * 2);
|
return gndspace.read_word(V30_GND_ADDR | offset * 2);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE16_MEMBER(lockon_state::main_gnd_w)
|
WRITE16_MEMBER(lockon_state::main_gnd_w)
|
||||||
{
|
{
|
||||||
address_space &gndspace = m_ground->memory().space(AS_PROGRAM);
|
address_space &gndspace = m_ground->space(AS_PROGRAM);
|
||||||
|
|
||||||
if (ACCESSING_BITS_0_7)
|
if (ACCESSING_BITS_0_7)
|
||||||
gndspace.write_byte(V30_GND_ADDR | (offset * 2 + 0), data);
|
gndspace.write_byte(V30_GND_ADDR | (offset * 2 + 0), data);
|
||||||
@ -79,13 +79,13 @@ WRITE16_MEMBER(lockon_state::main_gnd_w)
|
|||||||
|
|
||||||
READ16_MEMBER(lockon_state::main_obj_r)
|
READ16_MEMBER(lockon_state::main_obj_r)
|
||||||
{
|
{
|
||||||
address_space &objspace = m_object->memory().space(AS_PROGRAM);
|
address_space &objspace = m_object->space(AS_PROGRAM);
|
||||||
return objspace.read_word(V30_OBJ_ADDR | offset * 2);
|
return objspace.read_word(V30_OBJ_ADDR | offset * 2);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE16_MEMBER(lockon_state::main_obj_w)
|
WRITE16_MEMBER(lockon_state::main_obj_w)
|
||||||
{
|
{
|
||||||
address_space &objspace =m_object->memory().space(AS_PROGRAM);
|
address_space &objspace =m_object->space(AS_PROGRAM);
|
||||||
|
|
||||||
if (ACCESSING_BITS_0_7)
|
if (ACCESSING_BITS_0_7)
|
||||||
objspace.write_byte(V30_OBJ_ADDR | (offset * 2 + 0), data);
|
objspace.write_byte(V30_OBJ_ADDR | (offset * 2 + 0), data);
|
||||||
@ -97,8 +97,8 @@ WRITE16_MEMBER(lockon_state::tst_w)
|
|||||||
{
|
{
|
||||||
if (offset < 0x800)
|
if (offset < 0x800)
|
||||||
{
|
{
|
||||||
address_space &gndspace = m_ground->memory().space(AS_PROGRAM);
|
address_space &gndspace = m_ground->space(AS_PROGRAM);
|
||||||
address_space &objspace = m_object->memory().space(AS_PROGRAM);
|
address_space &objspace = m_object->space(AS_PROGRAM);
|
||||||
|
|
||||||
if (ACCESSING_BITS_0_7)
|
if (ACCESSING_BITS_0_7)
|
||||||
gndspace.write_byte(V30_GND_ADDR | (offset * 2 + 0), data);
|
gndspace.write_byte(V30_GND_ADDR | (offset * 2 + 0), data);
|
||||||
@ -451,8 +451,6 @@ static const ym2203_interface ym2203_config =
|
|||||||
|
|
||||||
void lockon_state::machine_start()
|
void lockon_state::machine_start()
|
||||||
{
|
{
|
||||||
m_ground = machine().device("ground");
|
|
||||||
m_object = machine().device("object");
|
|
||||||
m_f2203_1l = machine().device<filter_volume_device>("f2203.1l");
|
m_f2203_1l = machine().device<filter_volume_device>("f2203.1l");
|
||||||
m_f2203_2l = machine().device<filter_volume_device>("f2203.2l");
|
m_f2203_2l = machine().device<filter_volume_device>("f2203.2l");
|
||||||
m_f2203_3l = machine().device<filter_volume_device>("f2203.3l");
|
m_f2203_3l = machine().device<filter_volume_device>("f2203.3l");
|
||||||
|
@ -250,8 +250,8 @@ WRITE16_MEMBER(m72_state::m72_main_mcu_w)
|
|||||||
m_protection_ram[offset] = val;
|
m_protection_ram[offset] = val;
|
||||||
m_mcu->set_input_line(0, ASSERT_LINE);
|
m_mcu->set_input_line(0, ASSERT_LINE);
|
||||||
/* Line driven, most likely by write line */
|
/* Line driven, most likely by write line */
|
||||||
//machine().scheduler().timer_set(machine().device<cpu_device>("mcu")->cycles_to_attotime(2), FUNC(mcu_irq0_clear));
|
//machine().scheduler().timer_set(m_mcu->cycles_to_attotime(2), FUNC(mcu_irq0_clear));
|
||||||
//machine().scheduler().timer_set(machine().device<cpu_device>("mcu")->cycles_to_attotime(0), FUNC(mcu_irq0_raise));
|
//machine().scheduler().timer_set(m_mcu->cycles_to_attotime(0), FUNC(mcu_irq0_raise));
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
machine().scheduler().synchronize( timer_expired_delegate(FUNC(m72_state::delayed_ram16_w),this), (offset<<16) | val, m_protection_ram);
|
machine().scheduler().synchronize( timer_expired_delegate(FUNC(m72_state::delayed_ram16_w),this), (offset<<16) | val, m_protection_ram);
|
||||||
|
@ -479,7 +479,8 @@ void maygay1b_state::machine_reset()
|
|||||||
// IRQ from Duart (hopper?)
|
// IRQ from Duart (hopper?)
|
||||||
static void duart_irq_handler(device_t *device, int state, UINT8 vector)
|
static void duart_irq_handler(device_t *device, int state, UINT8 vector)
|
||||||
{
|
{
|
||||||
device->machine().device("maincpu")->execute().set_input_line(M6809_IRQ_LINE, state?ASSERT_LINE:CLEAR_LINE);
|
maygay1b_state *drvstate = device->machine().driver_data<maygay1b_state>();
|
||||||
|
drvstate->m_maincpu->set_input_line(M6809_IRQ_LINE, state?ASSERT_LINE:CLEAR_LINE);
|
||||||
LOG(("6809 irq%d \n",state));
|
LOG(("6809 irq%d \n",state));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -940,8 +940,9 @@ INPUT_PORTS_END
|
|||||||
|
|
||||||
static void duart_irq_handler(device_t *device, int state, UINT8 vector)
|
static void duart_irq_handler(device_t *device, int state, UINT8 vector)
|
||||||
{
|
{
|
||||||
device->machine().device("maincpu")->execute().set_input_line_and_vector(5, state, vector);
|
maygayv1_state *drvstate = device->machine().driver_data<maygayv1_state>();
|
||||||
// device->machine().device("maincpu")->execute().set_input_line(5, state ? ASSERT_LINE : CLEAR_LINE);
|
drvstate->m_maincpu->set_input_line_and_vector(5, state, vector);
|
||||||
|
// drvstate->m_maincpu->set_input_line(5, state ? ASSERT_LINE : CLEAR_LINE);
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
@ -1209,7 +1209,8 @@ MACHINE_CONFIG_END
|
|||||||
|
|
||||||
static void set_gate_a20(running_machine &machine, int a20)
|
static void set_gate_a20(running_machine &machine, int a20)
|
||||||
{
|
{
|
||||||
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_A20, a20);
|
mediagx_state *state = machine.driver_data<mediagx_state>();
|
||||||
|
state->m_maincpu->set_input_line(INPUT_LINE_A20, a20);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void keyboard_interrupt(running_machine &machine, int _state)
|
static void keyboard_interrupt(running_machine &machine, int _state)
|
||||||
|
@ -875,7 +875,7 @@ DRIVER_INIT_MEMBER(mplay_state,megaplay)
|
|||||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xa10000, 0xa1001f, read16_delegate(FUNC(mplay_state::megaplay_io_read),this), write16_delegate(FUNC(mplay_state::megaplay_io_write),this));
|
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xa10000, 0xa1001f, read16_delegate(FUNC(mplay_state::megaplay_io_read),this), write16_delegate(FUNC(mplay_state::megaplay_io_write),this));
|
||||||
|
|
||||||
/* megaplay has ram shared with the bios cpu here */
|
/* megaplay has ram shared with the bios cpu here */
|
||||||
machine().device("genesis_snd_z80")->memory().space(AS_PROGRAM).install_ram(0x2000, 0x3fff, &m_ic36_ram[0]);
|
m_z80snd->space(AS_PROGRAM).install_ram(0x2000, 0x3fff, &m_ic36_ram[0]);
|
||||||
|
|
||||||
/* instead of a RAM mirror the 68k sees the extra ram of the 2nd z80 too */
|
/* instead of a RAM mirror the 68k sees the extra ram of the 2nd z80 too */
|
||||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xa02000, 0xa03fff, read16_delegate(FUNC(mplay_state::megadriv_68k_read_z80_extra_ram),this), write16_delegate(FUNC(mplay_state::megadriv_68k_write_z80_extra_ram),this));
|
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xa02000, 0xa03fff, read16_delegate(FUNC(mplay_state::megadriv_68k_read_z80_extra_ram),this), write16_delegate(FUNC(mplay_state::megadriv_68k_write_z80_extra_ram),this));
|
||||||
|
@ -229,8 +229,8 @@ TIMER_CALLBACK_MEMBER(mtech_state::megatech_z80_run_state )
|
|||||||
printf("enabling SMS Z80\n");
|
printf("enabling SMS Z80\n");
|
||||||
m_current_game_is_sms = 1;
|
m_current_game_is_sms = 1;
|
||||||
megatech_set_genz80_as_sms_standard_map(machine(), "genesis_snd_z80", MAPPER_STANDARD);
|
megatech_set_genz80_as_sms_standard_map(machine(), "genesis_snd_z80", MAPPER_STANDARD);
|
||||||
//machine.device("genesis_snd_z80")->execute().set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
|
//m_z80snd->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
|
||||||
machine().device("genesis_snd_z80")->execute().set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
m_z80snd->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
@ -238,7 +238,7 @@ TIMER_CALLBACK_MEMBER(mtech_state::megatech_z80_run_state )
|
|||||||
m_current_game_is_sms = 0;
|
m_current_game_is_sms = 0;
|
||||||
megatech_set_megadrive_z80_as_megadrive_z80("genesis_snd_z80");
|
megatech_set_megadrive_z80_as_megadrive_z80("genesis_snd_z80");
|
||||||
m_maincpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
m_maincpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
||||||
//machine.device("maincpu")->execute().set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
|
//m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -253,9 +253,9 @@ TIMER_CALLBACK_MEMBER(mtech_state::megatech_z80_stop_state )
|
|||||||
game_region = memregion(tempname)->base();
|
game_region = memregion(tempname)->base();
|
||||||
|
|
||||||
m_maincpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_maincpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
machine().device("genesis_snd_z80")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_z80snd->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
//machine.device("maincpu")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
//m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
||||||
//machine.device("genesis_snd_z80")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
//m_z80snd->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
||||||
machine().device("ymsnd")->reset();
|
machine().device("ymsnd")->reset();
|
||||||
|
|
||||||
megadriv_stop_scanline_timer();// stop the scanline timer for the genesis vdp... it can be restarted in video eof when needed
|
megadriv_stop_scanline_timer();// stop the scanline timer for the genesis vdp... it can be restarted in video eof when needed
|
||||||
|
@ -437,7 +437,7 @@ READ32_MEMBER(metalmx_state::dsp32c_2_r)
|
|||||||
|
|
||||||
WRITE32_MEMBER(metalmx_state::host_gsp_w)
|
WRITE32_MEMBER(metalmx_state::host_gsp_w)
|
||||||
{
|
{
|
||||||
address_space &gsp_space = machine().device("gsp")->memory().space(AS_PROGRAM);
|
address_space &gsp_space = m_gsp->space(AS_PROGRAM);
|
||||||
|
|
||||||
gsp_space.write_word((0xc0000000 + (offset << 5) + 0x10) / 8, data);
|
gsp_space.write_word((0xc0000000 + (offset << 5) + 0x10) / 8, data);
|
||||||
gsp_space.write_word((0xc0000000 + (offset << 5))/ 8 , data >> 16);
|
gsp_space.write_word((0xc0000000 + (offset << 5))/ 8 , data >> 16);
|
||||||
@ -445,7 +445,7 @@ WRITE32_MEMBER(metalmx_state::host_gsp_w)
|
|||||||
|
|
||||||
READ32_MEMBER(metalmx_state::host_gsp_r)
|
READ32_MEMBER(metalmx_state::host_gsp_r)
|
||||||
{
|
{
|
||||||
address_space &gsp_space = machine().device("gsp")->memory().space(AS_PROGRAM);
|
address_space &gsp_space = m_gsp->space(AS_PROGRAM);
|
||||||
UINT32 val;
|
UINT32 val;
|
||||||
|
|
||||||
val = gsp_space.read_word((0xc0000000 + (offset << 5) + 0x10) / 8);
|
val = gsp_space.read_word((0xc0000000 + (offset << 5) + 0x10) / 8);
|
||||||
@ -482,7 +482,8 @@ WRITE32_MEMBER(metalmx_state::host_vram_w)
|
|||||||
|
|
||||||
static void tms_interrupt(device_t *device, int state)
|
static void tms_interrupt(device_t *device, int state)
|
||||||
{
|
{
|
||||||
device->machine().device("maincpu")->execute().set_input_line(4, state ? HOLD_LINE : CLEAR_LINE);
|
metalmx_state *drvstate = device->machine().driver_data<metalmx_state>();
|
||||||
|
drvstate->m_maincpu->set_input_line(4, state ? HOLD_LINE : CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -343,7 +343,7 @@ ADDRESS_MAP_END
|
|||||||
CUSTOM_INPUT_MEMBER(mhavoc_state::clock_r)
|
CUSTOM_INPUT_MEMBER(mhavoc_state::clock_r)
|
||||||
{
|
{
|
||||||
/* 2.4kHz (divide 2.5MHz by 1024) */
|
/* 2.4kHz (divide 2.5MHz by 1024) */
|
||||||
return (machine().device<cpu_device>("alpha")->total_cycles() & 0x400) ? 0 : 1;
|
return (m_alpha->total_cycles() & 0x400) ? 0 : 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -477,11 +477,12 @@ WRITE32_MEMBER(midzeus_state::analog_w)
|
|||||||
|
|
||||||
static void update_gun_irq(running_machine &machine)
|
static void update_gun_irq(running_machine &machine)
|
||||||
{
|
{
|
||||||
|
midzeus_state *state = machine.driver_data<midzeus_state>();
|
||||||
/* low 2 bits of gun_control seem to enable IRQs */
|
/* low 2 bits of gun_control seem to enable IRQs */
|
||||||
if (gun_irq_state & gun_control & 0x03)
|
if (gun_irq_state & gun_control & 0x03)
|
||||||
machine.device("maincpu")->execute().set_input_line(3, ASSERT_LINE);
|
state->m_maincpu->set_input_line(3, ASSERT_LINE);
|
||||||
else
|
else
|
||||||
machine.device("maincpu")->execute().set_input_line(3, CLEAR_LINE);
|
state->m_maincpu->set_input_line(3, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -40,6 +40,7 @@ public:
|
|||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
m_audiocpu(*this, "audiocpu"),
|
m_audiocpu(*this, "audiocpu"),
|
||||||
m_subcpu(*this, "sub"),
|
m_subcpu(*this, "sub"),
|
||||||
|
m_dsp(*this, "dsp"),
|
||||||
m_msm(*this, "msm") { }
|
m_msm(*this, "msm") { }
|
||||||
|
|
||||||
required_shared_ptr<UINT16> m_g_ram;
|
required_shared_ptr<UINT16> m_g_ram;
|
||||||
@ -88,6 +89,7 @@ public:
|
|||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
required_device<cpu_device> m_audiocpu;
|
required_device<cpu_device> m_audiocpu;
|
||||||
required_device<cpu_device> m_subcpu;
|
required_device<cpu_device> m_subcpu;
|
||||||
|
required_device<cpu_device> m_dsp;
|
||||||
required_device<msm5205_device> m_msm;
|
required_device<msm5205_device> m_msm;
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -346,7 +348,7 @@ WRITE16_MEMBER(mlanding_state::ml_sub_reset_w)
|
|||||||
|
|
||||||
if(!(data & 0x80)) // unknown line used
|
if(!(data & 0x80)) // unknown line used
|
||||||
{
|
{
|
||||||
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
m_dsp->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
||||||
m_dsp_HOLD_signal = data & 0x80;
|
m_dsp_HOLD_signal = data & 0x80;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -751,7 +753,7 @@ void mlanding_state::machine_reset()
|
|||||||
{
|
{
|
||||||
m_subcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_subcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
m_adpcm_pos = 0;
|
m_adpcm_pos = 0;
|
||||||
m_adpcm_data = -1;
|
m_adpcm_data = -1;
|
||||||
m_adpcm_idle = 1;
|
m_adpcm_idle = 1;
|
||||||
|
@ -344,7 +344,7 @@ MACHINE_RESET_MEMBER(model2_state,model2o)
|
|||||||
MACHINE_RESET_CALL_MEMBER(model2_common);
|
MACHINE_RESET_CALL_MEMBER(model2_common);
|
||||||
|
|
||||||
// hold TGP in halt until we have code
|
// hold TGP in halt until we have code
|
||||||
machine().device("tgp")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
m_tgp->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
||||||
|
|
||||||
m_dsp_type = DSP_TYPE_TGP;
|
m_dsp_type = DSP_TYPE_TGP;
|
||||||
}
|
}
|
||||||
@ -366,7 +366,7 @@ MACHINE_RESET_MEMBER(model2_state,model2)
|
|||||||
MACHINE_RESET_CALL_MEMBER(model2_scsp);
|
MACHINE_RESET_CALL_MEMBER(model2_scsp);
|
||||||
|
|
||||||
// hold TGP in halt until we have code
|
// hold TGP in halt until we have code
|
||||||
machine().device("tgp")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
m_tgp->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
||||||
|
|
||||||
m_dsp_type = DSP_TYPE_TGP;
|
m_dsp_type = DSP_TYPE_TGP;
|
||||||
}
|
}
|
||||||
@ -376,12 +376,12 @@ MACHINE_RESET_MEMBER(model2_state,model2b)
|
|||||||
MACHINE_RESET_CALL_MEMBER(model2_common);
|
MACHINE_RESET_CALL_MEMBER(model2_common);
|
||||||
MACHINE_RESET_CALL_MEMBER(model2_scsp);
|
MACHINE_RESET_CALL_MEMBER(model2_scsp);
|
||||||
|
|
||||||
machine().device("dsp")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
m_dsp->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
||||||
|
|
||||||
// set FIFOIN empty flag on SHARC
|
// set FIFOIN empty flag on SHARC
|
||||||
machine().device("dsp")->execute().set_input_line(SHARC_INPUT_FLAG0, ASSERT_LINE);
|
m_dsp->set_input_line(SHARC_INPUT_FLAG0, ASSERT_LINE);
|
||||||
// clear FIFOOUT buffer full flag on SHARC
|
// clear FIFOOUT buffer full flag on SHARC
|
||||||
machine().device("dsp")->execute().set_input_line(SHARC_INPUT_FLAG1, CLEAR_LINE);
|
m_dsp->set_input_line(SHARC_INPUT_FLAG1, CLEAR_LINE);
|
||||||
|
|
||||||
m_dsp_type = DSP_TYPE_SHARC;
|
m_dsp_type = DSP_TYPE_SHARC;
|
||||||
}
|
}
|
||||||
@ -569,7 +569,7 @@ WRITE32_MEMBER(model2_state::srallyc_devices_w)
|
|||||||
if(mem_mask == 0x000000ff || mem_mask == 0x0000ffff)
|
if(mem_mask == 0x000000ff || mem_mask == 0x0000ffff)
|
||||||
{
|
{
|
||||||
m_driveio_comm_data = data & 0xff;
|
m_driveio_comm_data = data & 0xff;
|
||||||
machine().device("drivecpu")->execute().set_input_line(0, HOLD_LINE);
|
m_drivecpu->set_input_line(0, HOLD_LINE);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -610,9 +610,9 @@ WRITE32_MEMBER(model2_state::copro_ctl1_w)
|
|||||||
if (m_dsp_type != DSP_TYPE_TGPX4)
|
if (m_dsp_type != DSP_TYPE_TGPX4)
|
||||||
{
|
{
|
||||||
if (m_dsp_type == DSP_TYPE_SHARC)
|
if (m_dsp_type == DSP_TYPE_SHARC)
|
||||||
machine().device("dsp")->execute().set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
|
m_dsp->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
|
||||||
else
|
else
|
||||||
machine().device("tgp")->execute().set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
|
m_tgp->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -736,7 +736,7 @@ WRITE32_MEMBER(model2_state::geo_sharc_ctl1_w)
|
|||||||
else
|
else
|
||||||
{
|
{
|
||||||
logerror("Boot geo, %d dwords\n", m_geocnt);
|
logerror("Boot geo, %d dwords\n", m_geocnt);
|
||||||
machine().device("dsp2")->execute().set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
|
m_dsp2->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
|
||||||
//space.device().execute().spin_until_time(attotime::from_usec(1000)); // Give the SHARC enough time to boot itself
|
//space.device().execute().spin_until_time(attotime::from_usec(1000)); // Give the SHARC enough time to boot itself
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -673,13 +673,13 @@ static void update_irq_state(running_machine &machine)
|
|||||||
if ((state->m_irq_enable & state->m_irq_state) || state->m_scsi_irq_state)
|
if ((state->m_irq_enable & state->m_irq_state) || state->m_scsi_irq_state)
|
||||||
{
|
{
|
||||||
// printf("IRQ set: state %x enable %x scsi %x\n", state->m_irq_state, state->m_irq_enable, state->m_scsi_irq_state);
|
// printf("IRQ set: state %x enable %x scsi %x\n", state->m_irq_state, state->m_irq_enable, state->m_scsi_irq_state);
|
||||||
machine.device("maincpu")->execute().set_input_line(PPC_IRQ, ASSERT_LINE);
|
state->m_maincpu->set_input_line(PPC_IRQ, ASSERT_LINE);
|
||||||
state->m_scsi_irq_state = 0;
|
state->m_scsi_irq_state = 0;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
// printf("IRQ clear: state %x enable %x scsi %x\n", state->m_irq_state, state->m_irq_enable, state->m_scsi_irq_state);
|
// printf("IRQ clear: state %x enable %x scsi %x\n", state->m_irq_state, state->m_irq_enable, state->m_scsi_irq_state);
|
||||||
machine.device("maincpu")->execute().set_input_line(PPC_IRQ, CLEAR_LINE);
|
state->m_maincpu->set_input_line(PPC_IRQ, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1059,7 +1059,8 @@ WRITE64_MEMBER(model3_state::scsi_w)
|
|||||||
|
|
||||||
static UINT32 scsi_fetch(running_machine &machine, UINT32 dsp)
|
static UINT32 scsi_fetch(running_machine &machine, UINT32 dsp)
|
||||||
{
|
{
|
||||||
address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
|
model3_state *drvstate = machine.driver_data<model3_state>();
|
||||||
|
address_space &space = drvstate->m_maincpu->space(AS_PROGRAM);
|
||||||
UINT32 result;
|
UINT32 result;
|
||||||
result = space.read_dword(dsp);
|
result = space.read_dword(dsp);
|
||||||
return FLIPENDIAN_INT32(result);
|
return FLIPENDIAN_INT32(result);
|
||||||
@ -1159,7 +1160,8 @@ WRITE64_MEMBER(model3_state::real3d_dma_w)
|
|||||||
|
|
||||||
static void real3d_dma_callback(running_machine &machine, UINT32 src, UINT32 dst, int length, int byteswap)
|
static void real3d_dma_callback(running_machine &machine, UINT32 src, UINT32 dst, int length, int byteswap)
|
||||||
{
|
{
|
||||||
address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
|
model3_state *drvstate = machine.driver_data<model3_state>();
|
||||||
|
address_space &space = drvstate->m_maincpu->space(AS_PROGRAM);
|
||||||
switch(dst >> 24)
|
switch(dst >> 24)
|
||||||
{
|
{
|
||||||
case 0x88: /* Display List End Trigger */
|
case 0x88: /* Display List End Trigger */
|
||||||
|
@ -451,11 +451,10 @@ WRITE_LINE_MEMBER(n8080_state::n8080_inte_callback)
|
|||||||
|
|
||||||
WRITE8_MEMBER(n8080_state::n8080_status_callback)
|
WRITE8_MEMBER(n8080_state::n8080_status_callback)
|
||||||
{
|
{
|
||||||
device_t *device = m_maincpu;
|
|
||||||
if (data & I8085_STATUS_INTA)
|
if (data & I8085_STATUS_INTA)
|
||||||
{
|
{
|
||||||
/* interrupt acknowledge */
|
/* interrupt acknowledge */
|
||||||
device->execute().set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
|
m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -495,7 +495,7 @@ static int transfer_dword( running_machine &machine, UINT32 dest, UINT32 source
|
|||||||
{
|
{
|
||||||
namcona1_state *state = machine.driver_data<namcona1_state>();
|
namcona1_state *state = machine.driver_data<namcona1_state>();
|
||||||
UINT16 data;
|
UINT16 data;
|
||||||
address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
|
address_space &space = state->m_maincpu->space(AS_PROGRAM);
|
||||||
|
|
||||||
if( source>=0x400000 && source<0xc00000 )
|
if( source>=0x400000 && source<0xc00000 )
|
||||||
{
|
{
|
||||||
|
@ -420,9 +420,9 @@ static void namconb1_cpureg8_w(running_machine &machine, int reg, UINT8 data)
|
|||||||
switch(reg) {
|
switch(reg) {
|
||||||
case 0x02: // POS IRQ level/enable
|
case 0x02: // POS IRQ level/enable
|
||||||
if(state->m_pos_irq_active && (((prev & 0xf) != (data & 0xf)) || !(data & 0xf0))) {
|
if(state->m_pos_irq_active && (((prev & 0xf) != (data & 0xf)) || !(data & 0xf0))) {
|
||||||
machine.device("maincpu")->execute().set_input_line(prev & 0xf, CLEAR_LINE);
|
state->m_maincpu->set_input_line(prev & 0xf, CLEAR_LINE);
|
||||||
if(data & 0xf0)
|
if(data & 0xf0)
|
||||||
machine.device("maincpu")->execute().set_input_line(data & 0xf, ASSERT_LINE);
|
state->m_maincpu->set_input_line(data & 0xf, ASSERT_LINE);
|
||||||
else
|
else
|
||||||
state->m_pos_irq_active = 0;
|
state->m_pos_irq_active = 0;
|
||||||
}
|
}
|
||||||
@ -430,9 +430,9 @@ static void namconb1_cpureg8_w(running_machine &machine, int reg, UINT8 data)
|
|||||||
|
|
||||||
case 0x04: // VBLANK IRQ level/enable
|
case 0x04: // VBLANK IRQ level/enable
|
||||||
if(state->m_vblank_irq_active && (((prev & 0xf) != (data & 0xf)) || !(data & 0xf0))) {
|
if(state->m_vblank_irq_active && (((prev & 0xf) != (data & 0xf)) || !(data & 0xf0))) {
|
||||||
machine.device("maincpu")->execute().set_input_line(prev & 0xf, CLEAR_LINE);
|
state->m_maincpu->set_input_line(prev & 0xf, CLEAR_LINE);
|
||||||
if(data & 0xf0)
|
if(data & 0xf0)
|
||||||
machine.device("maincpu")->execute().set_input_line(data & 0xf, ASSERT_LINE);
|
state->m_maincpu->set_input_line(data & 0xf, ASSERT_LINE);
|
||||||
else
|
else
|
||||||
state->m_vblank_irq_active = 0;
|
state->m_vblank_irq_active = 0;
|
||||||
}
|
}
|
||||||
@ -440,14 +440,14 @@ static void namconb1_cpureg8_w(running_machine &machine, int reg, UINT8 data)
|
|||||||
|
|
||||||
case 0x07: // POS ack
|
case 0x07: // POS ack
|
||||||
if(state->m_pos_irq_active) {
|
if(state->m_pos_irq_active) {
|
||||||
machine.device("maincpu")->execute().set_input_line(state->m_namconb_cpureg[0x02] & 0xf, CLEAR_LINE);
|
state->m_maincpu->set_input_line(state->m_namconb_cpureg[0x02] & 0xf, CLEAR_LINE);
|
||||||
state->m_pos_irq_active = 0;
|
state->m_pos_irq_active = 0;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x09: // VBLANK ack
|
case 0x09: // VBLANK ack
|
||||||
if(state->m_vblank_irq_active) {
|
if(state->m_vblank_irq_active) {
|
||||||
machine.device("maincpu")->execute().set_input_line(state->m_namconb_cpureg[0x04] & 0xf, CLEAR_LINE);
|
state->m_maincpu->set_input_line(state->m_namconb_cpureg[0x04] & 0xf, CLEAR_LINE);
|
||||||
state->m_vblank_irq_active = 0;
|
state->m_vblank_irq_active = 0;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
@ -457,11 +457,11 @@ static void namconb1_cpureg8_w(running_machine &machine, int reg, UINT8 data)
|
|||||||
|
|
||||||
case 0x18: // C75 Control
|
case 0x18: // C75 Control
|
||||||
if(data & 1) {
|
if(data & 1) {
|
||||||
machine.device("mcu")->execute().set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
|
state->m_mcu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
|
||||||
machine.device("mcu")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
state->m_mcu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
machine.device("mcu")->execute().set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
state->m_mcu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
||||||
} else
|
} else
|
||||||
machine.device("mcu")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
state->m_mcu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -487,9 +487,9 @@ static void namconb2_cpureg8_w(running_machine &machine, int reg, UINT8 data)
|
|||||||
switch(reg) {
|
switch(reg) {
|
||||||
case 0x00: // VBLANK IRQ level
|
case 0x00: // VBLANK IRQ level
|
||||||
if(state->m_vblank_irq_active && (prev != data)) {
|
if(state->m_vblank_irq_active && (prev != data)) {
|
||||||
machine.device("maincpu")->execute().set_input_line(prev, CLEAR_LINE);
|
state->m_maincpu->set_input_line(prev, CLEAR_LINE);
|
||||||
if(data)
|
if(data)
|
||||||
machine.device("maincpu")->execute().set_input_line(data, ASSERT_LINE);
|
state->m_maincpu->set_input_line(data, ASSERT_LINE);
|
||||||
else
|
else
|
||||||
state->m_vblank_irq_active = 0;
|
state->m_vblank_irq_active = 0;
|
||||||
}
|
}
|
||||||
@ -497,9 +497,9 @@ static void namconb2_cpureg8_w(running_machine &machine, int reg, UINT8 data)
|
|||||||
|
|
||||||
case 0x02: // POS IRQ level
|
case 0x02: // POS IRQ level
|
||||||
if(state->m_pos_irq_active && (prev != data)) {
|
if(state->m_pos_irq_active && (prev != data)) {
|
||||||
machine.device("maincpu")->execute().set_input_line(prev, CLEAR_LINE);
|
state->m_maincpu->set_input_line(prev, CLEAR_LINE);
|
||||||
if(data)
|
if(data)
|
||||||
machine.device("maincpu")->execute().set_input_line(data, ASSERT_LINE);
|
state->m_maincpu->set_input_line(data, ASSERT_LINE);
|
||||||
else
|
else
|
||||||
state->m_pos_irq_active = 0;
|
state->m_pos_irq_active = 0;
|
||||||
}
|
}
|
||||||
@ -507,14 +507,14 @@ static void namconb2_cpureg8_w(running_machine &machine, int reg, UINT8 data)
|
|||||||
|
|
||||||
case 0x04: // VBLANK ack
|
case 0x04: // VBLANK ack
|
||||||
if(state->m_vblank_irq_active) {
|
if(state->m_vblank_irq_active) {
|
||||||
machine.device("maincpu")->execute().set_input_line(state->m_namconb_cpureg[0x00], CLEAR_LINE);
|
state->m_maincpu->set_input_line(state->m_namconb_cpureg[0x00], CLEAR_LINE);
|
||||||
state->m_vblank_irq_active = 0;
|
state->m_vblank_irq_active = 0;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x06: // POS ack
|
case 0x06: // POS ack
|
||||||
if(state->m_pos_irq_active) {
|
if(state->m_pos_irq_active) {
|
||||||
machine.device("maincpu")->execute().set_input_line(state->m_namconb_cpureg[0x02], CLEAR_LINE);
|
state->m_maincpu->set_input_line(state->m_namconb_cpureg[0x02], CLEAR_LINE);
|
||||||
state->m_pos_irq_active = 0;
|
state->m_pos_irq_active = 0;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
@ -524,11 +524,11 @@ static void namconb2_cpureg8_w(running_machine &machine, int reg, UINT8 data)
|
|||||||
|
|
||||||
case 0x16: // C75 Control
|
case 0x16: // C75 Control
|
||||||
if(data & 1) {
|
if(data & 1) {
|
||||||
machine.device("mcu")->execute().set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
|
state->m_mcu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
|
||||||
machine.device("mcu")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
state->m_mcu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
machine.device("mcu")->execute().set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
state->m_mcu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
||||||
} else {
|
} else {
|
||||||
machine.device("mcu")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
state->m_mcu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
@ -875,7 +875,7 @@ void namcos11_state::namcos11_init_common(int n_daughterboard)
|
|||||||
if (C76_SPEEDUP)
|
if (C76_SPEEDUP)
|
||||||
{
|
{
|
||||||
save_item( NAME(m_su_83) );
|
save_item( NAME(m_su_83) );
|
||||||
machine().device("c76")->memory().space(AS_PROGRAM).install_readwrite_handler(0x82, 0x83, read16_delegate(FUNC(namcos11_state::c76_speedup_r),this), write16_delegate(FUNC(namcos11_state::c76_speedup_w),this));
|
m_mcu->space(AS_PROGRAM).install_readwrite_handler(0x82, 0x83, read16_delegate(FUNC(namcos11_state::c76_speedup_r),this), write16_delegate(FUNC(namcos11_state::c76_speedup_w),this));
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!n_daughterboard)
|
if (!n_daughterboard)
|
||||||
@ -961,8 +961,8 @@ DRIVER_INIT_MEMBER(namcos11_state,danceyes)
|
|||||||
|
|
||||||
DRIVER_INIT_MEMBER(namcos11_state,pocketrc)
|
DRIVER_INIT_MEMBER(namcos11_state,pocketrc)
|
||||||
{
|
{
|
||||||
machine().device("c76")->memory().space(AS_IO).install_read_handler(M37710_ADC0_L, M37710_ADC0_L, read8_delegate(FUNC(namcos11_state::pocketrc_steer_r),this));
|
m_mcu->space(AS_IO).install_read_handler(M37710_ADC0_L, M37710_ADC0_L, read8_delegate(FUNC(namcos11_state::pocketrc_steer_r),this));
|
||||||
machine().device("c76")->memory().space(AS_IO).install_read_handler(M37710_ADC1_L, M37710_ADC1_L, read8_delegate(FUNC(namcos11_state::pocketrc_gas_r),this));
|
m_mcu->space(AS_IO).install_read_handler(M37710_ADC1_L, M37710_ADC1_L, read8_delegate(FUNC(namcos11_state::pocketrc_gas_r),this));
|
||||||
|
|
||||||
m_maincpu->space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c432_r),this));
|
m_maincpu->space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c432_r),this));
|
||||||
namcos11_init_common(32);
|
namcos11_init_common(32);
|
||||||
|
@ -519,8 +519,8 @@ namcos21_kickstart( running_machine &machine, int internal )
|
|||||||
state->m_mpDspState->slaveOutputSize = 0;
|
state->m_mpDspState->slaveOutputSize = 0;
|
||||||
state->m_mpDspState->masterFinished = 0;
|
state->m_mpDspState->masterFinished = 0;
|
||||||
state->m_mpDspState->slaveActive = 0;
|
state->m_mpDspState->slaveActive = 0;
|
||||||
machine.device("dspmaster")->execute().set_input_line(0, HOLD_LINE);
|
state->m_dspmaster->set_input_line(0, HOLD_LINE);
|
||||||
machine.device("dspslave")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE);
|
state->m_dspslave->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
static UINT16
|
static UINT16
|
||||||
@ -1229,7 +1229,7 @@ WRITE16_MEMBER(namcos21_state::winrun_dsp_complete_w)
|
|||||||
if( data )
|
if( data )
|
||||||
{
|
{
|
||||||
winrun_flushpoly(machine());
|
winrun_flushpoly(machine());
|
||||||
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE);
|
m_dsp->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
|
||||||
namcos21_ClearPolyFrameBuffer(machine());
|
namcos21_ClearPolyFrameBuffer(machine());
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -247,12 +247,12 @@ READ8_MEMBER(namcos86_state::dsw1_r)
|
|||||||
|
|
||||||
WRITE8_MEMBER(namcos86_state::int_ack1_w)
|
WRITE8_MEMBER(namcos86_state::int_ack1_w)
|
||||||
{
|
{
|
||||||
machine().device("cpu1")->execute().set_input_line(0, CLEAR_LINE);
|
m_cpu1->set_input_line(0, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(namcos86_state::int_ack2_w)
|
WRITE8_MEMBER(namcos86_state::int_ack2_w)
|
||||||
{
|
{
|
||||||
machine().device("cpu2")->execute().set_input_line(0, CLEAR_LINE);
|
m_cpu2->set_input_line(0, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -234,6 +234,7 @@ public:
|
|||||||
m_work_ram(*this, "work_ram"),
|
m_work_ram(*this, "work_ram"),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
m_audiocpu(*this, "audiocpu"),
|
m_audiocpu(*this, "audiocpu"),
|
||||||
|
m_dsp(*this, "dsp"),
|
||||||
m_k001604(*this, "k001604") { }
|
m_k001604(*this, "k001604") { }
|
||||||
|
|
||||||
UINT8 m_led_reg0;
|
UINT8 m_led_reg0;
|
||||||
@ -262,6 +263,7 @@ public:
|
|||||||
void lanc2_init();
|
void lanc2_init();
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
required_device<cpu_device> m_audiocpu;
|
required_device<cpu_device> m_audiocpu;
|
||||||
|
required_device<cpu_device> m_dsp;
|
||||||
required_device<k001604_device> m_k001604;
|
required_device<k001604_device> m_k001604;
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -278,7 +280,8 @@ WRITE32_MEMBER(nwktr_state::paletteram32_w)
|
|||||||
|
|
||||||
static void voodoo_vblank_0(device_t *device, int param)
|
static void voodoo_vblank_0(device_t *device, int param)
|
||||||
{
|
{
|
||||||
device->machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, param);
|
nwktr_state *drvstate = device->machine().driver_data<nwktr_state>();
|
||||||
|
drvstate->m_maincpu->set_input_line(INPUT_LINE_IRQ0, param);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -682,7 +685,7 @@ static void sound_irq_callback(running_machine &machine, int irq)
|
|||||||
nwktr_state *state = machine.driver_data<nwktr_state>();
|
nwktr_state *state = machine.driver_data<nwktr_state>();
|
||||||
int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
|
int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
|
||||||
|
|
||||||
machine.device("audiocpu")->execute().set_input_line(line, ASSERT_LINE);
|
state->m_audiocpu->set_input_line(line, ASSERT_LINE);
|
||||||
state->m_sound_irq_timer->adjust(attotime::from_usec(5), line);
|
state->m_sound_irq_timer->adjust(attotime::from_usec(5), line);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -712,7 +715,7 @@ static const k001604_interface thrilld_k001604_intf =
|
|||||||
|
|
||||||
void nwktr_state::machine_reset()
|
void nwktr_state::machine_reset()
|
||||||
{
|
{
|
||||||
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const voodoo_config voodoo_intf =
|
static const voodoo_config voodoo_intf =
|
||||||
|
@ -158,8 +158,8 @@ WRITE8_MEMBER(othello_state::unk_8a_w)
|
|||||||
|
|
||||||
|
|
||||||
m_n7751_command = (data & 0x07);
|
m_n7751_command = (data & 0x07);
|
||||||
m_n7751->execute().set_input_line(0, ((data & 0x08) == 0) ? ASSERT_LINE : CLEAR_LINE);
|
m_n7751->set_input_line(0, ((data & 0x08) == 0) ? ASSERT_LINE : CLEAR_LINE);
|
||||||
//m_n7751->execute().set_input_line(0, (data & 0x02) ? CLEAR_LINE : ASSERT_LINE);
|
//m_n7751->set_input_line(0, (data & 0x02) ? CLEAR_LINE : ASSERT_LINE);
|
||||||
machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(100));
|
machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(100));
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
@ -178,7 +178,8 @@ static void pangofun_set_keyb_int(running_machine &machine, int state)
|
|||||||
|
|
||||||
static void set_gate_a20(running_machine &machine, int a20)
|
static void set_gate_a20(running_machine &machine, int a20)
|
||||||
{
|
{
|
||||||
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_A20, a20);
|
pangofun_state *state = machine.driver_data<pangofun_state>();
|
||||||
|
state->m_maincpu->set_input_line(INPUT_LINE_A20, a20);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void keyboard_interrupt(running_machine &machine, int state)
|
static void keyboard_interrupt(running_machine &machine, int state)
|
||||||
|
@ -116,7 +116,8 @@ static void pcat_dyn_set_keyb_int(running_machine &machine, int state)
|
|||||||
|
|
||||||
static void set_gate_a20(running_machine &machine, int a20)
|
static void set_gate_a20(running_machine &machine, int a20)
|
||||||
{
|
{
|
||||||
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_A20, a20);
|
pcat_dyn_state *state = machine.driver_data<pcat_dyn_state>();
|
||||||
|
state->m_maincpu->set_input_line(INPUT_LINE_A20, a20);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void keyboard_interrupt(running_machine &machine, int state)
|
static void keyboard_interrupt(running_machine &machine, int state)
|
||||||
|
@ -250,16 +250,16 @@ WRITE32_MEMBER(polygonet_state::dsp_w_lines)
|
|||||||
if ((data >> 24) & 0x01)
|
if ((data >> 24) & 0x01)
|
||||||
{
|
{
|
||||||
// logerror("RESET CLEARED\n");
|
// logerror("RESET CLEARED\n");
|
||||||
machine().device("dsp")->execute().set_input_line(DSP56K_IRQ_RESET, CLEAR_LINE);
|
m_dsp->set_input_line(DSP56K_IRQ_RESET, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
// logerror("RESET ASSERTED\n");
|
// logerror("RESET ASSERTED\n");
|
||||||
machine().device("dsp")->execute().set_input_line(DSP56K_IRQ_RESET, ASSERT_LINE);
|
m_dsp->set_input_line(DSP56K_IRQ_RESET, ASSERT_LINE);
|
||||||
|
|
||||||
/* A little hacky - I can't seem to set these lines anywhere else where reset is asserted, so i do it here */
|
/* A little hacky - I can't seem to set these lines anywhere else where reset is asserted, so i do it here */
|
||||||
machine().device("dsp")->execute().set_input_line(DSP56K_IRQ_MODA, ASSERT_LINE);
|
m_dsp->set_input_line(DSP56K_IRQ_MODA, ASSERT_LINE);
|
||||||
machine().device("dsp")->execute().set_input_line(DSP56K_IRQ_MODB, CLEAR_LINE);
|
m_dsp->set_input_line(DSP56K_IRQ_MODB, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* 0x04000000 is the COMBNK line - it switches who has access to the shared RAM - the dsp or the 68020 */
|
/* 0x04000000 is the COMBNK line - it switches who has access to the shared RAM - the dsp or the 68020 */
|
||||||
@ -604,9 +604,9 @@ void polygonet_state::machine_start()
|
|||||||
/* It's presumed the hardware has hard-wired operating mode 1 (MODA = 1, MODB = 0) */
|
/* It's presumed the hardware has hard-wired operating mode 1 (MODA = 1, MODB = 0) */
|
||||||
/* TODO: This should work, but the MAME core appears to do something funny.
|
/* TODO: This should work, but the MAME core appears to do something funny.
|
||||||
Not a big deal - it's hacked in dsp_w_lines. */
|
Not a big deal - it's hacked in dsp_w_lines. */
|
||||||
//machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
//m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
//machine().device("dsp")->execute().set_input_line(DSP56K_IRQ_MODA, ASSERT_LINE);
|
//m_dsp->set_input_line(DSP56K_IRQ_MODA, ASSERT_LINE);
|
||||||
//machine().device("dsp")->execute().set_input_line(DSP56K_IRQ_MODB, CLEAR_LINE);
|
//m_dsp->set_input_line(DSP56K_IRQ_MODB, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const k053936_interface polygonet_k053936_intf =
|
static const k053936_interface polygonet_k053936_intf =
|
||||||
|
@ -160,8 +160,8 @@ void rastersp_state::machine_start()
|
|||||||
membank("bank3")->set_base(&m_dram[0x300000/4]);
|
membank("bank3")->set_base(&m_dram[0x300000/4]);
|
||||||
|
|
||||||
#if USE_SPEEDUP_HACK
|
#if USE_SPEEDUP_HACK
|
||||||
machine().device("dsp")->memory().space(AS_PROGRAM).install_read_handler(0x809923, 0x809923, read32_delegate(FUNC(rastersp_state::dsp_speedup_r), this));
|
m_dsp->space(AS_PROGRAM).install_read_handler(0x809923, 0x809923, read32_delegate(FUNC(rastersp_state::dsp_speedup_r), this));
|
||||||
machine().device("dsp")->memory().space(AS_PROGRAM).install_write_handler(0x809923, 0x809923, write32_delegate(FUNC(rastersp_state::dsp_speedup_w), this));
|
m_dsp->space(AS_PROGRAM).install_write_handler(0x809923, 0x809923, write32_delegate(FUNC(rastersp_state::dsp_speedup_w), this));
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -833,12 +833,14 @@ INPUT_PORTS_END
|
|||||||
|
|
||||||
static UINT32 ncr53c700_r(running_machine &machine, bool io, offs_t addr)
|
static UINT32 ncr53c700_r(running_machine &machine, bool io, offs_t addr)
|
||||||
{
|
{
|
||||||
return machine.device("maincpu")->memory().space(io ? AS_IO : AS_PROGRAM).read_dword(addr);
|
rastersp_state *state = machine.driver_data<rastersp_state>();
|
||||||
|
return state->m_maincpu->space(io ? AS_IO : AS_PROGRAM).read_dword(addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void ncr53c700_w(running_machine &machine, bool io, offs_t addr, UINT32 data, UINT32 mem_mask)
|
static void ncr53c700_w(running_machine &machine, bool io, offs_t addr, UINT32 data, UINT32 mem_mask)
|
||||||
{
|
{
|
||||||
machine.device("maincpu")->memory().space(io ? AS_IO : AS_PROGRAM).write_dword(addr, data, mem_mask);
|
rastersp_state *state = machine.driver_data<rastersp_state>();
|
||||||
|
state->m_maincpu->space(io ? AS_IO : AS_PROGRAM).write_dword(addr, data, mem_mask);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct NCR53C7XXinterface ncr53c700_intf =
|
static const struct NCR53C7XXinterface ncr53c700_intf =
|
||||||
|
@ -310,7 +310,7 @@ DRIVER_INIT_MEMBER(renegade_state,kuniokun)
|
|||||||
m_mcu_encrypt_table = kuniokun_xor_table;
|
m_mcu_encrypt_table = kuniokun_xor_table;
|
||||||
m_mcu_encrypt_table_len = 0x2a;
|
m_mcu_encrypt_table_len = 0x2a;
|
||||||
|
|
||||||
machine().device<cpu_device>("mcu")->suspend(SUSPEND_REASON_DISABLE, 1);
|
m_mcu->suspend(SUSPEND_REASON_DISABLE, 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
DRIVER_INIT_MEMBER(renegade_state,kuniokunb)
|
DRIVER_INIT_MEMBER(renegade_state,kuniokunb)
|
||||||
|
@ -49,8 +49,8 @@ WRITE8_MEMBER(retofinv_state::cpu2_reset_w)
|
|||||||
WRITE8_MEMBER(retofinv_state::mcu_reset_w)
|
WRITE8_MEMBER(retofinv_state::mcu_reset_w)
|
||||||
{
|
{
|
||||||
/* the bootlegs don't have a MCU, so make sure it's there before trying to reset it */
|
/* the bootlegs don't have a MCU, so make sure it's there before trying to reset it */
|
||||||
if (machine().device("68705") != NULL)
|
if (m_68705 != NULL)
|
||||||
machine().device("68705")->execute().set_input_line(INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE);
|
m_68705->set_input_line(INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(retofinv_state::cpu2_m6000_w)
|
WRITE8_MEMBER(retofinv_state::cpu2_m6000_w)
|
||||||
|
@ -661,7 +661,8 @@ static void ethernet_interrupt(device_t *device, int state)
|
|||||||
|
|
||||||
static void ioasic_irq(running_machine &machine, int state)
|
static void ioasic_irq(running_machine &machine, int state)
|
||||||
{
|
{
|
||||||
machine.device("maincpu")->execute().set_input_line(IOASIC_IRQ_NUM, state);
|
seattle_state *drvstate = machine.driver_data<seattle_state>();
|
||||||
|
drvstate->m_maincpu->set_input_line(IOASIC_IRQ_NUM, state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -1314,8 +1314,10 @@ UINT32 segac2_state::screen_update_segac2_new(screen_device &screen, bitmap_rgb3
|
|||||||
// the main interrupt on C2 comes from the vdp line used to drive the z80 interrupt on a regular genesis(!)
|
// the main interrupt on C2 comes from the vdp line used to drive the z80 interrupt on a regular genesis(!)
|
||||||
void genesis_vdp_sndirqline_callback_segac2(running_machine &machine, bool state)
|
void genesis_vdp_sndirqline_callback_segac2(running_machine &machine, bool state)
|
||||||
{
|
{
|
||||||
|
segac2_state *drvstate = machine.driver_data<segac2_state>();
|
||||||
|
|
||||||
if (state==true)
|
if (state==true)
|
||||||
machine.device("maincpu")->execute().set_input_line(6, HOLD_LINE);
|
drvstate->m_maincpu->set_input_line(6, HOLD_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
// the line usually used to drive irq6 is not connected
|
// the line usually used to drive irq6 is not connected
|
||||||
@ -1327,10 +1329,11 @@ void genesis_vdp_lv6irqline_callback_segac2(running_machine &machine, bool state
|
|||||||
// the scanline interrupt seems connected as usual
|
// the scanline interrupt seems connected as usual
|
||||||
void genesis_vdp_lv4irqline_callback_segac2(running_machine &machine, bool state)
|
void genesis_vdp_lv4irqline_callback_segac2(running_machine &machine, bool state)
|
||||||
{
|
{
|
||||||
|
segac2_state *drvstate = machine.driver_data<segac2_state>();
|
||||||
if (state==true)
|
if (state==true)
|
||||||
machine.device("maincpu")->execute().set_input_line(4, HOLD_LINE);
|
drvstate->m_maincpu->set_input_line(4, HOLD_LINE);
|
||||||
else
|
else
|
||||||
machine.device("maincpu")->execute().set_input_line(4, CLEAR_LINE);
|
drvstate->m_maincpu->set_input_line(4, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const sega315_5124_interface sms_vdp_ntsc_intf =
|
static const sega315_5124_interface sms_vdp_ntsc_intf =
|
||||||
|
@ -63,14 +63,14 @@ WRITE8_MEMBER(shangkid_state::shangkid_maincpu_bank_w)
|
|||||||
|
|
||||||
WRITE8_MEMBER(shangkid_state::shangkid_bbx_enable_w)
|
WRITE8_MEMBER(shangkid_state::shangkid_bbx_enable_w)
|
||||||
{
|
{
|
||||||
machine().device("bbx")->execute().set_input_line(INPUT_LINE_HALT, data?0:1 );
|
m_bbx->set_input_line(INPUT_LINE_HALT, data?0:1 );
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(shangkid_state::shangkid_cpu_reset_w)
|
WRITE8_MEMBER(shangkid_state::shangkid_cpu_reset_w)
|
||||||
{
|
{
|
||||||
if( data == 0 )
|
if( data == 0 )
|
||||||
{
|
{
|
||||||
machine().device("bbx")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE);
|
m_bbx->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
|
||||||
}
|
}
|
||||||
else if( data == 1 )
|
else if( data == 1 )
|
||||||
{
|
{
|
||||||
@ -137,12 +137,12 @@ DRIVER_INIT_MEMBER(shangkid_state,shangkid)
|
|||||||
|
|
||||||
MACHINE_RESET_MEMBER(shangkid_state,chinhero)
|
MACHINE_RESET_MEMBER(shangkid_state,chinhero)
|
||||||
{
|
{
|
||||||
machine().device("bbx")->execute().set_input_line(INPUT_LINE_HALT, 1 );
|
m_bbx->set_input_line(INPUT_LINE_HALT, 1 );
|
||||||
}
|
}
|
||||||
|
|
||||||
MACHINE_RESET_MEMBER(shangkid_state,shangkid)
|
MACHINE_RESET_MEMBER(shangkid_state,shangkid)
|
||||||
{
|
{
|
||||||
machine().device("bbx")->execute().set_input_line(INPUT_LINE_HALT, 1 );
|
m_bbx->set_input_line(INPUT_LINE_HALT, 1 );
|
||||||
|
|
||||||
membank("bank1")->set_entry(0);
|
membank("bank1")->set_entry(0);
|
||||||
membank("bank2")->set_entry(0);
|
membank("bank2")->set_entry(0);
|
||||||
|
@ -26,7 +26,8 @@ public:
|
|||||||
skeetsht_state(const machine_config &mconfig, device_type type, const char *tag)
|
skeetsht_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||||
: driver_device(mconfig, type, tag),
|
: driver_device(mconfig, type, tag),
|
||||||
m_tlc34076(*this, "tlc34076"),
|
m_tlc34076(*this, "tlc34076"),
|
||||||
m_tms_vram(*this, "tms_vram"){ }
|
m_tms_vram(*this, "tms_vram"),
|
||||||
|
m_68hc11(*this, "68hc11"){ }
|
||||||
|
|
||||||
required_device<tlc34076_device> m_tlc34076;
|
required_device<tlc34076_device> m_tlc34076;
|
||||||
required_shared_ptr<UINT16> m_tms_vram;
|
required_shared_ptr<UINT16> m_tms_vram;
|
||||||
@ -45,6 +46,7 @@ public:
|
|||||||
DECLARE_WRITE8_MEMBER(ay8910_w);
|
DECLARE_WRITE8_MEMBER(ay8910_w);
|
||||||
virtual void machine_reset();
|
virtual void machine_reset();
|
||||||
virtual void video_start();
|
virtual void video_start();
|
||||||
|
required_device<cpu_device> m_68hc11;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
@ -117,7 +119,8 @@ WRITE16_MEMBER(skeetsht_state::ramdac_w)
|
|||||||
|
|
||||||
static void skeetsht_tms_irq(device_t *device, int state)
|
static void skeetsht_tms_irq(device_t *device, int state)
|
||||||
{
|
{
|
||||||
device->machine().device("68hc11")->execute().set_input_line(MC68HC11_IRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
|
skeetsht_state *drvstate = device->machine().driver_data<skeetsht_state>();
|
||||||
|
drvstate->m_68hc11->set_input_line(MC68HC11_IRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -650,7 +650,8 @@ MACHINE_CONFIG_END
|
|||||||
|
|
||||||
MACHINE_RESET( ffight2b )
|
MACHINE_RESET( ffight2b )
|
||||||
{
|
{
|
||||||
address_space &cpu0space = machine.device("maincpu")->memory().space(AS_PROGRAM);
|
snesb_state *state = machine.driver_data<snesb_state>();
|
||||||
|
address_space &cpu0space = state->m_maincpu->space(AS_PROGRAM);
|
||||||
MACHINE_RESET_CALL( snes );
|
MACHINE_RESET_CALL( snes );
|
||||||
|
|
||||||
/* Hack: avoid starting with 55 credits. It's either a work RAM init fault or MCU clears it by his own, hard to tell ... */
|
/* Hack: avoid starting with 55 credits. It's either a work RAM init fault or MCU clears it by his own, hard to tell ... */
|
||||||
|
@ -113,12 +113,12 @@ WRITE8_MEMBER(sothello_state::bank_w)
|
|||||||
|
|
||||||
TIMER_CALLBACK_MEMBER(sothello_state::subcpu_suspend)
|
TIMER_CALLBACK_MEMBER(sothello_state::subcpu_suspend)
|
||||||
{
|
{
|
||||||
machine().device<cpu_device>("sub")->suspend(SUSPEND_REASON_HALT, 1);
|
m_subcpu->suspend(SUSPEND_REASON_HALT, 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
TIMER_CALLBACK_MEMBER(sothello_state::subcpu_resume)
|
TIMER_CALLBACK_MEMBER(sothello_state::subcpu_resume)
|
||||||
{
|
{
|
||||||
machine().device<cpu_device>("sub")->resume(SUSPEND_REASON_HALT);
|
m_subcpu->resume(SUSPEND_REASON_HALT);
|
||||||
m_subcpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
m_subcpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -225,7 +225,7 @@ ADDRESS_MAP_END
|
|||||||
static void unlock_shared_ram(address_space &space)
|
static void unlock_shared_ram(address_space &space)
|
||||||
{
|
{
|
||||||
sothello_state *state = space.machine().driver_data<sothello_state>();
|
sothello_state *state = space.machine().driver_data<sothello_state>();
|
||||||
if(!space.machine().device<cpu_device>("sub")->suspended(SUSPEND_REASON_HALT))
|
if(!state->m_subcpu->suspended(SUSPEND_REASON_HALT))
|
||||||
{
|
{
|
||||||
state->m_subcpu_status|=1;
|
state->m_subcpu_status|=1;
|
||||||
}
|
}
|
||||||
|
@ -130,7 +130,8 @@ static void su2000_set_keyb_int(running_machine &machine, int state)
|
|||||||
|
|
||||||
static void set_gate_a20(running_machine &machine, int a20)
|
static void set_gate_a20(running_machine &machine, int a20)
|
||||||
{
|
{
|
||||||
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_A20, a20);
|
su2000_state *state = machine.driver_data<su2000_state>();
|
||||||
|
state->m_maincpu->set_input_line(INPUT_LINE_A20, a20);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void keyboard_interrupt(running_machine &machine, int state)
|
static void keyboard_interrupt(running_machine &machine, int state)
|
||||||
|
@ -403,8 +403,9 @@ INTERRUPT_GEN_MEMBER(taito_f3_state::f3_interrupt2)
|
|||||||
|
|
||||||
static SOUND_RESET( f3 )
|
static SOUND_RESET( f3 )
|
||||||
{
|
{
|
||||||
|
taito_f3_state *state = machine.driver_data<taito_f3_state>();
|
||||||
SOUND_RESET_CALL( taito_en_soundsystem_reset );
|
SOUND_RESET_CALL( taito_en_soundsystem_reset );
|
||||||
machine.device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
state->m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -237,7 +237,7 @@ WRITE16_MEMBER(taitoair_state::system_control_w)
|
|||||||
|
|
||||||
m_dsp_hold_signal = (data & 4) ? CLEAR_LINE : ASSERT_LINE;
|
m_dsp_hold_signal = (data & 4) ? CLEAR_LINE : ASSERT_LINE;
|
||||||
|
|
||||||
m_dsp->execute().set_input_line(INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
|
m_dsp->set_input_line(INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
|
||||||
|
|
||||||
logerror("68K:%06x writing %04x to TMS32025. %s HOLD , %s RESET\n", space.device().safe_pcbase(), data, ((data & 4) ? "Clear" : "Assert"), ((data & 1) ? "Clear" : "Assert"));
|
logerror("68K:%06x writing %04x to TMS32025. %s HOLD , %s RESET\n", space.device().safe_pcbase(), data, ((data & 4) ? "Clear" : "Assert"), ((data & 1) ? "Clear" : "Assert"));
|
||||||
}
|
}
|
||||||
@ -666,7 +666,6 @@ void taitoair_state::machine_start()
|
|||||||
|
|
||||||
membank("bank1")->configure_entries(0, 4, &ROM[0xc000], 0x4000);
|
membank("bank1")->configure_entries(0, 4, &ROM[0xc000], 0x4000);
|
||||||
|
|
||||||
m_dsp = machine().device("dsp");
|
|
||||||
m_tc0080vco = machine().device("tc0080vco");
|
m_tc0080vco = machine().device("tc0080vco");
|
||||||
|
|
||||||
save_item(NAME(m_banknum));
|
save_item(NAME(m_banknum));
|
||||||
|
@ -337,7 +337,8 @@ public:
|
|||||||
m_znsec0(*this,"maincpu:sio0:znsec0"),
|
m_znsec0(*this,"maincpu:sio0:znsec0"),
|
||||||
m_znsec1(*this,"maincpu:sio0:znsec1"),
|
m_znsec1(*this,"maincpu:sio0:znsec1"),
|
||||||
m_zndip(*this,"maincpu:sio0:zndip"),
|
m_zndip(*this,"maincpu:sio0:zndip"),
|
||||||
m_maincpu(*this, "maincpu") {
|
m_maincpu(*this, "maincpu"),
|
||||||
|
m_mn10200(*this, "mn10200") {
|
||||||
}
|
}
|
||||||
|
|
||||||
required_device<znsec_device> m_znsec0;
|
required_device<znsec_device> m_znsec0;
|
||||||
@ -399,6 +400,7 @@ public:
|
|||||||
void gen_flash_w(intelfsh16_device *device, offs_t offset, UINT32 data, UINT32 mem_mask);
|
void gen_flash_w(intelfsh16_device *device, offs_t offset, UINT32 data, UINT32 mem_mask);
|
||||||
void install_handlers(int mode);
|
void install_handlers(int mode);
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
|
required_device<cpu_device> m_mn10200;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
@ -797,7 +799,7 @@ MACHINE_RESET_MEMBER(taitogn_state,coh3002t)
|
|||||||
card->ide_set_gnet_readlock(1);
|
card->ide_set_gnet_readlock(1);
|
||||||
|
|
||||||
// halt sound CPU since it has no valid program at start
|
// halt sound CPU since it has no valid program at start
|
||||||
machine().device("mn10200")->execute().set_input_line(INPUT_LINE_RESET,ASSERT_LINE); /* MCU */
|
m_mn10200->set_input_line(INPUT_LINE_RESET,ASSERT_LINE); /* MCU */
|
||||||
}
|
}
|
||||||
|
|
||||||
static ADDRESS_MAP_START( taitogn_map, AS_PROGRAM, 32, taitogn_state )
|
static ADDRESS_MAP_START( taitogn_map, AS_PROGRAM, 32, taitogn_state )
|
||||||
|
@ -1349,14 +1349,14 @@ DRIVER_INIT_MEMBER(taitojc_state,taitojc)
|
|||||||
|
|
||||||
m_has_dsp_hack = 1;
|
m_has_dsp_hack = 1;
|
||||||
|
|
||||||
machine().device("dsp")->memory().space(AS_DATA).install_readwrite_handler(0x7ff0, 0x7ff0, read16_delegate(FUNC(taitojc_state::taitojc_dsp_idle_skip_r),this), write16_delegate(FUNC(taitojc_state::dsp_idle_skip_w),this));
|
m_dsp->space(AS_DATA).install_readwrite_handler(0x7ff0, 0x7ff0, read16_delegate(FUNC(taitojc_state::taitojc_dsp_idle_skip_r),this), write16_delegate(FUNC(taitojc_state::dsp_idle_skip_w),this));
|
||||||
}
|
}
|
||||||
|
|
||||||
DRIVER_INIT_MEMBER(taitojc_state,dendego2)
|
DRIVER_INIT_MEMBER(taitojc_state,dendego2)
|
||||||
{
|
{
|
||||||
DRIVER_INIT_CALL(taitojc);
|
DRIVER_INIT_CALL(taitojc);
|
||||||
|
|
||||||
machine().device("dsp")->memory().space(AS_DATA).install_readwrite_handler(0x7ff0, 0x7ff0, read16_delegate(FUNC(taitojc_state::dendego2_dsp_idle_skip_r),this), write16_delegate(FUNC(taitojc_state::dsp_idle_skip_w),this));
|
m_dsp->space(AS_DATA).install_readwrite_handler(0x7ff0, 0x7ff0, read16_delegate(FUNC(taitojc_state::dendego2_dsp_idle_skip_r),this), write16_delegate(FUNC(taitojc_state::dsp_idle_skip_w),this));
|
||||||
}
|
}
|
||||||
|
|
||||||
DRIVER_INIT_MEMBER(taitojc_state,dangcurv)
|
DRIVER_INIT_MEMBER(taitojc_state,dangcurv)
|
||||||
|
@ -1931,7 +1931,7 @@ WRITE64_MEMBER(taitotz_state::ppc_common_w)
|
|||||||
else
|
else
|
||||||
{
|
{
|
||||||
// normally just raise INT0 on TLCS and let it handle the command
|
// normally just raise INT0 on TLCS and let it handle the command
|
||||||
machine().device("iocpu")->execute().set_input_line(TLCS900_INT0, ASSERT_LINE);
|
m_iocpu->set_input_line(TLCS900_INT0, ASSERT_LINE);
|
||||||
m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
|
m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
|
||||||
|
|
||||||
// The PPC always goes to busy loop waiting for TLCS here, so we can free up the timeslice.
|
// The PPC always goes to busy loop waiting for TLCS here, so we can free up the timeslice.
|
||||||
@ -2019,21 +2019,21 @@ WRITE8_MEMBER(taitotz_state::tlcs_common_w)
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
m_maincpu->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
|
m_maincpu->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
|
||||||
machine().device("iocpu")->execute().set_input_line(TLCS900_INT0, CLEAR_LINE);
|
m_iocpu->set_input_line(TLCS900_INT0, CLEAR_LINE);
|
||||||
|
|
||||||
machine().device("iocpu")->execute().set_input_line(TLCS900_INT3, CLEAR_LINE);
|
m_iocpu->set_input_line(TLCS900_INT3, CLEAR_LINE);
|
||||||
|
|
||||||
// The PPC is now free to continue running
|
// The PPC is now free to continue running
|
||||||
//machine().scheduler().trigger(PPC_TLCS_COMM_TRIGGER);
|
//machine().scheduler().trigger(PPC_TLCS_COMM_TRIGGER);
|
||||||
//machine().device("iocpu")->execute().yield();
|
//m_iocpu->yield();
|
||||||
}
|
}
|
||||||
|
|
||||||
if (offset == 0x1ffe)
|
if (offset == 0x1ffe)
|
||||||
{
|
{
|
||||||
if (m_io_share_ram[0xfff] == 0 && m_io_share_ram[0xffe] == 0x1012)
|
if (m_io_share_ram[0xfff] == 0 && m_io_share_ram[0xffe] == 0x1012)
|
||||||
{
|
{
|
||||||
//machine().device("iocpu")->execute().spin_until_trigger(TLCS_PPC_COMM_TRIGGER);
|
//m_iocpu->spin_until_trigger(TLCS_PPC_COMM_TRIGGER);
|
||||||
machine().device("iocpu")->execute().yield();
|
m_iocpu->yield();
|
||||||
machine().scheduler().trigger(PPC_TLCS_COMM_TRIGGER);
|
machine().scheduler().trigger(PPC_TLCS_COMM_TRIGGER);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -2543,12 +2543,12 @@ void taitotz_state::machine_start()
|
|||||||
|
|
||||||
INTERRUPT_GEN_MEMBER(taitotz_state::taitotz_vbi)
|
INTERRUPT_GEN_MEMBER(taitotz_state::taitotz_vbi)
|
||||||
{
|
{
|
||||||
machine().device("iocpu")->execute().set_input_line(TLCS900_INT3, ASSERT_LINE);
|
m_iocpu->set_input_line(TLCS900_INT3, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(taitotz_state::ide_interrupt)
|
WRITE_LINE_MEMBER(taitotz_state::ide_interrupt)
|
||||||
{
|
{
|
||||||
machine().device("iocpu")->execute().set_input_line(TLCS900_INT2, state);
|
m_iocpu->set_input_line(TLCS900_INT2, state);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const powerpc_config ppc603e_config =
|
static const powerpc_config ppc603e_config =
|
||||||
|
@ -224,7 +224,8 @@ WRITE16_MEMBER(tmaster_state::tmaster_oki_bank_w)
|
|||||||
|
|
||||||
static void duart_irq_handler(device_t *device, int state, UINT8 vector)
|
static void duart_irq_handler(device_t *device, int state, UINT8 vector)
|
||||||
{
|
{
|
||||||
device->machine().device("maincpu")->execute().set_input_line_and_vector(4, state, vector);
|
tmaster_state *drvstate = device->machine().driver_data<tmaster_state>();
|
||||||
|
drvstate->m_maincpu->set_input_line_and_vector(4, state, vector);
|
||||||
};
|
};
|
||||||
|
|
||||||
static void duart_tx(device_t *device, int channel, UINT8 data)
|
static void duart_tx(device_t *device, int channel, UINT8 data)
|
||||||
|
@ -43,7 +43,8 @@ public:
|
|||||||
: driver_device(mconfig, type, tag),
|
: driver_device(mconfig, type, tag),
|
||||||
m_tms(*this, "tms"),
|
m_tms(*this, "tms"),
|
||||||
m_shared_ram(*this, "shared_ram"),
|
m_shared_ram(*this, "shared_ram"),
|
||||||
m_maincpu(*this, "maincpu") { }
|
m_maincpu(*this, "maincpu"),
|
||||||
|
m_dsp(*this, "dsp") { }
|
||||||
|
|
||||||
required_device<tms5220n_device> m_tms;
|
required_device<tms5220n_device> m_tms;
|
||||||
int m_control_num;
|
int m_control_num;
|
||||||
@ -81,6 +82,7 @@ public:
|
|||||||
DECLARE_WRITE8_MEMBER(soundlatches_w);
|
DECLARE_WRITE8_MEMBER(soundlatches_w);
|
||||||
virtual void machine_start();
|
virtual void machine_start();
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
|
required_device<cpu_device> m_dsp;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
@ -187,7 +189,7 @@ WRITE16_MEMBER(tomcat_state::tomcat_mresl_w)
|
|||||||
{
|
{
|
||||||
// 320 Reset Low (Address Strobe)
|
// 320 Reset Low (Address Strobe)
|
||||||
// Reset TMS320
|
// Reset TMS320
|
||||||
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE16_MEMBER(tomcat_state::tomcat_mresh_w)
|
WRITE16_MEMBER(tomcat_state::tomcat_mresh_w)
|
||||||
@ -195,7 +197,7 @@ WRITE16_MEMBER(tomcat_state::tomcat_mresh_w)
|
|||||||
// 320 Reset high (Address Strobe)
|
// 320 Reset high (Address Strobe)
|
||||||
// Release reset of TMS320
|
// Release reset of TMS320
|
||||||
m_dsp_BIO = 0;
|
m_dsp_BIO = 0;
|
||||||
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
m_dsp->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE16_MEMBER(tomcat_state::tomcat_irqclr_w)
|
WRITE16_MEMBER(tomcat_state::tomcat_irqclr_w)
|
||||||
|
@ -85,13 +85,13 @@ WRITE8_MEMBER(tsamurai_state::sound_command1_w)
|
|||||||
WRITE8_MEMBER(tsamurai_state::sound_command2_w)
|
WRITE8_MEMBER(tsamurai_state::sound_command2_w)
|
||||||
{
|
{
|
||||||
m_sound_command2 = data;
|
m_sound_command2 = data;
|
||||||
machine().device("audio2")->execute().set_input_line(0, HOLD_LINE );
|
m_audio2->set_input_line(0, HOLD_LINE );
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(tsamurai_state::sound_command3_w)
|
WRITE8_MEMBER(tsamurai_state::sound_command3_w)
|
||||||
{
|
{
|
||||||
m_sound_command3 = data;
|
m_sound_command3 = data;
|
||||||
machine().device("audio3")->execute().set_input_line(0, HOLD_LINE );
|
m_audio3->set_input_line(0, HOLD_LINE );
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(tsamurai_state::flip_screen_w)
|
WRITE8_MEMBER(tsamurai_state::flip_screen_w)
|
||||||
|
@ -78,7 +78,7 @@ WRITE16_MEMBER(tumblep_state::tumblep_sound_w)
|
|||||||
WRITE16_MEMBER(tumblep_state::jumppop_sound_w)
|
WRITE16_MEMBER(tumblep_state::jumppop_sound_w)
|
||||||
{
|
{
|
||||||
soundlatch_byte_w(space, 0, data & 0xff);
|
soundlatch_byte_w(space, 0, data & 0xff);
|
||||||
m_audiocpu.device(0)->execute().set_input_line(ASSERT_LINE );
|
m_audiocpu->set_input_line(ASSERT_LINE );
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
@ -88,13 +88,13 @@ INTERRUPT_GEN_MEMBER(tx1_state::z80_irq)
|
|||||||
|
|
||||||
READ16_MEMBER(tx1_state::z80_shared_r)
|
READ16_MEMBER(tx1_state::z80_shared_r)
|
||||||
{
|
{
|
||||||
address_space &cpu2space = machine().device("audio_cpu")->memory().space(AS_PROGRAM);
|
address_space &cpu2space = m_audiocpu->space(AS_PROGRAM);
|
||||||
return cpu2space.read_byte(offset);
|
return cpu2space.read_byte(offset);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE16_MEMBER(tx1_state::z80_shared_w)
|
WRITE16_MEMBER(tx1_state::z80_shared_w)
|
||||||
{
|
{
|
||||||
address_space &cpu2space = machine().device("audio_cpu")->memory().space(AS_PROGRAM);
|
address_space &cpu2space = m_audiocpu->space(AS_PROGRAM);
|
||||||
cpu2space.write_byte(offset, data & 0xff);
|
cpu2space.write_byte(offset, data & 0xff);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -25,6 +25,7 @@ public:
|
|||||||
m_vram(*this, "vram"),
|
m_vram(*this, "vram"),
|
||||||
m_workram(*this, "workram"),
|
m_workram(*this, "workram"),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
|
m_audiocpu(*this, "audiocpu"),
|
||||||
m_k056800(*this, "k056800") { }
|
m_k056800(*this, "k056800") { }
|
||||||
|
|
||||||
required_shared_ptr<UINT32> m_vram;
|
required_shared_ptr<UINT32> m_vram;
|
||||||
@ -40,6 +41,7 @@ public:
|
|||||||
UINT32 screen_update_ultrsprt(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
UINT32 screen_update_ultrsprt(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||||
INTERRUPT_GEN_MEMBER(ultrsprt_vblank);
|
INTERRUPT_GEN_MEMBER(ultrsprt_vblank);
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
|
required_device<cpu_device> m_audiocpu;
|
||||||
required_device<k056800_device> m_k056800;
|
required_device<k056800_device> m_k056800;
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -212,10 +214,11 @@ INTERRUPT_GEN_MEMBER(ultrsprt_state::ultrsprt_vblank)
|
|||||||
|
|
||||||
static void sound_irq_callback(running_machine &machine, int irq)
|
static void sound_irq_callback(running_machine &machine, int irq)
|
||||||
{
|
{
|
||||||
|
ultrsprt_state *state = machine.driver_data<ultrsprt_state>();
|
||||||
if (irq == 0)
|
if (irq == 0)
|
||||||
/*generic_pulse_irq_line(machine.device("audiocpu"), INPUT_LINE_IRQ5, 1)*/;
|
/*generic_pulse_irq_line(machine.device("audiocpu"), INPUT_LINE_IRQ5, 1)*/;
|
||||||
else
|
else
|
||||||
machine.device("audiocpu")->execute().set_input_line(INPUT_LINE_IRQ6, HOLD_LINE);
|
state->m_audiocpu->set_input_line(INPUT_LINE_IRQ6, HOLD_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const k056800_interface ultrsprt_k056800_interface =
|
static const k056800_interface ultrsprt_k056800_interface =
|
||||||
|
@ -336,7 +336,8 @@ static NVRAM_HANDLER( nevada )
|
|||||||
|
|
||||||
static void duart18_irq_handler(device_t *device, int state, UINT8 vector )
|
static void duart18_irq_handler(device_t *device, int state, UINT8 vector )
|
||||||
{
|
{
|
||||||
device->machine().device("maincpu")->execute().set_input_line_and_vector(4, state, vector);
|
nevada_state *drvstate = device->machine().driver_data<nevada_state>();
|
||||||
|
drvstate->m_maincpu->set_input_line_and_vector(4, state, vector);
|
||||||
};
|
};
|
||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
@ -368,7 +369,8 @@ static UINT8 duart18_input( device_t *device )
|
|||||||
|
|
||||||
static void duart39_irq_handler( device_t *device, int state, UINT8 vector )
|
static void duart39_irq_handler( device_t *device, int state, UINT8 vector )
|
||||||
{
|
{
|
||||||
device->machine().device("maincpu")->execute().set_input_line_and_vector(3, state, vector);
|
nevada_state *drvstate = device->machine().driver_data<nevada_state>();
|
||||||
|
drvstate->m_maincpu->set_input_line_and_vector(3, state, vector);
|
||||||
};
|
};
|
||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
@ -407,7 +409,8 @@ static UINT8 duart39_input( device_t *device )
|
|||||||
static void duart40_irq_handler( device_t *device, int state, UINT8 vector )
|
static void duart40_irq_handler( device_t *device, int state, UINT8 vector )
|
||||||
{
|
{
|
||||||
/* Todo , just for sample */
|
/* Todo , just for sample */
|
||||||
device->machine().device("maincpu")->execute().set_input_line_and_vector(5, state, vector);
|
nevada_state *drvstate = device->machine().driver_data<nevada_state>();
|
||||||
|
drvstate->m_maincpu->set_input_line_and_vector(5, state, vector);
|
||||||
};
|
};
|
||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
@ -448,7 +451,8 @@ static UINT8 duart40_input( device_t *device )
|
|||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
static WRITE_LINE_DEVICE_HANDLER(nevada_rtc_irq)
|
static WRITE_LINE_DEVICE_HANDLER(nevada_rtc_irq)
|
||||||
{
|
{
|
||||||
device->machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ1, HOLD_LINE); // rtc interrupt on INT1
|
nevada_state *drvstate = device->machine().driver_data<nevada_state>();
|
||||||
|
drvstate->m_maincpu->set_input_line(INPUT_LINE_IRQ1, HOLD_LINE); // rtc interrupt on INT1
|
||||||
}
|
}
|
||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
|
@ -728,7 +728,8 @@ void voyager_state::machine_reset()
|
|||||||
|
|
||||||
static void set_gate_a20(running_machine &machine, int a20)
|
static void set_gate_a20(running_machine &machine, int a20)
|
||||||
{
|
{
|
||||||
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_A20, a20);
|
voyager_state *state = machine.driver_data<voyager_state>();
|
||||||
|
state->m_maincpu->set_input_line(INPUT_LINE_A20, a20);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void keyboard_interrupt(running_machine &machine, int state)
|
static void keyboard_interrupt(running_machine &machine, int state)
|
||||||
|
@ -178,7 +178,7 @@ WRITE8_MEMBER(zaccaria_state::zaccaria_port1b_w)
|
|||||||
WRITE8_MEMBER(zaccaria_state::sound_command_w)
|
WRITE8_MEMBER(zaccaria_state::sound_command_w)
|
||||||
{
|
{
|
||||||
soundlatch_byte_w(space, 0, data);
|
soundlatch_byte_w(space, 0, data);
|
||||||
machine().device("audio2")->execute().set_input_line(0, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
|
m_audio2->set_input_line(0, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(zaccaria_state::sound1_command_w)
|
WRITE8_MEMBER(zaccaria_state::sound1_command_w)
|
||||||
|
@ -644,15 +644,15 @@ DRIVER_INIT_MEMBER(zn_state,coh1000c)
|
|||||||
/* disable:
|
/* disable:
|
||||||
the QSound CPU for glpracr as it doesn't have any roms &
|
the QSound CPU for glpracr as it doesn't have any roms &
|
||||||
the link cpu for glprac2l as the h/w is not emulated yet. */
|
the link cpu for glprac2l as the h/w is not emulated yet. */
|
||||||
machine().device<cpu_device>( "audiocpu" )->suspend(SUSPEND_REASON_DISABLE, 1 );
|
m_audiocpu->suspend(SUSPEND_REASON_DISABLE, 1 );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
MACHINE_RESET_MEMBER(zn_state,coh1000c)
|
MACHINE_RESET_MEMBER(zn_state,coh1000c)
|
||||||
{
|
{
|
||||||
membank( "bank1" )->set_base( memregion( "user2" )->base() ); /* fixed game rom */
|
membank("bank1")->set_base(memregion("user2")->base()); /* fixed game rom */
|
||||||
membank( "bank2" )->set_base( memregion( "user2" )->base() + 0x400000 ); /* banked game rom */
|
membank("bank2")->set_base(memregion("user2")->base()+ 0x400000 ); /* banked game rom */
|
||||||
membank( "bank3" )->set_base( memregion( "user3" )->base() ); /* country rom */
|
membank("bank3")->set_base(memregion("user3")->base()); /* country rom */
|
||||||
}
|
}
|
||||||
|
|
||||||
static ADDRESS_MAP_START( qsound_map, AS_PROGRAM, 8, zn_state )
|
static ADDRESS_MAP_START( qsound_map, AS_PROGRAM, 8, zn_state )
|
||||||
|
@ -185,6 +185,7 @@ public:
|
|||||||
m_workram(*this, "workram"),
|
m_workram(*this, "workram"),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
m_audiocpu(*this, "audiocpu"),
|
m_audiocpu(*this, "audiocpu"),
|
||||||
|
m_dsp(*this, "dsp"),
|
||||||
m_k001604(*this, "k001604"),
|
m_k001604(*this, "k001604"),
|
||||||
m_k056832(*this, "k056832") { }
|
m_k056832(*this, "k056832") { }
|
||||||
|
|
||||||
@ -216,6 +217,7 @@ public:
|
|||||||
TIMER_CALLBACK_MEMBER(irq_off);
|
TIMER_CALLBACK_MEMBER(irq_off);
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
required_device<cpu_device> m_audiocpu;
|
required_device<cpu_device> m_audiocpu;
|
||||||
|
required_device<cpu_device> m_dsp;
|
||||||
optional_device<k001604_device> m_k001604;
|
optional_device<k001604_device> m_k001604;
|
||||||
optional_device<k056832_device> m_k056832;
|
optional_device<k056832_device> m_k056832;
|
||||||
};
|
};
|
||||||
@ -696,7 +698,7 @@ static void sound_irq_callback( running_machine &machine, int irq )
|
|||||||
zr107_state *state = machine.driver_data<zr107_state>();
|
zr107_state *state = machine.driver_data<zr107_state>();
|
||||||
int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
|
int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
|
||||||
|
|
||||||
machine.device("audiocpu")->execute().set_input_line(line, ASSERT_LINE);
|
state->m_audiocpu->set_input_line(line, ASSERT_LINE);
|
||||||
machine.scheduler().timer_set(attotime::from_usec(5), timer_expired_delegate(FUNC(zr107_state::irq_off),state), line);
|
machine.scheduler().timer_set(attotime::from_usec(5), timer_expired_delegate(FUNC(zr107_state::irq_off),state), line);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -734,7 +736,7 @@ INTERRUPT_GEN_MEMBER(zr107_state::zr107_vblank)
|
|||||||
|
|
||||||
void zr107_state::machine_reset()
|
void zr107_state::machine_reset()
|
||||||
{
|
{
|
||||||
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
static MACHINE_CONFIG_START( zr107, zr107_state )
|
static MACHINE_CONFIG_START( zr107, zr107_state )
|
||||||
|
@ -44,7 +44,8 @@ public:
|
|||||||
m_shrike_io(*this, "shrike_io"),
|
m_shrike_io(*this, "shrike_io"),
|
||||||
m_shrike_shared(*this, "shrike_shared"),
|
m_shrike_shared(*this, "shrike_shared"),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
m_audiocpu(*this, "audiocpu") { }
|
m_audiocpu(*this, "audiocpu"),
|
||||||
|
m_68k(*this, "68k") { }
|
||||||
|
|
||||||
required_device<timer_device> m_scanline_timer;
|
required_device<timer_device> m_scanline_timer;
|
||||||
|
|
||||||
@ -212,6 +213,7 @@ public:
|
|||||||
inline void config_shooter_adc(UINT8 shooter, UINT8 adc_shift);
|
inline void config_shooter_adc(UINT8 shooter, UINT8 adc_shift);
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
required_device<cpu_device> m_audiocpu;
|
required_device<cpu_device> m_audiocpu;
|
||||||
|
optional_device<cpu_device> m_68k;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
@ -12,6 +12,10 @@ public:
|
|||||||
m_roadram(*this, "roadram"),
|
m_roadram(*this, "roadram"),
|
||||||
m_f1gpstr2_ioready(*this, "ioready"),
|
m_f1gpstr2_ioready(*this, "ioready"),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
|
m_cpu1(*this, "cpu1"),
|
||||||
|
m_cpu2(*this, "cpu2"),
|
||||||
|
m_cpu3(*this, "cpu3"),
|
||||||
|
m_cpu5(*this, "cpu5"),
|
||||||
m_soundcpu(*this, "soundcpu"),
|
m_soundcpu(*this, "soundcpu"),
|
||||||
m_oki1(*this, "oki1"),
|
m_oki1(*this, "oki1"),
|
||||||
m_oki2(*this, "oki2"){ }
|
m_oki2(*this, "oki2"){ }
|
||||||
@ -101,6 +105,10 @@ public:
|
|||||||
void bigrun_draw_sprites(bitmap_ind16 &bitmap , const rectangle &cliprect, int priority1, int priority2);
|
void bigrun_draw_sprites(bitmap_ind16 &bitmap , const rectangle &cliprect, int priority1, int priority2);
|
||||||
void cischeat_untangle_sprites(const char *region);
|
void cischeat_untangle_sprites(const char *region);
|
||||||
optional_device<cpu_device> m_maincpu; // some are called cpu1
|
optional_device<cpu_device> m_maincpu; // some are called cpu1
|
||||||
|
optional_device<cpu_device> m_cpu1;
|
||||||
|
optional_device<cpu_device> m_cpu2;
|
||||||
|
optional_device<cpu_device> m_cpu3;
|
||||||
|
optional_device<cpu_device> m_cpu5;
|
||||||
optional_device<cpu_device> m_soundcpu;
|
optional_device<cpu_device> m_soundcpu;
|
||||||
required_device<okim6295_device> m_oki1;
|
required_device<okim6295_device> m_oki1;
|
||||||
required_device<okim6295_device> m_oki2;
|
required_device<okim6295_device> m_oki2;
|
||||||
|
@ -10,6 +10,7 @@ public:
|
|||||||
m_vram_base(*this, "vram_base"),
|
m_vram_base(*this, "vram_base"),
|
||||||
m_nvram(*this, "nvram"),
|
m_nvram(*this, "nvram"),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
|
m_dsp(*this, "dsp"),
|
||||||
m_dac(*this, "dac"){ }
|
m_dac(*this, "dac"){ }
|
||||||
|
|
||||||
optional_device<tlc34076_device> m_tlc34076;
|
optional_device<tlc34076_device> m_tlc34076;
|
||||||
@ -32,7 +33,7 @@ public:
|
|||||||
UINT16 m_lastresult;
|
UINT16 m_lastresult;
|
||||||
|
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
device_t *m_dsp;
|
required_device<cpu_device> m_dsp;
|
||||||
UINT16 m_nvram_write_seq[NVRAM_UNLOCK_SEQ_LEN];
|
UINT16 m_nvram_write_seq[NVRAM_UNLOCK_SEQ_LEN];
|
||||||
UINT8 m_nvram_write_enable;
|
UINT8 m_nvram_write_enable;
|
||||||
UINT8 m_old_cmd;
|
UINT8 m_old_cmd;
|
||||||
|
@ -20,7 +20,9 @@ public:
|
|||||||
m_fg_ram(*this, "fg_ram"),
|
m_fg_ram(*this, "fg_ram"),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
m_audiocpu(*this, "audiocpu"),
|
m_audiocpu(*this, "audiocpu"),
|
||||||
m_msm(*this, "msm"){ }
|
m_msm(*this, "msm"),
|
||||||
|
m_cpub(*this, "cpub"),
|
||||||
|
m_adpcm(*this, "adpcm") { }
|
||||||
|
|
||||||
/* memory pointers */
|
/* memory pointers */
|
||||||
required_shared_ptr<UINT16> m_spriteram;
|
required_shared_ptr<UINT16> m_spriteram;
|
||||||
@ -43,8 +45,8 @@ public:
|
|||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
required_device<cpu_device> m_audiocpu;
|
required_device<cpu_device> m_audiocpu;
|
||||||
required_device<msm5205_device> m_msm;
|
required_device<msm5205_device> m_msm;
|
||||||
device_t *m_cpub;
|
required_device<cpu_device> m_cpub;
|
||||||
device_t *m_adpcm;
|
required_device<cpu_device> m_adpcm;
|
||||||
tc0140syt_device *m_tc0140syt;
|
tc0140syt_device *m_tc0140syt;
|
||||||
device_t *m_pc080sn;
|
device_t *m_pc080sn;
|
||||||
|
|
||||||
|
@ -13,7 +13,10 @@ public:
|
|||||||
: driver_device(mconfig, type, tag),
|
: driver_device(mconfig, type, tag),
|
||||||
m_videoram(*this, "videoram"),
|
m_videoram(*this, "videoram"),
|
||||||
m_paletteram(*this, "paletteram"),
|
m_paletteram(*this, "paletteram"),
|
||||||
m_maincpu(*this, "maincpu"){ }
|
m_maincpu(*this, "maincpu"),
|
||||||
|
m_cpu1(*this, "cpu1"),
|
||||||
|
m_cpu2(*this, "cpu2"),
|
||||||
|
m_beast(*this, "beast") { }
|
||||||
|
|
||||||
/* memory pointers */
|
/* memory pointers */
|
||||||
required_shared_ptr<UINT8> m_videoram;
|
required_shared_ptr<UINT8> m_videoram;
|
||||||
@ -41,10 +44,10 @@ public:
|
|||||||
|
|
||||||
/* devices */
|
/* devices */
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
device_t *m_cpu1;
|
required_device<cpu_device> m_cpu1;
|
||||||
device_t *m_cpu2;
|
required_device<cpu_device> m_cpu2;
|
||||||
device_t *m_pandora;
|
device_t *m_pandora;
|
||||||
device_t *m_beast;
|
required_device<cpu_device> m_beast;
|
||||||
DECLARE_WRITE8_MEMBER(beast_data_w);
|
DECLARE_WRITE8_MEMBER(beast_data_w);
|
||||||
DECLARE_READ8_MEMBER(beast_data_r);
|
DECLARE_READ8_MEMBER(beast_data_r);
|
||||||
DECLARE_READ8_MEMBER(beast_status_r);
|
DECLARE_READ8_MEMBER(beast_status_r);
|
||||||
|
@ -83,6 +83,8 @@ public:
|
|||||||
: driver_device(mconfig, type, tag),
|
: driver_device(mconfig, type, tag),
|
||||||
m_video_ram(*this,"video_ram"),
|
m_video_ram(*this,"video_ram"),
|
||||||
m_sprite_ram(*this,"sprite_ram"),
|
m_sprite_ram(*this,"sprite_ram"),
|
||||||
|
m_dev_n2a03a(*this, "n2a03a"),
|
||||||
|
m_dev_n2a03b(*this, "n2a03b"),
|
||||||
m_vidhw(DKONG_BOARD),
|
m_vidhw(DKONG_BOARD),
|
||||||
m_discrete(*this, "discrete"),
|
m_discrete(*this, "discrete"),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
@ -94,8 +96,8 @@ public:
|
|||||||
required_shared_ptr<UINT8> m_sprite_ram;
|
required_shared_ptr<UINT8> m_sprite_ram;
|
||||||
|
|
||||||
/* devices */
|
/* devices */
|
||||||
device_t *m_dev_n2a03a;
|
optional_device<cpu_device> m_dev_n2a03a;
|
||||||
device_t *m_dev_n2a03b;
|
optional_device<cpu_device> m_dev_n2a03b;
|
||||||
device_t *m_dev_vp2; /* virtual port 2 */
|
device_t *m_dev_vp2; /* virtual port 2 */
|
||||||
device_t *m_dev_6h;
|
device_t *m_dev_6h;
|
||||||
|
|
||||||
|
@ -14,6 +14,7 @@ public:
|
|||||||
m_slave_videoram(*this, "slave_videoram"),
|
m_slave_videoram(*this, "slave_videoram"),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
m_audiocpu(*this, "audiocpu"),
|
m_audiocpu(*this, "audiocpu"),
|
||||||
|
m_audioslave(*this, "audioslave"),
|
||||||
m_slave(*this, "slave"),
|
m_slave(*this, "slave"),
|
||||||
m_dac(*this, "dac") { }
|
m_dac(*this, "dac") { }
|
||||||
|
|
||||||
@ -44,6 +45,7 @@ public:
|
|||||||
TIMER_DEVICE_CALLBACK_MEMBER(master_sound_nmi_callback);
|
TIMER_DEVICE_CALLBACK_MEMBER(master_sound_nmi_callback);
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
required_device<cpu_device> m_audiocpu;
|
required_device<cpu_device> m_audiocpu;
|
||||||
|
required_device<cpu_device> m_audioslave;
|
||||||
required_device<cpu_device> m_slave;
|
required_device<cpu_device> m_slave;
|
||||||
required_device<dac_device> m_dac;
|
required_device<dac_device> m_dac;
|
||||||
};
|
};
|
||||||
|
@ -8,7 +8,8 @@ public:
|
|||||||
m_sharedram_ac(*this, "sharedram_ac"),
|
m_sharedram_ac(*this, "sharedram_ac"),
|
||||||
m_sharedram_ab(*this, "sharedram_ab"),
|
m_sharedram_ab(*this, "sharedram_ab"),
|
||||||
m_objectram0(*this, "objectram0"),
|
m_objectram0(*this, "objectram0"),
|
||||||
m_videoram0(*this, "videoram0"){ }
|
m_videoram0(*this, "videoram0"),
|
||||||
|
m_cpuc(*this, "cpuc"){ }
|
||||||
|
|
||||||
required_shared_ptr<UINT8> m_objectram1;
|
required_shared_ptr<UINT8> m_objectram1;
|
||||||
required_shared_ptr<UINT8> m_videoram1;
|
required_shared_ptr<UINT8> m_videoram1;
|
||||||
@ -16,7 +17,8 @@ public:
|
|||||||
required_shared_ptr<UINT8> m_sharedram_ab;
|
required_shared_ptr<UINT8> m_sharedram_ab;
|
||||||
required_shared_ptr<UINT8> m_objectram0;
|
required_shared_ptr<UINT8> m_objectram0;
|
||||||
required_shared_ptr<UINT8> m_videoram0;
|
required_shared_ptr<UINT8> m_videoram0;
|
||||||
|
required_device<cpu_device> m_cpuc;
|
||||||
|
|
||||||
int m_cpua_bank;
|
int m_cpua_bank;
|
||||||
int m_cpub_bank;
|
int m_cpub_bank;
|
||||||
|
|
||||||
|
@ -59,7 +59,9 @@ public:
|
|||||||
m_adsp_control_regs(*this,"adsp_regs"),
|
m_adsp_control_regs(*this,"adsp_regs"),
|
||||||
m_adsp_fastram_base(*this,"adsp_fastram") ,
|
m_adsp_fastram_base(*this,"adsp_fastram") ,
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
m_eeprom(*this, "eeprom") { }
|
m_adsp(*this, "adsp"),
|
||||||
|
m_eeprom(*this, "eeprom"),
|
||||||
|
m_tms(*this, "tms") { }
|
||||||
|
|
||||||
required_shared_ptr<UINT32> m_adsp_ram_base;
|
required_shared_ptr<UINT32> m_adsp_ram_base;
|
||||||
required_shared_ptr<UINT16> m_m68k_ram_base;
|
required_shared_ptr<UINT16> m_m68k_ram_base;
|
||||||
@ -124,5 +126,7 @@ public:
|
|||||||
TIMER_DEVICE_CALLBACK_MEMBER(adsp_autobuffer_irq);
|
TIMER_DEVICE_CALLBACK_MEMBER(adsp_autobuffer_irq);
|
||||||
void gaelco3d_render(screen_device &screen);
|
void gaelco3d_render(screen_device &screen);
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
|
required_device<cpu_device> m_adsp;
|
||||||
required_device<eeprom_device> m_eeprom;
|
required_device<eeprom_device> m_eeprom;
|
||||||
|
required_device<cpu_device> m_tms;
|
||||||
};
|
};
|
||||||
|
@ -91,7 +91,8 @@ public:
|
|||||||
m_xevious_bg_colorram(*this, "bg_colorram"),
|
m_xevious_bg_colorram(*this, "bg_colorram"),
|
||||||
m_xevious_fg_videoram(*this, "fg_videoram"),
|
m_xevious_fg_videoram(*this, "fg_videoram"),
|
||||||
m_xevious_bg_videoram(*this, "bg_videoram"),
|
m_xevious_bg_videoram(*this, "bg_videoram"),
|
||||||
m_samples(*this, "samples") { }
|
m_samples(*this, "samples"),
|
||||||
|
m_subcpu3(*this, "sub3") { }
|
||||||
|
|
||||||
required_shared_ptr<UINT8> m_xevious_sr1;
|
required_shared_ptr<UINT8> m_xevious_sr1;
|
||||||
required_shared_ptr<UINT8> m_xevious_sr2;
|
required_shared_ptr<UINT8> m_xevious_sr2;
|
||||||
@ -147,6 +148,8 @@ public:
|
|||||||
char m_battles_customio_command_count;
|
char m_battles_customio_command_count;
|
||||||
char m_battles_customio_data;
|
char m_battles_customio_data;
|
||||||
char m_battles_sound_played;
|
char m_battles_sound_played;
|
||||||
|
|
||||||
|
optional_device<cpu_device> m_subcpu3;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
@ -41,6 +41,7 @@ public:
|
|||||||
m_videoram(*this, "videoram"),
|
m_videoram(*this, "videoram"),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
m_audiocpu(*this, "audiocpu"),
|
m_audiocpu(*this, "audiocpu"),
|
||||||
|
m_audio2(*this, "audio2"),
|
||||||
m_dac(*this, "dac") { }
|
m_dac(*this, "dac") { }
|
||||||
|
|
||||||
optional_device<i8255_device> m_ppi8255_0;
|
optional_device<i8255_device> m_ppi8255_0;
|
||||||
@ -290,5 +291,6 @@ public:
|
|||||||
galaxian_extend_tile_info_func extend_tile_info,galaxian_extend_sprite_info_func extend_sprite_info);
|
galaxian_extend_tile_info_func extend_tile_info,galaxian_extend_sprite_info_func extend_sprite_info);
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
optional_device<cpu_device> m_audiocpu;
|
optional_device<cpu_device> m_audiocpu;
|
||||||
|
optional_device<cpu_device> m_audio2;
|
||||||
optional_device<dac_device> m_dac;
|
optional_device<dac_device> m_dac;
|
||||||
};
|
};
|
||||||
|
@ -12,6 +12,7 @@ public:
|
|||||||
: driver_device(mconfig, type, tag),
|
: driver_device(mconfig, type, tag),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
m_audiocpu(*this, "audiocpu"),
|
m_audiocpu(*this, "audiocpu"),
|
||||||
|
m_comm(*this, "comm"),
|
||||||
m_rtc(*this, "rtc"),
|
m_rtc(*this, "rtc"),
|
||||||
m_mainram(*this, "mainram"),
|
m_mainram(*this, "mainram"),
|
||||||
m_cart(*this, "cart"),
|
m_cart(*this, "cart"),
|
||||||
@ -32,6 +33,7 @@ public:
|
|||||||
|
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
required_device<cpu_device> m_audiocpu;
|
required_device<cpu_device> m_audiocpu;
|
||||||
|
required_device<cpu_device> m_comm;
|
||||||
required_device<msm6242_device> m_rtc;
|
required_device<msm6242_device> m_rtc;
|
||||||
required_shared_ptr<UINT32> m_mainram;
|
required_shared_ptr<UINT32> m_mainram;
|
||||||
required_shared_ptr<UINT32> m_cart;
|
required_shared_ptr<UINT32> m_cart;
|
||||||
|
@ -28,7 +28,9 @@ public:
|
|||||||
m_tms1_ram(*this, "tms1_ram"),
|
m_tms1_ram(*this, "tms1_ram"),
|
||||||
m_tms2_ram(*this, "tms2_ram"),
|
m_tms2_ram(*this, "tms2_ram"),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
m_soundcpu(*this, "soundcpu") { }
|
m_soundcpu(*this, "soundcpu"),
|
||||||
|
m_dsp1(*this, "dsp1"),
|
||||||
|
m_dsp2(*this, "dsp2") { }
|
||||||
|
|
||||||
optional_shared_ptr<UINT16> m_main_ram;
|
optional_shared_ptr<UINT16> m_main_ram;
|
||||||
optional_shared_ptr<UINT16> m_nvram;
|
optional_shared_ptr<UINT16> m_nvram;
|
||||||
@ -187,4 +189,6 @@ public:
|
|||||||
void init_gt_common();
|
void init_gt_common();
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
required_device<cpu_device> m_soundcpu;
|
required_device<cpu_device> m_soundcpu;
|
||||||
|
optional_device<cpu_device> m_dsp1;
|
||||||
|
optional_device<cpu_device> m_dsp2;
|
||||||
};
|
};
|
||||||
|
@ -15,6 +15,8 @@ public:
|
|||||||
m_videoram2(*this, "videoram2"),
|
m_videoram2(*this, "videoram2"),
|
||||||
m_colorram2(*this, "colorram2"),
|
m_colorram2(*this, "colorram2"),
|
||||||
m_spriteram(*this, "spriteram"),
|
m_spriteram(*this, "spriteram"),
|
||||||
|
m_video_cpu(*this, "video"),
|
||||||
|
m_sprite_cpu(*this, "sprite"),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
m_audiocpu(*this, "audiocpu") { }
|
m_audiocpu(*this, "audiocpu") { }
|
||||||
|
|
||||||
@ -35,8 +37,8 @@ public:
|
|||||||
int m_nmi_enable;
|
int m_nmi_enable;
|
||||||
|
|
||||||
/* devices */
|
/* devices */
|
||||||
device_t *m_video_cpu;
|
required_device<cpu_device> m_video_cpu;
|
||||||
device_t *m_sprite_cpu;
|
required_device<cpu_device> m_sprite_cpu;
|
||||||
DECLARE_WRITE8_MEMBER(video_interrupt_w);
|
DECLARE_WRITE8_MEMBER(video_interrupt_w);
|
||||||
DECLARE_WRITE8_MEMBER(sprite_interrupt_w);
|
DECLARE_WRITE8_MEMBER(sprite_interrupt_w);
|
||||||
DECLARE_WRITE8_MEMBER(scroll_interrupt_w);
|
DECLARE_WRITE8_MEMBER(scroll_interrupt_w);
|
||||||
|
@ -1,4 +1,5 @@
|
|||||||
#include "sound/k054539.h"
|
#include "sound/k054539.h"
|
||||||
|
#include "cpu/tms57002/tms57002.h"
|
||||||
|
|
||||||
class konamigx_state : public driver_device
|
class konamigx_state : public driver_device
|
||||||
{
|
{
|
||||||
@ -16,7 +17,8 @@ public:
|
|||||||
m_konamigx_type3_psac2_bank(*this,"psac2_bank"),
|
m_konamigx_type3_psac2_bank(*this,"psac2_bank"),
|
||||||
m_k054539_1(*this,"k054539_1"),
|
m_k054539_1(*this,"k054539_1"),
|
||||||
m_k054539_2(*this,"k054539_2"),
|
m_k054539_2(*this,"k054539_2"),
|
||||||
m_soundcpu(*this, "soundcpu")
|
m_soundcpu(*this, "soundcpu"),
|
||||||
|
m_dasp(*this, "dasp")
|
||||||
{ }
|
{ }
|
||||||
|
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
@ -94,6 +96,7 @@ public:
|
|||||||
TIMER_CALLBACK_MEMBER(dmaend_callback);
|
TIMER_CALLBACK_MEMBER(dmaend_callback);
|
||||||
TIMER_DEVICE_CALLBACK_MEMBER(konamigx_hbinterrupt);
|
TIMER_DEVICE_CALLBACK_MEMBER(konamigx_hbinterrupt);
|
||||||
optional_device<cpu_device> m_soundcpu;
|
optional_device<cpu_device> m_soundcpu;
|
||||||
|
optional_device<tms57002_device> m_dasp;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user