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Converted the ppi8255 implementation to a device.

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This commit is contained in:
Wilbert Pol 2008-04-19 18:11:47 +00:00
parent 4719edb396
commit 0d4aca282f
39 changed files with 1688 additions and 1345 deletions
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464
src/emu/machine/8255ppi.c
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@ -91,15 +91,14 @@
*********************************************************************/ *********************************************************************/
#include "driver.h" #include "driver.h"
#include "deprecat.h"
#include "8255ppi.h" #include "8255ppi.h"
#include "memconv.h"
typedef struct _ppi8255 ppi8255_t;
static int num; struct _ppi8255
typedef struct
{ {
const ppi8255_interface *intf;
read8_machine_func port_read[3]; read8_machine_func port_read[3];
write8_machine_func port_write[3]; write8_machine_func port_write[3];
@ -124,98 +123,63 @@ typedef struct
UINT8 read[3]; /* data read from ports */ UINT8 read[3]; /* data read from ports */
UINT8 latch[3]; /* data written to ports */ UINT8 latch[3]; /* data written to ports */
UINT8 output[3]; /* actual output data */ UINT8 output[3]; /* actual output data */
} ppi8255; };
static ppi8255 chips[MAX_8255];
static void set_mode(int which, int data, int call_handlers);
static void ppi8255_write_port(ppi8255 *chip, int port);
void ppi8255_init( const ppi8255_interface *intfce ) static void set_mode(const device_config *device, int data, int call_handlers);
{ static void ppi8255_write_port(const device_config *device, int port);
int i;
num = intfce->num;
for (i = 0; i < num; i++) INLINE ppi8255_t *get_safe_token(const device_config *device) {
{ assert( device != NULL );
ppi8255 *chip = &chips[i]; assert( device->token != NULL );
assert( device->type == DEVICE_GET_INFO_NAME(ppi8255) );
memset(chip, 0, sizeof(*chip)); return ( ppi8255_t * ) device->token;
chip->port_read[0] = intfce->portAread[i];
chip->port_read[1] = intfce->portBread[i];
chip->port_read[2] = intfce->portCread[i];
chip->port_write[0] = intfce->portAwrite[i];
chip->port_write[1] = intfce->portBwrite[i];
chip->port_write[2] = intfce->portCwrite[i];
set_mode(i, 0x1b, 0); /* Mode 0, all ports set to input */
state_save_register_item("ppi8255", i, chip->groupA_mode);
state_save_register_item("ppi8255", i, chip->groupB_mode);
state_save_register_item("ppi8255", i, chip->portA_dir);
state_save_register_item("ppi8255", i, chip->portB_dir);
state_save_register_item("ppi8255", i, chip->portCH_dir);
state_save_register_item("ppi8255", i, chip->portCL_dir);
state_save_register_item("ppi8255", i, chip->obf_a);
state_save_register_item("ppi8255", i, chip->obf_b);
state_save_register_item("ppi8255", i, chip->ibf_a);
state_save_register_item("ppi8255", i, chip->ibf_b);
state_save_register_item("ppi8255", i, chip->inte_a);
state_save_register_item("ppi8255", i, chip->inte_b);
state_save_register_item_array("ppi8255", i, chip->in_mask);
state_save_register_item_array("ppi8255", i, chip->out_mask);
state_save_register_item_array("ppi8255", i, chip->read);
state_save_register_item_array("ppi8255", i, chip->latch);
}
} }
INLINE void ppi8255_get_handshake_signals(ppi8255_t *ppi8255, int is_read, UINT8 *result)
static void ppi8255_get_handshake_signals(ppi8255 *chip, int is_read, UINT8 *result)
{ {
UINT8 handshake = 0x00; UINT8 handshake = 0x00;
UINT8 mask = 0x00; UINT8 mask = 0x00;
/* group A */ /* group A */
if (chip->groupA_mode == 1) if (ppi8255->groupA_mode == 1)
{ {
if (chip->portA_dir) if (ppi8255->portA_dir)
{ {
handshake |= chip->ibf_a ? 0x20 : 0x00; handshake |= ppi8255->ibf_a ? 0x20 : 0x00;
handshake |= (chip->ibf_a && chip->inte_a) ? 0x08 : 0x00; handshake |= (ppi8255->ibf_a && ppi8255->inte_a) ? 0x08 : 0x00;
mask |= 0x28; mask |= 0x28;
} }
else else
{ {
handshake |= chip->obf_a ? 0x00 : 0x80; handshake |= ppi8255->obf_a ? 0x00 : 0x80;
handshake |= (chip->obf_a && chip->inte_a) ? 0x08 : 0x00; handshake |= (ppi8255->obf_a && ppi8255->inte_a) ? 0x08 : 0x00;
mask |= 0x88; mask |= 0x88;
} }
} }
else if (chip->groupA_mode == 2) else if (ppi8255->groupA_mode == 2)
{ {
handshake |= chip->inte_a ? 0x08 : 0x00; handshake |= ppi8255->inte_a ? 0x08 : 0x00;
handshake |= chip->obf_a ? 0x00 : 0x80; handshake |= ppi8255->obf_a ? 0x00 : 0x80;
handshake |= chip->ibf_a ? 0x20 : 0x00; handshake |= ppi8255->ibf_a ? 0x20 : 0x00;
mask |= 0xA8; mask |= 0xA8;
} }
/* group B */ /* group B */
if (chip->groupB_mode == 1) if (ppi8255->groupB_mode == 1)
{ {
if (chip->portA_dir) if (ppi8255->portA_dir)
{ {
handshake |= chip->ibf_b ? 0x02 : 0x00; handshake |= ppi8255->ibf_b ? 0x02 : 0x00;
handshake |= (chip->ibf_b && chip->inte_b) ? 0x01 : 0x00; handshake |= (ppi8255->ibf_b && ppi8255->inte_b) ? 0x01 : 0x00;
mask |= 0x03; mask |= 0x03;
} }
else else
{ {
handshake |= chip->obf_b ? 0x00 : 0x02; handshake |= ppi8255->obf_b ? 0x00 : 0x02;
handshake |= (chip->obf_b && chip->inte_b) ? 0x01 : 0x00; handshake |= (ppi8255->obf_b && ppi8255->inte_b) ? 0x01 : 0x00;
mask |= 0x03; mask |= 0x03;
} }
} }
@ -226,76 +190,70 @@ static void ppi8255_get_handshake_signals(ppi8255 *chip, int is_read, UINT8 *res
static void ppi8255_input(ppi8255 *chip, int port, UINT8 data) static void ppi8255_input(const device_config *device, int port, UINT8 data)
{ {
ppi8255_t *ppi8255 = get_safe_token(device);
int changed = 0; int changed = 0;
chip->read[port] = data; ppi8255->read[port] = data;
/* port C is special */ /* port C is special */
if (port == 2) if (port == 2)
{ {
if (((chip->groupA_mode == 1) && (chip->portA_dir == 0)) || (chip->groupA_mode == 2)) if (((ppi8255->groupA_mode == 1) && (ppi8255->portA_dir == 0)) || (ppi8255->groupA_mode == 2))
{ {
/* is !ACKA asserted? */ /* is !ACKA asserted? */
if (chip->obf_a && !(data & 0x40)) if (ppi8255->obf_a && !(data & 0x40))
{ {
chip->obf_a = 0; ppi8255->obf_a = 0;
changed = 1; changed = 1;
} }
} }
if ((chip->groupB_mode == 1) && (chip->portB_dir == 0)) if ((ppi8255->groupB_mode == 1) && (ppi8255->portB_dir == 0))
{ {
/* is !ACKB asserted? */ /* is !ACKB asserted? */
if (chip->obf_b && !(data & 0x04)) if (ppi8255->obf_b && !(data & 0x04))
{ {
chip->obf_b = 0; ppi8255->obf_b = 0;
changed = 1; changed = 1;
} }
} }
if (changed) if (changed)
ppi8255_write_port(chip, 2); ppi8255_write_port(device, 2);
} }
} }
static UINT8 ppi8255_read_port(ppi8255 *chip, int port) static UINT8 ppi8255_read_port(const device_config *device, int port)
{ {
ppi8255_t *ppi8255 = get_safe_token(device);
UINT8 result = 0x00; UINT8 result = 0x00;
if (chip->in_mask[port]) if (ppi8255->in_mask[port])
{ {
if (chip->port_read[port]) if (ppi8255->port_read[port])
ppi8255_input(chip, port, chip->port_read[port](Machine, 0)); ppi8255_input(device, port, ppi8255->port_read[port](device->machine, 0));
result |= chip->read[port] & chip->in_mask[port]; result |= ppi8255->read[port] & ppi8255->in_mask[port];
} }
result |= chip->latch[port] & chip->out_mask[port]; result |= ppi8255->latch[port] & ppi8255->out_mask[port];
/* read special port 2 signals */ /* read special port 2 signals */
if (port == 2) if (port == 2)
ppi8255_get_handshake_signals(chip, 1, &result); ppi8255_get_handshake_signals(ppi8255, 1, &result);
return result; return result;
} }
UINT8 ppi8255_r(int which, offs_t offset) READ8_DEVICE_HANDLER( ppi8255_r )
{ {
ppi8255 *chip = &chips[which];
UINT8 result = 0; UINT8 result = 0;
/* some bounds checking */
if (which > num)
{
logerror("Attempting to access an unmapped 8255 chip. PC: %04X\n", activecpu_get_pc());
return 0xff;
}
offset %= 4; offset %= 4;
switch(offset) switch(offset)
@ -303,7 +261,7 @@ UINT8 ppi8255_r(int which, offs_t offset)
case 0: /* Port A read */ case 0: /* Port A read */
case 1: /* Port B read */ case 1: /* Port B read */
case 2: /* Port C read */ case 2: /* Port C read */
result = ppi8255_read_port(chip, offset); result = ppi8255_read_port(device, offset);
break; break;
case 3: /* Control word */ case 3: /* Control word */
@ -316,34 +274,28 @@ UINT8 ppi8255_r(int which, offs_t offset)
static void ppi8255_write_port(ppi8255 *chip, int port) static void ppi8255_write_port(const device_config *device, int port)
{ {
ppi8255_t *ppi8255 = get_safe_token(device);
UINT8 write_data; UINT8 write_data;
write_data = chip->latch[port] & chip->out_mask[port]; write_data = ppi8255->latch[port] & ppi8255->out_mask[port];
write_data |= 0xFF & ~chip->out_mask[port]; write_data |= 0xFF & ~ppi8255->out_mask[port];
/* write out special port 2 signals */ /* write out special port 2 signals */
if (port == 2) if (port == 2)
ppi8255_get_handshake_signals(chip, 0, &write_data); ppi8255_get_handshake_signals(ppi8255, 0, &write_data);
chip->output[port] = write_data; ppi8255->output[port] = write_data;
if (chip->port_write[port]) if (ppi8255->port_write[port])
chip->port_write[port](Machine, 0, write_data); ppi8255->port_write[port](device->machine, 0, write_data);
} }
void ppi8255_w(int which, offs_t offset, UINT8 data) WRITE8_DEVICE_HANDLER( ppi8255_w )
{ {
ppi8255 *chip = &chips[which]; ppi8255_t *ppi8255 = get_safe_token(device);
/* Some bounds checking */
if (which > num)
{
logerror("Attempting to access an unmapped 8255 chip. PC: %04X\n", activecpu_get_pc());
return;
}
offset %= 4; offset %= 4;
@ -352,24 +304,24 @@ void ppi8255_w(int which, offs_t offset, UINT8 data)
case 0: /* Port A write */ case 0: /* Port A write */
case 1: /* Port B write */ case 1: /* Port B write */
case 2: /* Port C write */ case 2: /* Port C write */
chip->latch[offset] = data; ppi8255->latch[offset] = data;
ppi8255_write_port(chip, offset); ppi8255_write_port(device, offset);
switch(offset) switch(offset)
{ {
case 0: case 0:
if (!chip->portA_dir && (chip->groupA_mode != 0)) if (!ppi8255->portA_dir && (ppi8255->groupA_mode != 0))
{ {
chip->obf_a = 1; ppi8255->obf_a = 1;
ppi8255_write_port(chip, 2); ppi8255_write_port(device, 2);
} }
break; break;
case 1: case 1:
if (!chip->portB_dir && (chip->groupB_mode != 0)) if (!ppi8255->portB_dir && (ppi8255->groupB_mode != 0))
{ {
chip->obf_b = 1; ppi8255->obf_b = 1;
ppi8255_write_port(chip, 2); ppi8255_write_port(device, 2);
} }
break; break;
} }
@ -378,7 +330,7 @@ void ppi8255_w(int which, offs_t offset, UINT8 data)
case 3: /* Control word */ case 3: /* Control word */
if (data & 0x80) if (data & 0x80)
{ {
set_mode(which, data & 0x7f, 1); set_mode(device, data & 0x7f, 1);
} }
else else
{ {
@ -388,122 +340,105 @@ void ppi8255_w(int which, offs_t offset, UINT8 data)
bit = (data >> 1) & 0x07; bit = (data >> 1) & 0x07;
if (data & 1) if (data & 1)
chip->latch[2] |= (1<<bit); /* set bit */ ppi8255->latch[2] |= (1<<bit); /* set bit */
else else
chip->latch[2] &= ~(1<<bit); /* reset bit */ ppi8255->latch[2] &= ~(1<<bit); /* reset bit */
ppi8255_write_port(chip, 2); ppi8255_write_port(device, 2);
} }
break; break;
} }
} }
#ifdef MESS
UINT8 ppi8255_peek( int which, offs_t offset ) void ppi8255_set_portAread(const device_config *device, read8_machine_func portAread)
{ {
ppi8255 *chip; ppi8255_t *ppi8255 = get_safe_token(device);
ppi8255->port_read[0] = portAread;
/* Some bounds checking */
if (which > num)
{
logerror("Attempting to access an unmapped 8255 chip. PC: %04X\n", activecpu_get_pc());
return 0xff;
}
chip = &chips[which];
if (offset > 2)
{
logerror("Attempting to access an invalid 8255 port. PC: %04X\n", activecpu_get_pc());
return 0xff;
}
chip = &chips[which];
return chip->latch[offset];
}
#endif
void ppi8255_set_portAread(int which, read8_machine_func portAread)
{
chips[which].port_read[0] = portAread;
} }
void ppi8255_set_portBread(int which, read8_machine_func portBread) void ppi8255_set_portBread(const device_config *device, read8_machine_func portBread)
{ {
chips[which].port_read[1] = portBread; ppi8255_t *ppi8255 = get_safe_token(device);
ppi8255->port_read[1] = portBread;
} }
void ppi8255_set_portCread(int which, read8_machine_func portCread) void ppi8255_set_portCread(const device_config *device, read8_machine_func portCread)
{ {
chips[which].port_read[2] = portCread; ppi8255_t *ppi8255 = get_safe_token(device);
ppi8255->port_read[2] = portCread;
} }
void ppi8255_set_portAwrite(int which, write8_machine_func portAwrite) void ppi8255_set_portAwrite(const device_config *device, write8_machine_func portAwrite)
{ {
chips[which].port_write[0] = portAwrite; ppi8255_t *ppi8255 = get_safe_token(device);
ppi8255->port_write[0] = portAwrite;
} }
void ppi8255_set_portBwrite(int which, write8_machine_func portBwrite) void ppi8255_set_portBwrite(const device_config *device, write8_machine_func portBwrite)
{ {
chips[which].port_write[1] = portBwrite; ppi8255_t *ppi8255 = get_safe_token(device);
ppi8255->port_write[1] = portBwrite;
} }
void ppi8255_set_portCwrite(int which, write8_machine_func portCwrite) void ppi8255_set_portCwrite(const device_config *device, write8_machine_func portCwrite)
{ {
chips[which].port_write[2] = portCwrite; ppi8255_t *ppi8255 = get_safe_token(device);
ppi8255->port_write[2] = portCwrite;
} }
static void set_mode(int which, int data, int call_handlers) static void set_mode(const device_config *device, int data, int call_handlers)
{ {
ppi8255 *chip = &chips[which]; ppi8255_t *ppi8255 = get_safe_token(device);
int i; int i;
/* parse out mode */ /* parse out mode */
chip->groupA_mode = (data >> 5) & 3; ppi8255->groupA_mode = (data >> 5) & 3;
chip->groupB_mode = (data >> 2) & 1; ppi8255->groupB_mode = (data >> 2) & 1;
chip->portA_dir = (data >> 4) & 1; ppi8255->portA_dir = (data >> 4) & 1;
chip->portB_dir = (data >> 1) & 1; ppi8255->portB_dir = (data >> 1) & 1;
chip->portCH_dir = (data >> 3) & 1; ppi8255->portCH_dir = (data >> 3) & 1;
chip->portCL_dir = (data >> 0) & 1; ppi8255->portCL_dir = (data >> 0) & 1;
/* normalize groupA_mode */ /* normalize groupA_mode */
if (chip->groupA_mode == 3) if (ppi8255->groupA_mode == 3)
chip->groupA_mode = 2; ppi8255->groupA_mode = 2;
/* Port A direction */ /* Port A direction */
if (chip->portA_dir) if (ppi8255->portA_dir)
chip->in_mask[0] = 0xFF, chip->out_mask[0] = 0x00; /* input */ ppi8255->in_mask[0] = 0xFF, ppi8255->out_mask[0] = 0x00; /* input */
else else
chip->in_mask[0] = 0x00, chip->out_mask[0] = 0xFF; /* output */ ppi8255->in_mask[0] = 0x00, ppi8255->out_mask[0] = 0xFF; /* output */
/* Port B direction */ /* Port B direction */
if (chip->portB_dir) if (ppi8255->portB_dir)
chip->in_mask[1] = 0xFF, chip->out_mask[1] = 0x00; /* input */ ppi8255->in_mask[1] = 0xFF, ppi8255->out_mask[1] = 0x00; /* input */
else else
chip->in_mask[1] = 0x00, chip->out_mask[1] = 0xFF; /* output */ ppi8255->in_mask[1] = 0x00, ppi8255->out_mask[1] = 0xFF; /* output */
/* Port C upper direction */ /* Port C upper direction */
if (chip->portCH_dir) if (ppi8255->portCH_dir)
chip->in_mask[2] = 0xF0, chip->out_mask[2] = 0x00; /* input */ ppi8255->in_mask[2] = 0xF0, ppi8255->out_mask[2] = 0x00; /* input */
else else
chip->in_mask[2] = 0x00, chip->out_mask[2] = 0xF0; /* output */ ppi8255->in_mask[2] = 0x00, ppi8255->out_mask[2] = 0xF0; /* output */
/* Port C lower direction */ /* Port C lower direction */
if (chip->portCL_dir) if (ppi8255->portCL_dir)
chip->in_mask[2] |= 0x0F; /* input */ ppi8255->in_mask[2] |= 0x0F; /* input */
else else
chip->out_mask[2] |= 0x0F; /* output */ ppi8255->out_mask[2] |= 0x0F; /* output */
/* now depending on the group modes, certain Port C lines may be replaced /* now depending on the group modes, certain Port C lines may be replaced
* with varying control signals */ * with varying control signals */
switch(chip->groupA_mode) switch(ppi8255->groupA_mode)
{ {
case 0: /* Group A mode 0 */ case 0: /* Group A mode 0 */
/* no changes */ /* no changes */
@ -511,18 +446,18 @@ static void set_mode(int which, int data, int call_handlers)
case 1: /* Group A mode 1 */ case 1: /* Group A mode 1 */
/* bits 5-3 are reserved by Group A mode 1 */ /* bits 5-3 are reserved by Group A mode 1 */
chip->in_mask[2] &= ~0x38; ppi8255->in_mask[2] &= ~0x38;
chip->out_mask[2] &= ~0x38; ppi8255->out_mask[2] &= ~0x38;
break; break;
case 2: /* Group A mode 2 */ case 2: /* Group A mode 2 */
/* bits 7-3 are reserved by Group A mode 2 */ /* bits 7-3 are reserved by Group A mode 2 */
chip->in_mask[2] &= ~0xF8; ppi8255->in_mask[2] &= ~0xF8;
chip->out_mask[2] &= ~0xF8; ppi8255->out_mask[2] &= ~0xF8;
break; break;
} }
switch(chip->groupB_mode) switch(ppi8255->groupB_mode)
{ {
case 0: /* Group B mode 0 */ case 0: /* Group B mode 0 */
/* no changes */ /* no changes */
@ -530,61 +465,128 @@ static void set_mode(int which, int data, int call_handlers)
case 1: /* Group B mode 1 */ case 1: /* Group B mode 1 */
/* bits 2-0 are reserved by Group B mode 1 */ /* bits 2-0 are reserved by Group B mode 1 */
chip->in_mask[2] &= ~0x07; ppi8255->in_mask[2] &= ~0x07;
chip->out_mask[2] &= ~0x07; ppi8255->out_mask[2] &= ~0x07;
break; break;
} }
/* KT: 25-Dec-99 - 8255 resets latches when mode set */ /* KT: 25-Dec-99 - 8255 resets latches when mode set */
chip->latch[0] = chip->latch[1] = chip->latch[2] = 0; ppi8255->latch[0] = ppi8255->latch[1] = ppi8255->latch[2] = 0;
if (call_handlers) if (call_handlers)
{ {
for (i = 0; i < 3; i++) for (i = 0; i < 3; i++)
ppi8255_write_port(chip, i); ppi8255_write_port(device, i);
} }
} }
void ppi8255_set_portA( int which, UINT8 data ) { ppi8255_input(&chips[which], 0, data); } void ppi8255_set_portA( const device_config *device, UINT8 data ) { ppi8255_input(device, 0, data); }
void ppi8255_set_portB( int which, UINT8 data ) { ppi8255_input(&chips[which], 1, data); } void ppi8255_set_portB( const device_config *device, UINT8 data ) { ppi8255_input(device, 1, data); }
void ppi8255_set_portC( int which, UINT8 data ) { ppi8255_input(&chips[which], 2, data); } void ppi8255_set_portC( const device_config *device, UINT8 data ) { ppi8255_input(device, 2, data); }
UINT8 ppi8255_get_portA( int which ) { return chips[which].output[0]; } UINT8 ppi8255_get_portA( const device_config *device ) {
UINT8 ppi8255_get_portB( int which ) { return chips[which].output[1]; } ppi8255_t *ppi8255 = get_safe_token(device);
UINT8 ppi8255_get_portC( int which ) { return chips[which].output[2]; }
/* Helpers */ return ppi8255->output[0];
READ8_HANDLER( ppi8255_0_r ) { return ppi8255_r( 0, offset ); } }
READ8_HANDLER( ppi8255_1_r ) { return ppi8255_r( 1, offset ); }
READ8_HANDLER( ppi8255_2_r ) { return ppi8255_r( 2, offset ); } UINT8 ppi8255_get_portB( const device_config *device ) {
READ8_HANDLER( ppi8255_3_r ) { return ppi8255_r( 3, offset ); } ppi8255_t *ppi8255 = get_safe_token(device);
READ8_HANDLER( ppi8255_4_r ) { return ppi8255_r( 4, offset ); }
READ8_HANDLER( ppi8255_5_r ) { return ppi8255_r( 5, offset ); } return ppi8255->output[1];
READ8_HANDLER( ppi8255_6_r ) { return ppi8255_r( 6, offset ); } }
READ8_HANDLER( ppi8255_7_r ) { return ppi8255_r( 7, offset ); }
WRITE8_HANDLER( ppi8255_0_w ) { ppi8255_w( 0, offset, data ); } UINT8 ppi8255_get_portC( const device_config *device ) {
WRITE8_HANDLER( ppi8255_1_w ) { ppi8255_w( 1, offset, data ); } ppi8255_t *ppi8255 = get_safe_token(device);
WRITE8_HANDLER( ppi8255_2_w ) { ppi8255_w( 2, offset, data ); }
WRITE8_HANDLER( ppi8255_3_w ) { ppi8255_w( 3, offset, data ); } return ppi8255->output[2];
WRITE8_HANDLER( ppi8255_4_w ) { ppi8255_w( 4, offset, data ); } }
WRITE8_HANDLER( ppi8255_5_w ) { ppi8255_w( 5, offset, data ); }
WRITE8_HANDLER( ppi8255_6_w ) { ppi8255_w( 6, offset, data ); }
WRITE8_HANDLER( ppi8255_7_w ) { ppi8255_w( 7, offset, data ); } static DEVICE_START( ppi8255 ) {
ppi8255_t *ppi8255 = get_safe_token(device);
char unique_tag[30];
ppi8255->intf = device->static_config;
ppi8255->port_read[0] = ppi8255->intf->portAread;
ppi8255->port_read[1] = ppi8255->intf->portBread;
ppi8255->port_read[2] = ppi8255->intf->portCread;
ppi8255->port_write[0] = ppi8255->intf->portAwrite;
ppi8255->port_write[1] = ppi8255->intf->portBwrite;
ppi8255->port_write[2] = ppi8255->intf->portCwrite;
/* register for state saving */
state_save_combine_module_and_tag(unique_tag, "ppi8255", device->tag);
state_save_register_item(unique_tag, 0, ppi8255->groupA_mode);
state_save_register_item(unique_tag, 0, ppi8255->groupB_mode);
state_save_register_item(unique_tag, 0, ppi8255->portA_dir);
state_save_register_item(unique_tag, 0, ppi8255->portB_dir);
state_save_register_item(unique_tag, 0, ppi8255->portCH_dir);
state_save_register_item(unique_tag, 0, ppi8255->portCL_dir);
state_save_register_item(unique_tag, 0, ppi8255->obf_a);
state_save_register_item(unique_tag, 0, ppi8255->obf_b);
state_save_register_item(unique_tag, 0, ppi8255->ibf_a);
state_save_register_item(unique_tag, 0, ppi8255->ibf_b);
state_save_register_item(unique_tag, 0, ppi8255->inte_a);
state_save_register_item(unique_tag, 0, ppi8255->inte_b);
state_save_register_item_array(unique_tag, 0, ppi8255->in_mask);
state_save_register_item_array(unique_tag, 0, ppi8255->out_mask);
state_save_register_item_array(unique_tag, 0, ppi8255->read);
state_save_register_item_array(unique_tag, 0, ppi8255->latch);
}
static DEVICE_RESET( ppi8255 ) {
ppi8255_t *ppi8255 = get_safe_token(device);
int i;
ppi8255->groupA_mode = 0;
ppi8255->groupB_mode = 0;
ppi8255->portA_dir = 0;
ppi8255->portB_dir = 0;
ppi8255->portCH_dir = 0;
ppi8255->portCL_dir = 0;
ppi8255->obf_a = ppi8255->ibf_a = ppi8255->inte_a = 0;
ppi8255->obf_b = ppi8255->ibf_b = ppi8255->inte_b = 0;
for ( i = 0; i < 3; i++ ) {
ppi8255->in_mask[i] = ppi8255->out_mask[i] = ppi8255->read[i] = ppi8255->latch[i] = ppi8255->output[i] = 0;
}
set_mode(device, 0x1b, 0); /* Mode 0, all ports set to input */
}
static DEVICE_SET_INFO( ppi8255 ) {
switch ( state ) {
/* no parameters to set */
}
}
DEVICE_GET_INFO(ppi8255) {
switch ( state ) {
/* --- the following bits of info are returned as 64-bit signed integers --- */
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(ppi8255_t); break;
case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = 0; break;
case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
case DEVINFO_FCT_SET_INFO: info->set_info = DEVICE_SET_INFO_NAME(ppi8255); break;
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(ppi8255); break;
case DEVINFO_FCT_STOP: /* nothing */ break;
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(ppi8255); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case DEVINFO_STR_NAME: info->s = "Intel PPI8255"; break;
case DEVINFO_STR_FAMILY: info->s = "PPI8255"; break;
case DEVINFO_STR_VERSION: info->s = "1.00"; break;
case DEVINFO_STR_SOURCE_FILE: info->s = __FILE__; break;
case DEVINFO_STR_CREDITS: info->s = "Copyright the MAME and MESS Teams"; break;
}
}
READ16_HANDLER( ppi8255_16le_0_r ) { return read16le_with_read8_handler(ppi8255_0_r, machine, offset, mem_mask); }
READ16_HANDLER( ppi8255_16le_1_r ) { return read16le_with_read8_handler(ppi8255_1_r, machine, offset, mem_mask); }
READ16_HANDLER( ppi8255_16le_2_r ) { return read16le_with_read8_handler(ppi8255_2_r, machine, offset, mem_mask); }
READ16_HANDLER( ppi8255_16le_3_r ) { return read16le_with_read8_handler(ppi8255_3_r, machine, offset, mem_mask); }
READ16_HANDLER( ppi8255_16le_4_r ) { return read16le_with_read8_handler(ppi8255_4_r, machine, offset, mem_mask); }
READ16_HANDLER( ppi8255_16le_5_r ) { return read16le_with_read8_handler(ppi8255_5_r, machine, offset, mem_mask); }
READ16_HANDLER( ppi8255_16le_6_r ) { return read16le_with_read8_handler(ppi8255_6_r, machine, offset, mem_mask); }
READ16_HANDLER( ppi8255_16le_7_r ) { return read16le_with_read8_handler(ppi8255_7_r, machine, offset, mem_mask); }
WRITE16_HANDLER( ppi8255_16le_0_w ) { write16le_with_write8_handler(ppi8255_0_w, machine, offset, data, mem_mask); }
WRITE16_HANDLER( ppi8255_16le_1_w ) { write16le_with_write8_handler(ppi8255_1_w, machine, offset, data, mem_mask); }
WRITE16_HANDLER( ppi8255_16le_2_w ) { write16le_with_write8_handler(ppi8255_2_w, machine, offset, data, mem_mask); }
WRITE16_HANDLER( ppi8255_16le_3_w ) { write16le_with_write8_handler(ppi8255_3_w, machine, offset, data, mem_mask); }
WRITE16_HANDLER( ppi8255_16le_4_w ) { write16le_with_write8_handler(ppi8255_4_w, machine, offset, data, mem_mask); }
WRITE16_HANDLER( ppi8255_16le_5_w ) { write16le_with_write8_handler(ppi8255_5_w, machine, offset, data, mem_mask); }
WRITE16_HANDLER( ppi8255_16le_6_w ) { write16le_with_write8_handler(ppi8255_6_w, machine, offset, data, mem_mask); }
WRITE16_HANDLER( ppi8255_16le_7_w ) { write16le_with_write8_handler(ppi8255_7_w, machine, offset, data, mem_mask); }

94
src/emu/machine/8255ppi.h
View File

@ -6,84 +6,44 @@
*********************************************************************/ *********************************************************************/
#ifndef _8255PPI_H_ #ifndef __8255PPI_H_
#define _8255PPI_H_ #define __8255PPI_H_
#define PPI8255 DEVICE_GET_INFO_NAME(ppi8255)
#define MAX_8255 8
typedef struct typedef struct
{ {
int num; /* number of PPIs to emulate */ read8_machine_func portAread;
read8_machine_func portAread[MAX_8255]; read8_machine_func portBread;
read8_machine_func portBread[MAX_8255]; read8_machine_func portCread;
read8_machine_func portCread[MAX_8255]; write8_machine_func portAwrite;
write8_machine_func portAwrite[MAX_8255]; write8_machine_func portBwrite;
write8_machine_func portBwrite[MAX_8255]; write8_machine_func portCwrite;
write8_machine_func portCwrite[MAX_8255];
} ppi8255_interface; } ppi8255_interface;
/* Init */ /* device interface */
void ppi8255_init( const ppi8255_interface *intfce); DEVICE_GET_INFO(ppi8255);
/* Read/Write */ READ8_DEVICE_HANDLER( ppi8255_r );
UINT8 ppi8255_r ( int which, offs_t offset ); WRITE8_DEVICE_HANDLER( ppi8255_w );
void ppi8255_w( int which, offs_t offset, UINT8 data );
void ppi8255_set_portAread( int which, read8_machine_func portAread);
void ppi8255_set_portBread( int which, read8_machine_func portBread);
void ppi8255_set_portCread( int which, read8_machine_func portCread);
void ppi8255_set_portAwrite( int which, write8_machine_func portAwrite); void ppi8255_set_portAread( const device_config *device, read8_machine_func portAread );
void ppi8255_set_portBwrite( int which, write8_machine_func portBwrite); void ppi8255_set_portBread( const device_config *device, read8_machine_func portBread );
void ppi8255_set_portCwrite( int which, write8_machine_func portCwrite); void ppi8255_set_portCread( const device_config *device, read8_machine_func portCread );
void ppi8255_set_portA( int which, UINT8 data ); void ppi8255_set_portAwrite( const device_config *device, write8_machine_func portAwrite );
void ppi8255_set_portB( int which, UINT8 data ); void ppi8255_set_portBwrite( const device_config *device, write8_machine_func portBwrite );
void ppi8255_set_portC( int which, UINT8 data ); void ppi8255_set_portCwrite( const device_config *device, write8_machine_func portCwrite );
UINT8 ppi8255_get_portA( int which ); void ppi8255_set_portA( const device_config *device, UINT8 data );
UINT8 ppi8255_get_portB( int which ); void ppi8255_set_portB( const device_config *device, UINT8 data );
UINT8 ppi8255_get_portC( int which ); void ppi8255_set_portC( const device_config *device, UINT8 data );
/* Helpers */ UINT8 ppi8255_get_portA( const device_config *device );
READ8_HANDLER( ppi8255_0_r ); UINT8 ppi8255_get_portB( const device_config *device );
READ8_HANDLER( ppi8255_1_r ); UINT8 ppi8255_get_portC( const device_config *device );
READ8_HANDLER( ppi8255_2_r );
READ8_HANDLER( ppi8255_3_r );
READ8_HANDLER( ppi8255_4_r );
READ8_HANDLER( ppi8255_5_r );
READ8_HANDLER( ppi8255_6_r );
READ8_HANDLER( ppi8255_7_r );
WRITE8_HANDLER( ppi8255_0_w );
WRITE8_HANDLER( ppi8255_1_w );
WRITE8_HANDLER( ppi8255_2_w );
WRITE8_HANDLER( ppi8255_3_w );
WRITE8_HANDLER( ppi8255_4_w );
WRITE8_HANDLER( ppi8255_5_w );
WRITE8_HANDLER( ppi8255_6_w );
WRITE8_HANDLER( ppi8255_7_w );
READ16_HANDLER( ppi8255_16le_0_r ); #endif /* __8255PPI_H_ */
READ16_HANDLER( ppi8255_16le_1_r );
READ16_HANDLER( ppi8255_16le_2_r );
READ16_HANDLER( ppi8255_16le_3_r );
READ16_HANDLER( ppi8255_16le_4_r );
READ16_HANDLER( ppi8255_16le_5_r );
READ16_HANDLER( ppi8255_16le_6_r );
READ16_HANDLER( ppi8255_16le_7_r );
WRITE16_HANDLER( ppi8255_16le_0_w );
WRITE16_HANDLER( ppi8255_16le_1_w );
WRITE16_HANDLER( ppi8255_16le_2_w );
WRITE16_HANDLER( ppi8255_16le_3_w );
WRITE16_HANDLER( ppi8255_16le_4_w );
WRITE16_HANDLER( ppi8255_16le_5_w );
WRITE16_HANDLER( ppi8255_16le_6_w );
WRITE16_HANDLER( ppi8255_16le_7_w );
#ifdef MESS
/* Peek at the ports */
UINT8 ppi8255_peek( int which, offs_t offset );
#endif
#endif /* _8255PPI_H_ */

52
src/mame/audio/segag80r.c
View File

@ -425,8 +425,22 @@ static const struct CustomSound_interface sega005_custom_interface =
}; };
static const ppi8255_interface ppi8255_005_intf =
{
NULL,
NULL,
NULL,
sega005_sound_a_w,
sega005_sound_b_w,
NULL
};
MACHINE_DRIVER_START( 005_sound_board ) MACHINE_DRIVER_START( 005_sound_board )
MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_005_intf )
/* sound hardware */ /* sound hardware */
MDRV_SOUND_START(005) MDRV_SOUND_START(005)
@ -449,18 +463,6 @@ MACHINE_DRIVER_END
static SOUND_START( 005 ) static SOUND_START( 005 )
{ {
static const ppi8255_interface ppi_intf =
{
1,
{ 0 },
{ 0 },
{ 0 },
{ sega005_sound_a_w },
{ sega005_sound_b_w },
{ 0 }
};
ppi8255_init(&ppi_intf);
state_save_register_global_array(sound_state); state_save_register_global_array(sound_state);
state_save_register_global(sound_addr); state_save_register_global(sound_addr);
state_save_register_global(sound_data); state_save_register_global(sound_data);
@ -819,8 +821,22 @@ ADDRESS_MAP_END
* *
*************************************/ *************************************/
static const ppi8255_interface monsterb_ppi_intf =
{
NULL,
NULL,
n7751_status_r,
monsterb_sound_a_w,
monsterb_sound_b_w,
n7751_command_w
};
MACHINE_DRIVER_START( monsterb_sound_board ) MACHINE_DRIVER_START( monsterb_sound_board )
MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( monsterb_ppi_intf )
/* basic machine hardware */ /* basic machine hardware */
MDRV_CPU_ADD(N7751, 6000000) MDRV_CPU_ADD(N7751, 6000000)
MDRV_CPU_PROGRAM_MAP(monsterb_7751_map,0) MDRV_CPU_PROGRAM_MAP(monsterb_7751_map,0)
@ -851,18 +867,6 @@ MACHINE_DRIVER_END
static SOUND_START( monsterb ) static SOUND_START( monsterb )
{ {
static const ppi8255_interface ppi_intf =
{
1,
{ 0 },
{ 0 },
{ n7751_status_r },
{ monsterb_sound_a_w },
{ monsterb_sound_b_w },
{ n7751_command_w }
};
ppi8255_init(&ppi_intf);
state_save_register_global_array(sound_state); state_save_register_global_array(sound_state);
state_save_register_global(sound_addr); state_save_register_global(sound_addr);
state_save_register_global(n7751_command); state_save_register_global(n7751_command);

40
src/mame/drivers/astinvad.c
View File

@ -65,15 +65,24 @@ static UINT8 color_latch;
static WRITE8_HANDLER( astinvad_sound1_w ); static WRITE8_HANDLER( astinvad_sound1_w );
static WRITE8_HANDLER( astinvad_sound2_w ); static WRITE8_HANDLER( astinvad_sound2_w );
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf[2] =
{ {
2, {
{ input_port_0_r, NULL }, input_port_0_r,
{ input_port_1_r, input_port_3_r }, input_port_1_r,
{ input_port_2_r, NULL }, input_port_2_r,
{ NULL, astinvad_sound1_w }, NULL,
{ NULL, astinvad_sound2_w }, NULL,
{ NULL, NULL }, NULL
},
{
NULL,
input_port_3_r,
NULL,
astinvad_sound1_w,
astinvad_sound2_w,
NULL
}
}; };
@ -195,7 +204,6 @@ static TIMER_CALLBACK( kamizake_int_gen )
static MACHINE_START( kamikaze ) static MACHINE_START( kamikaze )
{ {
ppi8255_init(&ppi8255_intf);
int_timer = timer_alloc(kamizake_int_gen, NULL); int_timer = timer_alloc(kamizake_int_gen, NULL);
timer_adjust_oneshot(int_timer, video_screen_get_time_until_pos(machine->primary_screen, 128, 0), 128); timer_adjust_oneshot(int_timer, video_screen_get_time_until_pos(machine->primary_screen, 128, 0), 128);
} }
@ -221,9 +229,9 @@ static READ8_HANDLER( kamikaze_ppi_r )
/* the address lines are used for /CS; yes, they can overlap! */ /* the address lines are used for /CS; yes, they can overlap! */
if (!(offset & 4)) if (!(offset & 4))
result &= ppi8255_0_r(machine, offset); result &= ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), offset);
if (!(offset & 8)) if (!(offset & 8))
result &= ppi8255_1_r(machine, offset); result &= ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), offset);
return result; return result;
} }
@ -232,9 +240,9 @@ static WRITE8_HANDLER( kamikaze_ppi_w )
{ {
/* the address lines are used for /CS; yes, they can overlap! */ /* the address lines are used for /CS; yes, they can overlap! */
if (!(offset & 4)) if (!(offset & 4))
ppi8255_0_w(machine, offset, data); ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), offset, data);
if (!(offset & 8)) if (!(offset & 8))
ppi8255_1_w(machine, offset, data); ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), offset, data);
} }
@ -505,6 +513,12 @@ static MACHINE_DRIVER_START( kamikaze )
MDRV_MACHINE_START(kamikaze) MDRV_MACHINE_START(kamikaze)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_VIDEO_UPDATE(astinvad) MDRV_VIDEO_UPDATE(astinvad)

36
src/mame/drivers/clayshoo.c
View File

@ -132,22 +132,29 @@ static void create_analog_timers(void)
* *
*************************************/ *************************************/
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf[2] =
{ {
2, /* 2 chips */ {
{ 0, 0 }, /* Port A read */ NULL, /* Port A read */
{ 0, input_port_r }, /* Port B read */ NULL, /* Port B read */
{ 0, 0 }, /* Port C read */ NULL, /* Port C read */
{ 0, input_port_select_w }, /* Port A write */ NULL, /* Port A write */
{ 0, 0 }, /* Port B write */ NULL, /* Port B write */
{ 0, 0 /* sound effects */},/* Port C write */ NULL /* Port C write */
},
{
NULL, /* Port A read */
input_port_r, /* Port B read */
NULL, /* Port C read */
input_port_select_w, /* Port A write */
NULL, /* Port B write */
NULL /* sound effects, Port C write */
}
}; };
static MACHINE_START( clayshoo ) static MACHINE_START( clayshoo )
{ {
ppi8255_init(&ppi8255_intf);
create_analog_timers(); create_analog_timers();
/* register for state saving */ /* register for state saving */
@ -216,8 +223,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( main_io_map, ADDRESS_SPACE_IO, 8 ) static ADDRESS_MAP_START( main_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff) ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(watchdog_reset_w) AM_RANGE(0x00, 0x00) AM_WRITE(watchdog_reset_w)
AM_RANGE(0x20, 0x23) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0x20, 0x23) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0x30, 0x33) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE(0x30, 0x33) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -313,6 +320,11 @@ static MACHINE_DRIVER_START( clayshoo )
MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_REFRESH_RATE(60)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */) MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[1] )
MACHINE_DRIVER_END MACHINE_DRIVER_END

40
src/mame/drivers/couple.c
View File

@ -125,23 +125,32 @@ static const struct AY8910interface ay8910_interface =
}; };
#endif #endif
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf[2] =
{ {
2, {
{ input_port_0_r, input_port_1_r }, /* Port A read */ input_port_0_r, /* Port A read */
{ input_port_2_r, input_port_3_r }, /* Port B read */ input_port_2_r, /* Port B read */
{ NULL, input_port_4_r }, /* Port C read */ NULL, /* Port C read */
{ NULL, NULL }, /* Port A write */ NULL, /* Port A write */
{ NULL, NULL }, /* Port B write */ NULL, /* Port B write */
{ NULL, NULL }, /* Port C write */ NULL /* Port C write */
},
{
input_port_1_r, /* Port A read */
input_port_3_r, /* Port B read */
input_port_4_r, /* Port C read */
NULL, /* Port A write */
NULL, /* Port B write */
NULL /* Port C write */
}
}; };
static ADDRESS_MAP_START( merit_mem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( merit_mem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE( 0x0000, 0x7fff ) AM_ROM AM_RANGE( 0x0000, 0x7fff ) AM_ROM
AM_RANGE( 0x8000, 0x9fff ) AM_ROMBANK(1) AM_RANGE( 0x8000, 0x9fff ) AM_ROMBANK(1)
AM_RANGE( 0xa000, 0xbfff ) AM_RAM AM_BASE(&backup_ram) AM_RANGE( 0xa000, 0xbfff ) AM_RAM AM_BASE(&backup_ram)
AM_RANGE( 0xc004, 0xc007 ) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE( 0xc004, 0xc007 ) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE( 0xc008, 0xc00a ) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE( 0xc008, 0xc00a ) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE( 0xc00b, 0xc00b ) AM_WRITE(merit_prot_w) AM_RANGE( 0xc00b, 0xc00b ) AM_WRITE(merit_prot_w)
// AM_RANGE( 0xc000, 0xc00f ) AM_READ(dummy_inputs_r) // AM_RANGE( 0xc000, 0xc00f ) AM_READ(dummy_inputs_r)
// AM_RANGE( 0xc008, 0xc008 ) AM_READ(input_port_0_r) // AM_RANGE( 0xc008, 0xc008 ) AM_READ(input_port_0_r)
@ -159,11 +168,6 @@ static ADDRESS_MAP_START( merit_io, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0xc10c, 0xc10c) AM_WRITE(AY8910_write_port_0_w) AM_RANGE(0xc10c, 0xc10c) AM_WRITE(AY8910_write_port_0_w)
ADDRESS_MAP_END ADDRESS_MAP_END
static MACHINE_RESET( couple )
{
ppi8255_init(&ppi8255_intf);
}
static PALETTE_INIT( couple ) static PALETTE_INIT( couple )
{ {
int i; int i;
@ -435,7 +439,11 @@ static MACHINE_DRIVER_START( couple )
MDRV_CPU_IO_MAP(merit_io,0) MDRV_CPU_IO_MAP(merit_io,0)
MDRV_CPU_VBLANK_INT("main", irq0_line_hold) MDRV_CPU_VBLANK_INT("main", irq0_line_hold)
MDRV_MACHINE_RESET(couple) MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)

44
src/mame/drivers/dribling.c
View File

@ -159,9 +159,9 @@ static WRITE8_HANDLER( shr_w )
static READ8_HANDLER( ioread ) static READ8_HANDLER( ioread )
{ {
if (offset & 0x08) if (offset & 0x08)
return ppi8255_0_r(machine, offset & 3); return ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), offset & 3);
else if (offset & 0x10) else if (offset & 0x10)
return ppi8255_1_r(machine, offset & 3); return ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), offset & 3);
return 0xff; return 0xff;
} }
@ -169,9 +169,9 @@ static READ8_HANDLER( ioread )
static WRITE8_HANDLER( iowrite ) static WRITE8_HANDLER( iowrite )
{ {
if (offset & 0x08) if (offset & 0x08)
ppi8255_0_w(machine, offset & 3, data); ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), offset & 3, data);
else if (offset & 0x10) else if (offset & 0x10)
ppi8255_1_w(machine, offset & 3, data); ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), offset & 3, data);
else if (offset & 0x40) else if (offset & 0x40)
{ {
dr = ds; dr = ds;
@ -187,22 +187,26 @@ static WRITE8_HANDLER( iowrite )
* *
*************************************/ *************************************/
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf[2] =
{ {
2, {
{ dsr_r, NULL }, dsr_r,
{ input_mux0_r, NULL }, input_mux0_r,
{ NULL, input_port_3_r }, NULL,
{ NULL, sound_w }, NULL,
{ NULL, pb_w }, NULL,
{ misc_w, shr_w } misc_w
},
{
NULL,
NULL,
input_port_3_r,
sound_w,
pb_w,
shr_w
}
}; };
static MACHINE_RESET( dribling )
{
ppi8255_init(&ppi8255_intf);
}
/************************************* /*************************************
@ -303,7 +307,11 @@ static MACHINE_DRIVER_START( dribling )
MDRV_CPU_IO_MAP(readport,writeport) MDRV_CPU_IO_MAP(readport,writeport)
MDRV_CPU_VBLANK_INT("main", dribling_irq_gen) MDRV_CPU_VBLANK_INT("main", dribling_irq_gen)
MDRV_MACHINE_RESET(dribling) MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK) MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)

22
src/mame/drivers/epos.c
View File

@ -109,26 +109,25 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dealer_readport, ADDRESS_SPACE_IO, 8 ) static ADDRESS_MAP_START( dealer_readport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff) ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x10, 0x13) AM_READ(ppi8255_0_r) AM_RANGE(0x10, 0x13) AM_DEVREAD(PPI8255, "ppi8255", ppi8255_r)
AM_RANGE(0x38, 0x38) AM_READ(input_port_0_r) AM_RANGE(0x38, 0x38) AM_READ(input_port_0_r)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( dealer_writeport, ADDRESS_SPACE_IO, 8 ) static ADDRESS_MAP_START( dealer_writeport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff) ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x10, 0x13) AM_WRITE(ppi8255_0_w) AM_RANGE(0x10, 0x13) AM_DEVWRITE(PPI8255, "ppi8255", ppi8255_w)
AM_RANGE(0x20, 0x24) AM_WRITE(dealer_decrypt_rom) AM_RANGE(0x20, 0x24) AM_WRITE(dealer_decrypt_rom)
// AM_RANGE(0x40, 0x40) AM_WRITE(watchdog_reset_w) // AM_RANGE(0x40, 0x40) AM_WRITE(watchdog_reset_w)
ADDRESS_MAP_END ADDRESS_MAP_END
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf =
{ {
1, /* 1 chip */ input_port_2_r, /* Port A read */
{ input_port_2_r }, /* Port A read */ NULL, /* Port B read */
{ NULL }, /* Port B read */ NULL, /* Port C read */
{ NULL }, /* Port C read */ NULL, /* Port A write */
{ NULL }, /* Port A write */ NULL, /* Port B write */
{ NULL }, /* Port B write */ NULL, /* Port C write */
{ NULL }, /* Port C write */
}; };
/************************************* /*************************************
@ -376,6 +375,9 @@ static MACHINE_DRIVER_START( dealer )
MDRV_CPU_IO_MAP(dealer_readport,dealer_writeport) MDRV_CPU_IO_MAP(dealer_readport,dealer_writeport)
MDRV_CPU_VBLANK_INT("main", irq0_line_hold) MDRV_CPU_VBLANK_INT("main", irq0_line_hold)
MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf )
/* video hardware */ /* video hardware */
MDRV_VIDEO_UPDATE(epos) MDRV_VIDEO_UPDATE(epos)
@ -558,8 +560,6 @@ ROM_END
static MACHINE_RESET( dealer ) static MACHINE_RESET( dealer )
{ {
memory_set_bankptr(1, memory_region(REGION_CPU1)); memory_set_bankptr(1, memory_region(REGION_CPU1));
ppi8255_init(&ppi8255_intf);
} }
static DRIVER_INIT( dealer ) static DRIVER_INIT( dealer )

41
src/mame/drivers/filetto.c
View File

@ -474,15 +474,24 @@ static WRITE8_HANDLER( sys_reset_w )
} }
static const ppi8255_interface filetto_ppi8255_intf = static const ppi8255_interface filetto_ppi8255_intf[2] =
{ {
2, /* 2 chips */ {
{ port_a_r,NULL }, /* Port A read */ port_a_r, /* Port A read */
{ port_b_r,NULL }, /* Port B read */ port_b_r, /* Port B read */
{ port_c_r,NULL }, /* Port C read */ port_c_r, /* Port C read */
{ NULL ,wss_1_w }, /* Port A write */ NULL, /* Port A write */
{ port_b_w,wss_2_w }, /* Port B write */ port_b_w, /* Port B write */
{ NULL ,sys_reset_w }, /* Port C write */ NULL /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
NULL, /* Port C read */
wss_1_w, /* Port A write */
wss_2_w, /* Port B write */
sys_reset_w /* Port C write */
}
}; };
static UINT8 irq_data[2]; static UINT8 irq_data[2];
@ -546,8 +555,8 @@ static ADDRESS_MAP_START( filetto_io, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x0000, 0x000f) AM_RAM //AM_READWRITE(dma8237_0_r,dma8237_0_w) //8237 DMA Controller AM_RANGE(0x0000, 0x000f) AM_RAM //AM_READWRITE(dma8237_0_r,dma8237_0_w) //8237 DMA Controller
AM_RANGE(0x0020, 0x0021) AM_READWRITE(irq_ctrl_8259_r,irq_ctrl_8259_w)//AM_READWRITE(pic8259_0_r,pic8259_0_w) //8259 Interrupt control AM_RANGE(0x0020, 0x0021) AM_READWRITE(irq_ctrl_8259_r,irq_ctrl_8259_w)//AM_READWRITE(pic8259_0_r,pic8259_0_w) //8259 Interrupt control
AM_RANGE(0x0040, 0x0043) AM_READ(kludge_r) //AM_READWRITE(pit8253_0_r,pit8253_0_w) //8253 PIT AM_RANGE(0x0040, 0x0043) AM_READ(kludge_r) //AM_READWRITE(pit8253_0_r,pit8253_0_w) //8253 PIT
AM_RANGE(0x0060, 0x0063) AM_READWRITE(ppi8255_0_r,ppi8255_0_w) //PPI 8255 AM_RANGE(0x0060, 0x0063) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r,ppi8255_w) //PPI 8255
AM_RANGE(0x0064, 0x0066) AM_READWRITE(ppi8255_1_r,ppi8255_1_w) //PPI 8255 AM_RANGE(0x0064, 0x0066) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r,ppi8255_w) //PPI 8255
AM_RANGE(0x0073, 0x0073) AM_READ(undefined_r) AM_RANGE(0x0073, 0x0073) AM_READ(undefined_r)
AM_RANGE(0x0080, 0x0087) AM_RAM //AM_READWRITE(dma_page_select_r,dma_page_select_w) AM_RANGE(0x0080, 0x0087) AM_RAM //AM_READWRITE(dma_page_select_r,dma_page_select_w)
AM_RANGE(0x00a0, 0x00a0) AM_WRITE(nmi_enable_w) AM_RANGE(0x00a0, 0x00a0) AM_WRITE(nmi_enable_w)
@ -650,11 +659,6 @@ static GFXDECODE_START( filetto )
GFXDECODE_END GFXDECODE_END
static MACHINE_RESET(filetto)
{
ppi8255_init(&filetto_ppi8255_intf);
}
/* /*
BLACK = 0 BLACK = 0
BLUE = 1 BLUE = 1
@ -740,6 +744,12 @@ static MACHINE_DRIVER_START( filetto )
MDRV_DEVICE_ADD( "pit8253", PIT8253 ) MDRV_DEVICE_ADD( "pit8253", PIT8253 )
MDRV_DEVICE_CONFIG( pc_pit8253_config ) MDRV_DEVICE_CONFIG( pc_pit8253_config )
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( filetto_ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( filetto_ppi8255_intf[1] )
MDRV_GFXDECODE(filetto) MDRV_GFXDECODE(filetto)
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)
@ -751,7 +761,6 @@ static MACHINE_DRIVER_START( filetto )
MDRV_PALETTE_LENGTH(0x100) MDRV_PALETTE_LENGTH(0x100)
MDRV_MACHINE_RESET(filetto)
MDRV_PALETTE_INIT(filetto) MDRV_PALETTE_INIT(filetto)
MDRV_VIDEO_START(filetto) MDRV_VIDEO_START(filetto)

41
src/mame/drivers/findout.c
View File

@ -102,21 +102,28 @@ static WRITE8_HANDLER( sound_w )
// popmessage("%02x",data); // popmessage("%02x",data);
} }
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf[2] =
{ {
2, /* 2 chips */ {
{ input_port_0_r, input_port_2_r }, /* Port A read */ input_port_0_r, /* Port A read */
{ port1_r, NULL }, /* Port B read */ port1_r, /* Port B read */
{ NULL, portC_r }, /* Port C read */ NULL, /* Port C read */
{ NULL, NULL }, /* Port A write */ NULL, /* Port A write */
{ NULL, lamps_w }, /* Port B write */ NULL, /* Port B write */
{ sound_w, NULL }, /* Port C write */ sound_w, /* Port C write */
},
{
input_port_2_r, /* Port A read */
NULL, /* Port B read */
portC_r, /* Port C read */
NULL, /* Port A write */
lamps_w, /* Port B write */
NULL /* Port C write */
}
}; };
static MACHINE_RESET( findout ) static MACHINE_RESET( findout )
{ {
ppi8255_init(&ppi8255_intf);
ticket_dispenser_init(100, 1, 1); ticket_dispenser_init(100, 1, 1);
} }
@ -183,8 +190,8 @@ static WRITE8_HANDLER( signature_w )
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM) AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
AM_RANGE(0x4000, 0x47ff) AM_READ(SMH_RAM) AM_RANGE(0x4000, 0x47ff) AM_READ(SMH_RAM)
AM_RANGE(0x4800, 0x4803) AM_READ(ppi8255_0_r) AM_RANGE(0x4800, 0x4803) AM_DEVREAD(PPI8255, "ppi8255_0", ppi8255_r)
AM_RANGE(0x5000, 0x5003) AM_READ(ppi8255_1_r) AM_RANGE(0x5000, 0x5003) AM_DEVREAD(PPI8255, "ppi8255_1", ppi8255_r)
AM_RANGE(0x6400, 0x6400) AM_READ(signature_r) AM_RANGE(0x6400, 0x6400) AM_READ(signature_r)
AM_RANGE(0x7800, 0x7fff) AM_READ(SMH_ROM) AM_RANGE(0x7800, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1) AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)
@ -194,8 +201,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM) AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size) AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x4800, 0x4803) AM_WRITE(ppi8255_0_w) AM_RANGE(0x4800, 0x4803) AM_DEVWRITE(PPI8255, "ppi8255_0", ppi8255_w)
AM_RANGE(0x5000, 0x5003) AM_WRITE(ppi8255_1_w) AM_RANGE(0x5000, 0x5003) AM_DEVWRITE(PPI8255, "ppi8255_1", ppi8255_w)
/* banked ROMs are enabled by low 6 bits of the address */ /* banked ROMs are enabled by low 6 bits of the address */
AM_RANGE(0x603e, 0x603e) AM_WRITE(banksel_1_w) AM_RANGE(0x603e, 0x603e) AM_WRITE(banksel_1_w)
AM_RANGE(0x603d, 0x603d) AM_WRITE(banksel_2_w) AM_RANGE(0x603d, 0x603d) AM_WRITE(banksel_2_w)
@ -464,6 +471,12 @@ static MACHINE_DRIVER_START( findout )
MDRV_VIDEO_START(generic_bitmapped) MDRV_VIDEO_START(generic_bitmapped)
MDRV_VIDEO_UPDATE(generic_bitmapped) MDRV_VIDEO_UPDATE(generic_bitmapped)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[1] )
/* sound hardware */ /* sound hardware */
MDRV_SPEAKER_STANDARD_MONO("mono") MDRV_SPEAKER_STANDARD_MONO("mono")

44
src/mame/drivers/freekick.c
View File

@ -221,8 +221,8 @@ static ADDRESS_MAP_START( freekckb_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xd000, 0xdfff) AM_READ(SMH_RAM) AM_RANGE(0xd000, 0xdfff) AM_READ(SMH_RAM)
AM_RANGE(0xe000, 0xe7ff) AM_READ(SMH_RAM) // tilemap AM_RANGE(0xe000, 0xe7ff) AM_READ(SMH_RAM) // tilemap
AM_RANGE(0xe800, 0xe8ff) AM_READ(SMH_RAM) // sprites AM_RANGE(0xe800, 0xe8ff) AM_READ(SMH_RAM) // sprites
AM_RANGE(0xec00, 0xec03) AM_READ(ppi8255_0_r) AM_RANGE(0xec00, 0xec03) AM_DEVREAD(PPI8255, "ppi8255_0", ppi8255_r)
AM_RANGE(0xf000, 0xf003) AM_READ(ppi8255_1_r) AM_RANGE(0xf000, 0xf003) AM_DEVREAD(PPI8255, "ppi8255_1", ppi8255_r)
AM_RANGE(0xf800, 0xf800) AM_READ(input_port_3_r) AM_RANGE(0xf800, 0xf800) AM_READ(input_port_3_r)
AM_RANGE(0xf801, 0xf801) AM_READ(input_port_4_r) AM_RANGE(0xf801, 0xf801) AM_READ(input_port_4_r)
AM_RANGE(0xf802, 0xf802) AM_READ(SMH_NOP) //MUST return bit 0 = 0, otherwise game resets AM_RANGE(0xf802, 0xf802) AM_READ(SMH_NOP) //MUST return bit 0 = 0, otherwise game resets
@ -234,8 +234,8 @@ static ADDRESS_MAP_START( freekckb_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xd000, 0xdfff) AM_WRITE(SMH_RAM) AM_RANGE(0xd000, 0xdfff) AM_WRITE(SMH_RAM)
AM_RANGE(0xe000, 0xe7ff) AM_WRITE(freek_videoram_w) AM_BASE(&freek_videoram) AM_RANGE(0xe000, 0xe7ff) AM_WRITE(freek_videoram_w) AM_BASE(&freek_videoram)
AM_RANGE(0xe800, 0xe8ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size) AM_RANGE(0xe800, 0xe8ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xec00, 0xec03) AM_WRITE(ppi8255_0_w) AM_RANGE(0xec00, 0xec03) AM_DEVWRITE(PPI8255, "ppi8255_0", ppi8255_w)
AM_RANGE(0xf000, 0xf003) AM_WRITE(ppi8255_1_w) AM_RANGE(0xf000, 0xf003) AM_DEVWRITE(PPI8255, "ppi8255_1", ppi8255_w)
AM_RANGE(0xf800, 0xf801) AM_WRITE(flipscreen_w) AM_RANGE(0xf800, 0xf801) AM_WRITE(flipscreen_w)
AM_RANGE(0xf802, 0xf803) AM_WRITE(coin_w) AM_RANGE(0xf802, 0xf803) AM_WRITE(coin_w)
AM_RANGE(0xf804, 0xf804) AM_WRITE(nmi_enable_w) AM_RANGE(0xf804, 0xf804) AM_WRITE(nmi_enable_w)
@ -597,22 +597,26 @@ static READ8_HANDLER( snd_rom_r )
return memory_region(REGION_USER1)[romaddr & 0x7fff]; return memory_region(REGION_USER1)[romaddr & 0x7fff];
} }
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf[2] =
{ {
2, /* 1 chips */ {
{ NULL, input_port_0_r }, /* Port A read */ NULL, /* Port A read */
{ NULL, input_port_1_r }, /* Port B read */ NULL, /* Port B read */
{ snd_rom_r, input_port_2_r }, /* Port C read */ snd_rom_r, /* Port C read */
{ snd_rom_addr_l_w, NULL }, /* Port A write */ snd_rom_addr_l_w, /* Port A write */
{ snd_rom_addr_h_w, NULL }, /* Port B write */ snd_rom_addr_h_w, /* Port B write */
{ NULL, NULL }, /* Port C write */ NULL /* Port C write */
},
{
input_port_0_r, /* Port A read */
input_port_1_r, /* Port B read */
input_port_2_r, /* Port C read */
NULL, /* Port A write */
NULL, /* Port B write */
NULL /* Port C write */
}
}; };
static MACHINE_RESET( freekckb )
{
ppi8255_init(&ppi8255_intf);
}
/************************************* /*************************************
@ -709,7 +713,11 @@ static MACHINE_DRIVER_START( freekckb )
MDRV_CPU_PROGRAM_MAP(freekckb_readmem,freekckb_writemem) MDRV_CPU_PROGRAM_MAP(freekckb_readmem,freekckb_writemem)
MDRV_CPU_IO_MAP(freekckb_readport,freekckb_writeport) MDRV_CPU_IO_MAP(freekckb_readport,freekckb_writeport)
MDRV_MACHINE_RESET(freekckb) MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[1] )
MDRV_VIDEO_UPDATE(freekick) MDRV_VIDEO_UPDATE(freekick)
MACHINE_DRIVER_END MACHINE_DRIVER_END

271
src/mame/drivers/galaxian.c
View File

@ -397,15 +397,24 @@ static WRITE8_HANDLER( konami_portc_1_w )
} }
static const ppi8255_interface konami_ppi8255_intf = static const ppi8255_interface konami_ppi8255_intf[2] =
{ {
2, {
{ konami_porta_0_r, NULL }, /* Port A read */ konami_porta_0_r, /* Port A read */
{ konami_portb_0_r, NULL }, /* Port B read */ konami_portb_0_r, /* Port B read */
{ konami_portc_0_r, konami_portc_1_r }, /* Port C read */ konami_portc_0_r, /* Port C read */
{ NULL, soundlatch_w }, /* Port A write */ NULL, /* Port A write */
{ NULL, konami_sound_control_w }, /* Port B write */ NULL, /* Port B write */
{ konami_portc_0_w, konami_portc_1_w }, /* Port C write */ konami_portc_0_w /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
konami_portc_1_r, /* Port C read */
soundlatch_w, /* Port A write */
konami_sound_control_w, /* Port B write */
konami_portc_1_w /* Port C write */
}
}; };
@ -420,8 +429,8 @@ static READ8_HANDLER( theend_ppi8255_r )
{ {
/* the decoding here is very simplistic, and you can address both simultaneously */ /* the decoding here is very simplistic, and you can address both simultaneously */
UINT8 result = 0xff; UINT8 result = 0xff;
if (offset & 0x0100) result &= ppi8255_0_r(machine, offset & 3); if (offset & 0x0100) result &= ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), offset & 3);
if (offset & 0x0200) result &= ppi8255_1_r(machine, offset & 3); if (offset & 0x0200) result &= ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), offset & 3);
return result; return result;
} }
@ -429,8 +438,8 @@ static READ8_HANDLER( theend_ppi8255_r )
static WRITE8_HANDLER( theend_ppi8255_w ) static WRITE8_HANDLER( theend_ppi8255_w )
{ {
/* the decoding here is very simplistic, and you can address both simultaneously */ /* the decoding here is very simplistic, and you can address both simultaneously */
if (offset & 0x0100) ppi8255_0_w(machine, offset & 3, data); if (offset & 0x0100) ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), offset & 3, data);
if (offset & 0x0200) ppi8255_1_w(machine, offset & 3, data); if (offset & 0x0200) ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), offset & 3, data);
} }
@ -440,6 +449,27 @@ static WRITE8_HANDLER( theend_coin_counter_w )
} }
static const ppi8255_interface theend_ppi8255_intf[2] =
{
{
konami_porta_0_r, /* Port A read */
konami_portb_0_r, /* Port B read */
konami_portc_0_r, /* Port C read */
NULL, /* Port A write */
NULL, /* Port B write */
theend_coin_counter_w /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
konami_portc_1_r, /* Port C read */
soundlatch_w, /* Port A write */
konami_sound_control_w, /* Port B write */
konami_portc_1_w /* Port C write */
}
};
/************************************* /*************************************
* *
@ -488,6 +518,26 @@ static CUSTOM_INPUT( scramble_protection_alt_r )
} }
static const ppi8255_interface scramble_ppi8255_intf[2] =
{
{
konami_porta_0_r, /* Port A read */
konami_portb_0_r, /* Port B read */
konami_portc_0_r, /* Port C read */
NULL, /* Port A write */
NULL, /* Port B write */
konami_portc_0_w /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
scramble_protection_r, /* Port C read */
soundlatch_w, /* Port A write */
konami_sound_control_w, /* Port B write */
scramble_protection_w /* Port C write */
}
};
/************************************* /*************************************
* *
@ -519,7 +569,7 @@ static READ8_HANDLER( sfx_sample_io_r )
{ {
/* the decoding here is very simplistic, and you can address both simultaneously */ /* the decoding here is very simplistic, and you can address both simultaneously */
UINT8 result = 0xff; UINT8 result = 0xff;
if (offset & 0x04) result &= ppi8255_2_r(machine, offset & 3); if (offset & 0x04) result &= ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_2" ), offset & 3);
return result; return result;
} }
@ -527,7 +577,7 @@ static READ8_HANDLER( sfx_sample_io_r )
static WRITE8_HANDLER( sfx_sample_io_w ) static WRITE8_HANDLER( sfx_sample_io_w )
{ {
/* the decoding here is very simplistic, and you can address both simultaneously */ /* the decoding here is very simplistic, and you can address both simultaneously */
if (offset & 0x04) ppi8255_2_w(machine, offset & 3, data); if (offset & 0x04) ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_2" ), offset & 3, data);
if (offset & 0x10) DAC_0_signed_data_w(machine, offset, data); if (offset & 0x10) DAC_0_signed_data_w(machine, offset, data);
} }
@ -544,15 +594,32 @@ static WRITE8_HANDLER( sfx_sample_control_w )
} }
static const ppi8255_interface sfx_ppi8255_intf = static const ppi8255_interface sfx_ppi8255_intf[3] =
{ {
3, {
{ konami_porta_0_r, NULL, soundlatch2_r }, /* Port A read */ konami_porta_0_r, /* Port A read */
{ konami_portb_0_r, NULL, NULL }, /* Port B read */ konami_portb_0_r, /* Port B read */
{ konami_portc_0_r, konami_portc_1_r, NULL }, /* Port C read */ konami_portc_0_r, /* Port C read */
{ NULL, soundlatch_w, NULL }, /* Port A write */ NULL, /* Port A write */
{ NULL, konami_sound_control_w, NULL }, /* Port B write */ NULL, /* Port B write */
{ konami_portc_0_w, konami_portc_1_w, NULL }, /* Port C write */ konami_portc_0_w /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
konami_portc_1_r, /* Port C read */
soundlatch_w, /* Port A write */
konami_sound_control_w, /* Port B write */
konami_portc_1_w /* Port C write */
},
{
soundlatch2_r, /* Port A read */
NULL, /* Port B read */
NULL, /* Port C read */
NULL, /* Port A write */
NULL, /* Port B write */
NULL /* Port C write */
}
}; };
@ -567,8 +634,8 @@ static READ8_HANDLER( frogger_ppi8255_r )
{ {
/* the decoding here is very simplistic, and you can address both simultaneously */ /* the decoding here is very simplistic, and you can address both simultaneously */
UINT8 result = 0xff; UINT8 result = 0xff;
if (offset & 0x1000) result &= ppi8255_1_r(machine, (offset >> 1) & 3); if (offset & 0x1000) result &= ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), (offset >> 1) & 3);
if (offset & 0x2000) result &= ppi8255_0_r(machine, (offset >> 1) & 3); if (offset & 0x2000) result &= ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), (offset >> 1) & 3);
return result; return result;
} }
@ -576,8 +643,8 @@ static READ8_HANDLER( frogger_ppi8255_r )
static WRITE8_HANDLER( frogger_ppi8255_w ) static WRITE8_HANDLER( frogger_ppi8255_w )
{ {
/* the decoding here is very simplistic, and you can address both simultaneously */ /* the decoding here is very simplistic, and you can address both simultaneously */
if (offset & 0x1000) ppi8255_1_w(machine, (offset >> 1) & 3, data); if (offset & 0x1000) ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), (offset >> 1) & 3, data);
if (offset & 0x2000) ppi8255_0_w(machine, (offset >> 1) & 3, data); if (offset & 0x2000) ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), (offset >> 1) & 3, data);
} }
@ -623,8 +690,8 @@ static READ8_HANDLER( frogf_ppi8255_r )
{ {
/* the decoding here is very simplistic, and you can address both simultaneously */ /* the decoding here is very simplistic, and you can address both simultaneously */
UINT8 result = 0xff; UINT8 result = 0xff;
if (offset & 0x1000) result &= ppi8255_0_r(machine, (offset >> 3) & 3); if (offset & 0x1000) result &= ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), (offset >> 3) & 3);
if (offset & 0x2000) result &= ppi8255_1_r(machine, (offset >> 3) & 3); if (offset & 0x2000) result &= ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), (offset >> 3) & 3);
return result; return result;
} }
@ -632,8 +699,8 @@ static READ8_HANDLER( frogf_ppi8255_r )
static WRITE8_HANDLER( frogf_ppi8255_w ) static WRITE8_HANDLER( frogf_ppi8255_w )
{ {
/* the decoding here is very simplistic, and you can address both simultaneously */ /* the decoding here is very simplistic, and you can address both simultaneously */
if (offset & 0x1000) ppi8255_0_w(machine, (offset >> 3) & 3, data); if (offset & 0x1000) ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), (offset >> 3) & 3, data);
if (offset & 0x2000) ppi8255_1_w(machine, (offset >> 3) & 3, data); if (offset & 0x2000) ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), (offset >> 3) & 3, data);
} }
@ -644,10 +711,10 @@ static WRITE8_HANDLER( frogf_ppi8255_w )
* *
*************************************/ *************************************/
static READ8_HANDLER( turtles_ppi8255_0_r ) { return ppi8255_0_r(machine, (offset >> 4) & 3); } static READ8_HANDLER( turtles_ppi8255_0_r ) { return ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), (offset >> 4) & 3); }
static READ8_HANDLER( turtles_ppi8255_1_r ) { return ppi8255_1_r(machine, (offset >> 4) & 3); } static READ8_HANDLER( turtles_ppi8255_1_r ) { return ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), (offset >> 4) & 3); }
static WRITE8_HANDLER( turtles_ppi8255_0_w ) { ppi8255_0_w(machine, (offset >> 4) & 3, data); } static WRITE8_HANDLER( turtles_ppi8255_0_w ) { ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), (offset >> 4) & 3, data); }
static WRITE8_HANDLER( turtles_ppi8255_1_w ) { ppi8255_1_w(machine, (offset >> 4) & 3, data); } static WRITE8_HANDLER( turtles_ppi8255_1_w ) { ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), (offset >> 4) & 3, data); }
@ -732,6 +799,27 @@ static WRITE8_HANDLER( scorpion_sound_control_w )
} }
static const ppi8255_interface scorpion_ppi8255_intf[2] =
{
{
konami_porta_0_r, /* Port A read */
konami_portb_0_r, /* Port B read */
konami_portc_0_r, /* Port C read */
NULL, /* Port A write */
NULL, /* Port B write */
konami_portc_0_w /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
scorpion_protection_r, /* Port C read */
soundlatch_w, /* Port A write */
konami_sound_control_w, /* Port B write */
scorpion_protection_w /* Port C write */
}
};
/************************************* /*************************************
* *
@ -1148,8 +1236,8 @@ static ADDRESS_MAP_START( scobra_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8000, 0x87ff) AM_MIRROR(0x4000) AM_RAM AM_RANGE(0x8000, 0x87ff) AM_MIRROR(0x4000) AM_RAM
AM_RANGE(0x8800, 0x8bff) AM_MIRROR(0x4400) AM_RAM_WRITE(galaxian_videoram_w) AM_BASE(&videoram) AM_RANGE(0x8800, 0x8bff) AM_MIRROR(0x4400) AM_RAM_WRITE(galaxian_videoram_w) AM_BASE(&videoram)
AM_RANGE(0x9000, 0x90ff) AM_MIRROR(0x4700) AM_RAM_WRITE(galaxian_objram_w) AM_BASE(&spriteram) AM_RANGE(0x9000, 0x90ff) AM_MIRROR(0x4700) AM_RAM_WRITE(galaxian_objram_w) AM_BASE(&spriteram)
AM_RANGE(0x9800, 0x9803) AM_MIRROR(0x47fc) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0x9800, 0x9803) AM_MIRROR(0x47fc) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0xa000, 0xa003) AM_MIRROR(0x47fc) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE(0xa000, 0xa003) AM_MIRROR(0x47fc) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0xa801, 0xa801) AM_MIRROR(0x47f8) AM_WRITE(irq_enable_w) AM_RANGE(0xa801, 0xa801) AM_MIRROR(0x47f8) AM_WRITE(irq_enable_w)
AM_RANGE(0xa802, 0xa802) AM_MIRROR(0x47f8) AM_WRITE(coin_count_0_w) AM_RANGE(0xa802, 0xa802) AM_MIRROR(0x47f8) AM_WRITE(coin_count_0_w)
AM_RANGE(0xa803, 0xa803) AM_MIRROR(0x47f8) AM_WRITE(scramble_background_enable_w) AM_RANGE(0xa803, 0xa803) AM_MIRROR(0x47f8) AM_WRITE(scramble_background_enable_w)
@ -1582,6 +1670,17 @@ static MACHINE_DRIVER_START( galaxian_sound )
MACHINE_DRIVER_END MACHINE_DRIVER_END
static MACHINE_DRIVER_START( konami_base )
MDRV_IMPORT_FROM( galaxian_base )
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( konami_ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( konami_ppi8255_intf[1] )
MACHINE_DRIVER_END
static MACHINE_DRIVER_START( konami_sound_1x_ay8910 ) static MACHINE_DRIVER_START( konami_sound_1x_ay8910 )
/* 2nd CPU to drive sound */ /* 2nd CPU to drive sound */
@ -1758,7 +1857,7 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( frogger ) static MACHINE_DRIVER_START( frogger )
MDRV_IMPORT_FROM(galaxian_base) MDRV_IMPORT_FROM(konami_base)
MDRV_IMPORT_FROM(konami_sound_1x_ay8910) MDRV_IMPORT_FROM(konami_sound_1x_ay8910)
/* alternate memory map */ /* alternate memory map */
@ -1778,7 +1877,7 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( froggers ) static MACHINE_DRIVER_START( froggers )
MDRV_IMPORT_FROM(galaxian_base) MDRV_IMPORT_FROM(konami_base)
MDRV_IMPORT_FROM(konami_sound_1x_ay8910) MDRV_IMPORT_FROM(konami_sound_1x_ay8910)
/* alternate memory map */ /* alternate memory map */
@ -1788,7 +1887,7 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( frogf ) static MACHINE_DRIVER_START( frogf )
MDRV_IMPORT_FROM(galaxian_base) MDRV_IMPORT_FROM(konami_base)
MDRV_IMPORT_FROM(konami_sound_1x_ay8910) MDRV_IMPORT_FROM(konami_sound_1x_ay8910)
/* alternate memory map */ /* alternate memory map */
@ -1798,7 +1897,7 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( turtles ) static MACHINE_DRIVER_START( turtles )
MDRV_IMPORT_FROM(galaxian_base) MDRV_IMPORT_FROM(konami_base)
MDRV_IMPORT_FROM(konami_sound_2x_ay8910) MDRV_IMPORT_FROM(konami_sound_2x_ay8910)
/* alternate memory map */ /* alternate memory map */
@ -1814,11 +1913,33 @@ static MACHINE_DRIVER_START( theend )
/* alternate memory map */ /* alternate memory map */
MDRV_CPU_MODIFY("main") MDRV_CPU_MODIFY("main")
MDRV_CPU_PROGRAM_MAP(theend_map,0) MDRV_CPU_PROGRAM_MAP(theend_map,0)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( theend_ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( theend_ppi8255_intf[1] )
MACHINE_DRIVER_END
static MACHINE_DRIVER_START( scramble )
MDRV_IMPORT_FROM(galaxian_base)
MDRV_IMPORT_FROM(konami_sound_2x_ay8910)
/* alternate memory map */
MDRV_CPU_MODIFY("main")
MDRV_CPU_PROGRAM_MAP(theend_map,0)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( scramble_ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( scramble_ppi8255_intf[1] )
MACHINE_DRIVER_END MACHINE_DRIVER_END
static MACHINE_DRIVER_START( explorer ) static MACHINE_DRIVER_START( explorer )
MDRV_IMPORT_FROM(galaxian_base) MDRV_IMPORT_FROM(konami_base)
/* alternate memory map */ /* alternate memory map */
MDRV_CPU_MODIFY("main") MDRV_CPU_MODIFY("main")
@ -1843,6 +1964,12 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( scorpion ) static MACHINE_DRIVER_START( scorpion )
MDRV_IMPORT_FROM(theend) MDRV_IMPORT_FROM(theend)
MDRV_DEVICE_MODIFY( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( scorpion_ppi8255_intf[0] )
MDRV_DEVICE_MODIFY( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( scorpion_ppi8255_intf[1] )
/* extra AY8910 with I/O ports */ /* extra AY8910 with I/O ports */
MDRV_SOUND_ADD_TAG("8910.2", AY8910, KONAMI_SOUND_CLOCK/8) MDRV_SOUND_ADD_TAG("8910.2", AY8910, KONAMI_SOUND_CLOCK/8)
MDRV_SOUND_CONFIG(scorpion_ay8910_interface) MDRV_SOUND_CONFIG(scorpion_ay8910_interface)
@ -1865,6 +1992,15 @@ static MACHINE_DRIVER_START( sfx )
MDRV_CPU_PROGRAM_MAP(sfx_sample_map,0) MDRV_CPU_PROGRAM_MAP(sfx_sample_map,0)
MDRV_CPU_IO_MAP(sfx_sample_portmap,0) MDRV_CPU_IO_MAP(sfx_sample_portmap,0)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( sfx_ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( sfx_ppi8255_intf[1] )
MDRV_DEVICE_ADD( "ppi8255_2", PPI8255 )
MDRV_DEVICE_CONFIG( sfx_ppi8255_intf[2] )
/* port on 1st 8910 is used for communication */ /* port on 1st 8910 is used for communication */
MDRV_SOUND_MODIFY("8910.0") MDRV_SOUND_MODIFY("8910.0")
MDRV_SOUND_CONFIG(sfx_ay8910_interface) MDRV_SOUND_CONFIG(sfx_ay8910_interface)
@ -1876,7 +2012,7 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( scobra ) static MACHINE_DRIVER_START( scobra )
MDRV_IMPORT_FROM(galaxian_base) MDRV_IMPORT_FROM(konami_base)
MDRV_IMPORT_FROM(konami_sound_2x_ay8910) MDRV_IMPORT_FROM(konami_sound_2x_ay8910)
/* alternate memory map */ /* alternate memory map */
@ -2082,21 +2218,6 @@ static void common_init(
} }
static void konami_common_init(
running_machine *machine,
galaxian_draw_bullet_func draw_bullet,
galaxian_draw_background_func draw_background,
galaxian_extend_tile_info_func extend_tile_info,
galaxian_extend_sprite_info_func extend_sprite_info)
{
/* basic configuration */
common_init(machine, draw_bullet, draw_background, extend_tile_info, extend_sprite_info);
/* configure Konami sound */
ppi8255_init(&konami_ppi8255_intf);
}
static void unmap_galaxian_sound(running_machine *machine, offs_t base) static void unmap_galaxian_sound(running_machine *machine, offs_t base)
{ {
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, base + 0x0004, base + 0x0007, 0, 0x07f8, SMH_UNMAP); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, base + 0x0004, base + 0x0007, 0, 0x07f8, SMH_UNMAP);
@ -2441,29 +2562,24 @@ static DRIVER_INIT( scorpnmc )
static DRIVER_INIT( theend ) static DRIVER_INIT( theend )
{ {
/* video extensions */ /* video extensions */
konami_common_init(machine, theend_draw_bullet, galaxian_draw_background, NULL, NULL); common_init(machine, theend_draw_bullet, galaxian_draw_background, NULL, NULL);
/* coin counter on the upper bit of port C */ /* coin counter on the upper bit of port C */
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x6802, 0x6802, 0, 0x7f8, SMH_UNMAP); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x6802, 0x6802, 0, 0x7f8, SMH_UNMAP);
ppi8255_set_portCwrite(0, theend_coin_counter_w);
} }
static DRIVER_INIT( scramble ) static DRIVER_INIT( scramble )
{ {
/* video extensions */ /* video extensions */
konami_common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL); common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL);
/* configure protection */
ppi8255_set_portCread (1, scramble_protection_r);
ppi8255_set_portCwrite(1, scramble_protection_w);
} }
static DRIVER_INIT( explorer ) static DRIVER_INIT( explorer )
{ {
/* video extensions */ /* video extensions */
konami_common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL); common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL);
/* watchdog works for writes as well? (or is it just disabled?) */ /* watchdog works for writes as well? (or is it just disabled?) */
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x7000, 0x7000, 0, 0x7ff, watchdog_reset_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x7000, 0x7000, 0, 0x7ff, watchdog_reset_w);
@ -2485,9 +2601,6 @@ static DRIVER_INIT( sfx )
common_init(machine, scramble_draw_bullet, scramble_draw_background, upper_extend_tile_info, NULL); common_init(machine, scramble_draw_bullet, scramble_draw_background, upper_extend_tile_info, NULL);
galaxian_sfx_tilemap = TRUE; galaxian_sfx_tilemap = TRUE;
/* sfx uses 3 x 8255, so we need a non-standard interface */
ppi8255_init(&sfx_ppi8255_intf);
/* sound board has space for extra ROM */ /* sound board has space for extra ROM */
memory_install_read8_handler(machine, 1, ADDRESS_SPACE_PROGRAM, 0x0000, 0x3fff, 0, 0, SMH_BANK1); memory_install_read8_handler(machine, 1, ADDRESS_SPACE_PROGRAM, 0x0000, 0x3fff, 0, 0, SMH_BANK1);
memory_set_bankptr(1, memory_region(REGION_CPU2)); memory_set_bankptr(1, memory_region(REGION_CPU2));
@ -2497,7 +2610,7 @@ static DRIVER_INIT( sfx )
static DRIVER_INIT( atlantis ) static DRIVER_INIT( atlantis )
{ {
/* video extensions */ /* video extensions */
konami_common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL); common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL);
/* watchdog is at $7800? (or is it just disabled?) */ /* watchdog is at $7800? (or is it just disabled?) */
memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x7000, 0x7000, 0, 0x7ff, SMH_UNMAP); memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x7000, 0x7000, 0, 0x7ff, SMH_UNMAP);
@ -2508,14 +2621,14 @@ static DRIVER_INIT( atlantis )
static DRIVER_INIT( scobra ) static DRIVER_INIT( scobra )
{ {
/* video extensions */ /* video extensions */
konami_common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL); common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL);
} }
static DRIVER_INIT( losttomb ) static DRIVER_INIT( losttomb )
{ {
/* video extensions */ /* video extensions */
konami_common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL); common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL);
/* decrypt */ /* decrypt */
decode_losttomb_gfx(); decode_losttomb_gfx();
@ -2525,7 +2638,7 @@ static DRIVER_INIT( losttomb )
static DRIVER_INIT( frogger ) static DRIVER_INIT( frogger )
{ {
/* video extensions */ /* video extensions */
konami_common_init(machine, NULL, frogger_draw_background, frogger_extend_tile_info, frogger_extend_sprite_info); common_init(machine, NULL, frogger_draw_background, frogger_extend_tile_info, frogger_extend_sprite_info);
galaxian_frogger_adjust = TRUE; galaxian_frogger_adjust = TRUE;
/* decrypt */ /* decrypt */
@ -2554,7 +2667,7 @@ static DRIVER_INIT( froggrmc )
static DRIVER_INIT( froggers ) static DRIVER_INIT( froggers )
{ {
/* video extensions */ /* video extensions */
konami_common_init(machine, NULL, frogger_draw_background, frogger_extend_tile_info, frogger_extend_sprite_info); common_init(machine, NULL, frogger_draw_background, frogger_extend_tile_info, frogger_extend_sprite_info);
/* decrypt */ /* decrypt */
decode_frogger_sound(); decode_frogger_sound();
@ -2564,7 +2677,7 @@ static DRIVER_INIT( froggers )
static DRIVER_INIT( turtles ) static DRIVER_INIT( turtles )
{ {
/* video extensions */ /* video extensions */
konami_common_init(machine, NULL, turtles_draw_background, NULL, NULL); common_init(machine, NULL, turtles_draw_background, NULL, NULL);
} }
@ -2573,22 +2686,18 @@ static DRIVER_INIT( amidar )
{ {
/* no existing amidar sets run on Amidar hardware as described by Amidar schematics! */ /* no existing amidar sets run on Amidar hardware as described by Amidar schematics! */
/* video extensions */ /* video extensions */
konami_common_init(machine, scramble_draw_bullet, amidar_draw_background, NULL, NULL); common_init(machine, scramble_draw_bullet, amidar_draw_background, NULL, NULL);
} }
#endif #endif
static DRIVER_INIT( scorpion ) static DRIVER_INIT( scorpion )
{ {
konami_common_init(machine, scramble_draw_bullet, scramble_draw_background, batman2_extend_tile_info, upper_extend_sprite_info); common_init(machine, scramble_draw_bullet, scramble_draw_background, batman2_extend_tile_info, upper_extend_sprite_info);
/* hook up AY8910 */ /* hook up AY8910 */
memory_install_readwrite8_handler(machine, 1, ADDRESS_SPACE_IO, 0x00, 0xff, 0, 0, scorpion_ay8910_r, scorpion_ay8910_w); memory_install_readwrite8_handler(machine, 1, ADDRESS_SPACE_IO, 0x00, 0xff, 0, 0, scorpion_ay8910_r, scorpion_ay8910_w);
/* configure protection */
ppi8255_set_portCwrite(1, scorpion_protection_w);
ppi8255_set_portCread(1, scorpion_protection_r);
/* extra ROM */ /* extra ROM */
memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x5800, 0x67ff, 0, 0, SMH_BANK1); memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x5800, 0x67ff, 0, 0, SMH_BANK1);
memory_set_bankptr(1, memory_region(REGION_CPU1) + 0x5800); memory_set_bankptr(1, memory_region(REGION_CPU1) + 0x5800);
@ -2620,7 +2729,7 @@ static DRIVER_INIT( scorpion )
static DRIVER_INIT( anteater ) static DRIVER_INIT( anteater )
{ {
/* video extensions */ /* video extensions */
konami_common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL); common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL);
/* decode graphics */ /* decode graphics */
decode_anteater_gfx(); decode_anteater_gfx();

8
src/mame/drivers/galdrvr.c
View File

@ -4737,16 +4737,16 @@ GAME( 1982, amidaru, amidar, turtles, amidaru, turtles, ROT90, "Konami (S
GAME( 1982, amidaro, amidar, turtles, amidaro, turtles, ROT90, "Konami (Olympia license)", "Amidar (Olympia)", GAME_SUPPORTS_SAVE ) GAME( 1982, amidaro, amidar, turtles, amidaro, turtles, ROT90, "Konami (Olympia license)", "Amidar (Olympia)", GAME_SUPPORTS_SAVE )
GAME( 1982, amidarb, amidar, turtles, amidaru, turtles, ROT90, "bootleg", "Amidar (Bootleg)", GAME_SUPPORTS_SAVE ) /* Simular to Amigo bootleg */ GAME( 1982, amidarb, amidar, turtles, amidaru, turtles, ROT90, "bootleg", "Amidar (Bootleg)", GAME_SUPPORTS_SAVE ) /* Simular to Amigo bootleg */
GAME( 1982, amigo, amidar, turtles, amidaru, turtles, ROT90, "bootleg", "Amigo", GAME_SUPPORTS_SAVE ) GAME( 1982, amigo, amidar, turtles, amidaru, turtles, ROT90, "bootleg", "Amigo", GAME_SUPPORTS_SAVE )
GAME( 1982, amidars, amidar, theend, amidars, scramble, ROT90, "Konami", "Amidar (Scramble hardware)", GAME_SUPPORTS_SAVE ) GAME( 1982, amidars, amidar, scramble, amidars, scramble, ROT90, "Konami", "Amidar (Scramble hardware)", GAME_SUPPORTS_SAVE )
/* The End/Scramble based hardware */ /* The End/Scramble based hardware */
GAME( 1980, theend, 0, theend, theend, theend, ROT90, "Konami", "The End", GAME_SUPPORTS_SAVE ) GAME( 1980, theend, 0, theend, theend, theend, ROT90, "Konami", "The End", GAME_SUPPORTS_SAVE )
GAME( 1980, theends, theend, theend, theend, theend, ROT90, "[Konami] (Stern license)", "The End (Stern)", GAME_SUPPORTS_SAVE ) GAME( 1980, theends, theend, theend, theend, theend, ROT90, "[Konami] (Stern license)", "The End (Stern)", GAME_SUPPORTS_SAVE )
GAME( 1981, scramble, 0, theend, scramble, scramble, ROT90, "Konami", "Scramble", GAME_SUPPORTS_SAVE ) GAME( 1981, scramble, 0, scramble, scramble, scramble, ROT90, "Konami", "Scramble", GAME_SUPPORTS_SAVE )
GAME( 1981, scrambls, scramble, theend, scramble, scramble, ROT90, "[Konami] (Stern license)", "Scramble (Stern)", GAME_SUPPORTS_SAVE ) GAME( 1981, scrambls, scramble, scramble, scramble, scramble, ROT90, "[Konami] (Stern license)", "Scramble (Stern)", GAME_SUPPORTS_SAVE )
GAME( 1981, strfbomb, scramble, theend, strfbomb, scramble, ROT90, "Omni", "Strafe Bomb", GAME_SUPPORTS_SAVE ) GAME( 1981, strfbomb, scramble, scramble, strfbomb, scramble, ROT90, "Omni", "Strafe Bomb", GAME_SUPPORTS_SAVE )
GAME( 1981, explorer, scramble, explorer, explorer, explorer, ROT90, "bootleg", "Explorer", GAME_SUPPORTS_SAVE ) GAME( 1981, explorer, scramble, explorer, explorer, explorer, ROT90, "bootleg", "Explorer", GAME_SUPPORTS_SAVE )
GAME( 1981, atlantis, 0, theend, atlantis, atlantis, ROT90, "Comsoft", "Battle of Atlantis (set 1)", GAME_SUPPORTS_SAVE ) GAME( 1981, atlantis, 0, theend, atlantis, atlantis, ROT90, "Comsoft", "Battle of Atlantis (set 1)", GAME_SUPPORTS_SAVE )

81
src/mame/drivers/getrivia.c
View File

@ -233,8 +233,8 @@ static ADDRESS_MAP_START( getrivia_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x2000, 0x3fff) AM_ROMBANK(1) AM_RANGE(0x2000, 0x3fff) AM_ROMBANK(1)
AM_RANGE(0x4000, 0x47ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size) AM_RANGE(0x4000, 0x47ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x4800, 0x4803) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0x4800, 0x4803) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0x5000, 0x5003) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE(0x5000, 0x5003) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0x600f, 0x600f) AM_WRITE(banksel_5_1_w) AM_RANGE(0x600f, 0x600f) AM_WRITE(banksel_5_1_w)
AM_RANGE(0x6017, 0x6017) AM_WRITE(banksel_4_1_w) AM_RANGE(0x6017, 0x6017) AM_WRITE(banksel_4_1_w)
AM_RANGE(0x601b, 0x601b) AM_WRITE(banksel_3_1_w) AM_RANGE(0x601b, 0x601b) AM_WRITE(banksel_3_1_w)
@ -259,8 +259,8 @@ static ADDRESS_MAP_START( gselect_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x4401, 0x4401) AM_WRITE(banksel_1_2_w) AM_RANGE(0x4401, 0x4401) AM_WRITE(banksel_1_2_w)
AM_RANGE(0x4402, 0x4402) AM_WRITE(banksel_2_1_w) AM_RANGE(0x4402, 0x4402) AM_WRITE(banksel_2_1_w)
AM_RANGE(0x4403, 0x4403) AM_WRITE(banksel_2_2_w) AM_RANGE(0x4403, 0x4403) AM_WRITE(banksel_2_2_w)
AM_RANGE(0x4800, 0x4803) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0x4800, 0x4803) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0x5000, 0x5003) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE(0x5000, 0x5003) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0x8000, 0x8002) AM_WRITE(SMH_RAM) AM_BASE(&drawctrl) AM_RANGE(0x8000, 0x8002) AM_WRITE(SMH_RAM) AM_BASE(&drawctrl)
AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(getrivia_bitmap_w) AM_BASE(&videoram) AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(getrivia_bitmap_w) AM_BASE(&videoram)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -270,8 +270,8 @@ static ADDRESS_MAP_START( amuse_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x2000, 0x3fff) AM_ROMBANK(1) AM_RANGE(0x2000, 0x3fff) AM_ROMBANK(1)
AM_RANGE(0x4000, 0x47ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size) AM_RANGE(0x4000, 0x47ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x4800, 0x4803) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0x4800, 0x4803) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0x5000, 0x5003) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE(0x5000, 0x5003) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0x606f, 0x606f) AM_WRITE(banksel_5_1_w) AM_RANGE(0x606f, 0x606f) AM_WRITE(banksel_5_1_w)
AM_RANGE(0x6077, 0x6077) AM_WRITE(banksel_4_1_w) AM_RANGE(0x6077, 0x6077) AM_WRITE(banksel_4_1_w)
AM_RANGE(0x607b, 0x607b) AM_WRITE(banksel_3_1_w) AM_RANGE(0x607b, 0x607b) AM_WRITE(banksel_3_1_w)
@ -286,8 +286,8 @@ static ADDRESS_MAP_START( gepoker_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x2000, 0x3fff) AM_ROMBANK(1) AM_RANGE(0x2000, 0x3fff) AM_ROMBANK(1)
AM_RANGE(0x4000, 0x47ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size) AM_RANGE(0x4000, 0x47ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0x4800, 0x4803) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0x4800, 0x4803) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0x5000, 0x5003) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE(0x5000, 0x5003) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0x60ef, 0x60ef) AM_WRITE(banksel_3_1_w) AM_RANGE(0x60ef, 0x60ef) AM_WRITE(banksel_3_1_w)
AM_RANGE(0x60f7, 0x60f7) AM_WRITE(banksel_2_2_w) AM_RANGE(0x60f7, 0x60f7) AM_WRITE(banksel_2_2_w)
AM_RANGE(0x60fb, 0x60fb) AM_WRITE(banksel_2_1_w) AM_RANGE(0x60fb, 0x60fb) AM_WRITE(banksel_2_1_w)
@ -418,38 +418,53 @@ INPUT_PORTS_END
static const ppi8255_interface getrivia_ppi8255_intf = static const ppi8255_interface getrivia_ppi8255_intf[2] =
{ {
2, /* 2 chips */ {
{ input_port_0_r, input_port_2_r }, /* Port A read */ input_port_0_r, /* Port A read */
{ port1_r, NULL }, /* Port B read */ port1_r, /* Port B read */
{ NULL, NULL }, /* Port C read */ NULL, /* Port C read */
{ NULL, NULL }, /* Port A write */ NULL, /* Port A write */
{ NULL, lamps_w }, /* Port B write */ NULL, /* Port B write */
{ sound_w, lamps2_w }, /* Port C write */ sound_w /* Port C write */
},
{
input_port_2_r, /* Port A read */
NULL, /* Port B read */
NULL, /* Port C read */
NULL, /* Port A write */
lamps_w, /* Port B write */
lamps2_w /* Port C write */
}
}; };
static const ppi8255_interface gselect_ppi8255_intf = static const ppi8255_interface gselect_ppi8255_intf[2] =
{ {
2, /* 2 chips */ {
{ input_port_0_r, input_port_2_r }, /* Port A read */ input_port_0_r, /* Port A read */
{ input_port_1_r, NULL }, /* Port B read */ input_port_1_r, /* Port B read */
{ NULL, input_port_3_r }, /* Port C read */ NULL, /* Port C read */
{ NULL, NULL }, /* Port A write */ NULL, /* Port A write */
{ NULL, lamps_w }, /* Port B write */ NULL, /* Port B write */
{ sound2_w, nmi_w }, /* Port C write */ sound2_w /* Port C write */
},
{
input_port_2_r, /* Port A read */
NULL, /* Port B read */
input_port_3_r, /* Port C read */
NULL, /* Port A write */
lamps_w, /* Port B write */
nmi_w /* Port C write */
}
}; };
static MACHINE_RESET( getrivia ) static MACHINE_RESET( getrivia )
{ {
ppi8255_init(&getrivia_ppi8255_intf);
ticket_dispenser_init(100, 1, 1); ticket_dispenser_init(100, 1, 1);
} }
static MACHINE_RESET( gselect ) static MACHINE_RESET( gselect )
{ {
ppi8255_init(&gselect_ppi8255_intf);
} }
static MACHINE_DRIVER_START( getrivia ) static MACHINE_DRIVER_START( getrivia )
@ -473,6 +488,12 @@ static MACHINE_DRIVER_START( getrivia )
MDRV_VIDEO_START(generic_bitmapped) MDRV_VIDEO_START(generic_bitmapped)
MDRV_VIDEO_UPDATE(generic_bitmapped) MDRV_VIDEO_UPDATE(generic_bitmapped)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( getrivia_ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( getrivia_ppi8255_intf[1] )
/* sound hardware */ /* sound hardware */
MDRV_SPEAKER_STANDARD_MONO("mono") MDRV_SPEAKER_STANDARD_MONO("mono")
@ -489,6 +510,12 @@ static MACHINE_DRIVER_START( gselect )
MDRV_CPU_PROGRAM_MAP(gselect_map,0) MDRV_CPU_PROGRAM_MAP(gselect_map,0)
MDRV_MACHINE_RESET(gselect) MDRV_MACHINE_RESET(gselect)
MDRV_DEVICE_MODIFY( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( gselect_ppi8255_intf[0] )
MDRV_DEVICE_MODIFY( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( gselect_ppi8255_intf[1] )
MACHINE_DRIVER_END MACHINE_DRIVER_END
static MACHINE_DRIVER_START( amuse ) static MACHINE_DRIVER_START( amuse )

19
src/mame/drivers/homerun.c
View File

@ -36,19 +36,17 @@ static WRITE8_HANDLER(pc_w){homerun_xpc=data;}
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf =
{ {
1, NULL,
{ 0 }, NULL,
{ 0 }, NULL,
{ 0 }, pa_w,
{ pa_w }, pb_w,
{ pb_w }, pc_w
{ pc_w },
}; };
static MACHINE_RESET( homerun ) static MACHINE_RESET( homerun )
{ {
ppi8255_init(&ppi8255_intf);
} }
static const gfx_layout gfxlayout = static const gfx_layout gfxlayout =
@ -101,7 +99,7 @@ static ADDRESS_MAP_START( homerun_iomap, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff) ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x10, 0x10) AM_WRITE(SMH_NOP) /* ?? */ AM_RANGE(0x10, 0x10) AM_WRITE(SMH_NOP) /* ?? */
AM_RANGE(0x20, 0x20) AM_WRITE(SMH_NOP) /* ?? */ AM_RANGE(0x20, 0x20) AM_WRITE(SMH_NOP) /* ?? */
AM_RANGE(0x30, 0x33) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0x30, 0x33) AM_DEVREADWRITE(PPI8255, "ppi8255", ppi8255_r, ppi8255_w)
AM_RANGE(0x40, 0x40) AM_READ(homerun_40_r) AM_RANGE(0x40, 0x40) AM_READ(homerun_40_r)
AM_RANGE(0x50, 0x50) AM_READ(input_port_2_r) AM_RANGE(0x50, 0x50) AM_READ(input_port_2_r)
AM_RANGE(0x60, 0x60) AM_READ(input_port_1_r) AM_RANGE(0x60, 0x60) AM_READ(input_port_1_r)
@ -193,6 +191,9 @@ static MACHINE_DRIVER_START( homerun )
MDRV_MACHINE_RESET(homerun) MDRV_MACHINE_RESET(homerun)
MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf )
/* video hardware */ /* video hardware */
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_REFRESH_RATE(60)

32
src/mame/drivers/imolagp.c
View File

@ -392,6 +392,18 @@ static INTERRUPT_GEN( master_interrupt )
} }
} /* master_interrupt */ } /* master_interrupt */
static const ppi8255_interface ppi8255_intf =
{
NULL, /* Port A read */
NULL, /* Port B read */
NULL, /* Port C read */
NULL, /* Port A write */
NULL, /* Port B write */
NULL /* Port C write */
};
static MACHINE_DRIVER_START( imolagp ) static MACHINE_DRIVER_START( imolagp )
MDRV_CPU_ADD(Z80,8000000) /* ? */ MDRV_CPU_ADD(Z80,8000000) /* ? */
MDRV_CPU_PROGRAM_MAP(imolagp_master,0) MDRV_CPU_PROGRAM_MAP(imolagp_master,0)
@ -405,6 +417,9 @@ static MACHINE_DRIVER_START( imolagp )
MDRV_INTERLEAVE(100) MDRV_INTERLEAVE(100)
MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf )
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_REFRESH_RATE(60)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */) MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
@ -513,21 +528,6 @@ ROM_START( imolagp )
ROM_LOAD( "xe.bin", 0x3c00, 0x400, CRC(e0e81120) SHA1(14a77dfd069be342df4dbb1b747443c6d121d3fe) ) // ? car+misc ROM_LOAD( "xe.bin", 0x3c00, 0x400, CRC(e0e81120) SHA1(14a77dfd069be342df4dbb1b747443c6d121d3fe) ) // ? car+misc
ROM_END ROM_END
static const ppi8255_interface ppi8255_intf =
{
1, /* 1 chips */
{0}, /* Port A read */
{0}, /* Port B read */
{0}, /* Port C read */
{0}, /* Port A write */
{0}, /* Port B write */
{0}, /* Port C write */
};
static DRIVER_INIT( imolagp )
{
ppi8255_init(&ppi8255_intf);
}
/* YEAR, NAME, PARENT, MACHINE, INPUT, INIT, MONITOR, COMPANY, FULLNAME */ /* YEAR, NAME, PARENT, MACHINE, INPUT, INIT, MONITOR, COMPANY, FULLNAME */
GAME( 1981,imolagp, 0, imolagp, imolagp, imolagp, ROT90, "Alberici", "Imola Grand Prix", GAME_WRONG_COLORS ) GAME( 1981,imolagp, 0, imolagp, imolagp, 0, ROT90, "Alberici", "Imola Grand Prix", GAME_WRONG_COLORS )

36
src/mame/drivers/iqblock.c
View File

@ -113,21 +113,14 @@ static WRITE8_HANDLER( port_C_w )
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf =
{ {
1, /* 1 chip */ input_port_0_r, /* Port A read */
{ input_port_0_r }, /* Port A read */ input_port_1_r, /* Port B read */
{ input_port_1_r }, /* Port B read */ input_port_2_r, /* Port C read */
{ input_port_2_r }, /* Port C read */ NULL, /* Port A write */
{ 0 }, /* Port A write */ NULL, /* Port B write */
{ 0 }, /* Port B write */ port_C_w /* Port C write */
{ port_C_w }, /* Port C write */
}; };
static MACHINE_RESET( iqblock )
{
ppi8255_init(&ppi8255_intf);
}
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xefff) AM_ROM AM_RANGE(0x0000, 0xefff) AM_ROM
@ -141,8 +134,8 @@ static ADDRESS_MAP_START( main_portmap, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x6000, 0x603f) AM_WRITE(iqblock_fgscroll_w) AM_RANGE(0x6000, 0x603f) AM_WRITE(iqblock_fgscroll_w)
AM_RANGE(0x6800, 0x69ff) AM_WRITE(iqblock_fgvideoram_w) /* initialized up to 6fff... bug or larger tilemap? */ AM_RANGE(0x6800, 0x69ff) AM_WRITE(iqblock_fgvideoram_w) /* initialized up to 6fff... bug or larger tilemap? */
AM_RANGE(0x7000, 0x7fff) AM_WRITE(iqblock_bgvideoram_w) AM_RANGE(0x7000, 0x7fff) AM_WRITE(iqblock_bgvideoram_w)
AM_RANGE(0x5080, 0x5083) AM_WRITE(ppi8255_0_w) AM_RANGE(0x5080, 0x5083) AM_DEVWRITE(PPI8255, "ppi8255", ppi8255_w)
AM_RANGE(0x5080, 0x5083) AM_READ(ppi8255_0_r) AM_RANGE(0x5080, 0x5083) AM_DEVREAD(PPI8255, "ppi8255", ppi8255_r)
AM_RANGE(0x5090, 0x5090) AM_READ(input_port_3_r) AM_RANGE(0x5090, 0x5090) AM_READ(input_port_3_r)
AM_RANGE(0x50a0, 0x50a0) AM_READ(input_port_4_r) AM_RANGE(0x50a0, 0x50a0) AM_READ(input_port_4_r)
AM_RANGE(0x50b0, 0x50b0) AM_WRITE(YM2413_register_port_0_w) // UM3567_register_port_0_w AM_RANGE(0x50b0, 0x50b0) AM_WRITE(YM2413_register_port_0_w) // UM3567_register_port_0_w
@ -158,8 +151,8 @@ static ADDRESS_MAP_START( pokerigs_portmap, ADDRESS_SPACE_IO, 8 )
// AM_RANGE(0x6000, 0x603f) AM_WRITE(iqblock_fgscroll_w) // AM_RANGE(0x6000, 0x603f) AM_WRITE(iqblock_fgscroll_w)
// AM_RANGE(0x6800, 0x69ff) AM_WRITE(iqblock_fgvideoram_w) // AM_RANGE(0x6800, 0x69ff) AM_WRITE(iqblock_fgvideoram_w)
AM_RANGE(0x7000, 0x7fff) AM_WRITE(iqblock_bgvideoram_w) AM_RANGE(0x7000, 0x7fff) AM_WRITE(iqblock_bgvideoram_w)
AM_RANGE(0x5080, 0x5083) AM_WRITE(ppi8255_0_w) AM_RANGE(0x5080, 0x5083) AM_DEVWRITE(PPI8255, "ppi8255", ppi8255_w)
AM_RANGE(0x5080, 0x5083) AM_READ(ppi8255_0_r) AM_RANGE(0x5080, 0x5083) AM_DEVREAD(PPI8255, "ppi8255", ppi8255_r)
AM_RANGE(0x5090, 0x5090) AM_READ(input_port_3_r) AM_WRITENOP AM_RANGE(0x5090, 0x5090) AM_READ(input_port_3_r) AM_WRITENOP
AM_RANGE(0x5091, 0x5091) AM_READNOP AM_WRITENOP AM_RANGE(0x5091, 0x5091) AM_READNOP AM_WRITENOP
AM_RANGE(0x50a0, 0x50a0) AM_READ(input_port_4_r) AM_RANGE(0x50a0, 0x50a0) AM_READ(input_port_4_r)
@ -308,7 +301,8 @@ static MACHINE_DRIVER_START( iqblock )
MDRV_CPU_IO_MAP(main_portmap,0) MDRV_CPU_IO_MAP(main_portmap,0)
MDRV_CPU_VBLANK_INT_HACK(iqblock_interrupt,16) MDRV_CPU_VBLANK_INT_HACK(iqblock_interrupt,16)
MDRV_MACHINE_RESET(iqblock) MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf )
/* video hardware */ /* video hardware */
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)
@ -339,7 +333,8 @@ static MACHINE_DRIVER_START( cabaret )
MDRV_CPU_IO_MAP(main_portmap,0) MDRV_CPU_IO_MAP(main_portmap,0)
MDRV_CPU_VBLANK_INT_HACK(iqblock_interrupt,16) MDRV_CPU_VBLANK_INT_HACK(iqblock_interrupt,16)
MDRV_MACHINE_RESET(iqblock) MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf )
/* video hardware */ /* video hardware */
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)
@ -370,7 +365,8 @@ static MACHINE_DRIVER_START( pokerigs )
MDRV_CPU_IO_MAP(pokerigs_portmap,0) MDRV_CPU_IO_MAP(pokerigs_portmap,0)
MDRV_CPU_VBLANK_INT_HACK(iqblock_interrupt,16) MDRV_CPU_VBLANK_INT_HACK(iqblock_interrupt,16)
MDRV_MACHINE_RESET(iqblock) MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf )
/* video hardware */ /* video hardware */
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)

50
src/mame/drivers/lordgun.c
View File

@ -152,11 +152,9 @@ static WRITE16_HANDLER( lordgun_priority_w )
// popmessage("PR: %04x", data); // popmessage("PR: %04x", data);
} }
static READ16_HANDLER( lordgun_ppi8255_0_r ) { return ppi8255_0_r(machine, offset); } static READ16_DEVICE_HANDLER( lordgun_ppi8255_r ) { return ppi8255_r(device, offset); }
static READ16_HANDLER( lordgun_ppi8255_1_r ) { return ppi8255_1_r(machine, offset); }
static WRITE16_HANDLER( lordgun_ppi8255_0_w ) { ppi8255_0_w(machine, offset, data & 0xff); } static WRITE16_DEVICE_HANDLER( lordgun_ppi8255_w ) { ppi8255_w(device, offset, data & 0xff); }
static WRITE16_HANDLER( lordgun_ppi8255_1_w ) { ppi8255_1_w(machine, offset, data & 0xff); }
static READ16_HANDLER( lordgun_gun_0_x_r ) { return lordgun_gun[0].hw_x; } static READ16_HANDLER( lordgun_gun_0_x_r ) { return lordgun_gun[0].hw_x; }
static READ16_HANDLER( lordgun_gun_0_y_r ) { return lordgun_gun[0].hw_y; } static READ16_HANDLER( lordgun_gun_0_y_r ) { return lordgun_gun[0].hw_y; }
@ -197,8 +195,8 @@ static ADDRESS_MAP_START( lordgun_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x503c00, 0x503c01) AM_READ(lordgun_gun_0_y_r) AM_RANGE(0x503c00, 0x503c01) AM_READ(lordgun_gun_0_y_r)
AM_RANGE(0x503e00, 0x503e01) AM_READ(lordgun_gun_1_y_r) AM_RANGE(0x503e00, 0x503e01) AM_READ(lordgun_gun_1_y_r)
AM_RANGE(0x504000, 0x504001) AM_WRITE(lordgun_soundlatch_w) AM_RANGE(0x504000, 0x504001) AM_WRITE(lordgun_soundlatch_w)
AM_RANGE(0x506000, 0x506007) AM_READWRITE(lordgun_ppi8255_0_r, lordgun_ppi8255_0_w) AM_RANGE(0x506000, 0x506007) AM_DEVREADWRITE(PPI8255, "ppi8255_0", lordgun_ppi8255_r, lordgun_ppi8255_w)
AM_RANGE(0x508000, 0x508007) AM_READWRITE(lordgun_ppi8255_1_r, lordgun_ppi8255_1_w) AM_RANGE(0x508000, 0x508007) AM_DEVREADWRITE(PPI8255, "ppi8255_1", lordgun_ppi8255_r, lordgun_ppi8255_w)
AM_RANGE(0x50a900, 0x50a9ff) AM_RAM // protection AM_RANGE(0x50a900, 0x50a9ff) AM_RAM // protection
ADDRESS_MAP_END ADDRESS_MAP_END
@ -224,8 +222,8 @@ static ADDRESS_MAP_START( hfh_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x502e00, 0x502e01) AM_WRITE(SMH_RAM) AM_BASE(&lordgun_scroll_y_3) AM_RANGE(0x502e00, 0x502e01) AM_WRITE(SMH_RAM) AM_BASE(&lordgun_scroll_y_3)
AM_RANGE(0x503000, 0x503001) AM_WRITE(lordgun_priority_w) AM_RANGE(0x503000, 0x503001) AM_WRITE(lordgun_priority_w)
AM_RANGE(0x504000, 0x504001) AM_WRITE(lordgun_soundlatch_w) AM_RANGE(0x504000, 0x504001) AM_WRITE(lordgun_soundlatch_w)
AM_RANGE(0x506000, 0x506007) AM_READWRITE(lordgun_ppi8255_0_r, lordgun_ppi8255_0_w) AM_RANGE(0x506000, 0x506007) AM_DEVREADWRITE(PPI8255, "ppi8255_0", lordgun_ppi8255_r, lordgun_ppi8255_w)
AM_RANGE(0x508000, 0x508007) AM_READWRITE(lordgun_ppi8255_1_r, lordgun_ppi8255_1_w) AM_RANGE(0x508000, 0x508007) AM_DEVREADWRITE(PPI8255, "ppi8255_1", lordgun_ppi8255_r, lordgun_ppi8255_w)
AM_RANGE(0x50b900, 0x50b9ff) AM_RAM // protection AM_RANGE(0x50b900, 0x50b9ff) AM_RAM // protection
ADDRESS_MAP_END ADDRESS_MAP_END
@ -409,22 +407,26 @@ INPUT_PORTS_END
***************************************************************************/ ***************************************************************************/
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf[2] =
{ {
2, // 2 chips {
{ lordgun_eeprom_r, input_port_1_r }, // Port A read lordgun_eeprom_r, // Port A read
{ 0, input_port_2_r }, // Port B read NULL, // Port B read
{ input_port_3_r, input_port_4_r }, // Port C read input_port_3_r, // Port C read
{ fake_w, fake_w }, // Port A write fake_w, // Port A write
{ lordgun_eeprom_w, fake_w }, // Port B write lordgun_eeprom_w, // Port B write
{ fake2_w, fake_w }, // Port C write fake2_w // Port C write
},
{
input_port_1_r, // Port A read
input_port_2_r, // Port B read
input_port_4_r, // Port C read
fake_w, // Port A write
fake_w, // Port B write
fake_w // Port C write
}
}; };
static MACHINE_RESET( lordgun )
{
ppi8255_init(&ppi8255_intf);
}
static void soundirq(int state) static void soundirq(int state)
{ {
cpunum_set_input_line(Machine, 1, 0, state); cpunum_set_input_line(Machine, 1, 0, state);
@ -444,7 +446,11 @@ static MACHINE_DRIVER_START( lordgun )
MDRV_CPU_PROGRAM_MAP(lordgun_soundmem_map,0) MDRV_CPU_PROGRAM_MAP(lordgun_soundmem_map,0)
MDRV_CPU_IO_MAP(lordgun_soundio_map,0) MDRV_CPU_IO_MAP(lordgun_soundio_map,0)
MDRV_MACHINE_RESET(lordgun) MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[1] )
MDRV_NVRAM_HANDLER(93C46) MDRV_NVRAM_HANDLER(93C46)

57
src/mame/drivers/merit.c
View File

@ -191,8 +191,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( bigappg_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( bigappg_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROM AM_RANGE(0x0000, 0x5fff) AM_ROM
AM_RANGE(0xa000, 0xafff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size) AM_RANGE(0xa000, 0xafff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0xc004, 0xc007) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0xc004, 0xc007) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0xc008, 0xc00b) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE(0xc008, 0xc00b) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0xe000, 0xe001) AM_WRITENOP // 6845 crt AM_RANGE(0xe000, 0xe001) AM_WRITENOP // 6845 crt
AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(phrcraze_attr_w) AM_BASE(&phrcraze_attr) AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(phrcraze_attr_w) AM_BASE(&phrcraze_attr)
AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(phrcraze_bg_w) AM_BASE(&videoram) AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(phrcraze_bg_w) AM_BASE(&videoram)
@ -206,8 +206,8 @@ static ADDRESS_MAP_START( trvwhiz_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x5400, 0x54ff) AM_WRITE(low_offset_w) AM_RANGE(0x5400, 0x54ff) AM_WRITE(low_offset_w)
AM_RANGE(0x5800, 0x58ff) AM_WRITE(med_offset_w) AM_RANGE(0x5800, 0x58ff) AM_WRITE(med_offset_w)
AM_RANGE(0x6000, 0x67ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size) AM_RANGE(0x6000, 0x67ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0xa000, 0xa003) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0xa000, 0xa003) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0xc000, 0xc003) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE(0xc000, 0xc003) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0xe000, 0xe001) AM_WRITENOP // 6845 crt AM_RANGE(0xe000, 0xe001) AM_WRITENOP // 6845 crt
AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(phrcraze_attr_w) AM_BASE(&phrcraze_attr) AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(phrcraze_attr_w) AM_BASE(&phrcraze_attr)
AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(phrcraze_bg_w) AM_BASE(&videoram) AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(phrcraze_bg_w) AM_BASE(&videoram)
@ -223,8 +223,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( phrcraze_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( phrcraze_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0xa000, 0xbfff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size) AM_RANGE(0xa000, 0xbfff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0xc008, 0xc00b) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE(0xc008, 0xc00b) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0xc00c, 0xc00f) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0xc00c, 0xc00f) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0xce00, 0xceff) AM_READWRITE(questions_r, high_offset_w) AM_RANGE(0xce00, 0xceff) AM_READWRITE(questions_r, high_offset_w)
AM_RANGE(0xd600, 0xd6ff) AM_WRITE(low_offset_w) AM_RANGE(0xd600, 0xd6ff) AM_WRITE(low_offset_w)
AM_RANGE(0xda00, 0xdaff) AM_WRITE(med_offset_w) AM_RANGE(0xda00, 0xdaff) AM_WRITE(med_offset_w)
@ -243,8 +243,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( tictac_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( tictac_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x9fff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size) AM_RANGE(0x8000, 0x9fff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0xc004, 0xc007) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0xc004, 0xc007) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0xc008, 0xc00b) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE(0xc008, 0xc00b) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0xce00, 0xceff) AM_READWRITE(questions_r, high_offset_w) AM_RANGE(0xce00, 0xceff) AM_READWRITE(questions_r, high_offset_w)
AM_RANGE(0xd600, 0xd6ff) AM_WRITE(low_offset_w) AM_RANGE(0xd600, 0xd6ff) AM_WRITE(low_offset_w)
AM_RANGE(0xda00, 0xdaff) AM_WRITE(med_offset_w) AM_RANGE(0xda00, 0xdaff) AM_WRITE(med_offset_w)
@ -263,8 +263,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( trvwhziv_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( trvwhziv_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0xa000, 0xbfff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size) AM_RANGE(0xa000, 0xbfff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
AM_RANGE(0xc004, 0xc007) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0xc004, 0xc007) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0xc008, 0xc00b) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE(0xc008, 0xc00b) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0xce00, 0xceff) AM_READWRITE(questions_r, high_offset_w) AM_RANGE(0xce00, 0xceff) AM_READWRITE(questions_r, high_offset_w)
AM_RANGE(0xd600, 0xd6ff) AM_WRITE(low_offset_w) AM_RANGE(0xd600, 0xd6ff) AM_WRITE(low_offset_w)
AM_RANGE(0xda00, 0xdaff) AM_WRITE(med_offset_w) AM_RANGE(0xda00, 0xdaff) AM_WRITE(med_offset_w)
@ -770,15 +770,24 @@ static GFXDECODE_START( merit )
GFXDECODE_ENTRY( REGION_GFX2, 8, tiles8x8x1_layout, 0, 128 ) // flipped tiles GFXDECODE_ENTRY( REGION_GFX2, 8, tiles8x8x1_layout, 0, 128 ) // flipped tiles
GFXDECODE_END GFXDECODE_END
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf[2] =
{ {
2, /* 2 chips */ {
{ input_port_0_r, input_port_3_r }, /* Port A read */ input_port_0_r, /* Port A read */
{ input_port_1_r, NULL }, /* Port B read */ input_port_1_r, /* Port B read */
{ input_port_2_r, NULL }, /* Port C read */ input_port_2_r, /* Port C read */
{ NULL, NULL }, /* Port A write */ NULL, /* Port A write */
{ NULL, led1_w }, /* Port B write */ NULL, /* Port B write */
{ NULL, misc_w }, /* Port C write */ NULL /* Port C write */
},
{
input_port_3_r, /* Port A read */
NULL, /* Port B read */
NULL, /* Port C read */
NULL, /* Port A write */
led1_w, /* Port B write */
misc_w /* Port C write */
}
}; };
static const struct AY8910interface merit_ay8912_interface = static const struct AY8910interface merit_ay8912_interface =
@ -787,11 +796,6 @@ static const struct AY8910interface merit_ay8912_interface =
led2_w,0 led2_w,0
}; };
static MACHINE_RESET( merit )
{
ppi8255_init(&ppi8255_intf);
}
static MACHINE_DRIVER_START( pitboss ) static MACHINE_DRIVER_START( pitboss )
MDRV_CPU_ADD_TAG("main",Z80,2500000) /* ?? */ MDRV_CPU_ADD_TAG("main",Z80,2500000) /* ?? */
@ -800,7 +804,12 @@ static MACHINE_DRIVER_START( pitboss )
MDRV_CPU_VBLANK_INT("main", irq0_line_hold) MDRV_CPU_VBLANK_INT("main", irq0_line_hold)
MDRV_NVRAM_HANDLER(generic_0fill) MDRV_NVRAM_HANDLER(generic_0fill)
MDRV_MACHINE_RESET(merit)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)

38
src/mame/drivers/meritm.c
View File

@ -696,7 +696,7 @@ static ADDRESS_MAP_START( meritm_crt250_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x21, 0x21) AM_READWRITE(v9938_1_status_r, v9938_1_command_w) AM_RANGE(0x21, 0x21) AM_READWRITE(v9938_1_status_r, v9938_1_command_w)
AM_RANGE(0x22, 0x22) AM_WRITE(v9938_1_palette_w) AM_RANGE(0x22, 0x22) AM_WRITE(v9938_1_palette_w)
AM_RANGE(0x23, 0x23) AM_WRITE(v9938_1_register_w) AM_RANGE(0x23, 0x23) AM_WRITE(v9938_1_register_w)
AM_RANGE(0x30, 0x33) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0x30, 0x33) AM_DEVREADWRITE(PPI8255, "ppi8255", ppi8255_r, ppi8255_w)
AM_RANGE(0x40, 0x43) AM_READWRITE(z80pio_0_r, z80pio_0_w) AM_RANGE(0x40, 0x43) AM_READWRITE(z80pio_0_r, z80pio_0_w)
AM_RANGE(0x50, 0x53) AM_READWRITE(z80pio_1_r, z80pio_1_w) AM_RANGE(0x50, 0x53) AM_READWRITE(z80pio_1_r, z80pio_1_w)
AM_RANGE(0x80, 0x80) AM_READWRITE(AY8910_read_port_0_r, AY8910_control_port_0_w) AM_RANGE(0x80, 0x80) AM_READWRITE(AY8910_read_port_0_r, AY8910_control_port_0_w)
@ -722,7 +722,7 @@ static ADDRESS_MAP_START( meritm_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x21, 0x21) AM_READWRITE(v9938_1_status_r, v9938_1_command_w) AM_RANGE(0x21, 0x21) AM_READWRITE(v9938_1_status_r, v9938_1_command_w)
AM_RANGE(0x22, 0x22) AM_WRITE(v9938_1_palette_w) AM_RANGE(0x22, 0x22) AM_WRITE(v9938_1_palette_w)
AM_RANGE(0x23, 0x23) AM_WRITE(v9938_1_register_w) AM_RANGE(0x23, 0x23) AM_WRITE(v9938_1_register_w)
AM_RANGE(0x30, 0x33) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0x30, 0x33) AM_DEVREADWRITE(PPI8255, "ppi8255", ppi8255_r, ppi8255_w)
AM_RANGE(0x40, 0x43) AM_READWRITE(z80pio_0_r, z80pio_0_w) AM_RANGE(0x40, 0x43) AM_READWRITE(z80pio_0_r, z80pio_0_w)
AM_RANGE(0x50, 0x53) AM_READWRITE(z80pio_1_r, z80pio_1_w) AM_RANGE(0x50, 0x53) AM_READWRITE(z80pio_1_r, z80pio_1_w)
AM_RANGE(0x60, 0x67) AM_READWRITE(pc16552d_0_r,pc16552d_0_w) AM_RANGE(0x60, 0x67) AM_READWRITE(pc16552d_0_r,pc16552d_0_w)
@ -831,24 +831,22 @@ static WRITE8_HANDLER(meritm_crt250_port_b_w)
static const ppi8255_interface crt260_ppi8255_intf = static const ppi8255_interface crt260_ppi8255_intf =
{ {
1, NULL, /* Port A read */
{ 0 }, /* Port A read */ NULL, /* Port B read */
{ 0 }, /* Port B read */ meritm_8255_port_c_r, /* Port C read */
{ meritm_8255_port_c_r }, /* Port C read */ NULL, /* Port A write (used) */
{ 0 }, /* Port A write (used) */ NULL, /* Port B write (used LMP x DRIVE) */
{ 0 }, /* Port B write (used LMP x DRIVE) */ NULL /* Port C write */
{ 0 } /* Port C write */
}; };
static const ppi8255_interface crt250_ppi8255_intf = static const ppi8255_interface crt250_ppi8255_intf =
{ {
1, NULL, /* Port A read */
{ 0 }, /* Port A read */ NULL, /* Port B read */
{ 0 }, /* Port B read */ meritm_8255_port_c_r, /* Port C read */
{ meritm_8255_port_c_r }, /* Port C read */ NULL, /* Port A write (used) */
{ 0 }, /* Port A write (used) */ meritm_crt250_port_b_w, /* Port B write (used LMP x DRIVE) */
{ meritm_crt250_port_b_w }, /* Port B write (used LMP x DRIVE) */ NULL /* Port C write */
{ 0 } /* Port C write */
}; };
/************************************* /*************************************
@ -984,7 +982,6 @@ static MACHINE_START(merit_common)
static MACHINE_START(meritm_crt250) static MACHINE_START(meritm_crt250)
{ {
ppi8255_init(&crt250_ppi8255_intf);
memory_configure_bank(1, 0, 8, memory_region(REGION_CPU1), 0x10000); memory_configure_bank(1, 0, 8, memory_region(REGION_CPU1), 0x10000);
meritm_bank = 0xff; meritm_bank = 0xff;
meritm_crt250_switch_banks(); meritm_crt250_switch_banks();
@ -1001,7 +998,6 @@ static MACHINE_START(meritm_crt250_questions)
static MACHINE_START(meritm_crt260) static MACHINE_START(meritm_crt260)
{ {
ppi8255_init(&crt260_ppi8255_intf);
meritm_ram = auto_malloc( 0x8000 ); meritm_ram = auto_malloc( 0x8000 );
memset( meritm_ram, 0x8000, 0x00 ); memset( meritm_ram, 0x8000, 0x00 );
memory_configure_bank(1, 0, 128, memory_region(REGION_CPU1), 0x8000); memory_configure_bank(1, 0, 128, memory_region(REGION_CPU1), 0x8000);
@ -1047,6 +1043,9 @@ static MACHINE_DRIVER_START(meritm_crt250)
MDRV_MACHINE_START(meritm_crt250) MDRV_MACHINE_START(meritm_crt250)
MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( crt250_ppi8255_intf )
MDRV_NVRAM_HANDLER(generic_0fill) MDRV_NVRAM_HANDLER(generic_0fill)
MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK) MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
@ -1085,6 +1084,9 @@ static MACHINE_DRIVER_START(meritm_crt260)
MDRV_CPU_PROGRAM_MAP(meritm_map,0) MDRV_CPU_PROGRAM_MAP(meritm_map,0)
MDRV_CPU_IO_MAP(meritm_io_map,0) MDRV_CPU_IO_MAP(meritm_io_map,0)
MDRV_DEVICE_MODIFY( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( crt260_ppi8255_intf )
MDRV_WATCHDOG_TIME_INIT(UINT64_ATTOTIME_IN_MSEC(1200)) // DS1232, TD connected to VCC MDRV_WATCHDOG_TIME_INIT(UINT64_ATTOTIME_IN_MSEC(1200)) // DS1232, TD connected to VCC
MDRV_MACHINE_START(meritm_crt260) MDRV_MACHINE_START(meritm_crt260)

49
src/mame/drivers/pipeline.c
View File

@ -219,8 +219,8 @@ static ADDRESS_MAP_START( cpu0_mem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8000, 0x87ff) AM_RAM AM_RANGE(0x8000, 0x87ff) AM_RAM
AM_RANGE(0x8800, 0x97ff) AM_RAM_WRITE(vram1_w) AM_BASE(&vram1) AM_RANGE(0x8800, 0x97ff) AM_RAM_WRITE(vram1_w) AM_BASE(&vram1)
AM_RANGE(0x9800, 0xa7ff) AM_RAM_WRITE(vram2_w) AM_BASE(&vram2) AM_RANGE(0x9800, 0xa7ff) AM_RAM_WRITE(vram2_w) AM_BASE(&vram2)
AM_RANGE(0xb800, 0xb803) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0xb800, 0xb803) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0xb810, 0xb813) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE(0xb810, 0xb813) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0xb830, 0xb830) AM_NOP AM_RANGE(0xb830, 0xb830) AM_NOP
AM_RANGE(0xb840, 0xb840) AM_NOP AM_RANGE(0xb840, 0xb840) AM_NOP
ADDRESS_MAP_END ADDRESS_MAP_END
@ -228,7 +228,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( cpu1_mem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( cpu1_mem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0xc000, 0xc7ff) AM_RAM AM_RANGE(0xc000, 0xc7ff) AM_RAM
AM_RANGE(0xe000, 0xe003) AM_READWRITE(ppi8255_2_r, ppi8255_2_w) AM_RANGE(0xe000, 0xe003) AM_DEVREADWRITE(PPI8255, "ppi8255_2", ppi8255_r, ppi8255_w)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_port, ADDRESS_SPACE_IO, 8 ) static ADDRESS_MAP_START( sound_port, ADDRESS_SPACE_IO, 8 )
@ -307,15 +307,32 @@ static const struct z80_irq_daisy_chain daisy_chain_sound[] =
{ 0, 0, 0, 0, -1 } /* end mark */ { 0, 0, 0, 0, -1 } /* end mark */
}; };
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf[3] =
{ {
3, {
{ input_port_0_r, input_port_1_r, NULL }, /* Port A read */ input_port_0_r, /* Port A read */
{ NULL, input_port_2_r, NULL }, /* Port B read */ NULL, /* Port B read */
{ NULL, protection_r, NULL }, /* Port C read */ NULL, /* Port C read */
{ NULL, NULL, NULL }, /* Port A write */ NULL, /* Port A write */
{ NULL, NULL, NULL }, /* Port B write */ NULL, /* Port B write */
{ vidctrl_w, protection_w, NULL }, /* Port C write */ vidctrl_w /* Port C write */
},
{
input_port_1_r, /* Port A read */
input_port_2_r, /* Port B read */
protection_r, /* Port C read */
NULL, /* Port A write */
NULL, /* Port B write */
protection_w /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
NULL, /* Port C read */
NULL, /* Port A write */
NULL, /* Port B write */
NULL /* Port C write */
}
}; };
static const struct YM2203interface ym2203_interface = static const struct YM2203interface ym2203_interface =
@ -349,7 +366,6 @@ static MACHINE_RESET( pipeline )
{ {
ctc_intf.baseclock = cpunum_get_clock(0); ctc_intf.baseclock = cpunum_get_clock(0);
z80ctc_init(0, &ctc_intf); z80ctc_init(0, &ctc_intf);
ppi8255_init(&ppi8255_intf);
} }
static MACHINE_DRIVER_START( pipeline ) static MACHINE_DRIVER_START( pipeline )
@ -367,6 +383,15 @@ static MACHINE_DRIVER_START( pipeline )
MDRV_CPU_ADD(M68705, 7372800/2) MDRV_CPU_ADD(M68705, 7372800/2)
MDRV_CPU_PROGRAM_MAP(mcu_mem, 0) MDRV_CPU_PROGRAM_MAP(mcu_mem, 0)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[1] )
MDRV_DEVICE_ADD( "ppi8255_2", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[2] )
/* video hardware */ /* video hardware */
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_REFRESH_RATE(60)

196
src/mame/drivers/scobra.c
View File

@ -88,44 +88,24 @@ static const struct AY8910interface hustler_ay8910_interface =
frogger_portB_r frogger_portB_r
}; };
static READ8_HANDLER(scobra_type2_ppi8255_0_r) static READ8_DEVICE_HANDLER(scobra_type2_ppi8255_r)
{ {
return ppi8255_0_r(machine, offset >> 2); return ppi8255_r(device, offset >> 2);
} }
static READ8_HANDLER(scobra_type2_ppi8255_1_r) static WRITE8_DEVICE_HANDLER(scobra_type2_ppi8255_w)
{ {
return ppi8255_1_r(machine, offset >> 2); ppi8255_w(device, offset >> 2, data);
} }
static WRITE8_HANDLER(scobra_type2_ppi8255_0_w) static READ8_DEVICE_HANDLER(hustler_ppi8255_r)
{ {
ppi8255_0_w(machine, offset >> 2, data); return ppi8255_r(device, offset >> 3);
} }
static WRITE8_HANDLER(scobra_type2_ppi8255_1_w) static WRITE8_DEVICE_HANDLER(hustler_ppi8255_w)
{ {
ppi8255_1_w(machine, offset >> 2, data); ppi8255_w(device, offset >> 3, data);
}
static READ8_HANDLER(hustler_ppi8255_0_r)
{
return ppi8255_0_r(machine, offset >> 3);
}
static READ8_HANDLER(hustler_ppi8255_1_r)
{
return ppi8255_1_r(machine, offset >> 3);
}
static WRITE8_HANDLER(hustler_ppi8255_0_w)
{
ppi8255_0_w(machine, offset >> 3, data);
}
static WRITE8_HANDLER(hustler_ppi8255_1_w)
{
ppi8255_1_w(machine, offset >> 3, data);
} }
static ADDRESS_MAP_START( type1_readmem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( type1_readmem, ADDRESS_SPACE_PROGRAM, 8 )
@ -133,8 +113,8 @@ static ADDRESS_MAP_START( type1_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8000, 0x8bff) AM_READ(SMH_RAM) AM_RANGE(0x8000, 0x8bff) AM_READ(SMH_RAM)
AM_RANGE(0x8c00, 0x8fff) AM_READ(galaxold_videoram_r) /* mirror */ AM_RANGE(0x8c00, 0x8fff) AM_READ(galaxold_videoram_r) /* mirror */
AM_RANGE(0x9000, 0x90ff) AM_READ(SMH_RAM) AM_RANGE(0x9000, 0x90ff) AM_READ(SMH_RAM)
AM_RANGE(0x9800, 0x9803) AM_READ(ppi8255_0_r) AM_RANGE(0x9800, 0x9803) AM_DEVREAD(PPI8255, "ppi8255_0", ppi8255_r)
AM_RANGE(0xa000, 0xa003) AM_READ(ppi8255_1_r) AM_RANGE(0xa000, 0xa003) AM_DEVREAD(PPI8255, "ppi8255_1", ppi8255_r)
AM_RANGE(0xb000, 0xb000) AM_READ(watchdog_reset_r) AM_RANGE(0xb000, 0xb000) AM_READ(watchdog_reset_r)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -147,8 +127,8 @@ static ADDRESS_MAP_START( type1_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x9040, 0x905f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size) AM_RANGE(0x9040, 0x905f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
AM_RANGE(0x9060, 0x907f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size) AM_RANGE(0x9060, 0x907f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
AM_RANGE(0x9080, 0x90ff) AM_WRITE(SMH_RAM) AM_RANGE(0x9080, 0x90ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x9800, 0x9803) AM_WRITE(ppi8255_0_w) AM_RANGE(0x9800, 0x9803) AM_DEVWRITE(PPI8255, "ppi8255_0", ppi8255_w)
AM_RANGE(0xa000, 0xa003) AM_WRITE(ppi8255_1_w) AM_RANGE(0xa000, 0xa003) AM_DEVWRITE(PPI8255, "ppi8255_1", ppi8255_w)
AM_RANGE(0xa801, 0xa801) AM_WRITE(galaxold_nmi_enable_w) AM_RANGE(0xa801, 0xa801) AM_WRITE(galaxold_nmi_enable_w)
AM_RANGE(0xa802, 0xa802) AM_WRITE(galaxold_coin_counter_w) AM_RANGE(0xa802, 0xa802) AM_WRITE(galaxold_coin_counter_w)
AM_RANGE(0xa804, 0xa804) AM_WRITE(galaxold_stars_enable_w) AM_RANGE(0xa804, 0xa804) AM_WRITE(galaxold_stars_enable_w)
@ -162,8 +142,8 @@ static ADDRESS_MAP_START( type2_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x9000, 0x93ff) AM_READ(SMH_RAM) AM_RANGE(0x9000, 0x93ff) AM_READ(SMH_RAM)
AM_RANGE(0x9400, 0x97ff) AM_READ(galaxold_videoram_r) /* mirror */ AM_RANGE(0x9400, 0x97ff) AM_READ(galaxold_videoram_r) /* mirror */
AM_RANGE(0x9800, 0x9800) AM_READ(watchdog_reset_r) AM_RANGE(0x9800, 0x9800) AM_READ(watchdog_reset_r)
AM_RANGE(0xa000, 0xa00f) AM_READ(scobra_type2_ppi8255_0_r) AM_RANGE(0xa000, 0xa00f) AM_DEVREAD(PPI8255, "ppi8255_0", scobra_type2_ppi8255_r)
AM_RANGE(0xa800, 0xa80f) AM_READ(scobra_type2_ppi8255_1_r) AM_RANGE(0xa800, 0xa80f) AM_DEVREAD(PPI8255, "ppi8255_1", scobra_type2_ppi8255_r)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( type2_writemem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( type2_writemem, ADDRESS_SPACE_PROGRAM, 8 )
@ -175,8 +155,8 @@ static ADDRESS_MAP_START( type2_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8880, 0x88ff) AM_WRITE(SMH_RAM) AM_RANGE(0x8880, 0x88ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x9000, 0x93ff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram) AM_RANGE(0x9000, 0x93ff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
AM_RANGE(0x9400, 0x97ff) AM_WRITE(galaxold_videoram_w) /* mirror */ AM_RANGE(0x9400, 0x97ff) AM_WRITE(galaxold_videoram_w) /* mirror */
AM_RANGE(0xa000, 0xa00f) AM_WRITE(scobra_type2_ppi8255_0_w) AM_RANGE(0xa000, 0xa00f) AM_DEVWRITE(PPI8255, "ppi8255_0", scobra_type2_ppi8255_w)
AM_RANGE(0xa800, 0xa80f) AM_WRITE(scobra_type2_ppi8255_1_w) AM_RANGE(0xa800, 0xa80f) AM_DEVWRITE(PPI8255, "ppi8255_1", scobra_type2_ppi8255_w)
AM_RANGE(0xb000, 0xb000) AM_WRITE(galaxold_stars_enable_w) AM_RANGE(0xb000, 0xb000) AM_WRITE(galaxold_stars_enable_w)
AM_RANGE(0xb004, 0xb004) AM_WRITE(galaxold_nmi_enable_w) AM_RANGE(0xb004, 0xb004) AM_WRITE(galaxold_nmi_enable_w)
AM_RANGE(0xb006, 0xb006) AM_WRITE(galaxold_coin_counter_0_w) AM_RANGE(0xb006, 0xb006) AM_WRITE(galaxold_coin_counter_0_w)
@ -190,8 +170,8 @@ static ADDRESS_MAP_START( hustler_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8000, 0x8bff) AM_READ(SMH_RAM) AM_RANGE(0x8000, 0x8bff) AM_READ(SMH_RAM)
AM_RANGE(0x9000, 0x90ff) AM_READ(SMH_RAM) AM_RANGE(0x9000, 0x90ff) AM_READ(SMH_RAM)
AM_RANGE(0xb800, 0xb800) AM_READ(watchdog_reset_r) AM_RANGE(0xb800, 0xb800) AM_READ(watchdog_reset_r)
AM_RANGE(0xd000, 0xd01f) AM_READ(hustler_ppi8255_0_r) AM_RANGE(0xd000, 0xd01f) AM_DEVREAD(PPI8255, "ppi8255_0", hustler_ppi8255_r)
AM_RANGE(0xe000, 0xe01f) AM_READ(hustler_ppi8255_1_r) AM_RANGE(0xe000, 0xe01f) AM_DEVREAD(PPI8255, "ppi8255_1", hustler_ppi8255_r)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( hustler_writemem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( hustler_writemem, ADDRESS_SPACE_PROGRAM, 8 )
@ -206,8 +186,8 @@ static ADDRESS_MAP_START( hustler_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xa804, 0xa804) AM_WRITE(galaxold_nmi_enable_w) AM_RANGE(0xa804, 0xa804) AM_WRITE(galaxold_nmi_enable_w)
AM_RANGE(0xa806, 0xa806) AM_WRITE(galaxold_flip_screen_y_w) AM_RANGE(0xa806, 0xa806) AM_WRITE(galaxold_flip_screen_y_w)
AM_RANGE(0xa80e, 0xa80e) AM_WRITE(SMH_NOP) /* coin counters */ AM_RANGE(0xa80e, 0xa80e) AM_WRITE(SMH_NOP) /* coin counters */
AM_RANGE(0xd000, 0xd01f) AM_WRITE(hustler_ppi8255_0_w) AM_RANGE(0xd000, 0xd01f) AM_DEVWRITE(PPI8255, "ppi8255_0", hustler_ppi8255_w)
AM_RANGE(0xe000, 0xe01f) AM_WRITE(hustler_ppi8255_1_w) AM_RANGE(0xe000, 0xe01f) AM_DEVWRITE(PPI8255, "ppi8255_1", hustler_ppi8255_w)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( hustlerb_readmem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( hustlerb_readmem, ADDRESS_SPACE_PROGRAM, 8 )
@ -215,8 +195,8 @@ static ADDRESS_MAP_START( hustlerb_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8000, 0x8bff) AM_READ(SMH_RAM) AM_RANGE(0x8000, 0x8bff) AM_READ(SMH_RAM)
AM_RANGE(0x9000, 0x90ff) AM_READ(SMH_RAM) AM_RANGE(0x9000, 0x90ff) AM_READ(SMH_RAM)
AM_RANGE(0xb000, 0xb000) AM_READ(watchdog_reset_r) AM_RANGE(0xb000, 0xb000) AM_READ(watchdog_reset_r)
AM_RANGE(0xc100, 0xc103) AM_READ(ppi8255_0_r) AM_RANGE(0xc100, 0xc103) AM_DEVREAD(PPI8255, "ppi8255_0", ppi8255_r)
AM_RANGE(0xc200, 0xc203) AM_READ(ppi8255_1_r) AM_RANGE(0xc200, 0xc203) AM_DEVREAD(PPI8255, "ppi8255_1", ppi8255_r)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( hustlerb_writemem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( hustlerb_writemem, ADDRESS_SPACE_PROGRAM, 8 )
@ -231,8 +211,8 @@ static ADDRESS_MAP_START( hustlerb_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xa802, 0xa802) AM_WRITE(SMH_NOP) /* coin counters */ AM_RANGE(0xa802, 0xa802) AM_WRITE(SMH_NOP) /* coin counters */
AM_RANGE(0xa806, 0xa806) AM_WRITE(galaxold_flip_screen_y_w) AM_RANGE(0xa806, 0xa806) AM_WRITE(galaxold_flip_screen_y_w)
AM_RANGE(0xa807, 0xa807) AM_WRITE(galaxold_flip_screen_x_w) AM_RANGE(0xa807, 0xa807) AM_WRITE(galaxold_flip_screen_x_w)
AM_RANGE(0xc100, 0xc103) AM_WRITE(ppi8255_0_w) AM_RANGE(0xc100, 0xc103) AM_DEVWRITE(PPI8255, "ppi8255_0", ppi8255_w)
AM_RANGE(0xc200, 0xc203) AM_WRITE(ppi8255_1_w) AM_RANGE(0xc200, 0xc203) AM_DEVWRITE(PPI8255, "ppi8255_1", ppi8255_w)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( mimonkey_readmem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( mimonkey_readmem, ADDRESS_SPACE_PROGRAM, 8 )
@ -240,8 +220,8 @@ static ADDRESS_MAP_START( mimonkey_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8000, 0x8bff) AM_READ(SMH_RAM) AM_RANGE(0x8000, 0x8bff) AM_READ(SMH_RAM)
AM_RANGE(0x8c00, 0x8fff) AM_READ(galaxold_videoram_r) /* mirror */ AM_RANGE(0x8c00, 0x8fff) AM_READ(galaxold_videoram_r) /* mirror */
AM_RANGE(0x9000, 0x90ff) AM_READ(SMH_RAM) AM_RANGE(0x9000, 0x90ff) AM_READ(SMH_RAM)
AM_RANGE(0x9800, 0x9803) AM_READ(ppi8255_0_r) AM_RANGE(0x9800, 0x9803) AM_DEVREAD(PPI8255, "ppi8255_0", ppi8255_r)
AM_RANGE(0xa000, 0xa003) AM_READ(ppi8255_1_r) AM_RANGE(0xa000, 0xa003) AM_DEVREAD(PPI8255, "ppi8255_1", ppi8255_r)
AM_RANGE(0xb000, 0xb000) AM_READ(watchdog_reset_r) AM_RANGE(0xb000, 0xb000) AM_READ(watchdog_reset_r)
AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM) AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -255,8 +235,8 @@ static ADDRESS_MAP_START( mimonkey_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x9040, 0x905f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size) AM_RANGE(0x9040, 0x905f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
AM_RANGE(0x9060, 0x907f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size) AM_RANGE(0x9060, 0x907f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
AM_RANGE(0x9080, 0x90ff) AM_WRITE(SMH_RAM) AM_RANGE(0x9080, 0x90ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x9800, 0x9803) AM_WRITE(ppi8255_0_w) AM_RANGE(0x9800, 0x9803) AM_DEVWRITE(PPI8255, "ppi8255_0", ppi8255_w)
AM_RANGE(0xa000, 0xa003) AM_WRITE(ppi8255_1_w) AM_RANGE(0xa000, 0xa003) AM_DEVWRITE(PPI8255, "ppi8255_1", ppi8255_w)
AM_RANGE(0xa801, 0xa801) AM_WRITE(galaxold_nmi_enable_w) AM_RANGE(0xa801, 0xa801) AM_WRITE(galaxold_nmi_enable_w)
AM_RANGE(0xa800, 0xa802) AM_WRITE(galaxold_gfxbank_w) AM_RANGE(0xa800, 0xa802) AM_WRITE(galaxold_gfxbank_w)
AM_RANGE(0xa806, 0xa806) AM_WRITE(galaxold_flip_screen_x_w) AM_RANGE(0xa806, 0xa806) AM_WRITE(galaxold_flip_screen_x_w)
@ -265,59 +245,59 @@ static ADDRESS_MAP_START( mimonkey_writemem, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_END ADDRESS_MAP_END
static READ8_HANDLER( anteatg_ppi8255_0_reg0_r ) static READ8_DEVICE_HANDLER( anteatg_ppi8255_0_reg0_r )
{ {
return ppi8255_0_r(machine, 0); return ppi8255_r(device, 0);
} }
static READ8_HANDLER( anteatg_ppi8255_0_reg1_r ) static READ8_DEVICE_HANDLER( anteatg_ppi8255_0_reg1_r )
{ {
return ppi8255_0_r(machine, 1); return ppi8255_r(device, 1);
} }
static READ8_HANDLER( anteatg_ppi8255_0_reg2_r ) static READ8_DEVICE_HANDLER( anteatg_ppi8255_0_reg2_r )
{ {
return ppi8255_0_r(machine, 2); return ppi8255_r(device, 2);
} }
static READ8_HANDLER( anteatg_ppi8255_0_reg3_r ) static READ8_DEVICE_HANDLER( anteatg_ppi8255_0_reg3_r )
{ {
return ppi8255_0_r(machine, 3); return ppi8255_r(device, 3);
} }
static WRITE8_HANDLER( anteatg_ppi8255_0_reg0_w ) static WRITE8_DEVICE_HANDLER( anteatg_ppi8255_0_reg0_w )
{ {
ppi8255_0_w(machine, 0, data); ppi8255_w(device, 0, data);
} }
static WRITE8_HANDLER( anteatg_ppi8255_0_reg1_w ) static WRITE8_DEVICE_HANDLER( anteatg_ppi8255_0_reg1_w )
{ {
ppi8255_0_w(machine, 1, data); ppi8255_w(device, 1, data);
} }
static WRITE8_HANDLER( anteatg_ppi8255_0_reg2_w ) static WRITE8_DEVICE_HANDLER( anteatg_ppi8255_0_reg2_w )
{ {
ppi8255_0_w(machine, 2, data); ppi8255_w(device, 2, data);
} }
static WRITE8_HANDLER( anteatg_ppi8255_0_reg3_w ) static WRITE8_DEVICE_HANDLER( anteatg_ppi8255_0_reg3_w )
{ {
ppi8255_0_w(machine, 3, data); ppi8255_w(device, 3, data);
} }
static WRITE8_HANDLER( anteatg_ppi8255_1_reg0_w ) static WRITE8_DEVICE_HANDLER( anteatg_ppi8255_1_reg0_w )
{ {
ppi8255_1_w(machine, 0, data); ppi8255_w(device, 0, data);
} }
static WRITE8_HANDLER( anteatg_ppi8255_1_reg1_w ) static WRITE8_DEVICE_HANDLER( anteatg_ppi8255_1_reg1_w )
{ {
ppi8255_1_w(machine, 1, data); ppi8255_w(device, 1, data);
} }
static WRITE8_HANDLER( anteatg_ppi8255_1_reg3_w ) static WRITE8_DEVICE_HANDLER( anteatg_ppi8255_1_reg3_w )
{ {
ppi8255_1_w(machine, 3, data); ppi8255_w(device, 3, data);
} }
static ADDRESS_MAP_START( anteatg_readmem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( anteatg_readmem, ADDRESS_SPACE_PROGRAM, 8 )
@ -330,10 +310,10 @@ static ADDRESS_MAP_START( anteatg_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8300, 0x98ff) AM_READ(SMH_ROM) AM_RANGE(0x8300, 0x98ff) AM_READ(SMH_ROM)
AM_RANGE(0xa300, 0xa7ff) AM_READ(SMH_ROM) AM_RANGE(0xa300, 0xa7ff) AM_READ(SMH_ROM)
AM_RANGE(0xf521, 0xf521) AM_READ(watchdog_reset_r) AM_RANGE(0xf521, 0xf521) AM_READ(watchdog_reset_r)
AM_RANGE(0xf612, 0xf612) AM_READ(anteatg_ppi8255_0_reg0_r) AM_RANGE(0xf612, 0xf612) AM_DEVREAD(PPI8255, "ppi8255_0", anteatg_ppi8255_0_reg0_r)
AM_RANGE(0xf631, 0xf631) AM_READ(anteatg_ppi8255_0_reg1_r) AM_RANGE(0xf631, 0xf631) AM_DEVREAD(PPI8255, "ppi8255_0", anteatg_ppi8255_0_reg1_r)
AM_RANGE(0xf710, 0xf710) AM_READ(anteatg_ppi8255_0_reg2_r) AM_RANGE(0xf710, 0xf710) AM_DEVREAD(PPI8255, "ppi8255_0", anteatg_ppi8255_0_reg2_r)
AM_RANGE(0xf753, 0xf753) AM_READ(anteatg_ppi8255_0_reg3_r) AM_RANGE(0xf753, 0xf753) AM_DEVREAD(PPI8255, "ppi8255_0", anteatg_ppi8255_0_reg3_r)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( anteatg_writemem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( anteatg_writemem, ADDRESS_SPACE_PROGRAM, 8 )
@ -344,9 +324,9 @@ static ADDRESS_MAP_START( anteatg_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2040, 0x205f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size) AM_RANGE(0x2040, 0x205f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
AM_RANGE(0x2060, 0x207f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size) AM_RANGE(0x2060, 0x207f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
AM_RANGE(0x2080, 0x20ff) AM_WRITE(SMH_RAM) AM_RANGE(0x2080, 0x20ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x2423, 0x2423) AM_WRITE(anteatg_ppi8255_1_reg3_w) AM_RANGE(0x2423, 0x2423) AM_DEVWRITE(PPI8255, "ppi8255_1", anteatg_ppi8255_1_reg3_w)
AM_RANGE(0x2450, 0x2450) AM_WRITE(anteatg_ppi8255_1_reg0_w) AM_RANGE(0x2450, 0x2450) AM_DEVWRITE(PPI8255, "ppi8255_1", anteatg_ppi8255_1_reg0_w)
AM_RANGE(0x2511, 0x2511) AM_WRITE(anteatg_ppi8255_1_reg1_w) AM_RANGE(0x2511, 0x2511) AM_DEVWRITE(PPI8255, "ppi8255_1", anteatg_ppi8255_1_reg1_w)
AM_RANGE(0x2621, 0x2621) AM_WRITE(galaxold_nmi_enable_w) AM_RANGE(0x2621, 0x2621) AM_WRITE(galaxold_nmi_enable_w)
AM_RANGE(0x2624, 0x2624) AM_WRITE(galaxold_stars_enable_w) AM_RANGE(0x2624, 0x2624) AM_WRITE(galaxold_stars_enable_w)
AM_RANGE(0x2647, 0x2647) AM_WRITE(galaxold_flip_screen_y_w) AM_RANGE(0x2647, 0x2647) AM_WRITE(galaxold_flip_screen_y_w)
@ -358,10 +338,10 @@ static ADDRESS_MAP_START( anteatg_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x7c00, 0x7fff) AM_WRITE(galaxold_videoram_w) /* mirror */ AM_RANGE(0x7c00, 0x7fff) AM_WRITE(galaxold_videoram_w) /* mirror */
AM_RANGE(0x8300, 0x98ff) AM_WRITE(SMH_ROM) AM_RANGE(0x8300, 0x98ff) AM_WRITE(SMH_ROM)
AM_RANGE(0xa300, 0xa7ff) AM_WRITE(SMH_ROM) AM_RANGE(0xa300, 0xa7ff) AM_WRITE(SMH_ROM)
AM_RANGE(0xf612, 0xf612) AM_WRITE(anteatg_ppi8255_0_reg0_w) AM_RANGE(0xf612, 0xf612) AM_DEVWRITE(PPI8255, "ppi8255_0", anteatg_ppi8255_0_reg0_w)
AM_RANGE(0xf631, 0xf631) AM_WRITE(anteatg_ppi8255_0_reg1_w) AM_RANGE(0xf631, 0xf631) AM_DEVWRITE(PPI8255, "ppi8255_0", anteatg_ppi8255_0_reg1_w)
AM_RANGE(0xf710, 0xf710) AM_WRITE(anteatg_ppi8255_0_reg2_w) AM_RANGE(0xf710, 0xf710) AM_DEVWRITE(PPI8255, "ppi8255_0", anteatg_ppi8255_0_reg2_w)
AM_RANGE(0xf753, 0xf753) AM_WRITE(anteatg_ppi8255_0_reg3_w) AM_RANGE(0xf753, 0xf753) AM_DEVWRITE(PPI8255, "ppi8255_0", anteatg_ppi8255_0_reg3_w)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( anteatgb_readmem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( anteatgb_readmem, ADDRESS_SPACE_PROGRAM, 8 )
@ -373,8 +353,8 @@ static ADDRESS_MAP_START( anteatgb_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x6400, 0x7aff) AM_READ(SMH_ROM) AM_RANGE(0x6400, 0x7aff) AM_READ(SMH_ROM)
AM_RANGE(0x8300, 0x98ff) AM_READ(SMH_ROM) AM_RANGE(0x8300, 0x98ff) AM_READ(SMH_ROM)
AM_RANGE(0xa300, 0xa7ff) AM_READ(SMH_ROM) AM_RANGE(0xa300, 0xa7ff) AM_READ(SMH_ROM)
AM_RANGE(0xf300, 0xf303) AM_READ(ppi8255_0_r) AM_RANGE(0xf300, 0xf303) AM_DEVREAD(PPI8255, "ppi8255_0", ppi8255_r)
AM_RANGE(0xfe00, 0xfe03) AM_READ(ppi8255_1_r) AM_RANGE(0xfe00, 0xfe03) AM_DEVREAD(PPI8255, "ppi8255_1", ppi8255_r)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( anteatgb_writemem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( anteatgb_writemem, ADDRESS_SPACE_PROGRAM, 8 )
@ -395,8 +375,8 @@ static ADDRESS_MAP_START( anteatgb_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x6400, 0x7aff) AM_WRITE(SMH_ROM) AM_RANGE(0x6400, 0x7aff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8300, 0x98ff) AM_WRITE(SMH_ROM) AM_RANGE(0x8300, 0x98ff) AM_WRITE(SMH_ROM)
AM_RANGE(0xa300, 0xa7ff) AM_WRITE(SMH_ROM) AM_RANGE(0xa300, 0xa7ff) AM_WRITE(SMH_ROM)
AM_RANGE(0xf300, 0xf303) AM_WRITE(ppi8255_0_w) AM_RANGE(0xf300, 0xf303) AM_DEVWRITE(PPI8255, "ppi8255_0", ppi8255_w)
AM_RANGE(0xfe00, 0xfe03) AM_WRITE(ppi8255_1_w) AM_RANGE(0xfe00, 0xfe03) AM_DEVWRITE(PPI8255, "ppi8255_1", ppi8255_w)
ADDRESS_MAP_END ADDRESS_MAP_END
static UINT8 *scobra_soundram; static UINT8 *scobra_soundram;
@ -1393,6 +1373,12 @@ static MACHINE_DRIVER_START( type1 )
MDRV_MACHINE_RESET(scramble) MDRV_MACHINE_RESET(scramble)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( scramble_ppi_ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( scramble_ppi_ppi8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(16000.0/132/2) MDRV_SCREEN_REFRESH_RATE(16000.0/132/2)
@ -1419,6 +1405,18 @@ static MACHINE_DRIVER_START( type1 )
MACHINE_DRIVER_END MACHINE_DRIVER_END
static MACHINE_DRIVER_START( superbon )
/* basic machine hardware */
MDRV_IMPORT_FROM(type1)
/* device config overrides */
MDRV_DEVICE_MODIFY( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( scramble_ppi8255_intf[0] )
MDRV_DEVICE_MODIFY( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( scramble_ppi8255_intf[1] )
MACHINE_DRIVER_END
/* same as regular type 1, the only difference that it has long bullets */ /* same as regular type 1, the only difference that it has long bullets */
static MACHINE_DRIVER_START( armorcar ) static MACHINE_DRIVER_START( armorcar )
@ -1439,6 +1437,13 @@ static MACHINE_DRIVER_START( moonwar )
/* basic machine hardware */ /* basic machine hardware */
MDRV_IMPORT_FROM(type1) MDRV_IMPORT_FROM(type1)
/* device config overrides */
MDRV_DEVICE_MODIFY( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( moonwar_ppi8255_intf[0] )
MDRV_DEVICE_MODIFY( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( moonwar_ppi8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_PALETTE_LENGTH(32+64+2+1) /* 32 for characters, 64 for stars, 2 for bullets, 1 for bg */ MDRV_PALETTE_LENGTH(32+64+2+1) /* 32 for characters, 64 for stars, 2 for bullets, 1 for bg */
@ -1516,6 +1521,13 @@ static MACHINE_DRIVER_START( stratgyx )
/* basic machine hardware */ /* basic machine hardware */
MDRV_IMPORT_FROM(type2) MDRV_IMPORT_FROM(type2)
/* device config overrides */
MDRV_DEVICE_MODIFY( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( stratgyx_ppi8255_intf[0] )
MDRV_DEVICE_MODIFY( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( stratgyx_ppi8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_PALETTE_LENGTH(32+64+2+8) /* 32 for characters, 64 for stars, 2 for bullets, 8 for background */ MDRV_PALETTE_LENGTH(32+64+2+8) /* 32 for characters, 64 for stars, 2 for bullets, 8 for background */
@ -1529,6 +1541,13 @@ static MACHINE_DRIVER_START( darkplnt )
/* basic machine hardware */ /* basic machine hardware */
MDRV_IMPORT_FROM(type2) MDRV_IMPORT_FROM(type2)
/* device config overrides */
MDRV_DEVICE_MODIFY( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( darkplnt_ppi8255_intf[0] )
MDRV_DEVICE_MODIFY( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( darkplnt_ppi8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_PALETTE_LENGTH(32+64+2) /* 32 for characters, 64 (buffer) for stars, 2 for bullets */ MDRV_PALETTE_LENGTH(32+64+2) /* 32 for characters, 64 (buffer) for stars, 2 for bullets */
@ -1550,6 +1569,13 @@ static MACHINE_DRIVER_START( hustler )
MDRV_MACHINE_RESET(scramble) MDRV_MACHINE_RESET(scramble)
/* device config overrides */
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( scramble_ppi_ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( scramble_ppi_ppi8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(16000.0/132/2) MDRV_SCREEN_REFRESH_RATE(16000.0/132/2)

134
src/mame/drivers/scramble.c
View File

@ -41,9 +41,9 @@ static ADDRESS_MAP_START( scramble_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x5000, 0x50ff) AM_READ(SMH_RAM) AM_RANGE(0x5000, 0x50ff) AM_READ(SMH_RAM)
AM_RANGE(0x7000, 0x7000) AM_READ(watchdog_reset_r) AM_RANGE(0x7000, 0x7000) AM_READ(watchdog_reset_r)
AM_RANGE(0x7800, 0x7800) AM_READ(watchdog_reset_r) AM_RANGE(0x7800, 0x7800) AM_READ(watchdog_reset_r)
AM_RANGE(0x8100, 0x8103) AM_READ(ppi8255_0_r) AM_RANGE(0x8100, 0x8103) AM_DEVREAD(PPI8255, "ppi8255_0", ppi8255_r)
AM_RANGE(0x8110, 0x8113) AM_READ(ppi8255_0_r) /* mirror for Frog */ AM_RANGE(0x8110, 0x8113) AM_DEVREAD(PPI8255, "ppi8255_0", ppi8255_r) /* mirror for Frog */
AM_RANGE(0x8200, 0x8203) AM_READ(ppi8255_1_r) AM_RANGE(0x8200, 0x8203) AM_DEVREAD(PPI8255, "ppi8255_1", ppi8255_r)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( scramble_writemem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( scramble_writemem, ADDRESS_SPACE_PROGRAM, 8 )
@ -60,8 +60,8 @@ static ADDRESS_MAP_START( scramble_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x6804, 0x6804) AM_WRITE(galaxold_stars_enable_w) AM_RANGE(0x6804, 0x6804) AM_WRITE(galaxold_stars_enable_w)
AM_RANGE(0x6806, 0x6806) AM_WRITE(galaxold_flip_screen_x_w) AM_RANGE(0x6806, 0x6806) AM_WRITE(galaxold_flip_screen_x_w)
AM_RANGE(0x6807, 0x6807) AM_WRITE(galaxold_flip_screen_y_w) AM_RANGE(0x6807, 0x6807) AM_WRITE(galaxold_flip_screen_y_w)
AM_RANGE(0x8100, 0x8103) AM_WRITE(ppi8255_0_w) AM_RANGE(0x8100, 0x8103) AM_DEVWRITE(PPI8255, "ppi8255_0", ppi8255_w)
AM_RANGE(0x8200, 0x8203) AM_WRITE(ppi8255_1_w) AM_RANGE(0x8200, 0x8203) AM_DEVWRITE(PPI8255, "ppi8255_1", ppi8255_w)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -142,8 +142,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( ckongs_readmem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( ckongs_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM) AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
AM_RANGE(0x6000, 0x6bff) AM_READ(SMH_RAM) AM_RANGE(0x6000, 0x6bff) AM_READ(SMH_RAM)
AM_RANGE(0x7000, 0x7003) AM_READ(ppi8255_0_r) AM_RANGE(0x7000, 0x7003) AM_DEVREAD(PPI8255, "ppi8255_0", ppi8255_r)
AM_RANGE(0x7800, 0x7803) AM_READ(ppi8255_1_r) AM_RANGE(0x7800, 0x7803) AM_DEVREAD(PPI8255, "ppi8255_1", ppi8255_r)
AM_RANGE(0x9000, 0x93ff) AM_READ(SMH_RAM) AM_RANGE(0x9000, 0x93ff) AM_READ(SMH_RAM)
AM_RANGE(0x9800, 0x98ff) AM_READ(SMH_RAM) AM_RANGE(0x9800, 0x98ff) AM_READ(SMH_RAM)
AM_RANGE(0xb000, 0xb000) AM_READ(watchdog_reset_r) AM_RANGE(0xb000, 0xb000) AM_READ(watchdog_reset_r)
@ -152,8 +152,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( ckongs_writemem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( ckongs_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM) AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x6000, 0x6bff) AM_WRITE(SMH_RAM) AM_RANGE(0x6000, 0x6bff) AM_WRITE(SMH_RAM)
AM_RANGE(0x7000, 0x7003) AM_WRITE(ppi8255_0_w) AM_RANGE(0x7000, 0x7003) AM_DEVWRITE(PPI8255, "ppi8255_0", ppi8255_w)
AM_RANGE(0x7800, 0x7803) AM_WRITE(ppi8255_1_w) AM_RANGE(0x7800, 0x7803) AM_DEVWRITE(PPI8255, "ppi8255_1", ppi8255_w)
AM_RANGE(0x9000, 0x93ff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram) AM_RANGE(0x9000, 0x93ff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
AM_RANGE(0x9800, 0x983f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram) AM_RANGE(0x9800, 0x983f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
AM_RANGE(0x9840, 0x985f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size) AM_RANGE(0x9840, 0x985f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
@ -166,24 +166,14 @@ static ADDRESS_MAP_START( ckongs_writemem, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_END ADDRESS_MAP_END
static READ8_HANDLER(mars_ppi8255_0_r) static READ8_DEVICE_HANDLER(mars_ppi8255_r)
{ {
return ppi8255_0_r(machine, ((offset >> 2) & 0x02) | ((offset >> 1) & 0x01)); return ppi8255_r(device, ((offset >> 2) & 0x02) | ((offset >> 1) & 0x01));
} }
static READ8_HANDLER(mars_ppi8255_1_r) static WRITE8_DEVICE_HANDLER(mars_ppi8255_w)
{ {
return ppi8255_1_r(machine, ((offset >> 2) & 0x02) | ((offset >> 1) & 0x01)); ppi8255_w(device, ((offset >> 2) & 0x02) | ((offset >> 1) & 0x01), data);
}
static WRITE8_HANDLER(mars_ppi8255_0_w)
{
ppi8255_0_w(machine, ((offset >> 2) & 0x02) | ((offset >> 1) & 0x01), data);
}
static WRITE8_HANDLER(mars_ppi8255_1_w)
{
ppi8255_1_w(machine, ((offset >> 2) & 0x02) | ((offset >> 1) & 0x01), data);
} }
@ -194,8 +184,8 @@ static ADDRESS_MAP_START( mars_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x5000, 0x50ff) AM_READ(SMH_RAM) AM_RANGE(0x5000, 0x50ff) AM_READ(SMH_RAM)
AM_RANGE(0x7000, 0x7000) AM_READ(watchdog_reset_r) AM_RANGE(0x7000, 0x7000) AM_READ(watchdog_reset_r)
AM_RANGE(0x7000, 0x7000) AM_READ(SMH_NOP) AM_RANGE(0x7000, 0x7000) AM_READ(SMH_NOP)
AM_RANGE(0x8100, 0x810f) AM_READ(mars_ppi8255_0_r) AM_RANGE(0x8100, 0x810f) AM_DEVREAD(PPI8255, "ppi8255_0", mars_ppi8255_r)
AM_RANGE(0x8200, 0x820f) AM_READ(mars_ppi8255_1_r) AM_RANGE(0x8200, 0x820f) AM_DEVREAD(PPI8255, "ppi8255_1", mars_ppi8255_r)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( mars_writemem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( mars_writemem, ADDRESS_SPACE_PROGRAM, 8 )
@ -212,8 +202,8 @@ static ADDRESS_MAP_START( mars_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x6808, 0x6808) AM_WRITE(galaxold_coin_counter_0_w) AM_RANGE(0x6808, 0x6808) AM_WRITE(galaxold_coin_counter_0_w)
AM_RANGE(0x6809, 0x6809) AM_WRITE(galaxold_flip_screen_x_w) AM_RANGE(0x6809, 0x6809) AM_WRITE(galaxold_flip_screen_x_w)
AM_RANGE(0x680b, 0x680b) AM_WRITE(galaxold_flip_screen_y_w) AM_RANGE(0x680b, 0x680b) AM_WRITE(galaxold_flip_screen_y_w)
AM_RANGE(0x8100, 0x810f) AM_WRITE(mars_ppi8255_0_w) AM_RANGE(0x8100, 0x810f) AM_DEVWRITE(PPI8255, "ppi8255_0", mars_ppi8255_w)
AM_RANGE(0x8200, 0x820f) AM_WRITE(mars_ppi8255_1_w) AM_RANGE(0x8200, 0x820f) AM_DEVWRITE(PPI8255, "ppi8255_1", mars_ppi8255_w)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -223,9 +213,9 @@ static ADDRESS_MAP_START( newsin7_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x4c00, 0x4fff) AM_READ(galaxold_videoram_r) AM_RANGE(0x4c00, 0x4fff) AM_READ(galaxold_videoram_r)
AM_RANGE(0x5000, 0x50ff) AM_READ(SMH_RAM) AM_RANGE(0x5000, 0x50ff) AM_READ(SMH_RAM)
AM_RANGE(0x7000, 0x7000) AM_READ(watchdog_reset_r) AM_RANGE(0x7000, 0x7000) AM_READ(watchdog_reset_r)
AM_RANGE(0x8200, 0x820f) AM_READ(mars_ppi8255_1_r) AM_RANGE(0x8200, 0x820f) AM_DEVREAD(PPI8255, "ppi8255_1", mars_ppi8255_r)
AM_RANGE(0xa000, 0xafff) AM_READ(SMH_ROM) AM_RANGE(0xa000, 0xafff) AM_READ(SMH_ROM)
AM_RANGE(0xc100, 0xc10f) AM_READ(mars_ppi8255_0_r) AM_RANGE(0xc100, 0xc10f) AM_DEVREAD(PPI8255, "ppi8255_0", mars_ppi8255_r)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( newsin7_writemem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( newsin7_writemem, ADDRESS_SPACE_PROGRAM, 8 )
@ -242,9 +232,9 @@ static ADDRESS_MAP_START( newsin7_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x6808, 0x6808) AM_WRITE(galaxold_coin_counter_0_w) AM_RANGE(0x6808, 0x6808) AM_WRITE(galaxold_coin_counter_0_w)
AM_RANGE(0x6809, 0x6809) AM_WRITE(galaxold_flip_screen_x_w) AM_RANGE(0x6809, 0x6809) AM_WRITE(galaxold_flip_screen_x_w)
AM_RANGE(0x680b, 0x680b) AM_WRITE(galaxold_flip_screen_y_w) AM_RANGE(0x680b, 0x680b) AM_WRITE(galaxold_flip_screen_y_w)
AM_RANGE(0x8200, 0x820f) AM_WRITE(mars_ppi8255_1_w) AM_RANGE(0x8200, 0x820f) AM_DEVWRITE(PPI8255, "ppi8255_1", mars_ppi8255_w)
AM_RANGE(0xa000, 0xafff) AM_WRITE(SMH_ROM) AM_RANGE(0xa000, 0xafff) AM_WRITE(SMH_ROM)
AM_RANGE(0xc100, 0xc10f) AM_WRITE(mars_ppi8255_0_w) AM_RANGE(0xc100, 0xc10f) AM_DEVWRITE(PPI8255, "ppi8255_0", mars_ppi8255_w)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -262,8 +252,8 @@ static ADDRESS_MAP_START( mrkougar_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x6808, 0x6808) AM_WRITE(galaxold_coin_counter_0_w) AM_RANGE(0x6808, 0x6808) AM_WRITE(galaxold_coin_counter_0_w)
AM_RANGE(0x6809, 0x6809) AM_WRITE(galaxold_flip_screen_x_w) AM_RANGE(0x6809, 0x6809) AM_WRITE(galaxold_flip_screen_x_w)
AM_RANGE(0x680b, 0x680b) AM_WRITE(galaxold_flip_screen_y_w) AM_RANGE(0x680b, 0x680b) AM_WRITE(galaxold_flip_screen_y_w)
AM_RANGE(0x8100, 0x810f) AM_WRITE(mars_ppi8255_0_w) AM_RANGE(0x8100, 0x810f) AM_DEVWRITE(PPI8255, "ppi8255_0", mars_ppi8255_w)
AM_RANGE(0x8200, 0x820f) AM_WRITE(mars_ppi8255_1_w) AM_RANGE(0x8200, 0x820f) AM_DEVWRITE(PPI8255, "ppi8255_1", mars_ppi8255_w)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -300,9 +290,9 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( hunchbks_readmem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( hunchbks_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM) AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM)
AM_RANGE(0x1210, 0x1213) AM_READ(ppi8255_1_r) AM_RANGE(0x1210, 0x1213) AM_DEVREAD(PPI8255, "ppi8255_1", ppi8255_r)
AM_RANGE(0x1400, 0x14ff) AM_READ(SMH_RAM) AM_RANGE(0x1400, 0x14ff) AM_READ(SMH_RAM)
AM_RANGE(0x1500, 0x1503) AM_READ(ppi8255_0_r) AM_RANGE(0x1500, 0x1503) AM_DEVREAD(PPI8255, "ppi8255_0", ppi8255_r)
AM_RANGE(0x1680, 0x1680) AM_READ(watchdog_reset_r) AM_RANGE(0x1680, 0x1680) AM_READ(watchdog_reset_r)
AM_RANGE(0x1780, 0x1780) AM_READ(watchdog_reset_r) AM_RANGE(0x1780, 0x1780) AM_READ(watchdog_reset_r)
AM_RANGE(0x1800, 0x1fff) AM_READ(SMH_RAM) AM_RANGE(0x1800, 0x1fff) AM_READ(SMH_RAM)
@ -316,12 +306,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( hunchbks_writemem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( hunchbks_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_ROM) AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x1210, 0x1213) AM_WRITE(ppi8255_1_w) AM_RANGE(0x1210, 0x1213) AM_DEVWRITE(PPI8255, "ppi8255_1", ppi8255_w)
AM_RANGE(0x1400, 0x143f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram) AM_RANGE(0x1400, 0x143f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
AM_RANGE(0x1440, 0x145f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size) AM_RANGE(0x1440, 0x145f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
AM_RANGE(0x1460, 0x147f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size) AM_RANGE(0x1460, 0x147f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
AM_RANGE(0x1480, 0x14ff) AM_WRITE(SMH_RAM) AM_RANGE(0x1480, 0x14ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x1500, 0x1503) AM_WRITE(ppi8255_0_w) AM_RANGE(0x1500, 0x1503) AM_DEVWRITE(PPI8255, "ppi8255_0", ppi8255_w)
AM_RANGE(0x1606, 0x1606) AM_WRITE(galaxold_flip_screen_x_w) AM_RANGE(0x1606, 0x1606) AM_WRITE(galaxold_flip_screen_x_w)
AM_RANGE(0x1607, 0x1607) AM_WRITE(galaxold_flip_screen_y_w) AM_RANGE(0x1607, 0x1607) AM_WRITE(galaxold_flip_screen_y_w)
AM_RANGE(0x1800, 0x1bff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram) AM_RANGE(0x1800, 0x1bff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
@ -341,8 +331,8 @@ static ADDRESS_MAP_START( mimonscr_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x4400, 0x4bff) AM_READ(SMH_RAM) AM_RANGE(0x4400, 0x4bff) AM_READ(SMH_RAM)
AM_RANGE(0x5000, 0x50ff) AM_READ(SMH_RAM) AM_RANGE(0x5000, 0x50ff) AM_READ(SMH_RAM)
AM_RANGE(0x7000, 0x7000) AM_READ(watchdog_reset_r) AM_RANGE(0x7000, 0x7000) AM_READ(watchdog_reset_r)
AM_RANGE(0x8100, 0x8103) AM_READ(ppi8255_0_r) AM_RANGE(0x8100, 0x8103) AM_DEVREAD(PPI8255, "ppi8255_0", ppi8255_r)
AM_RANGE(0x8200, 0x8203) AM_READ(ppi8255_1_r) AM_RANGE(0x8200, 0x8203) AM_DEVREAD(PPI8255, "ppi8255_1", ppi8255_r)
AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM) AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -359,30 +349,20 @@ static ADDRESS_MAP_START( mimonscr_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x6800, 0x6802) AM_WRITE(galaxold_gfxbank_w) AM_RANGE(0x6800, 0x6802) AM_WRITE(galaxold_gfxbank_w)
AM_RANGE(0x6806, 0x6806) AM_WRITE(galaxold_flip_screen_x_w) AM_RANGE(0x6806, 0x6806) AM_WRITE(galaxold_flip_screen_x_w)
AM_RANGE(0x6807, 0x6807) AM_WRITE(galaxold_flip_screen_y_w) AM_RANGE(0x6807, 0x6807) AM_WRITE(galaxold_flip_screen_y_w)
AM_RANGE(0x8100, 0x8103) AM_WRITE(ppi8255_0_w) AM_RANGE(0x8100, 0x8103) AM_DEVWRITE(PPI8255, "ppi8255_0", ppi8255_w)
AM_RANGE(0x8200, 0x8203) AM_WRITE(ppi8255_1_w) AM_RANGE(0x8200, 0x8203) AM_DEVWRITE(PPI8255, "ppi8255_1", ppi8255_w)
AM_RANGE(0xc000, 0xffff) AM_WRITE(SMH_ROM) AM_RANGE(0xc000, 0xffff) AM_WRITE(SMH_ROM)
ADDRESS_MAP_END ADDRESS_MAP_END
static READ8_HANDLER(frogf_ppi8255_0_r) static READ8_DEVICE_HANDLER(frogf_ppi8255_r)
{ {
return ppi8255_0_r(machine, offset >> 3); return ppi8255_r(device, offset >> 3);
} }
static READ8_HANDLER(frogf_ppi8255_1_r) static WRITE8_DEVICE_HANDLER(frogf_ppi8255_w)
{ {
return ppi8255_1_r(machine, offset >> 3); ppi8255_w(device, offset >> 3, data);
}
static WRITE8_HANDLER(frogf_ppi8255_0_w)
{
ppi8255_0_w(machine, offset >> 3, data);
}
static WRITE8_HANDLER(frogf_ppi8255_1_w)
{
ppi8255_1_w(machine, offset >> 3, data);
} }
static ADDRESS_MAP_START( frogf_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( frogf_map, ADDRESS_SPACE_PROGRAM, 8 )
@ -398,8 +378,8 @@ static ADDRESS_MAP_START( frogf_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xa808, 0xa808) AM_WRITE(galaxold_coin_counter_1_w) AM_RANGE(0xa808, 0xa808) AM_WRITE(galaxold_coin_counter_1_w)
AM_RANGE(0xa80e, 0xa80e) AM_WRITE(galaxold_coin_counter_0_w) AM_RANGE(0xa80e, 0xa80e) AM_WRITE(galaxold_coin_counter_0_w)
AM_RANGE(0xb800, 0xb800) AM_READ(watchdog_reset_r) AM_RANGE(0xb800, 0xb800) AM_READ(watchdog_reset_r)
AM_RANGE(0xd000, 0xd018) AM_READWRITE(frogf_ppi8255_0_r, frogf_ppi8255_0_w) AM_RANGE(0xd000, 0xd018) AM_DEVREADWRITE(PPI8255, "ppi8255_0", frogf_ppi8255_r, frogf_ppi8255_w)
AM_RANGE(0xe000, 0xe018) AM_READWRITE(frogf_ppi8255_1_r, frogf_ppi8255_1_w) AM_RANGE(0xe000, 0xe018) AM_DEVREADWRITE(PPI8255, "ppi8255_1", frogf_ppi8255_r, frogf_ppi8255_w)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( ad2083_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( ad2083_map, ADDRESS_SPACE_PROGRAM, 8 )
@ -1860,6 +1840,12 @@ static MACHINE_DRIVER_START( scramble )
MDRV_MACHINE_RESET(scramble) MDRV_MACHINE_RESET(scramble)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( scramble_ppi_ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( scramble_ppi_ppi8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(16000.0/132/2) MDRV_SCREEN_REFRESH_RATE(16000.0/132/2)
@ -1954,6 +1940,12 @@ static MACHINE_DRIVER_START( mars )
MDRV_CPU_MODIFY("main") MDRV_CPU_MODIFY("main")
MDRV_CPU_PROGRAM_MAP(mars_readmem,mars_writemem) MDRV_CPU_PROGRAM_MAP(mars_readmem,mars_writemem)
MDRV_DEVICE_MODIFY( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( mars_ppi8255_intf[0] )
MDRV_DEVICE_MODIFY( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( mars_ppi8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_PALETTE_LENGTH(32+64+2+0) /* 32 for characters, 64 for stars, 2 for bullets, 0/1 for background */ MDRV_PALETTE_LENGTH(32+64+2+0) /* 32 for characters, 64 for stars, 2 for bullets, 0/1 for background */
MDRV_PALETTE_INIT(galaxold) MDRV_PALETTE_INIT(galaxold)
@ -1979,6 +1971,12 @@ static MACHINE_DRIVER_START( newsin7 )
MDRV_CPU_MODIFY("main") MDRV_CPU_MODIFY("main")
MDRV_CPU_PROGRAM_MAP(newsin7_readmem,newsin7_writemem) MDRV_CPU_PROGRAM_MAP(newsin7_readmem,newsin7_writemem)
MDRV_DEVICE_MODIFY( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( mars_ppi8255_intf[0] )
MDRV_DEVICE_MODIFY( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( mars_ppi8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_GFXDECODE(newsin7) MDRV_GFXDECODE(newsin7)
MDRV_PALETTE_LENGTH(32+64+2+0) /* 32 for characters, 64 for stars, 2 for bullets, 0/1 for background */ MDRV_PALETTE_LENGTH(32+64+2+0) /* 32 for characters, 64 for stars, 2 for bullets, 0/1 for background */
@ -1993,6 +1991,12 @@ static MACHINE_DRIVER_START( mrkougar )
MDRV_CPU_MODIFY("main") MDRV_CPU_MODIFY("main")
MDRV_CPU_PROGRAM_MAP(mars_readmem,mrkougar_writemem) MDRV_CPU_PROGRAM_MAP(mars_readmem,mrkougar_writemem)
MDRV_DEVICE_MODIFY( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( mrkougar_ppi8255_intf[0] )
MDRV_DEVICE_MODIFY( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( mrkougar_ppi8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_GFXDECODE(mrkougar) MDRV_GFXDECODE(mrkougar)
MDRV_PALETTE_LENGTH(32+64+2+0) /* 32 for characters, 64 for stars, 2 for bullets, 0/1 for background */ MDRV_PALETTE_LENGTH(32+64+2+0) /* 32 for characters, 64 for stars, 2 for bullets, 0/1 for background */
@ -2006,6 +2010,12 @@ static MACHINE_DRIVER_START( mrkougb )
MDRV_CPU_MODIFY("main") MDRV_CPU_MODIFY("main")
MDRV_CPU_PROGRAM_MAP(mars_readmem,mrkougar_writemem) MDRV_CPU_PROGRAM_MAP(mars_readmem,mrkougar_writemem)
MDRV_DEVICE_MODIFY( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( mrkougar_ppi8255_intf[0] )
MDRV_DEVICE_MODIFY( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( mrkougar_ppi8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_PALETTE_LENGTH(32+64+2+0) /* 32 for characters, 64 for stars, 2 for bullets, 0/1 for background */ MDRV_PALETTE_LENGTH(32+64+2+0) /* 32 for characters, 64 for stars, 2 for bullets, 0/1 for background */
MDRV_PALETTE_INIT(galaxold) MDRV_PALETTE_INIT(galaxold)
@ -2018,6 +2028,12 @@ static MACHINE_DRIVER_START( ckongs )
MDRV_CPU_MODIFY("main") MDRV_CPU_MODIFY("main")
MDRV_CPU_PROGRAM_MAP(ckongs_readmem,ckongs_writemem) MDRV_CPU_PROGRAM_MAP(ckongs_readmem,ckongs_writemem)
MDRV_DEVICE_MODIFY( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( ckongs_ppi8255_intf[0] )
MDRV_DEVICE_MODIFY( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( ckongs_ppi8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_PALETTE_LENGTH(32+64+2+0) /* 32 for characters, 64 for stars, 2 for bullets, 0/1 for background */ MDRV_PALETTE_LENGTH(32+64+2+0) /* 32 for characters, 64 for stars, 2 for bullets, 0/1 for background */
MDRV_PALETTE_INIT(galaxold) MDRV_PALETTE_INIT(galaxold)
@ -2031,6 +2047,9 @@ static MACHINE_DRIVER_START( hotshock )
MDRV_CPU_MODIFY("main") MDRV_CPU_MODIFY("main")
MDRV_CPU_PROGRAM_MAP(hotshock_readmem,hotshock_writemem) MDRV_CPU_PROGRAM_MAP(hotshock_readmem,hotshock_writemem)
MDRV_DEVICE_REMOVE( "ppi8255_0", PPI8255 )
MDRV_DEVICE_REMOVE( "ppi8255_1", PPI8255 )
MDRV_CPU_MODIFY("audio") MDRV_CPU_MODIFY("audio")
MDRV_CPU_IO_MAP(hotshock_sound_readport,hotshock_sound_writeport) MDRV_CPU_IO_MAP(hotshock_sound_readport,hotshock_sound_writeport)
@ -2197,6 +2216,7 @@ static MACHINE_DRIVER_START( turpins )
MDRV_IMPORT_FROM(scramble) MDRV_IMPORT_FROM(scramble)
MDRV_CPU_MODIFY("main") MDRV_CPU_MODIFY("main")
MDRV_CPU_PROGRAM_MAP(turpins_readmem,turpins_writemem) MDRV_CPU_PROGRAM_MAP(turpins_readmem,turpins_writemem)
MACHINE_DRIVER_END MACHINE_DRIVER_END
/*************************************************************************** /***************************************************************************

69
src/mame/drivers/segag80r.c
View File

@ -300,6 +300,12 @@ static WRITE8_HANDLER( coin_count_w )
* *
*************************************/ *************************************/
static READ8_HANDLER( sindbadm_portb_r )
{
return input_port_read(machine, "FC");
}
static WRITE8_HANDLER( sindbadm_soundport_w ) static WRITE8_HANDLER( sindbadm_soundport_w )
{ {
soundlatch_w(machine,0,data); soundlatch_w(machine,0,data);
@ -329,6 +335,24 @@ static WRITE8_HANDLER( sindbadm_SN76496_1_w )
/*************************************
*
* PPI 8255 configurations
*
*************************************/
static const ppi8255_interface sindbadm_ppi_intf =
{
NULL,
sindbadm_portb_r,
NULL,
sindbadm_soundport_w,
NULL,
sindbadm_misc_w
};
/************************************* /*************************************
* *
* Main CPU memory handlers * Main CPU memory handlers
@ -355,9 +379,20 @@ static ADDRESS_MAP_START( main_portmap, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( main_ppi8255_portmap, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x0c, 0x0f) AM_DEVREADWRITE(PPI8255, "ppi8255", ppi8255_r, ppi8255_w)
AM_RANGE(0xbe, 0xbf) AM_READWRITE(segag80r_video_port_r, segag80r_video_port_w)
AM_RANGE(0xf9, 0xf9) AM_MIRROR(0x04) AM_WRITE(coin_count_w)
AM_RANGE(0xf8, 0xfb) AM_READ(mangled_ports_r)
AM_RANGE(0xfc, 0xfc) AM_READ_PORT("FC")
ADDRESS_MAP_END
static ADDRESS_MAP_START( sindbadm_portmap, ADDRESS_SPACE_IO, 8 ) static ADDRESS_MAP_START( sindbadm_portmap, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff) ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x42, 0x43) AM_READWRITE(segag80r_video_port_r, segag80r_video_port_w) AM_RANGE(0x42, 0x43) AM_READWRITE(segag80r_video_port_r, segag80r_video_port_w)
AM_RANGE(0x80, 0x83) AM_DEVREADWRITE(PPI8255, "ppi8255", ppi8255_r, ppi8255_w)
AM_RANGE(0xf8, 0xfb) AM_READ(mangled_ports_r) AM_RANGE(0xf8, 0xfb) AM_READ(mangled_ports_r)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -854,6 +889,9 @@ static MACHINE_DRIVER_START( 005 )
/* basic machine hardware */ /* basic machine hardware */
MDRV_IMPORT_FROM(g80r_base) MDRV_IMPORT_FROM(g80r_base)
MDRV_CPU_MODIFY("main")
MDRV_CPU_IO_MAP(main_ppi8255_portmap,0)
/* sound boards */ /* sound boards */
MDRV_IMPORT_FROM(005_sound_board) MDRV_IMPORT_FROM(005_sound_board)
MACHINE_DRIVER_END MACHINE_DRIVER_END
@ -881,6 +919,9 @@ static MACHINE_DRIVER_START( monsterb )
/* basic machine hardware */ /* basic machine hardware */
MDRV_IMPORT_FROM(g80r_base) MDRV_IMPORT_FROM(g80r_base)
MDRV_CPU_MODIFY("main")
MDRV_CPU_IO_MAP(main_ppi8255_portmap,0)
/* background board changes */ /* background board changes */
MDRV_GFXDECODE(monsterb) MDRV_GFXDECODE(monsterb)
MDRV_PALETTE_LENGTH(64+64) MDRV_PALETTE_LENGTH(64+64)
@ -913,6 +954,9 @@ static MACHINE_DRIVER_START( sindbadm )
MDRV_CPU_IO_MAP(sindbadm_portmap,0) MDRV_CPU_IO_MAP(sindbadm_portmap,0)
MDRV_CPU_VBLANK_INT("main", sindbadm_vblank_start) MDRV_CPU_VBLANK_INT("main", sindbadm_vblank_start)
MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( sindbadm_ppi_intf )
/* video hardware */ /* video hardware */
MDRV_GFXDECODE(monsterb) MDRV_GFXDECODE(monsterb)
MDRV_PALETTE_LENGTH(64+64) MDRV_PALETTE_LENGTH(64+64)
@ -1414,9 +1458,6 @@ static DRIVER_INIT( 005 )
/* configure video */ /* configure video */
segag80r_background_pcb = G80_BACKGROUND_NONE; segag80r_background_pcb = G80_BACKGROUND_NONE;
/* install the 8255 PPI for the sound board */
memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_IO, 0x0c, 0x0f, 0, 0, ppi8255_0_r, ppi8255_0_w);
} }
@ -1452,9 +1493,6 @@ static DRIVER_INIT( monsterb )
/* install background board handlers */ /* install background board handlers */
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_IO, 0xb8, 0xbd, 0, 0, monsterb_back_port_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_IO, 0xb8, 0xbd, 0, 0, monsterb_back_port_w);
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xe000, 0xffff, 0, 0, monsterb_vidram_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xe000, 0xffff, 0, 0, monsterb_vidram_w);
/* install Monster Bash sound board */
memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_IO, 0x0c, 0x0f, 0, 0, ppi8255_0_r, ppi8255_0_w);
} }
@ -1472,9 +1510,6 @@ static DRIVER_INIT( monster2 )
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_IO, 0xb4, 0xb5, 0, 0, pignewt_back_color_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_IO, 0xb4, 0xb5, 0, 0, pignewt_back_color_w);
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_IO, 0xb8, 0xbd, 0, 0, pignewt_back_port_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_IO, 0xb8, 0xbd, 0, 0, pignewt_back_port_w);
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xe000, 0xffff, 0, 0, pignewt_vidram_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xe000, 0xffff, 0, 0, pignewt_vidram_w);
/* install Monster Bash sound board */
memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_IO, 0x0c, 0x0f, 0, 0, ppi8255_0_r, ppi8255_0_w);
} }
@ -1500,17 +1535,6 @@ static DRIVER_INIT( pignewt )
static DRIVER_INIT( sindbadm ) static DRIVER_INIT( sindbadm )
{ {
static ppi8255_interface ppi_intf =
{
1,
{ 0 },
{ 0 },
{ 0 },
{ sindbadm_soundport_w },
{ 0 },
{ sindbadm_misc_w }
};
/* configure the encrypted Z80 */ /* configure the encrypted Z80 */
sindbadm_decode(); sindbadm_decode();
sega_security(0); sega_security(0);
@ -1521,11 +1545,6 @@ static DRIVER_INIT( sindbadm )
/* install background board handlers */ /* install background board handlers */
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_IO, 0x40, 0x41, 0, 0, sindbadm_back_port_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_IO, 0x40, 0x41, 0, 0, sindbadm_back_port_w);
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xe000, 0xffff, 0, 0, sindbadm_vidram_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xe000, 0xffff, 0, 0, sindbadm_vidram_w);
/* install the 8255 PPI for the sound board */
memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_IO, 0x80, 0x83, 0, 0, ppi8255_0_r, ppi8255_0_w);
ppi_intf.portBread[0] = port_tag_to_handler8("FC");
ppi8255_init(&ppi_intf);
} }

50
src/mame/drivers/segahang.c
View File

@ -63,15 +63,24 @@ static READ8_HANDLER( adc_status_r );
* *
*************************************/ *************************************/
static const ppi8255_interface hangon_ppi_intf = static const ppi8255_interface hangon_ppi_intf[2] =
{ {
2, {
{ NULL, NULL }, NULL,
{ NULL, NULL }, NULL,
{ NULL, adc_status_r }, NULL,
{ soundlatch_w, sub_control_adc_w }, soundlatch_w,
{ video_lamps_w, NULL }, video_lamps_w,
{ tilemap_sound_w, NULL } tilemap_sound_w
},
{
NULL,
NULL,
adc_status_r,
sub_control_adc_w,
NULL,
NULL
}
}; };
@ -84,9 +93,6 @@ static const ppi8255_interface hangon_ppi_intf =
static void hangon_generic_init(void) static void hangon_generic_init(void)
{ {
/* configure the 8255 interface */
ppi8255_init(&hangon_ppi_intf);
/* reset the custom handlers and other pointers */ /* reset the custom handlers and other pointers */
i8751_vblank_hook = NULL; i8751_vblank_hook = NULL;
} }
@ -138,7 +144,7 @@ static INTERRUPT_GEN( hangon_irq )
static TIMER_CALLBACK( delayed_ppi8255_w ) static TIMER_CALLBACK( delayed_ppi8255_w )
{ {
ppi8255_0_w(machine, param >> 8, param & 0xff); ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), param >> 8, param & 0xff);
} }
@ -147,13 +153,13 @@ static READ16_HANDLER( hangon_io_r )
switch (offset & 0x3020/2) switch (offset & 0x3020/2)
{ {
case 0x0000/2: /* PPI @ 4B */ case 0x0000/2: /* PPI @ 4B */
return ppi8255_0_r(machine, offset & 3); return ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), offset & 3);
case 0x1000/2: /* Input ports and DIP switches */ case 0x1000/2: /* Input ports and DIP switches */
return input_port_read_indexed(machine, offset & 3); return input_port_read_indexed(machine, offset & 3);
case 0x3000/2: /* PPI @ 4C */ case 0x3000/2: /* PPI @ 4C */
return ppi8255_1_r(machine, offset & 3); return ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), offset & 3);
case 0x3020/2: /* ADC0804 data output */ case 0x3020/2: /* ADC0804 data output */
return input_port_read_indexed(machine, 4 + adc_select); return input_port_read_indexed(machine, 4 + adc_select);
@ -176,7 +182,7 @@ static WRITE16_HANDLER( hangon_io_w )
return; return;
case 0x3000/2: /* PPI @ 4C */ case 0x3000/2: /* PPI @ 4C */
ppi8255_1_w(machine, offset & 3, data & 0xff); ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), offset & 3, data & 0xff);
return; return;
case 0x3020/2: /* ADC0804 */ case 0x3020/2: /* ADC0804 */
@ -192,14 +198,14 @@ static READ16_HANDLER( sharrier_io_r )
switch (offset & 0x0030/2) switch (offset & 0x0030/2)
{ {
case 0x0000/2: case 0x0000/2:
return ppi8255_0_r(machine, offset & 3); return ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), offset & 3);
case 0x0010/2: /* Input ports and DIP switches */ case 0x0010/2: /* Input ports and DIP switches */
return input_port_read_indexed(machine, offset & 3); return input_port_read_indexed(machine, offset & 3);
case 0x0020/2: /* PPI @ 4C */ case 0x0020/2: /* PPI @ 4C */
if (offset == 2) return 0; if (offset == 2) return 0;
return ppi8255_1_r(machine, offset & 3); return ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), offset & 3);
case 0x0030/2: /* ADC0804 data output */ case 0x0030/2: /* ADC0804 data output */
return input_port_read_indexed(machine, 4 + adc_select); return input_port_read_indexed(machine, 4 + adc_select);
@ -222,7 +228,7 @@ static WRITE16_HANDLER( sharrier_io_w )
return; return;
case 0x0020/2: /* PPI @ 4C */ case 0x0020/2: /* PPI @ 4C */
ppi8255_1_w(machine, offset & 3, data & 0xff); ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), offset & 3, data & 0xff);
return; return;
case 0x0030/2: /* ADC0804 */ case 0x0030/2: /* ADC0804 */
@ -346,7 +352,7 @@ static void sound_irq(int irq)
static READ8_HANDLER( sound_data_r ) static READ8_HANDLER( sound_data_r )
{ {
/* assert ACK */ /* assert ACK */
ppi8255_set_portC(0, 0x00); ppi8255_set_portC(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), 0x00);
return soundlatch_r(machine, offset); return soundlatch_r(machine, offset);
} }
@ -857,6 +863,12 @@ static MACHINE_DRIVER_START( hangon_base )
MDRV_MACHINE_RESET(hangon) MDRV_MACHINE_RESET(hangon)
MDRV_INTERLEAVE(100) MDRV_INTERLEAVE(100)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( hangon_ppi_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( hangon_ppi_intf[1] )
/* video hardware */ /* video hardware */
MDRV_GFXDECODE(segahang) MDRV_GFXDECODE(segahang)
MDRV_PALETTE_LENGTH(2048*3) MDRV_PALETTE_LENGTH(2048*3)

23
src/mame/drivers/segaorun.c
View File

@ -79,13 +79,12 @@ static WRITE8_HANDLER( video_control_w );
static const ppi8255_interface single_ppi_intf = static const ppi8255_interface single_ppi_intf =
{ {
1, unknown_porta_r,
{ unknown_porta_r }, unknown_portb_r,
{ unknown_portb_r }, unknown_portc_r,
{ unknown_portc_r }, unknown_porta_w,
{ unknown_porta_w }, unknown_portb_w,
{ unknown_portb_w }, video_control_w
{ video_control_w }
}; };
@ -156,9 +155,6 @@ static void outrun_generic_init(running_machine *machine)
/* init the FD1094 */ /* init the FD1094 */
fd1094_driver_init(segaic16_memory_mapper_set_decrypted); fd1094_driver_init(segaic16_memory_mapper_set_decrypted);
/* configure the 8255 interface */
ppi8255_init(&single_ppi_intf);
/* reset the custom handlers and other pointers */ /* reset the custom handlers and other pointers */
custom_io_r = NULL; custom_io_r = NULL;
custom_io_w = NULL; custom_io_w = NULL;
@ -385,7 +381,7 @@ static READ16_HANDLER( outrun_custom_io_r )
switch (offset & 0x70/2) switch (offset & 0x70/2)
{ {
case 0x00/2: case 0x00/2:
return ppi8255_0_r(machine, offset & 3); return ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255" ), offset & 3);
case 0x10/2: case 0x10/2:
return input_port_read_indexed(machine, offset & 3); return input_port_read_indexed(machine, offset & 3);
@ -412,7 +408,7 @@ static WRITE16_HANDLER( outrun_custom_io_w )
{ {
case 0x00/2: case 0x00/2:
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
ppi8255_0_w(machine, offset & 3, data); ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255" ), offset & 3, data);
return; return;
case 0x20/2: case 0x20/2:
@ -829,6 +825,9 @@ static MACHINE_DRIVER_START( outrundx )
MDRV_MACHINE_RESET(outrun) MDRV_MACHINE_RESET(outrun)
MDRV_INTERLEAVE(100) MDRV_INTERLEAVE(100)
MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( single_ppi_intf )
/* video hardware */ /* video hardware */
MDRV_GFXDECODE(segaorun) MDRV_GFXDECODE(segaorun)
MDRV_PALETTE_LENGTH(4096*3) MDRV_PALETTE_LENGTH(4096*3)

25
src/mame/drivers/segas16a.c
View File

@ -198,13 +198,12 @@ static WRITE8_HANDLER( tilemap_sound_w );
static const ppi8255_interface single_ppi_intf = static const ppi8255_interface single_ppi_intf =
{ {
1, NULL,
{ NULL }, NULL,
{ NULL }, NULL,
{ NULL }, soundlatch_w,
{ soundlatch_w }, video_control_w,
{ video_control_w }, tilemap_sound_w
{ tilemap_sound_w }
}; };
@ -228,9 +227,6 @@ static void system16a_generic_init(running_machine *machine)
custom_io_w = NULL; custom_io_w = NULL;
lamp_changed_w = NULL; lamp_changed_w = NULL;
i8751_vblank_hook = NULL; i8751_vblank_hook = NULL;
/* configure the 8255 interface */
ppi8255_init(&single_ppi_intf);
} }
@ -266,7 +262,7 @@ static MACHINE_RESET( system16a )
static TIMER_CALLBACK( delayed_ppi8255_w ) static TIMER_CALLBACK( delayed_ppi8255_w )
{ {
ppi8255_0_w(machine, param >> 8, param & 0xff); ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255" ), param >> 8, param & 0xff);
} }
@ -276,7 +272,7 @@ static READ16_HANDLER( standard_io_r )
switch (offset & (0x3000/2)) switch (offset & (0x3000/2))
{ {
case 0x0000/2: case 0x0000/2:
return ppi8255_0_r(machine, offset & 3); return ppi8255_r(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255" ), offset & 3);
case 0x1000/2: case 0x1000/2:
return input_port_read_indexed(machine, offset & 3); return input_port_read_indexed(machine, offset & 3);
@ -396,7 +392,7 @@ static WRITE8_HANDLER( tilemap_sound_w )
static READ8_HANDLER( sound_data_r ) static READ8_HANDLER( sound_data_r )
{ {
/* assert ACK */ /* assert ACK */
ppi8255_set_portC(0, 0x00); ppi8255_set_portC(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255" ), 0x00);
return soundlatch_r(machine, offset); return soundlatch_r(machine, offset);
} }
@ -1792,6 +1788,9 @@ static MACHINE_DRIVER_START( system16a )
MDRV_MACHINE_RESET(system16a) MDRV_MACHINE_RESET(system16a)
MDRV_NVRAM_HANDLER(system16a) MDRV_NVRAM_HANDLER(system16a)
MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( single_ppi_intf )
/* video hardware */ /* video hardware */
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_REFRESH_RATE(60)

42
src/mame/drivers/smstrv.c
View File

@ -188,9 +188,9 @@ static WRITE8_HANDLER( w6 )
static ADDRESS_MAP_START( smstrv_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( smstrv_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x00000, 0x007ff) AM_RAM AM_RANGE(0x00000, 0x007ff) AM_RAM
AM_RANGE(0x00800, 0x00803) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0x00800, 0x00803) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0x01000, 0x01005) AM_RAM AM_RANGE(0x01000, 0x01005) AM_RAM
AM_RANGE(0x01800, 0x01803) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE(0x01800, 0x01803) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0x08000, 0x0ffff) AM_ROM AM_RANGE(0x08000, 0x0ffff) AM_ROM
AM_RANGE(0xf8000, 0xfffff) AM_ROM // mirror for vectors AM_RANGE(0xf8000, 0xfffff) AM_ROM // mirror for vectors
ADDRESS_MAP_END ADDRESS_MAP_END
@ -205,24 +205,27 @@ static VIDEO_UPDATE( smstrv )
return 0; return 0;
} }
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf[2] =
{ {
2, /* 2 chips */ {
{ r1, r4 }, /* Port A read */ r1, /* Port A read */
{ r2, r5 }, /* Port B read */ r2, /* Port B read */
{ r3, r6 }, /* Port C read */ r3, /* Port C read */
{ w1, w4 }, /* Port A write */ w1, /* Port A write */
{ w2, w5 }, /* Port B write */ w2, /* Port B write */
{ w3, w6 }, /* Port C write */ w3 /* Port C write */
},
{
r4, /* Port A read */
r5, /* Port B read */
r6, /* Port C read */
w4, /* Port A write */
w5, /* Port B write */
w6 /* Port C write */
}
}; };
static MACHINE_RESET( smstrv )
{
ppi8255_init(&ppi8255_intf);
}
static MACHINE_DRIVER_START( smstrv ) static MACHINE_DRIVER_START( smstrv )
MDRV_CPU_ADD(I8088,24000000/2) MDRV_CPU_ADD(I8088,24000000/2)
MDRV_CPU_PROGRAM_MAP(smstrv_map,0) MDRV_CPU_PROGRAM_MAP(smstrv_map,0)
@ -230,7 +233,12 @@ static MACHINE_DRIVER_START( smstrv )
MDRV_CPU_VBLANK_INT("main", nmi_line_pulse) MDRV_CPU_VBLANK_INT("main", nmi_line_pulse)
// MDRV_NVRAM_HANDLER(generic_0fill) // MDRV_NVRAM_HANDLER(generic_0fill)
MDRV_MACHINE_RESET(smstrv)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)

91
src/mame/drivers/taxidrvr.c
View File

@ -93,23 +93,50 @@ static WRITE8_HANDLER( p8910_0b_w )
} }
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf[5] =
{ {
5, /* 5 chips */ {
{ p0a_r, NULL, NULL, NULL, NULL }, /* Port A read */ p0a_r, /* Port A read */
{ NULL, p1b_r, NULL, NULL, NULL }, /* Port B read */ NULL, /* Port B read */
{ p0c_r, p1c_r, NULL, NULL, NULL }, /* Port C read */ p0c_r, /* Port C read */
{ NULL, p1a_w, p2a_w, p3a_w, p4a_w }, /* Port A write */ NULL, /* Port A write */
{ p0b_w, NULL, p2b_w, p3b_w, p4b_w }, /* Port B write */ p0b_w, /* Port B write */
{ p0c_w, p1c_w, p2c_w, p3c_w, p4c_w } /* Port C write */ p0c_w /* Port C write */
},
{
NULL, /* Port A read */
p1b_r, /* Port B read */
p1c_r, /* Port C read */
p1a_w, /* Port A write */
NULL, /* Port B write */
p1c_w /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
NULL, /* Port C read */
p2a_w, /* Port A write */
p2b_w, /* Port B write */
p2c_w /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
NULL, /* Port C read */
p3a_w, /* Port A write */
p3b_w, /* Port B write */
p3c_w /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
NULL, /* Port C read */
p4a_w, /* Port A write */
p4b_w, /* Port B write */
p4c_w /* Port C write */
}
}; };
static MACHINE_RESET( taxidrvr )
{
ppi8255_init(&ppi8255_intf);
}
static ADDRESS_MAP_START( readmem1, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( readmem1, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM) AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
@ -120,10 +147,10 @@ static ADDRESS_MAP_START( readmem1, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM) AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
AM_RANGE(0xd800, 0xdfff) AM_READ(SMH_RAM) AM_RANGE(0xd800, 0xdfff) AM_READ(SMH_RAM)
AM_RANGE(0xe000, 0xf3ff) AM_READ(SMH_RAM) AM_RANGE(0xe000, 0xf3ff) AM_READ(SMH_RAM)
AM_RANGE(0xf400, 0xf403) AM_READ(ppi8255_0_r) AM_RANGE(0xf400, 0xf403) AM_DEVREAD(PPI8255, "ppi8255_0", ppi8255_r)
AM_RANGE(0xf480, 0xf483) AM_READ(ppi8255_2_r) AM_RANGE(0xf480, 0xf483) AM_DEVREAD(PPI8255, "ppi8255_2", ppi8255_r)
AM_RANGE(0xf500, 0xf503) AM_READ(ppi8255_3_r) AM_RANGE(0xf500, 0xf503) AM_DEVREAD(PPI8255, "ppi8255_3", ppi8255_r)
AM_RANGE(0xf580, 0xf583) AM_READ(ppi8255_4_r) AM_RANGE(0xf580, 0xf583) AM_DEVREAD(PPI8255, "ppi8255_4", ppi8255_r)
AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM) AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -141,10 +168,10 @@ static ADDRESS_MAP_START( writemem1, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xe400, 0xebff) AM_WRITE(SMH_RAM) AM_BASE(&taxidrvr_vram2) /* bg1 tilemap */ AM_RANGE(0xe400, 0xebff) AM_WRITE(SMH_RAM) AM_BASE(&taxidrvr_vram2) /* bg1 tilemap */
AM_RANGE(0xec00, 0xefff) AM_WRITE(SMH_RAM) AM_BASE(&taxidrvr_vram0) /* fg tilemap */ AM_RANGE(0xec00, 0xefff) AM_WRITE(SMH_RAM) AM_BASE(&taxidrvr_vram0) /* fg tilemap */
AM_RANGE(0xf000, 0xf3ff) AM_WRITE(SMH_RAM) AM_BASE(&taxidrvr_vram3) /* bg2 tilemap */ AM_RANGE(0xf000, 0xf3ff) AM_WRITE(SMH_RAM) AM_BASE(&taxidrvr_vram3) /* bg2 tilemap */
AM_RANGE(0xf400, 0xf403) AM_WRITE(ppi8255_0_w) AM_RANGE(0xf400, 0xf403) AM_DEVWRITE(PPI8255, "ppi8255_0", ppi8255_w)
AM_RANGE(0xf480, 0xf483) AM_WRITE(ppi8255_2_w) /* "sprite1" placement */ AM_RANGE(0xf480, 0xf483) AM_DEVWRITE(PPI8255, "ppi8255_2", ppi8255_w) /* "sprite1" placement */
AM_RANGE(0xf500, 0xf503) AM_WRITE(ppi8255_3_w) /* "sprite2" placement */ AM_RANGE(0xf500, 0xf503) AM_DEVWRITE(PPI8255, "ppi8255_3", ppi8255_w) /* "sprite2" placement */
AM_RANGE(0xf580, 0xf583) AM_WRITE(ppi8255_4_w) /* "sprite3" placement */ AM_RANGE(0xf580, 0xf583) AM_DEVWRITE(PPI8255, "ppi8255_4", ppi8255_w) /* "sprite3" placement */
// AM_RANGE(0xf780, 0xf781) AM_WRITE(SMH_RAM) /* more scroll registers? */ // AM_RANGE(0xf780, 0xf781) AM_WRITE(SMH_RAM) /* more scroll registers? */
AM_RANGE(0xf782, 0xf787) AM_WRITE(SMH_RAM) AM_BASE(&taxidrvr_scroll) /* bg scroll (three copies always identical) */ AM_RANGE(0xf782, 0xf787) AM_WRITE(SMH_RAM) AM_BASE(&taxidrvr_scroll) /* bg scroll (three copies always identical) */
AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM) AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
@ -154,7 +181,7 @@ static ADDRESS_MAP_START( readmem2, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM) AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
AM_RANGE(0x6000, 0x67ff) AM_READ(SMH_RAM) AM_RANGE(0x6000, 0x67ff) AM_READ(SMH_RAM)
AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM) AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
AM_RANGE(0xa000, 0xa003) AM_READ(ppi8255_1_r) AM_RANGE(0xa000, 0xa003) AM_DEVREAD(PPI8255, "ppi8255_1", ppi8255_r)
AM_RANGE(0xe000, 0xe000) AM_READ(input_port_0_r) AM_RANGE(0xe000, 0xe000) AM_READ(input_port_0_r)
AM_RANGE(0xe001, 0xe001) AM_READ(input_port_1_r) AM_RANGE(0xe001, 0xe001) AM_READ(input_port_1_r)
AM_RANGE(0xe002, 0xe002) AM_READ(input_port_2_r) AM_RANGE(0xe002, 0xe002) AM_READ(input_port_2_r)
@ -166,7 +193,7 @@ static ADDRESS_MAP_START( writemem2, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM) AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x6000, 0x67ff) AM_WRITE(SMH_RAM) AM_RANGE(0x6000, 0x67ff) AM_WRITE(SMH_RAM)
AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM) AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
AM_RANGE(0xa000, 0xa003) AM_WRITE(ppi8255_1_w) AM_RANGE(0xa000, 0xa003) AM_DEVWRITE(PPI8255, "ppi8255_1", ppi8255_w)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( readmem3, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( readmem3, ADDRESS_SPACE_PROGRAM, 8 )
@ -375,7 +402,21 @@ static MACHINE_DRIVER_START( taxidrvr )
MDRV_INTERLEAVE(100) /* 100 CPU slices per frame - an high value to ensure proper */ MDRV_INTERLEAVE(100) /* 100 CPU slices per frame - an high value to ensure proper */
/* synchronization of the CPUs */ /* synchronization of the CPUs */
MDRV_MACHINE_RESET(taxidrvr)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[1] )
MDRV_DEVICE_ADD( "ppi8255_2", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[2] )
MDRV_DEVICE_ADD( "ppi8255_3", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[3] )
MDRV_DEVICE_ADD( "ppi8255_4", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[4] )
/* video hardware */ /* video hardware */
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)

36
src/mame/drivers/tcl.c
View File

@ -86,22 +86,26 @@ static GFXDECODE_START( tcl )
GFXDECODE_ENTRY( REGION_GFX2, 0, charlayout2, 0, 16 ) /* wrong */ GFXDECODE_ENTRY( REGION_GFX2, 0, charlayout2, 0, 16 ) /* wrong */
GFXDECODE_END GFXDECODE_END
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf[2] =
{ {
2, {
{ NULL, NULL }, NULL,
{ NULL, NULL }, NULL,
{ NULL, NULL }, NULL,
{ NULL, NULL }, NULL,
{ NULL, NULL }, NULL,
{ NULL, NULL }, NULL
},
{
NULL,
NULL,
NULL,
NULL,
NULL,
NULL
}
}; };
static MACHINE_RESET( tcl )
{
ppi8255_init(&ppi8255_intf);
}
static MACHINE_DRIVER_START( tcl ) static MACHINE_DRIVER_START( tcl )
@ -123,7 +127,11 @@ static MACHINE_DRIVER_START( tcl )
MDRV_VIDEO_START(tcl) MDRV_VIDEO_START(tcl)
MDRV_VIDEO_UPDATE(tcl) MDRV_VIDEO_UPDATE(tcl)
MDRV_MACHINE_RESET(tcl) MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[1] )
/* sound hardware */ /* sound hardware */
MDRV_SPEAKER_STANDARD_MONO("mono") MDRV_SPEAKER_STANDARD_MONO("mono")

180
src/mame/drivers/turbo.c
View File

@ -267,6 +267,43 @@ static WRITE8_HANDLER( turbo_ppi3c_w )
} }
static const ppi8255_interface turbo_8255_intf[4] =
{
{
NULL,
NULL,
NULL,
turbo_ppi0a_w,
turbo_ppi0b_w,
turbo_ppi0c_w
},
{
NULL,
NULL,
NULL,
turbo_ppi1a_w,
turbo_ppi1b_w,
turbo_ppi1c_w
},
{
NULL,
NULL,
NULL,
turbo_sound_a_w,
turbo_sound_b_w,
turbo_sound_c_w
},
{
turbo_analog_r,
input_port_2_r,
NULL,
NULL,
NULL,
turbo_ppi3c_w
}
};
/************************************* /*************************************
* *
@ -312,6 +349,27 @@ static WRITE8_HANDLER( subroc3d_ppi0b_w )
} }
static const ppi8255_interface subroc3d_8255_intf[2] =
{
{
NULL,
NULL,
NULL,
subroc3d_ppi0a_w,
subroc3d_ppi0b_w,
subroc3d_ppi0c_w
},
{
NULL,
NULL,
NULL,
subroc3d_sound_a_w,
subroc3d_sound_b_w,
subroc3d_sound_c_w
}
};
/************************************* /*************************************
* *
@ -364,6 +422,28 @@ static WRITE8_HANDLER( buckrog_ppi1c_w )
} }
static const ppi8255_interface buckrog_8255_intf[2] =
{
{
NULL,
NULL,
NULL,
buckrog_ppi0a_w,
buckrog_ppi0b_w,
buckrog_ppi0c_w
},
{
NULL,
NULL,
NULL,
buckrog_sound_a_w,
buckrog_sound_b_w,
buckrog_ppi1c_w
}
};
/************************************* /*************************************
* *
@ -599,7 +679,7 @@ static READ8_HANDLER( buckrog_cpu2_command_r )
{ {
/* assert ACK */ /* assert ACK */
turbo_state *state = machine->driver_data; turbo_state *state = machine->driver_data;
ppi8255_set_portC(0, 0x00); ppi8255_set_portC(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), 0x00);
return state->buckrog_command; return state->buckrog_command;
} }
@ -638,11 +718,11 @@ static READ8_HANDLER( buckrog_port_3_r )
static TIMER_CALLBACK( delayed_ppi8255_w ) static TIMER_CALLBACK( delayed_ppi8255_w )
{ {
ppi8255_0_w(machine, param >> 8, param & 0xff); ppi8255_w(device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), param >> 8, param & 0xff);
} }
static WRITE8_HANDLER( buckrog_ppi8255_0_w ) static WRITE8_DEVICE_HANDLER( buckrog_ppi8255_0_w )
{ {
/* the port C handshaking signals control the sub CPU IRQ, */ /* the port C handshaking signals control the sub CPU IRQ, */
/* so we have to sync whenever we access this PPI */ /* so we have to sync whenever we access this PPI */
@ -666,10 +746,10 @@ static ADDRESS_MAP_START( turbo_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(turbo_videoram_w) AM_BASE_MEMBER(turbo_state, videoram) AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(turbo_videoram_w) AM_BASE_MEMBER(turbo_state, videoram)
AM_RANGE(0xe800, 0xefff) AM_WRITE(turbo_collision_clear_w) AM_RANGE(0xe800, 0xefff) AM_WRITE(turbo_collision_clear_w)
AM_RANGE(0xf000, 0xf7ff) AM_RAM AM_RANGE(0xf000, 0xf7ff) AM_RAM
AM_RANGE(0xf800, 0xf803) AM_MIRROR(0x00fc) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0xf800, 0xf803) AM_MIRROR(0x00fc) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0xf900, 0xf903) AM_MIRROR(0x00fc) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE(0xf900, 0xf903) AM_MIRROR(0x00fc) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0xfa00, 0xfa03) AM_MIRROR(0x00fc) AM_READWRITE(ppi8255_2_r, ppi8255_2_w) AM_RANGE(0xfa00, 0xfa03) AM_MIRROR(0x00fc) AM_DEVREADWRITE(PPI8255, "ppi8255_2", ppi8255_r, ppi8255_w)
AM_RANGE(0xfb00, 0xfb03) AM_MIRROR(0x00fc) AM_READWRITE(ppi8255_3_r, ppi8255_3_w) AM_RANGE(0xfb00, 0xfb03) AM_MIRROR(0x00fc) AM_DEVREADWRITE(PPI8255, "ppi8255_3", ppi8255_r, ppi8255_w)
AM_RANGE(0xfc00, 0xfc01) AM_MIRROR(0x00fe) AM_READWRITE(turbo_8279_r, turbo_8279_w) AM_RANGE(0xfc00, 0xfc01) AM_MIRROR(0x00fe) AM_READWRITE(turbo_8279_r, turbo_8279_w)
AM_RANGE(0xfd00, 0xfdff) AM_READ(input_port_0_r) AM_RANGE(0xfd00, 0xfdff) AM_READ(input_port_0_r)
AM_RANGE(0xfe00, 0xfeff) AM_READ(turbo_collision_r) AM_RANGE(0xfe00, 0xfeff) AM_READ(turbo_collision_r)
@ -694,8 +774,8 @@ static ADDRESS_MAP_START( subroc3d_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xb000, 0xb7ff) AM_RAM // SCRATCH AM_RANGE(0xb000, 0xb7ff) AM_RAM // SCRATCH
AM_RANGE(0xb800, 0xbfff) // HANDLE CL AM_RANGE(0xb800, 0xbfff) // HANDLE CL
AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(turbo_videoram_w) AM_BASE_MEMBER(turbo_state, videoram) // FIX PAGE AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(turbo_videoram_w) AM_BASE_MEMBER(turbo_state, videoram) // FIX PAGE
AM_RANGE(0xe800, 0xe803) AM_MIRROR(0x07fc) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0xe800, 0xe803) AM_MIRROR(0x07fc) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0xf000, 0xf003) AM_MIRROR(0x07fc) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE(0xf000, 0xf003) AM_MIRROR(0x07fc) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
AM_RANGE(0xf800, 0xf801) AM_MIRROR(0x07fe) AM_READWRITE(turbo_8279_r, turbo_8279_w) AM_RANGE(0xf800, 0xf801) AM_MIRROR(0x07fe) AM_READWRITE(turbo_8279_r, turbo_8279_w)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -711,8 +791,8 @@ static ADDRESS_MAP_START( buckrog_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROM AM_RANGE(0x8000, 0xbfff) AM_ROM
AM_RANGE(0xc000, 0xc7ff) AM_RAM_WRITE(turbo_videoram_w) AM_BASE_MEMBER(turbo_state, videoram) // FIX PAGE AM_RANGE(0xc000, 0xc7ff) AM_RAM_WRITE(turbo_videoram_w) AM_BASE_MEMBER(turbo_state, videoram) // FIX PAGE
AM_RANGE(0xc800, 0xc803) AM_MIRROR(0x07fc) AM_READWRITE(ppi8255_0_r, buckrog_ppi8255_0_w) // 8255 AM_RANGE(0xc800, 0xc803) AM_MIRROR(0x07fc) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, buckrog_ppi8255_0_w) // 8255
AM_RANGE(0xd000, 0xd003) AM_MIRROR(0x07fc) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) // 8255 AM_RANGE(0xd000, 0xd003) AM_MIRROR(0x07fc) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w) // 8255
AM_RANGE(0xd800, 0xd801) AM_MIRROR(0x07fe) AM_READWRITE(turbo_8279_r, turbo_8279_w) // 8279 AM_RANGE(0xd800, 0xd801) AM_MIRROR(0x07fe) AM_READWRITE(turbo_8279_r, turbo_8279_w) // 8279
AM_RANGE(0xe000, 0xe3ff) AM_RAM AM_BASE_MEMBER(turbo_state, sprite_position) // CONT RAM AM_RANGE(0xe000, 0xe3ff) AM_RAM AM_BASE_MEMBER(turbo_state, sprite_position) // CONT RAM
AM_RANGE(0xe400, 0xe7ff) AM_RAM AM_BASE_MEMBER(turbo_state, spriteram) // CONT RAM AM_RANGE(0xe400, 0xe7ff) AM_RAM AM_BASE_MEMBER(turbo_state, spriteram) // CONT RAM
@ -1002,6 +1082,18 @@ static MACHINE_DRIVER_START( turbo )
MDRV_CPU_PROGRAM_MAP(turbo_map,0) MDRV_CPU_PROGRAM_MAP(turbo_map,0)
MDRV_CPU_VBLANK_INT("main", irq0_line_hold) MDRV_CPU_VBLANK_INT("main", irq0_line_hold)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( turbo_8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( turbo_8255_intf[1] )
MDRV_DEVICE_ADD( "ppi8255_2", PPI8255 )
MDRV_DEVICE_CONFIG( turbo_8255_intf[2] )
MDRV_DEVICE_ADD( "ppi8255_3", PPI8255 )
MDRV_DEVICE_CONFIG( turbo_8255_intf[3] )
/* video hardware */ /* video hardware */
MDRV_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE) MDRV_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE)
MDRV_GFXDECODE(turbo) MDRV_GFXDECODE(turbo)
@ -1028,6 +1120,12 @@ static MACHINE_DRIVER_START( subroc3d )
MDRV_CPU_PROGRAM_MAP(subroc3d_map,0) MDRV_CPU_PROGRAM_MAP(subroc3d_map,0)
MDRV_CPU_VBLANK_INT("main", irq0_line_hold) MDRV_CPU_VBLANK_INT("main", irq0_line_hold)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( subroc3d_8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( subroc3d_8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_GFXDECODE(turbo) MDRV_GFXDECODE(turbo)
MDRV_PALETTE_LENGTH(256) MDRV_PALETTE_LENGTH(256)
@ -1060,6 +1158,12 @@ static MACHINE_DRIVER_START( buckrog )
MDRV_INTERLEAVE(10) MDRV_INTERLEAVE(10)
MDRV_MACHINE_RESET(buckrog) MDRV_MACHINE_RESET(buckrog)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( buckrog_8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( buckrog_8255_intf[1] )
/* video hardware */ /* video hardware */
MDRV_GFXDECODE(turbo) MDRV_GFXDECODE(turbo)
MDRV_PALETTE_LENGTH(1024) MDRV_PALETTE_LENGTH(1024)
@ -1522,63 +1626,15 @@ static void turbo_rom_decode(void)
* *
*************************************/ *************************************/
static DRIVER_INIT( turbo )
{
static const ppi8255_interface turbo_8255_intf =
{
4,
{ NULL, NULL, NULL, turbo_analog_r },
{ NULL, NULL, NULL, input_port_2_r },
{ NULL, NULL, NULL, NULL },
{ turbo_ppi0a_w, turbo_ppi1a_w, turbo_sound_a_w, NULL },
{ turbo_ppi0b_w, turbo_ppi1b_w, turbo_sound_b_w, NULL },
{ turbo_ppi0c_w, turbo_ppi1c_w, turbo_sound_c_w, turbo_ppi3c_w }
};
ppi8255_init(&turbo_8255_intf);
}
static DRIVER_INIT( turbo_enc ) static DRIVER_INIT( turbo_enc )
{ {
turbo_rom_decode(); turbo_rom_decode();
DRIVER_INIT_CALL(turbo);
} }
static DRIVER_INIT( subroc3d )
{
static const ppi8255_interface subroc3d_8255_intf =
{
2,
{ NULL, NULL },
{ NULL, NULL },
{ NULL, NULL },
{ subroc3d_ppi0a_w, subroc3d_sound_a_w },
{ subroc3d_ppi0b_w, subroc3d_sound_b_w },
{ subroc3d_ppi0c_w, subroc3d_sound_c_w }
};
ppi8255_init(&subroc3d_8255_intf);
}
static DRIVER_INIT( buckrog )
{
static const ppi8255_interface buckrog_8255_intf =
{
2,
{ NULL, NULL },
{ NULL, NULL },
{ NULL, NULL },
{ buckrog_ppi0a_w, buckrog_sound_a_w },
{ buckrog_ppi0b_w, buckrog_sound_b_w },
{ buckrog_ppi0c_w, buckrog_ppi1c_w }
};
ppi8255_init(&buckrog_8255_intf);
}
static DRIVER_INIT( buckrog_enc ) static DRIVER_INIT( buckrog_enc )
{ {
buckrog_decode(); buckrog_decode();
DRIVER_INIT_CALL(buckrog);
} }
@ -1589,10 +1645,10 @@ static DRIVER_INIT( buckrog_enc )
* *
*************************************/ *************************************/
GAMEL( 1981, turbo, 0, turbo, turbo, turbo, ROT270, "Sega", "Turbo", 0, layout_turbo ) GAMEL( 1981, turbo, 0, turbo, turbo, 0, ROT270, "Sega", "Turbo", 0, layout_turbo )
GAMEL( 1981, turboa, turbo, turbo, turbo, turbo_enc, ROT270, "Sega", "Turbo (encrypted set 1)", 0, layout_turbo ) GAMEL( 1981, turboa, turbo, turbo, turbo, turbo_enc, ROT270, "Sega", "Turbo (encrypted set 1)", 0, layout_turbo )
GAMEL( 1981, turbob, turbo, turbo, turbo, turbo_enc, ROT270, "Sega", "Turbo (encrypted set 2)", 0, layout_turbo ) GAMEL( 1981, turbob, turbo, turbo, turbo, turbo_enc, ROT270, "Sega", "Turbo (encrypted set 2)", 0, layout_turbo )
GAMEL( 1982, subroc3d, 0, subroc3d, subroc3d, subroc3d, ORIENTATION_FLIP_X, "Sega", "Subroc-3D", 0, layout_subroc3d ) GAMEL( 1982, subroc3d, 0, subroc3d, subroc3d, 0, ORIENTATION_FLIP_X, "Sega", "Subroc-3D", 0, layout_subroc3d )
GAMEL( 1982, buckrog, 0, buckrog, buckrog, buckrog_enc, ROT0, "Sega", "Buck Rogers: Planet of Zoom", 0, layout_buckrog ) GAMEL( 1982, buckrog, 0, buckrog, buckrog, buckrog_enc, ROT0, "Sega", "Buck Rogers: Planet of Zoom", 0, layout_buckrog )
GAMEL( 1982, zoom909, buckrog, buckrog, buckrog, buckrog_enc, ROT0, "Sega", "Zoom 909", GAME_IMPERFECT_COLORS, layout_buckrog ) // bad PROM GAMEL( 1982, zoom909, buckrog, buckrog, buckrog, buckrog_enc, ROT0, "Sega", "Zoom 909", GAME_IMPERFECT_COLORS, layout_buckrog ) // bad PROM
GAMEL( 1982, buckrogn, buckrog, buckrog, buckrog, buckrog, ROT0, "Sega", "Buck Rogers: Planet of Zoom (not encrypted)", 0, layout_buckrog ) GAMEL( 1982, buckrogn, buckrog, buckrog, buckrog, 0, ROT0, "Sega", "Buck Rogers: Planet of Zoom (not encrypted)", 0, layout_buckrog )

40
src/mame/drivers/tx1.c
View File

@ -466,7 +466,7 @@ static ADDRESS_MAP_START( tx1_sound_prg, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x3000, 0x37ff) AM_RAM AM_MIRROR(0x800) AM_BASE(&z80_ram) AM_RANGE(0x3000, 0x37ff) AM_RAM AM_MIRROR(0x800) AM_BASE(&z80_ram)
AM_RANGE(0x4000, 0x4000) AM_WRITE(z80_intreq_w) AM_RANGE(0x4000, 0x4000) AM_WRITE(z80_intreq_w)
AM_RANGE(0x5000, 0x5003) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0x5000, 0x5003) AM_DEVREADWRITE(PPI8255, "ppi8255", ppi8255_r, ppi8255_w)
AM_RANGE(0x6000, 0x6003) AM_READWRITE(tx1_pit8253_r, tx1_pit8253_w) AM_RANGE(0x6000, 0x6003) AM_READWRITE(tx1_pit8253_r, tx1_pit8253_w)
AM_RANGE(0x7000, 0x7fff) AM_WRITE(tx1_ppi_latch_w) AM_RANGE(0x7000, 0x7fff) AM_WRITE(tx1_ppi_latch_w)
AM_RANGE(0xb000, 0xbfff) AM_READWRITE(ts_r, ts_w) AM_RANGE(0xb000, 0xbfff) AM_READWRITE(ts_r, ts_w)
@ -560,7 +560,7 @@ static ADDRESS_MAP_START( buggyboy_sound_prg, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x47ff) AM_RAM AM_BASE(&z80_ram) AM_RANGE(0x4000, 0x47ff) AM_RAM AM_BASE(&z80_ram)
AM_RANGE(0x6000, 0x6001) AM_READ(bb_analog_r) AM_RANGE(0x6000, 0x6001) AM_READ(bb_analog_r)
AM_RANGE(0x6800, 0x6803) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0x6800, 0x6803) AM_DEVREADWRITE(PPI8255, "ppi8255", ppi8255_r, ppi8255_w)
AM_RANGE(0x7000, 0x7003) AM_RAM AM_RANGE(0x7000, 0x7003) AM_RAM
AM_RANGE(0x7800, 0x7800) AM_WRITE(z80_intreq_w) AM_RANGE(0x7800, 0x7800) AM_WRITE(z80_intreq_w)
AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(ts_r, ts_w) AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(ts_r, ts_w)
@ -651,15 +651,14 @@ static WRITE8_HANDLER( tx1_coin_cnt )
coin_counter_w(1, data & 0x40); coin_counter_w(1, data & 0x40);
} }
const ppi8255_interface tx1_ppi8255_intf = static const ppi8255_interface tx1_ppi8255_intf =
{ {
1, tx1_ppi_porta_r,
{ tx1_ppi_porta_r }, tx1_ppi_portb_r,
{ tx1_ppi_portb_r }, input_port_4_r,
{ input_port_4_r }, NULL,
{ 0 }, NULL,
{ 0 }, tx1_coin_cnt
{ tx1_coin_cnt },
}; };
static const struct CustomSound_interface tx1_custom_interface = static const struct CustomSound_interface tx1_custom_interface =
@ -670,15 +669,14 @@ static const struct CustomSound_interface tx1_custom_interface =
}; };
/* Buggy Boy uses an 8255 PPI instead of YM2149 ports for inputs! */ /* Buggy Boy uses an 8255 PPI instead of YM2149 ports for inputs! */
const ppi8255_interface buggyboy_ppi8255_intf = static const ppi8255_interface buggyboy_ppi8255_intf =
{ {
1, input_port_1_r,
{ input_port_1_r }, NULL,
{ 0 }, input_port_2_r,
{ input_port_2_r }, NULL,
{ 0 }, NULL,
{ 0 }, NULL
{ 0 },
}; };
static const struct CustomSound_interface bb_custom_interface = static const struct CustomSound_interface bb_custom_interface =
@ -711,6 +709,9 @@ static MACHINE_DRIVER_START( tx1 )
MDRV_MACHINE_START(tx1) MDRV_MACHINE_START(tx1)
MDRV_NVRAM_HANDLER(generic_0fill) MDRV_NVRAM_HANDLER(generic_0fill)
MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( tx1_ppi8255_intf )
MDRV_GFXDECODE(tx1) MDRV_GFXDECODE(tx1)
MDRV_PALETTE_LENGTH(256+(256*4)+(2048*4)) MDRV_PALETTE_LENGTH(256+(256*4)+(2048*4))
MDRV_PALETTE_INIT(tx1) MDRV_PALETTE_INIT(tx1)
@ -766,6 +767,9 @@ static MACHINE_DRIVER_START( buggyboy )
MDRV_MACHINE_START(buggyboy) MDRV_MACHINE_START(buggyboy)
MDRV_NVRAM_HANDLER(generic_0fill) MDRV_NVRAM_HANDLER(generic_0fill)
MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( buggyboy_ppi8255_intf )
MDRV_GFXDECODE(buggyboy) MDRV_GFXDECODE(buggyboy)
MDRV_DEFAULT_LAYOUT(layout_triphsxs) MDRV_DEFAULT_LAYOUT(layout_triphsxs)

44
src/mame/drivers/vroulet.c
View File

@ -116,8 +116,8 @@ static ADDRESS_MAP_START( vroulet_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff) ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READWRITE(AY8910_read_port_0_r, AY8910_write_port_0_w) AM_RANGE(0x00, 0x00) AM_READWRITE(AY8910_read_port_0_r, AY8910_write_port_0_w)
AM_RANGE(0x01, 0x01) AM_WRITE(AY8910_control_port_0_w) AM_RANGE(0x01, 0x01) AM_WRITE(AY8910_control_port_0_w)
AM_RANGE(0x10, 0x13) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0x10, 0x13) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w)
AM_RANGE(0x80, 0x83) AM_READWRITE(ppi8255_1_r, ppi8255_1_w) AM_RANGE(0x80, 0x83) AM_DEVREADWRITE(PPI8255, "ppi8255_1", ppi8255_r, ppi8255_w)
ADDRESS_MAP_END ADDRESS_MAP_END
/* Input Ports */ /* Input Ports */
@ -233,24 +233,26 @@ static WRITE8_HANDLER( ppi8255_a_w ){}// watchdog ?
static WRITE8_HANDLER( ppi8255_b_w ){}// lamps ? static WRITE8_HANDLER( ppi8255_b_w ){}// lamps ?
static WRITE8_HANDLER( ppi8255_c_w ){} static WRITE8_HANDLER( ppi8255_c_w ){}
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf[2] =
{ {
2, // 2 chips {
{ input_port_0_r, NULL }, // Port A read input_port_0_r, // Port A read
{ input_port_1_r, NULL }, // Port B read input_port_1_r, // Port B read
{ input_port_2_r, NULL }, // Port C read input_port_2_r, // Port C read
{ NULL, ppi8255_a_w }, // Port A write NULL, // Port A write
{ NULL, ppi8255_b_w }, // Port B write NULL, // Port B write
{ NULL, ppi8255_c_w }, // Port C write NULL // Port C write
},
{
NULL, // Port A read
NULL, // Port B read
NULL, // Port C read
ppi8255_a_w, // Port A write
ppi8255_b_w, // Port B write
ppi8255_c_w // Port C write
}
}; };
/* Machine Initialization */
static MACHINE_RESET( vroulet )
{
ppi8255_init(&ppi8255_intf);
}
/* Machine Driver */ /* Machine Driver */
static MACHINE_DRIVER_START( vroulet ) static MACHINE_DRIVER_START( vroulet )
@ -260,10 +262,14 @@ static MACHINE_DRIVER_START( vroulet )
MDRV_CPU_IO_MAP(vroulet_io_map, 0) MDRV_CPU_IO_MAP(vroulet_io_map, 0)
MDRV_CPU_VBLANK_INT("main", irq0_line_hold) MDRV_CPU_VBLANK_INT("main", irq0_line_hold)
MDRV_MACHINE_RESET(vroulet)
MDRV_NVRAM_HANDLER(generic_1fill) MDRV_NVRAM_HANDLER(generic_1fill)
MDRV_DEVICE_ADD( "ppi8255_0", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[0] )
MDRV_DEVICE_ADD( "ppi8255_1", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf[1] )
// video hardware // video hardware
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)

19
src/mame/drivers/zaccaria.c
View File

@ -232,13 +232,12 @@ static const pia6821_interface pia_1_intf =
static const ppi8255_interface ppi8255_intf = static const ppi8255_interface ppi8255_intf =
{ {
1, /* 1 chip */ input_port_3_r, /* Port A read */
{input_port_3_r}, /* Port A read */ input_port_4_r, /* Port B read */
{input_port_4_r}, /* Port B read */ input_port_5_r, /* Port C read */
{input_port_5_r}, /* Port C read */ NULL, /* Port A write */
{0}, /* Port A write */ NULL, /* Port B write */
{0}, /* Port B write */ zaccaria_dsw_sel_w, /* Port C write */
{zaccaria_dsw_sel_w}, /* Port C write */
}; };
@ -250,7 +249,6 @@ static MACHINE_START( zaccaria )
static MACHINE_RESET( zaccaria ) static MACHINE_RESET( zaccaria )
{ {
ppi8255_init(&ppi8255_intf);
pia_reset(); pia_reset();
} }
@ -345,7 +343,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x6c00, 0x6c07) AM_READ(zaccaria_prot2_r) AM_RANGE(0x6c00, 0x6c07) AM_READ(zaccaria_prot2_r)
AM_RANGE(0x6e00, 0x6e00) AM_READWRITE(zaccaria_dsw_r, sound_command_w) AM_RANGE(0x6e00, 0x6e00) AM_READWRITE(zaccaria_dsw_r, sound_command_w)
AM_RANGE(0x7000, 0x77ff) AM_RAM AM_RANGE(0x7000, 0x77ff) AM_RAM
AM_RANGE(0x7800, 0x7803) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0x7800, 0x7803) AM_DEVREADWRITE(PPI8255, "ppi8255", ppi8255_r, ppi8255_w)
AM_RANGE(0x7c00, 0x7c00) AM_READ(watchdog_reset_r) AM_RANGE(0x7c00, 0x7c00) AM_READ(watchdog_reset_r)
AM_RANGE(0x8000, 0xdfff) AM_ROM AM_RANGE(0x8000, 0xdfff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -652,6 +650,9 @@ static MACHINE_DRIVER_START( zaccaria )
MDRV_MACHINE_START(zaccaria) MDRV_MACHINE_START(zaccaria)
MDRV_MACHINE_RESET(zaccaria) MDRV_MACHINE_RESET(zaccaria)
MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( ppi8255_intf )
/* video hardware */ /* video hardware */
MDRV_SCREEN_ADD("main", RASTER) MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_REFRESH_RATE(60)

84
src/mame/drivers/zaxxon.c
View File

@ -485,7 +485,7 @@ static ADDRESS_MAP_START( zaxxon_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc000, 0xc002) AM_MIRROR(0x18f8) AM_WRITE(zaxxon_coin_lockout_w) AM_RANGE(0xc000, 0xc002) AM_MIRROR(0x18f8) AM_WRITE(zaxxon_coin_lockout_w)
AM_RANGE(0xc003, 0xc004) AM_MIRROR(0x18f8) AM_WRITE(zaxxon_coin_counter_w) AM_RANGE(0xc003, 0xc004) AM_MIRROR(0x18f8) AM_WRITE(zaxxon_coin_counter_w)
AM_RANGE(0xc006, 0xc006) AM_MIRROR(0x18f8) AM_WRITE(zaxxon_flipscreen_w) AM_RANGE(0xc006, 0xc006) AM_MIRROR(0x18f8) AM_WRITE(zaxxon_flipscreen_w)
AM_RANGE(0xe03c, 0xe03f) AM_MIRROR(0x1f00) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0xe03c, 0xe03f) AM_MIRROR(0x1f00) AM_DEVREADWRITE(PPI8255, "ppi8255", ppi8255_r, ppi8255_w)
AM_RANGE(0xe0f0, 0xe0f0) AM_MIRROR(0x1f00) AM_WRITE(int_enable_w) AM_RANGE(0xe0f0, 0xe0f0) AM_MIRROR(0x1f00) AM_WRITE(int_enable_w)
AM_RANGE(0xe0f1, 0xe0f1) AM_MIRROR(0x1f00) AM_WRITE(zaxxon_fg_color_w) AM_RANGE(0xe0f1, 0xe0f1) AM_MIRROR(0x1f00) AM_WRITE(zaxxon_fg_color_w)
AM_RANGE(0xe0f8, 0xe0f9) AM_MIRROR(0x1f00) AM_WRITE(zaxxon_bg_position_w) AM_RANGE(0xe0f8, 0xe0f9) AM_MIRROR(0x1f00) AM_WRITE(zaxxon_bg_position_w)
@ -525,7 +525,7 @@ static ADDRESS_MAP_START( congo_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x4000, 0x47ff) AM_MIRROR(0x1800) AM_RAM AM_RANGE(0x4000, 0x47ff) AM_MIRROR(0x1800) AM_RAM
AM_RANGE(0x6000, 0x6000) AM_MIRROR(0x1fff) AM_WRITE(SN76496_0_w) AM_RANGE(0x6000, 0x6000) AM_MIRROR(0x1fff) AM_WRITE(SN76496_0_w)
AM_RANGE(0x8000, 0x8003) AM_MIRROR(0x1ffc) AM_READWRITE(ppi8255_0_r, ppi8255_0_w) AM_RANGE(0x8000, 0x8003) AM_MIRROR(0x1ffc) AM_DEVREADWRITE(PPI8255, "ppi8255", ppi8255_r, ppi8255_w)
AM_RANGE(0xa000, 0xa000) AM_MIRROR(0x1fff) AM_WRITE(SN76496_1_w) AM_RANGE(0xa000, 0xa000) AM_MIRROR(0x1fff) AM_WRITE(SN76496_1_w)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -890,6 +890,34 @@ INPUT_PORTS_END
/*************************************
*
* PPI8255 configurations
*
*************************************/
static const ppi8255_interface zaxxon_ppi_intf =
{
NULL,
NULL,
NULL,
zaxxon_sound_a_w,
zaxxon_sound_b_w,
zaxxon_sound_c_w
};
static const ppi8255_interface congo_ppi_intf =
{
soundlatch_r,
NULL,
NULL,
NULL,
congo_sound_b_w,
congo_sound_c_w
};
/************************************* /*************************************
* *
* Graphics definitions * Graphics definitions
@ -936,6 +964,9 @@ static MACHINE_DRIVER_START( root )
MDRV_MACHINE_START(zaxxon) MDRV_MACHINE_START(zaxxon)
MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( zaxxon_ppi_intf )
/* video hardware */ /* video hardware */
MDRV_GFXDECODE(zaxxon) MDRV_GFXDECODE(zaxxon)
MDRV_PALETTE_LENGTH(256) MDRV_PALETTE_LENGTH(256)
@ -992,6 +1023,9 @@ static MACHINE_DRIVER_START( congo )
MDRV_CPU_MODIFY("main") MDRV_CPU_MODIFY("main")
MDRV_CPU_PROGRAM_MAP(congo_map, 0) MDRV_CPU_PROGRAM_MAP(congo_map, 0)
MDRV_DEVICE_MODIFY( "ppi8255", PPI8255 )
MDRV_DEVICE_CONFIG( congo_ppi_intf )
MDRV_CPU_ADD(Z80, SOUND_CLOCK) MDRV_CPU_ADD(Z80, SOUND_CLOCK)
MDRV_CPU_PROGRAM_MAP(congo_sound_map,0) MDRV_CPU_PROGRAM_MAP(congo_sound_map,0)
MDRV_CPU_PERIODIC_INT(irq0_line_hold, (double)SOUND_CLOCK/16/16/16/4) MDRV_CPU_PERIODIC_INT(irq0_line_hold, (double)SOUND_CLOCK/16/16/16/4)
@ -1413,48 +1447,27 @@ static void zaxxonb_decode(void)
* *
*************************************/ *************************************/
static DRIVER_INIT( zaxxon )
{
static const ppi8255_interface ppi_intf =
{
1,
{ 0 },
{ 0 },
{ 0 },
{ zaxxon_sound_a_w },
{ zaxxon_sound_b_w },
{ zaxxon_sound_c_w }
};
ppi8255_init(&ppi_intf);
}
static DRIVER_INIT( zaxxonb ) static DRIVER_INIT( zaxxonb )
{ {
zaxxonb_decode(); zaxxonb_decode();
DRIVER_INIT_CALL(zaxxon);
} }
static DRIVER_INIT( szaxxon ) static DRIVER_INIT( szaxxon )
{ {
szaxxon_decode(); szaxxon_decode();
DRIVER_INIT_CALL(zaxxon);
} }
static DRIVER_INIT( futspy ) static DRIVER_INIT( futspy )
{ {
futspy_decode(); futspy_decode();
DRIVER_INIT_CALL(zaxxon);
} }
static DRIVER_INIT( razmataz ) static DRIVER_INIT( razmataz )
{ {
nprinces_decode(); nprinces_decode();
DRIVER_INIT_CALL(zaxxon);
/* additional input ports are wired */ /* additional input ports are wired */
memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xc004, 0xc004, 0, 0x18f3, port_tag_to_handler8("SW04")); memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xc004, 0xc004, 0, 0x18f3, port_tag_to_handler8("SW04"));
@ -1476,29 +1489,12 @@ static DRIVER_INIT( razmataz )
static DRIVER_INIT( ixion ) static DRIVER_INIT( ixion )
{ {
szaxxon_decode(); szaxxon_decode();
DRIVER_INIT_CALL(zaxxon);
/* connect the universal sound board */ /* connect the universal sound board */
memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xe03c, 0xe03c, 0, 0x1f00, sega_usb_status_r, sega_usb_data_w); memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xe03c, 0xe03c, 0, 0x1f00, sega_usb_status_r, sega_usb_data_w);
} }
static DRIVER_INIT( congo )
{
static const ppi8255_interface ppi_intf =
{
1,
{ soundlatch_r },
{ 0 },
{ 0 },
{ 0 },
{ congo_sound_b_w },
{ congo_sound_c_w }
};
ppi8255_init(&ppi_intf);
}
/************************************* /*************************************
* *
@ -1507,8 +1503,8 @@ static DRIVER_INIT( congo )
*************************************/ *************************************/
/* these games run on standard Zaxxon hardware */ /* these games run on standard Zaxxon hardware */
GAME( 1982, zaxxon, 0, zaxxon, zaxxon, zaxxon, ROT90, "Sega", "Zaxxon (set 1)", GAME_SUPPORTS_SAVE ) GAME( 1982, zaxxon, 0, zaxxon, zaxxon, 0, ROT90, "Sega", "Zaxxon (set 1)", GAME_SUPPORTS_SAVE )
GAME( 1982, zaxxon2, zaxxon, zaxxon, zaxxon, zaxxon, ROT90, "Sega", "Zaxxon (set 2)", GAME_SUPPORTS_SAVE ) GAME( 1982, zaxxon2, zaxxon, zaxxon, zaxxon, 0, ROT90, "Sega", "Zaxxon (set 2)", GAME_SUPPORTS_SAVE )
GAME( 1982, zaxxonb, zaxxon, zaxxon, zaxxon, zaxxonb, ROT90, "bootleg", "Jackson", GAME_SUPPORTS_SAVE ) GAME( 1982, zaxxonb, zaxxon, zaxxon, zaxxon, zaxxonb, ROT90, "bootleg", "Jackson", GAME_SUPPORTS_SAVE )
GAME( 1982, szaxxon, 0, zaxxon, szaxxon, szaxxon, ROT90, "Sega", "Super Zaxxon", GAME_SUPPORTS_SAVE ) GAME( 1982, szaxxon, 0, zaxxon, szaxxon, szaxxon, ROT90, "Sega", "Super Zaxxon", GAME_SUPPORTS_SAVE )
GAME( 1984, futspy, 0, futspy, futspy, futspy, ROT90, "Sega", "Future Spy", GAME_SUPPORTS_SAVE ) GAME( 1984, futspy, 0, futspy, futspy, futspy, ROT90, "Sega", "Future Spy", GAME_SUPPORTS_SAVE )
@ -1520,5 +1516,5 @@ GAME( 1983, ixion, 0, razmataz, ixion, ixion, ROT270, "Sega", "
/* these games run on a slightly newer Zaxxon hardware with more ROM space and a */ /* these games run on a slightly newer Zaxxon hardware with more ROM space and a */
/* custom sprite DMA chip */ /* custom sprite DMA chip */
GAME( 1983, congo, 0, congo, congo, congo, ROT90, "Sega", "Congo Bongo", GAME_SUPPORTS_SAVE ) GAME( 1983, congo, 0, congo, congo, 0, ROT90, "Sega", "Congo Bongo", GAME_SUPPORTS_SAVE )
GAME( 1983, tiptop, congo, congo, congo, congo, ROT90, "Sega", "Tip Top", GAME_SUPPORTS_SAVE ) GAME( 1983, tiptop, congo, congo, congo, 0, ROT90, "Sega", "Tip Top", GAME_SUPPORTS_SAVE )

46
src/mame/includes/galaxold.h
View File

@ -11,6 +11,8 @@
***************************************************************************/ ***************************************************************************/
#include "machine/8255ppi.h"
/*----------- defined in video/galaxian.c -----------*/ /*----------- defined in video/galaxian.c -----------*/
extern UINT8 *galaxold_videoram; extern UINT8 *galaxold_videoram;
@ -152,15 +154,35 @@ READ8_HANDLER( gmgalax_input_port_2_r );
/*----------- defined in machine/scramble.c -----------*/ /*----------- defined in machine/scramble.c -----------*/
extern const ppi8255_interface scramble_ppi_ppi8255_intf[2];
extern const ppi8255_interface stratgyx_ppi8255_intf[2];
extern const ppi8255_interface moonwar_ppi8255_intf[2];
extern const ppi8255_interface darkplnt_ppi8255_intf[2];
extern const ppi8255_interface scramble_ppi8255_intf[2];
extern const ppi8255_interface ckongs_ppi8255_intf[2];
extern const ppi8255_interface mars_ppi8255_intf[2];
extern const ppi8255_interface mrkougar_ppi8255_intf[2];
DRIVER_INIT( scramble_ppi ); DRIVER_INIT( scramble_ppi );
DRIVER_INIT( amidar ); DRIVER_INIT( scobra );
DRIVER_INIT( atlantis );
DRIVER_INIT( scramble );
DRIVER_INIT( stratgyx );
DRIVER_INIT( tazmani2 );
DRIVER_INIT( ckongs );
DRIVER_INIT( mariner );
DRIVER_INIT( frogger ); DRIVER_INIT( frogger );
DRIVER_INIT( froggers ); DRIVER_INIT( froggers );
DRIVER_INIT( scobra ); DRIVER_INIT( devilfsh );
DRIVER_INIT( stratgyx ); DRIVER_INIT( mars );
DRIVER_INIT( hotshock );
DRIVER_INIT( cavelon );
DRIVER_INIT( moonwar ); DRIVER_INIT( moonwar );
DRIVER_INIT( darkplnt ); DRIVER_INIT( darkplnt );
DRIVER_INIT( tazmani2 ); DRIVER_INIT( mimonkey );
DRIVER_INIT( mimonsco );
DRIVER_INIT( mimonscr );
DRIVER_INIT( anteater ); DRIVER_INIT( anteater );
DRIVER_INIT( rescue ); DRIVER_INIT( rescue );
DRIVER_INIT( minefld ); DRIVER_INIT( minefld );
@ -168,24 +190,8 @@ DRIVER_INIT( losttomb );
DRIVER_INIT( superbon ); DRIVER_INIT( superbon );
DRIVER_INIT( hustler ); DRIVER_INIT( hustler );
DRIVER_INIT( billiard ); DRIVER_INIT( billiard );
DRIVER_INIT( mimonkey );
DRIVER_INIT( mimonsco );
DRIVER_INIT( atlantis );
DRIVER_INIT( scramble );
DRIVER_INIT( scrambls );
DRIVER_INIT( theend );
DRIVER_INIT( ckongs );
DRIVER_INIT( mariner );
DRIVER_INIT( mars );
DRIVER_INIT( devilfsh );
DRIVER_INIT( hotshock );
DRIVER_INIT( cavelon );
DRIVER_INIT( mrkougar ); DRIVER_INIT( mrkougar );
DRIVER_INIT( mrkougb ); DRIVER_INIT( mrkougb );
DRIVER_INIT( mimonscr );
DRIVER_INIT( sfx );
DRIVER_INIT( monsterz );
DRIVER_INIT( scorpion );
DRIVER_INIT( ad2083 ); DRIVER_INIT( ad2083 );
MACHINE_RESET( scramble ); MACHINE_RESET( scramble );

2
src/mame/includes/tx1.h
View File

@ -29,8 +29,6 @@
/*----------- defined in drivers/tx1.c -----------*/ /*----------- defined in drivers/tx1.c -----------*/
extern UINT16 *tx1_math_ram; extern UINT16 *tx1_math_ram;
extern const ppi8255_interface tx1_ppi8255_intf;
extern const ppi8255_interface buggyboy_ppi8255_intf;
/*----------- defined in machine/tx1.c -----------*/ /*----------- defined in machine/tx1.c -----------*/
READ16_HANDLER( tx1_spcs_rom_r ); READ16_HANDLER( tx1_spcs_rom_r );

389
src/mame/machine/scramble.c
View File

@ -64,38 +64,6 @@ MACHINE_RESET( explorer )
MACHINE_RESET_CALL(galaxold); MACHINE_RESET_CALL(galaxold);
} }
static READ8_HANDLER( scrambls_input_port_2_r )
{
static const UINT8 mask[] = { 0x20, 0x20, 0x80, 0xA0, 0xA0, 0xA0, 0xA0, 0xA0 };
UINT8 res;
res = input_port_read_indexed(machine, 2);
/*logerror("%04x: read IN2\n",activecpu_get_pc());*/
/*
p_security_2B : process(security_count)
begin
-- I am not sure what this chip does yet, but this gets us past the initial check for now.
case security_count is
when "000" => net_1e10_i <= '0'; net_1e12_i <= '1';
when "001" => net_1e10_i <= '0'; net_1e12_i <= '1';
when "010" => net_1e10_i <= '1'; net_1e12_i <= '0';
when "011" => net_1e10_i <= '1'; net_1e12_i <= '1';
when "100" => net_1e10_i <= '1'; net_1e12_i <= '1';
when "101" => net_1e10_i <= '1'; net_1e12_i <= '1';
when "110" => net_1e10_i <= '1'; net_1e12_i <= '1';
when "111" => net_1e10_i <= '1'; net_1e12_i <= '1';
when others => null;
end case;
end process;
*/
res = (res & ~((1<<7)|(1<<5))) | mask[security_2B_counter];
security_2B_counter = (security_2B_counter + 1) & 0x07;
return res;
}
static READ8_HANDLER( ckongs_input_port_1_r ) static READ8_HANDLER( ckongs_input_port_1_r )
{ {
@ -182,39 +150,6 @@ static READ8_HANDLER( scramble_protection_r )
} }
} }
static READ8_HANDLER( scrambls_protection_r )
{
/*logerror("%04x: read protection\n",activecpu_get_pc());*/
/*
p_security_6J : process(xb)
begin
-- chip K10A PAL16L8
-- equations from Mark @ http://www.leopardcats.com/
xbo(3 downto 0) <= xb(3 downto 0);
xbo(4) <= not(xb(0) or xb(1) or xb(2) or xb(3));
xbo(5) <= not((not xb(2) and not xb(0)) or (not xb(2) and not xb(1)) or (not xb(3) and not xb(0)) or (not xb(3) and not xb(1)));
xbo(6) <= not(not xb(0) and not xb(3));
xbo(7) <= not((not xb(1)) or xb(2));
end process;
*/
UINT8 xbo = xb & 0x0f;
xbo |= ( ~(xb | (xb>>1) | (xb>>2) | (xb>>3)) & 0x01) << 4;
xbo |= ( ~( (~(xb>>2)&~xb) | (~(xb>>2)&~(xb>>1)) | (~(xb>>3)&~xb) | (~(xb>>3)&~(xb>>1)) ) & 0x01) << 5;
xbo |= ( ~(~xb&~(xb>>3)) & 0x01) << 6;
xbo |= ( ~(~(xb>>1)|(xb>>2)) & 0x01) << 7;
return (xbo);
}
static WRITE8_HANDLER( theend_coin_counter_w )
{
coin_counter_w(0, data & 0x80);
}
static READ8_HANDLER( mariner_protection_1_r ) static READ8_HANDLER( mariner_protection_1_r )
{ {
@ -259,9 +194,9 @@ static READ8_HANDLER( cavelon_banksw_r )
cavelon_banksw(); cavelon_banksw();
if ((offset >= 0x0100) && (offset <= 0x0103)) if ((offset >= 0x0100) && (offset <= 0x0103))
return ppi8255_0_r(machine, offset - 0x0100); return ppi8255_r((device_config*)device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), offset - 0x0100);
else if ((offset >= 0x0200) && (offset <= 0x0203)) else if ((offset >= 0x0200) && (offset <= 0x0203))
return ppi8255_1_r(machine, offset - 0x0200); return ppi8255_r((device_config*)device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), offset - 0x0200);
return 0xff; return 0xff;
} }
@ -271,9 +206,9 @@ static WRITE8_HANDLER( cavelon_banksw_w )
cavelon_banksw(); cavelon_banksw();
if ((offset >= 0x0100) && (offset <= 0x0103)) if ((offset >= 0x0100) && (offset <= 0x0103))
ppi8255_0_w(machine, offset - 0x0100, data); ppi8255_w((device_config*)device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_0" ), offset - 0x0100, data);
else if ((offset >= 0x0200) && (offset <= 0x0203)) else if ((offset >= 0x0200) && (offset <= 0x0203))
ppi8255_1_w(machine, offset - 0x0200, data); ppi8255_w((device_config*)device_list_find_by_tag( machine->config->devicelist, PPI8255, "ppi8255_1" ), offset - 0x0200, data);
} }
@ -288,124 +223,211 @@ WRITE8_HANDLER( hunchbks_mirror_w )
} }
static const ppi8255_interface ppi8255_intf = const ppi8255_interface scramble_ppi_ppi8255_intf[2] =
{ {
2, /* 2 chips */ {
{input_port_0_r, 0}, /* Port A read */ input_port_0_r, /* Port A read */
{input_port_1_r, 0}, /* Port B read */ input_port_1_r, /* Port B read */
{input_port_2_r, 0}, /* Port C read */ input_port_2_r, /* Port C read */
{0, soundlatch_w}, /* Port A write */ NULL, /* Port A write */
{0, scramble_sh_irqtrigger_w}, /* Port B write */ NULL, /* Port B write */
{0, 0}, /* Port C write */ NULL /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
NULL, /* Port C read */
soundlatch_w, /* Port A write */
scramble_sh_irqtrigger_w, /* Port B write */
NULL /* Port C write */
}
}; };
/* extra chip for sample latch */
static const ppi8255_interface sfx_ppi8255_intf = const ppi8255_interface stratgyx_ppi8255_intf[2] =
{ {
3, /* 3 chips */ {
{input_port_0_r, 0, soundlatch2_r}, /* Port A read */ input_port_0_r, /* Port A read */
{input_port_1_r, 0, 0}, /* Port B read */ input_port_1_r, /* Port B read */
{input_port_2_r, 0, 0}, /* Port C read */ stratgyx_input_port_2_r, /* Port C read */
{0, soundlatch_w, 0}, /* Port A write */ NULL, /* Port A write */
{0, scramble_sh_irqtrigger_w, 0}, /* Port B write */ NULL, /* Port B write */
{0, 0, 0}, /* Port C write */ NULL /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
stratgyx_input_port_3_r, /* Port C read */
soundlatch_w, /* Port A write */
scramble_sh_irqtrigger_w, /* Port B write */
NULL /* Port C write */
}
}; };
/* extra chip for sample latch */
static const ppi8255_interface monsterz_ppi8255_intf = const ppi8255_interface moonwar_ppi8255_intf[2] =
{ {
3, /* 3 chips */ {
{input_port_0_r, 0, 0}, /* Port A read */ moonwar_input_port_0_r, /* Port A read */
{input_port_1_r, 0, 0}, /* Port B read */ input_port_1_r, /* Port B read */
{input_port_2_r, 0, 0}, /* Port C read */ input_port_2_r, /* Port C read */
{0, soundlatch_w, 0}, /* Port A write */ NULL, /* Port A write */
{0, scramble_sh_irqtrigger_w, 0}, /* Port B write */ NULL, /* Port B write */
{0, 0, 0}, /* Port C write */ moonwar_port_select_w /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
NULL, /* Port C read */
soundlatch_w, /* Port A write */
scramble_sh_irqtrigger_w, /* Port B write */
NULL /* Port C write */
}
};
const ppi8255_interface darkplnt_ppi8255_intf[2] =
{
{
input_port_0_r, /* Port A read */
darkplnt_input_port_1_r, /* Port B read */
input_port_2_r, /* Port C read */
NULL, /* Port A write */
NULL, /* Port B write */
NULL /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
NULL, /* Port C read */
soundlatch_w, /* Port A write */
scramble_sh_irqtrigger_w, /* Port B write */
NULL /* Port C write */
}
};
const ppi8255_interface scramble_ppi8255_intf[2] =
{
{
input_port_0_r, /* Port A read */
input_port_1_r, /* Port B read */
input_port_2_r, /* Port C read */
NULL, /* Port A write */
NULL, /* Port B write */
NULL /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
scramble_protection_r, /* Port C read */
soundlatch_w, /* Port A write */
scramble_sh_irqtrigger_w, /* Port B write */
scramble_protection_w /* Port C write */
}
};
const ppi8255_interface ckongs_ppi8255_intf[2] =
{
{
input_port_0_r, /* Port A read */
ckongs_input_port_1_r, /* Port B read */
ckongs_input_port_2_r, /* Port C read */
NULL, /* Port A write */
NULL, /* Port B write */
NULL /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
NULL, /* Port C read */
soundlatch_w, /* Port A write */
scramble_sh_irqtrigger_w, /* Port B write */
NULL /* Port C write */
}
};
const ppi8255_interface mars_ppi8255_intf[2] =
{
{
input_port_0_r, /* Port A read */
input_port_1_r, /* Port B read */
input_port_2_r, /* Port C read */
NULL, /* Port A write */
NULL, /* Port B write */
NULL /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
input_port_3_r, /* Port C read */
soundlatch_w, /* Port A write */
scramble_sh_irqtrigger_w, /* Port B write */
NULL /* Port C write */
}
};
const ppi8255_interface mrkougar_ppi8255_intf[2] =
{
{
input_port_0_r, /* Port A read */
input_port_1_r, /* Port B read */
input_port_2_r, /* Port C read */
NULL, /* Port A write */
NULL, /* Port B write */
NULL /* Port C write */
},
{
NULL, /* Port A read */
NULL, /* Port B read */
NULL, /* Port C read */
soundlatch_w, /* Port A write */
mrkougar_sh_irqtrigger_w, /* Port B write */
NULL /* Port C write */
}
}; };
DRIVER_INIT( scramble_ppi ) DRIVER_INIT( scramble_ppi )
{ {
ppi8255_init(&ppi8255_intf);
} }
DRIVER_INIT( scobra ) DRIVER_INIT( scobra )
{ {
DRIVER_INIT_CALL(scramble_ppi);
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xa803, 0xa803, 0, 0, scrambold_background_enable_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xa803, 0xa803, 0, 0, scrambold_background_enable_w);
} }
DRIVER_INIT( atlantis ) DRIVER_INIT( atlantis )
{ {
DRIVER_INIT_CALL(scramble_ppi);
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x6803, 0x6803, 0, 0, scrambold_background_enable_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x6803, 0x6803, 0, 0, scrambold_background_enable_w);
} }
DRIVER_INIT( scramble ) DRIVER_INIT( scramble )
{ {
DRIVER_INIT_CALL(atlantis); DRIVER_INIT_CALL(atlantis);
ppi8255_set_portCread (1, scramble_protection_r);
ppi8255_set_portCwrite(1, scramble_protection_w);
}
DRIVER_INIT( scrambls )
{
DRIVER_INIT_CALL(atlantis);
ppi8255_set_portCread(0, scrambls_input_port_2_r);
ppi8255_set_portCread(1, scrambls_protection_r);
ppi8255_set_portCwrite(1, scramble_protection_w);
}
DRIVER_INIT( theend )
{
DRIVER_INIT_CALL(scramble_ppi);
ppi8255_set_portCwrite(0, theend_coin_counter_w);
} }
DRIVER_INIT( stratgyx ) DRIVER_INIT( stratgyx )
{ {
DRIVER_INIT_CALL(scramble_ppi);
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xb000, 0xb000, 0, 0, scrambold_background_green_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xb000, 0xb000, 0, 0, scrambold_background_green_w);
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xb002, 0xb002, 0, 0, scrambold_background_blue_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xb002, 0xb002, 0, 0, scrambold_background_blue_w);
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xb00a, 0xb00a, 0, 0, scrambold_background_red_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xb00a, 0xb00a, 0, 0, scrambold_background_red_w);
ppi8255_set_portCread(0, stratgyx_input_port_2_r);
ppi8255_set_portCread(1, stratgyx_input_port_3_r);
} }
DRIVER_INIT( tazmani2 ) DRIVER_INIT( tazmani2 )
{ {
DRIVER_INIT_CALL(scramble_ppi);
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xb002, 0xb002, 0, 0, scrambold_background_enable_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xb002, 0xb002, 0, 0, scrambold_background_enable_w);
} }
DRIVER_INIT( amidar )
{
DRIVER_INIT_CALL(scramble_ppi);
/* Amidar has a the DIP switches connected to port C of the 2nd 8255 */
ppi8255_set_portCread(1, input_port_3_r);
}
DRIVER_INIT( ckongs ) DRIVER_INIT( ckongs )
{ {
DRIVER_INIT_CALL(scramble_ppi);
ppi8255_set_portBread(0, ckongs_input_port_1_r);
ppi8255_set_portCread(0, ckongs_input_port_2_r);
} }
DRIVER_INIT( mariner ) DRIVER_INIT( mariner )
{ {
DRIVER_INIT_CALL(scramble_ppi);
/* extra ROM */ /* extra ROM */
memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x5800, 0x67ff, 0, 0, SMH_BANK1, SMH_UNMAP); memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x5800, 0x67ff, 0, 0, SMH_BANK1, SMH_UNMAP);
memory_set_bankptr(1, memory_region(REGION_CPU1) + 0x5800); memory_set_bankptr(1, memory_region(REGION_CPU1) + 0x5800);
@ -422,10 +444,6 @@ DRIVER_INIT( frogger )
offs_t A; offs_t A;
UINT8 *ROM; UINT8 *ROM;
DRIVER_INIT_CALL(scramble_ppi);
/* the first ROM of the second CPU has data lines D0 and D1 swapped. Decode it. */ /* the first ROM of the second CPU has data lines D0 and D1 swapped. Decode it. */
ROM = memory_region(REGION_CPU2); ROM = memory_region(REGION_CPU2);
for (A = 0;A < 0x0800;A++) for (A = 0;A < 0x0800;A++)
@ -442,9 +460,6 @@ DRIVER_INIT( froggers )
offs_t A; offs_t A;
UINT8 *ROM; UINT8 *ROM;
DRIVER_INIT_CALL(scramble_ppi);
/* the first ROM of the second CPU has data lines D0 and D1 swapped. Decode it. */ /* the first ROM of the second CPU has data lines D0 and D1 swapped. Decode it. */
ROM = memory_region(REGION_CPU2); ROM = memory_region(REGION_CPU2);
for (A = 0;A < 0x0800;A++) for (A = 0;A < 0x0800;A++)
@ -456,10 +471,6 @@ DRIVER_INIT( devilfsh )
offs_t i; offs_t i;
UINT8 *RAM; UINT8 *RAM;
DRIVER_INIT_CALL(scramble_ppi);
/* Address lines are scrambled on the main CPU */ /* Address lines are scrambled on the main CPU */
/* A0 -> A2 */ /* A0 -> A2 */
@ -487,9 +498,6 @@ DRIVER_INIT( devilfsh )
DRIVER_INIT( mars ) DRIVER_INIT( mars )
{ {
DRIVER_INIT_CALL(devilfsh); DRIVER_INIT_CALL(devilfsh);
/* extra port */
ppi8255_set_portCread(1, input_port_3_r);
} }
DRIVER_INIT( hotshock ) DRIVER_INIT( hotshock )
@ -503,8 +511,6 @@ DRIVER_INIT( cavelon )
{ {
UINT8 *ROM = memory_region(REGION_CPU1); UINT8 *ROM = memory_region(REGION_CPU1);
DRIVER_INIT_CALL(scramble_ppi);
/* banked ROM */ /* banked ROM */
memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x3fff, 0, 0, SMH_BANK1); memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x3fff, 0, 0, SMH_BANK1);
memory_configure_bank(1, 0, 2, &ROM[0x00000], 0x10000); memory_configure_bank(1, 0, 2, &ROM[0x00000], 0x10000);
@ -521,22 +527,11 @@ DRIVER_INIT( cavelon )
DRIVER_INIT( moonwar ) DRIVER_INIT( moonwar )
{ {
DRIVER_INIT_CALL(scramble_ppi);
/* special handler for the spinner */
ppi8255_set_portAread (0, moonwar_input_port_0_r);
ppi8255_set_portCwrite(0, moonwar_port_select_w);
state_save_register_global(moonwar_port_select); state_save_register_global(moonwar_port_select);
} }
DRIVER_INIT( darkplnt ) DRIVER_INIT( darkplnt )
{ {
DRIVER_INIT_CALL(scramble_ppi);
/* special handler for the spinner */
ppi8255_set_portBread(0, darkplnt_input_port_1_r);
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xb00a, 0xb00a, 0, 0, darkplnt_bullet_color_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xb00a, 0xb00a, 0, 0, darkplnt_bullet_color_w);
} }
@ -573,22 +568,16 @@ DRIVER_INIT( mimonkey )
ctr++; ctr++;
} }
DRIVER_INIT_CALL(scramble_ppi);
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xa804, 0xa804, 0, 0, scrambold_background_enable_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xa804, 0xa804, 0, 0, scrambold_background_enable_w);
} }
DRIVER_INIT( mimonsco ) DRIVER_INIT( mimonsco )
{ {
DRIVER_INIT_CALL(scramble_ppi);
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xa804, 0xa804, 0, 0, scrambold_background_enable_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xa804, 0xa804, 0, 0, scrambold_background_enable_w);
} }
DRIVER_INIT( mimonscr ) DRIVER_INIT( mimonscr )
{ {
DRIVER_INIT_CALL(scramble_ppi);
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x6804, 0x6804, 0, 0, scrambold_background_enable_w); memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x6804, 0x6804, 0, 0, scrambold_background_enable_w);
} }
@ -782,9 +771,6 @@ DRIVER_INIT( hustler )
offs_t A; offs_t A;
DRIVER_INIT_CALL(scramble_ppi);
for (A = 0;A < 0x4000;A++) for (A = 0;A < 0x4000;A++)
{ {
UINT8 xormask; UINT8 xormask;
@ -824,9 +810,6 @@ DRIVER_INIT( billiard )
offs_t A; offs_t A;
DRIVER_INIT_CALL(scramble_ppi);
for (A = 0;A < 0x4000;A++) for (A = 0;A < 0x4000;A++)
{ {
UINT8 xormask; UINT8 xormask;
@ -874,58 +857,10 @@ DRIVER_INIT( billiard )
DRIVER_INIT( mrkougar ) DRIVER_INIT( mrkougar )
{ {
DRIVER_INIT_CALL(devilfsh); DRIVER_INIT_CALL(devilfsh);
/* no sound enabled bit */
ppi8255_set_portBwrite(1, mrkougar_sh_irqtrigger_w);
} }
DRIVER_INIT( mrkougb ) DRIVER_INIT( mrkougb )
{ {
DRIVER_INIT_CALL(scramble_ppi);
/* no sound enabled bit */
ppi8255_set_portBwrite(1, mrkougar_sh_irqtrigger_w);
}
DRIVER_INIT( sfx )
{
ppi8255_init(&sfx_ppi8255_intf);
}
DRIVER_INIT( monsterz )
{
ppi8255_init(&monsterz_ppi8255_intf);
/* extra ROM */
memory_install_read8_handler(machine, 1, ADDRESS_SPACE_PROGRAM, 0x3000, 0x3fff, 0, 0, SMH_BANK1);
memory_set_bankptr(1, memory_region(REGION_CPU2) + 0x3000);
}
static READ8_HANDLER( scorpion_prot_r )
{
/* HACK! return register C */
return activecpu_get_reg(Z80_C) & 0xff;
}
static READ8_HANDLER( scorpion_sound_status_r )
{
return 1;
}
DRIVER_INIT( scorpion )
{
ppi8255_init(&ppi8255_intf);
ppi8255_set_portCread(1, scorpion_prot_r);
/* extra ROM */
memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x5800, 0x67ff, 0, 0, SMH_BANK1);
memory_set_bankptr(1, memory_region(REGION_CPU1) + 0x5800);
/* no background related */
memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x6803, 0x6803, 0, 0, SMH_NOP);
memory_install_read8_handler(machine, 1, ADDRESS_SPACE_PROGRAM, 0x3000, 0x3000, 0, 0, scorpion_sound_status_r);
} }
DRIVER_INIT( ad2083 ) DRIVER_INIT( ad2083 )

4
src/mame/machine/tx1.c
View File

@ -1473,8 +1473,6 @@ MACHINE_RESET( tx1 )
*************************************/ *************************************/
MACHINE_START( tx1 ) MACHINE_START( tx1 )
{ {
ppi8255_init(&tx1_ppi8255_intf);
/* Initialise for each game */ /* Initialise for each game */
prom = (UINT16*)memory_region(REGION_USER1) + (0x8000 >> 1); prom = (UINT16*)memory_region(REGION_USER1) + (0x8000 >> 1);
@ -1487,8 +1485,6 @@ MACHINE_START( tx1 )
MACHINE_START( buggyboy ) MACHINE_START( buggyboy )
{ {
ppi8255_init(&buggyboy_ppi8255_intf);
/* Initialise for each game */ /* Initialise for each game */
prom = (UINT16*)memory_region(REGION_USER1) + (0x8000 >> 1); prom = (UINT16*)memory_region(REGION_USER1) + (0x8000 >> 1);