mirror of
https://github.com/holub/mame
synced 2025-04-23 08:49:55 +03:00
cpu/alto2: Fixed allocation widths for decoded ROMs, and removed a bunch of reinterpret_cast.
This commit is contained in:
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6a6073b26d
commit
0d57290b58
@ -517,9 +517,9 @@ void alto2_cpu_device::init_disp()
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save_item(NAME(m_dsp.xpreg));
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save_item(NAME(m_dsp.csr));
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m_disp_a38 = prom_load(machine(), &pl_displ_a38, memregion("displ_a38")->base());
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m_disp_a63 = prom_load(machine(), &pl_displ_a63, memregion("displ_a63")->base());
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m_disp_a66 = prom_load(machine(), &pl_displ_a66, memregion("displ_a66")->base());
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m_disp_a38 = prom_load<uint8_t>(machine(), &pl_displ_a38, memregion("displ_a38")->base());
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m_disp_a63 = prom_load<uint8_t>(machine(), &pl_displ_a63, memregion("displ_a63")->base());
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m_disp_a66 = prom_load<uint8_t>(machine(), &pl_displ_a66, memregion("displ_a66")->base());
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m_dsp.hlc = A2_DISP_HLC_START;
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@ -1318,9 +1318,9 @@ void alto2_cpu_device::init_ether(int task)
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save_item(NAME(m_eth.tx_count));
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save_item(NAME(m_eth.breath_of_life));
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m_ether_a41 = prom_load(machine(), &pl_enet_a41, memregion("ether_a41")->base());
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m_ether_a42 = prom_load(machine(), &pl_enet_a42, memregion("ether_a42")->base());
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m_ether_a49 = prom_load(machine(), &pl_enet_a49, memregion("ether_a49")->base());
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m_ether_a41 = prom_load<uint8_t>(machine(), &pl_enet_a41, memregion("ether_a41")->base());
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m_ether_a42 = prom_load<uint8_t>(machine(), &pl_enet_a42, memregion("ether_a42")->base());
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m_ether_a49 = prom_load<uint8_t>(machine(), &pl_enet_a49, memregion("ether_a49")->base());
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m_eth.rx_packet = std::make_unique<uint16_t[]>(sizeof(uint16_t)*ALTO2_ETHER_PACKET_SIZE);
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m_eth.tx_packet = std::make_unique<uint16_t[]>(sizeof(uint16_t)*ALTO2_ETHER_PACKET_SIZE);
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@ -398,8 +398,8 @@ static const prom_load_t pl_madr_a65 =
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void alto2_cpu_device::init_hw()
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{
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memset(&m_hw, 0, sizeof(m_hw));
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m_madr_a64 = prom_load(machine(), &pl_madr_a64, memregion("madr_a64")->base());
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m_madr_a65 = prom_load(machine(), &pl_madr_a65, memregion("madr_a65")->base());
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m_madr_a64 = prom_load<uint8_t>(machine(), &pl_madr_a64, memregion("madr_a64")->base());
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m_madr_a65 = prom_load<uint8_t>(machine(), &pl_madr_a65, memregion("madr_a65")->base());
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}
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void alto2_cpu_device::exit_hw()
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@ -233,7 +233,7 @@ static const prom_load_t pl_madr_a32 =
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void alto2_cpu_device::init_mouse()
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{
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memset(&m_mouse, 0, sizeof(m_mouse));
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m_madr_a32 = prom_load(machine(), &pl_madr_a32, memregion("madr_a32")->base());
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m_madr_a32 = prom_load<uint8_t>(machine(), &pl_madr_a32, memregion("madr_a32")->base());
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}
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void alto2_cpu_device::exit_mouse()
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@ -104,17 +104,20 @@ static void write_type_and_xor(void *base, int type, uint32_t addr, uint32_t dan
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* @param segments number of segments in one page of the result
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* @return pointer to the newly allocated memory filled with source bits
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*/
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std::unique_ptr<uint8_t[]> prom_load(running_machine& machine, const prom_load_t* prom, const uint8_t* src, int pages, int segments)
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template <typename T>
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std::unique_ptr<T []> prom_load(running_machine& machine, const prom_load_t* prom, const uint8_t* src, int pages, int segments)
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{
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size_t type = prom->type;
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size_t size = prom->size;
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assert(sizeof(T) == prom->type);
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size_t const size = prom->size;
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#if DEBUG_PROM_LOAD
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uint8_t width = prom->width;
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size_t const type = prom->type;
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uint8_t const width = prom->width;
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#endif
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std::unique_ptr<uint8_t[]> array = std::make_unique<uint8_t[]>(pages * size * type);
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std::unique_ptr<T []> array = std::make_unique<T []>(pages * size);
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uint8_t* base = array.get();
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uint8_t* base = reinterpret_cast<uint8_t *>(array.get());
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for (int page = 0; page < pages; page++)
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{
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uint8_t* dst = base + (prom->type * prom->size * page);
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@ -140,47 +143,38 @@ std::unique_ptr<uint8_t[]> prom_load(running_machine& machine, const prom_load_t
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}
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#if DEBUG_PROM_LOAD
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switch (type) {
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case sizeof(uint8_t):
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{
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uint8_t* data = reinterpret_cast<uint8_t*>(array.get());
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for (int addr = 0; addr < pages*size; addr++) {
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if (0 == (addr % 16))
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printf("%04x:", addr);
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if (width <= 4)
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printf(" %x", data[addr]);
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else
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printf(" %02x", data[addr]);
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if (15 == (addr % 16))
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printf("\n");
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}
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for (int addr = 0; addr < pages*size; addr++) {
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switch (type) {
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case sizeof(uint8_t):
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if (0 == (addr % 16))
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printf("%04x:", addr);
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if (width <= 4)
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printf(" %x", array[addr]);
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else
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printf(" %02x", array[addr]);
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if (15 == (addr % 16))
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printf("\n");
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break;
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case sizeof(uint16_t):
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if (0 == (addr % 8))
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printf("%04x:", addr);
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printf(" %04x", array[addr]);
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if (7 == (addr % 8))
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printf("\n");
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break;
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case sizeof(uint32_t):
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if (0 == (addr % 4))
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printf("%04x:", addr);
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printf(" %08x", array[addr]);
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if (3 == (addr % 4))
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printf("\n");
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break;
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}
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break;
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case sizeof(uint16_t):
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{
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uint16_t* data = reinterpret_cast<uint16_t*>(array.get());
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for (int addr = 0; addr < pages*size; addr++) {
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if (0 == (addr % 8))
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printf("%04x:", addr);
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printf(" %04x", data[addr]);
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if (7 == (addr % 8))
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printf("\n");
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}
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}
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break;
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case sizeof(uint32_t):
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{
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uint32_t* data = reinterpret_cast<uint32_t*>(array.get());
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for (int addr = 0; addr < pages*size; addr++) {
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if (0 == (addr % 4))
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printf("%04x:", addr);
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printf(" %08x", data[addr]);
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if (3 == (addr % 4))
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printf("\n");
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}
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}
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break;
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}
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#endif
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return array;
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}
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template std::unique_ptr<uint8_t []> prom_load<uint8_t>(running_machine& machine, const prom_load_t* prom, const uint8_t* src, int pages, int segments);
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template std::unique_ptr<uint16_t []> prom_load<uint16_t>(running_machine& machine, const prom_load_t* prom, const uint8_t* src, int pages, int segments);
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template std::unique_ptr<uint32_t []> prom_load<uint32_t>(running_machine& machine, const prom_load_t* prom, const uint8_t* src, int pages, int segments);
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@ -8,6 +8,7 @@
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#ifndef MAME_CPU_ALTO2_A2ROMS_H
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#define MAME_CPU_ALTO2_A2ROMS_H
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#pragma once
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/**
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* @brief structure to define a ROM's or PROM's loading options
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@ -38,5 +39,6 @@ typedef struct {
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#define DMAP_DEFAULT {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}
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#define DMAP_REVERSE_0_3 {3,2,1,0,}
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extern std::unique_ptr<uint8_t[]> prom_load(running_machine& machine, const prom_load_t* prom, const uint8_t* src, int pages = 1, int segments = 1);
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template <typename T> std::unique_ptr<T []> prom_load(running_machine& machine, const prom_load_t* prom, const uint8_t* src, int pages = 1, int segments = 1);
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#endif // MAME_CPU_ALTO2_A2ROMS_H
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@ -138,8 +138,6 @@ alto2_cpu_device::alto2_cpu_device(const machine_config& mconfig, const char* ta
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m_ucode_ram_base(ALTO2_UCODE_PAGE_SIZE),
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m_ucode_size(3*ALTO2_UCODE_PAGE_SIZE),
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m_sreg_banks(1),
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m_ucode_crom(nullptr),
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m_const_data(nullptr),
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m_icount(0),
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m_task(0),
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m_next_task(0),
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@ -802,24 +800,23 @@ void alto2_cpu_device::device_start()
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// Decode 2 pages of micro code PROMs to CROM
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// If m_cram_config == 1 or 3, only the first page will be used
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m_ucode_crom = prom_load(machine(), pl_ucode, memregion("ucode_proms")->base(), 2, 8);
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m_ucode_crom = prom_load<uint32_t>(machine(), pl_ucode, memregion("ucode_proms")->base(), 2, 8);
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// allocate micro code CRAM for max 3 pages
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m_ucode_cram = std::make_unique<uint8_t[]>(sizeof(uint32_t) * 3 * ALTO2_UCODE_PAGE_SIZE);
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m_ucode_cram = std::make_unique<uint32_t []>(3 * ALTO2_UCODE_PAGE_SIZE);
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// fill with the micro code inverted bits value
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for (offs_t offset = 0; offset < 3 * ALTO2_UCODE_PAGE_SIZE; offset++)
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*reinterpret_cast<uint32_t *>(m_ucode_cram.get() + offset * 4) = ALTO2_UCODE_INVERTED;
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std::fill_n(m_ucode_cram.get(), 3 * ALTO2_UCODE_PAGE_SIZE, ALTO2_UCODE_INVERTED);
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// decode constant PROMs to m_const_data
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m_const_data = prom_load(machine(), pl_const, memregion("const_proms")->base(), 1, 4);
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m_const_data = prom_load<uint16_t>(machine(), pl_const, memregion("const_proms")->base(), 1, 4);
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m_ctl2k_u3 = prom_load(machine(), &pl_2kctl_u3, memregion("2kctl_u3")->base());
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m_ctl2k_u38 = prom_load(machine(), &pl_2kctl_u38, memregion("2kctl_u38")->base());
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m_ctl2k_u76 = prom_load(machine(), &pl_2kctl_u76, memregion("2kctl_u76")->base());
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m_alu_a10 = prom_load(machine(), &pl_alu_a10, memregion("alu_a10")->base());
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m_cram3k_a37 = prom_load(machine(), &pl_3kcram_a37, memregion("3kcram_a37")->base());
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m_madr_a90 = prom_load(machine(), &pl_madr_a90, memregion("madr_a90")->base());
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m_madr_a91 = prom_load(machine(), &pl_madr_a91, memregion("madr_a91")->base());
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m_ctl2k_u3 = prom_load<uint8_t>(machine(), &pl_2kctl_u3, memregion("2kctl_u3")->base());
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m_ctl2k_u38 = prom_load<uint8_t>(machine(), &pl_2kctl_u38, memregion("2kctl_u38")->base());
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m_ctl2k_u76 = prom_load<uint8_t>(machine(), &pl_2kctl_u76, memregion("2kctl_u76")->base());
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m_alu_a10 = prom_load<uint8_t>(machine(), &pl_alu_a10, memregion("alu_a10")->base());
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m_cram3k_a37 = prom_load<uint8_t>(machine(), &pl_3kcram_a37, memregion("3kcram_a37")->base());
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m_madr_a90 = prom_load<uint8_t>(machine(), &pl_madr_a90, memregion("madr_a90")->base());
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m_madr_a91 = prom_load<uint8_t>(machine(), &pl_madr_a91, memregion("madr_a91")->base());
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#if DEBUG_ALU_A10_PROM
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// dump ALU a10 PROM after loading
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@ -1009,28 +1006,28 @@ void alto2_cpu_device::state_string_export(const device_state_entry &entry, std:
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uint32_t alto2_cpu_device::crom_cram_r(offs_t offset)
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{
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if (offset < m_ucode_ram_base)
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return *reinterpret_cast<uint32_t *>(m_ucode_crom.get() + offset * 4);
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return *reinterpret_cast<uint32_t *>(m_ucode_cram.get() + (offset - m_ucode_ram_base) * 4);
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return m_ucode_crom[offset];
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else
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return m_ucode_cram[offset - m_ucode_ram_base];
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}
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//! write microcode CROM or CRAM (CROM of course can't be written)
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void alto2_cpu_device::crom_cram_w(offs_t offset, uint32_t data)
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{
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if (offset < m_ucode_ram_base)
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return;
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*reinterpret_cast<uint32_t *>(m_ucode_cram.get() + (offset - m_ucode_ram_base) * 4) = data;
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if (offset >= m_ucode_ram_base)
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m_ucode_cram[offset - m_ucode_ram_base] = data;
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}
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//! read constants PROM
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uint16_t alto2_cpu_device::const_r(offs_t offset)
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{
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return *reinterpret_cast<uint16_t *>(m_const_data.get() + offset * 2);
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return m_const_data[offset];
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}
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//! direct read access to the microcode CROM or CRAM
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#define RD_UCODE(addr) (addr < m_ucode_ram_base ? \
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*reinterpret_cast<uint32_t *>(m_ucode_crom.get() + addr * 4) : \
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*reinterpret_cast<uint32_t *>(m_ucode_cram.get() + (addr - m_ucode_ram_base) * 4))
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#define RD_UCODE(addr) (((addr) < m_ucode_ram_base) ? \
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m_ucode_crom[addr] : \
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m_ucode_cram[(addr) - m_ucode_ram_base])
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//-------------------------------------------------
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// device_reset - device-specific reset
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@ -2338,7 +2335,7 @@ void alto2_cpu_device::execute_run()
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// The constant memory is gated to the bus by F1 == f1_const, F2 == f2_const, or BS >= 4
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if (!do_bs || bs() >= bs_task_4) {
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const uint32_t addr = 8 * m_rsel + bs();
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const uint16_t data = m_const_data[2*addr] | (m_const_data[2*addr+1] << 8);
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const uint16_t data = m_const_data[addr];
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m_bus &= data;
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LOG((this,LOG_CPU,2," %#o; BUS &= %#o CONST[%03o]\n", m_bus, data, addr));
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}
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@ -251,9 +251,9 @@ private:
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uint32_t m_ucode_size; //!< Size of both, CROM and CRAM together
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uint32_t m_sreg_banks; //!< Number of S register banks; derived from m_cram_config
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std::unique_ptr<uint8_t[]> m_ucode_crom;
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std::unique_ptr<uint8_t[]> m_ucode_cram;
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std::unique_ptr<uint8_t[]> m_const_data;
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std::unique_ptr<uint32_t[]> m_ucode_crom;
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std::unique_ptr<uint32_t[]> m_ucode_cram;
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std::unique_ptr<uint16_t[]> m_const_data;
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void ucode_map(address_map &map);
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void const_map(address_map &map);
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@ -305,20 +305,20 @@ void smartmedia_image_device::call_unload()
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{
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if (custom_header.version == 0)
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{
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fseek( 2 + 1, SEEK_CUR);
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fwrite( m_feeprom_data, m_page_total_size * m_num_pages);
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fseek(2 + 1, SEEK_CUR);
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fwrite(m_feeprom_data, m_page_total_size * m_num_pages);
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}
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else if (custom_header.version == 1)
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{
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fseek( 3 + 1 + 256 + 16, SEEK_CUR);
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fwrite( m_feeprom_data, m_page_total_size * m_num_pages);
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fseek(3 + 1 + 256 + 16, SEEK_CUR);
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fwrite(m_feeprom_data, m_page_total_size * m_num_pages);
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}
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}
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}
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else if (m_image_format == 2)
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{
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fseek( sizeof( disk_image_format_2_header), SEEK_SET);
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fwrite( m_feeprom_data, m_page_total_size * m_num_pages);
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fseek(sizeof(disk_image_format_2_header), SEEK_SET);
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fwrite(m_feeprom_data, m_page_total_size * m_num_pages);
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}
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}
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#endif
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