mirror of
https://github.com/holub/mame
synced 2025-04-16 05:24:54 +03:00
Add dump and skeleton devices for Emerald Technology 3XTwin ISA board
This commit is contained in:
parent
fc2a349485
commit
0d77739c27
@ -1585,6 +1585,8 @@ if (BUSES["ISA"]~=null) then
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MAME_DIR .. "src/devices/bus/isa/asc88.h",
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MAME_DIR .. "src/devices/bus/isa/bblue2.cpp",
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MAME_DIR .. "src/devices/bus/isa/bblue2.h",
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MAME_DIR .. "src/devices/bus/isa/3xtwin.cpp",
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MAME_DIR .. "src/devices/bus/isa/3xtwin.h",
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}
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end
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@ -983,6 +983,18 @@ if (MACHINES["CHESSMACHINE"]~=null) then
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end
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---------------------------------------------------
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--
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--@src/devices/machine/com52c50.h,MACHINES["COM52C50"] = true
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---------------------------------------------------
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if (MACHINES["COM52C50"]~=null) then
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files {
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MAME_DIR .. "src/devices/machine/com52c50.cpp",
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MAME_DIR .. "src/devices/machine/com52c50.h",
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}
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end
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---------------------------------------------------
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--
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--@src/devices/machine/com8116.h,MACHINES["COM8116"] = true
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@ -463,6 +463,7 @@ MACHINES["CDP1871"] = true
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MACHINES["CHESSMACHINE"] = true
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MACHINES["CMOS40105"] = true
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MACHINES["CDU76S"] = true
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MACHINES["COM52C50"] = true
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MACHINES["COM8116"] = true
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MACHINES["CR589"] = true
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--MACHINES["CS4031"] = true
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@ -483,6 +483,7 @@ MACHINES["CDP1879"] = true
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--MACHINES["CDU76S"] = true
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MACHINES["CHESSMACHINE"] = true
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MACHINES["CMOS40105"] = true
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MACHINES["COM52C50"] = true
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MACHINES["COM8116"] = true
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MACHINES["COP452"] = true
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MACHINES["CR589"] = true
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95
src/devices/bus/isa/3xtwin.cpp
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95
src/devices/bus/isa/3xtwin.cpp
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@ -0,0 +1,95 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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/***************************************************************************
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Emerald Technology Inc. 3XTwin IBM 5251/11 twinax emulation board
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This smallish card is rather tightly packed with DIP ICs (mostly simple
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LSTTL and a few line drivers/receivers) to the point where their
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location numbers are difficult to read. There is no host BIOS, and the
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65C02's "TWINMON" firmware does very little, clearly relying on
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external software.
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Communication between the host system and local CPU seems to take place
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via shared access to a KM62256LP-10 SRAM.
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***************************************************************************/
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#include "emu.h"
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#include "3xtwin.h"
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#include "cpu/m6502/r65c02.h"
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#include "machine/com52c50.h"
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// device type definition
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DEFINE_DEVICE_TYPE(ISA8_3XTWIN, isa8_3xtwin_device, "3xtwin", "Emerald Technology 3XTwin Twinax Emulation Card")
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isa8_3xtwin_device::isa8_3xtwin_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: device_t(mconfig, ISA8_3XTWIN, tag, owner, clock)
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, device_isa8_card_interface(mconfig, *this)
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{
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}
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void isa8_3xtwin_device::device_start()
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{
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}
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void isa8_3xtwin_device::mpu_map(address_map &map)
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{
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map(0x0000, 0x1fff).ram();
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map(0x2000, 0x2007).m("tic", FUNC(com52c50_device::map));
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map(0x4000, 0xbfff).ram();
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map(0xe000, 0xffff).rom().region("firmware", 0);
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}
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static INPUT_PORTS_START(3xtwin)
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PORT_START("IOBASE")
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PORT_DIPNAME(0x1f, 0x19, "Base I/O Address") PORT_DIPLOCATION("S1:5,4,3,2,1")
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PORT_DIPSETTING(0x10, "200")
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PORT_DIPSETTING(0x11, "220")
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PORT_DIPSETTING(0x12, "240")
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PORT_DIPSETTING(0x13, "260")
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PORT_DIPSETTING(0x14, "280")
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PORT_DIPSETTING(0x15, "2A0")
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PORT_DIPSETTING(0x16, "2C0")
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PORT_DIPSETTING(0x17, "2E0")
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PORT_DIPSETTING(0x18, "300")
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PORT_DIPSETTING(0x19, "320")
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PORT_DIPSETTING(0x1a, "340")
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PORT_DIPSETTING(0x1b, "360")
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PORT_DIPSETTING(0x1c, "380")
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PORT_DIPSETTING(0x1d, "3A0")
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PORT_DIPSETTING(0x1e, "3C0")
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PORT_DIPSETTING(0x1f, "3E0")
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// TODO: IRQ jumpers
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INPUT_PORTS_END
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ioport_constructor isa8_3xtwin_device::device_input_ports() const
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{
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return INPUT_PORTS_NAME(3xtwin);
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}
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void isa8_3xtwin_device::device_add_mconfig(machine_config &config)
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{
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r65c02_device &mpu(R65C02(config, "mpu", 16_MHz_XTAL / 4)); // R65C02P4
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mpu.set_addrmap(AS_PROGRAM, &isa8_3xtwin_device::mpu_map);
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com52c50_device &tic(COM52C50(config, "tic", 16_MHz_XTAL));
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tic.int1_callback().set_inputline("mpu", r65c02_device::IRQ_LINE);
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tic.int2_callback().set_inputline("mpu", r65c02_device::NMI_LINE);
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}
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ROM_START(3xtwin)
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ROM_REGION(0x2000, "firmware", 0) // "MON VER E.01"
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ROM_LOAD("370906502.u2", 0x0000, 0x2000, CRC(d4157bc4) SHA1(359428ce0047f9192a44790c8670af956cf6ed70))
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// PLDs (undumped) marked "TWINCLK" (U9: ULC24/22V10-15) and "TWINLGC" (U12: PAL20L10ACNS)
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ROM_END
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const tiny_rom_entry *isa8_3xtwin_device::device_rom_region() const
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{
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return ROM_NAME(3xtwin);
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}
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40
src/devices/bus/isa/3xtwin.h
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40
src/devices/bus/isa/3xtwin.h
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@ -0,0 +1,40 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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/***************************************************************************
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Emerald Technology Inc. 3XTwin IBM 5251/11 emulation board
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***************************************************************************/
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#ifndef MAME_BUS_ISA_3XTWIN_H
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#define MAME_BUS_ISA_3XTWIN_H
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#pragma once
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#include "isa.h"
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// ======================> isa8_3xtwin_device
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class isa8_3xtwin_device : public device_t, public device_isa8_card_interface
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{
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public:
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// device type constructor
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isa8_3xtwin_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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protected:
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// device-level overrides
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virtual void device_start() override;
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virtual ioport_constructor device_input_ports() const override;
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virtual void device_add_mconfig(machine_config &config) override;
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virtual const tiny_rom_entry *device_rom_region() const override;
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private:
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// local memory map
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void mpu_map(address_map &map);
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};
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// device type declaration
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DECLARE_DEVICE_TYPE(ISA8_3XTWIN, isa8_3xtwin_device)
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#endif // MAME_BUS_ISA_3XTWIN_H
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@ -72,6 +72,7 @@
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#include "eis_sad8852.h"
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#include "eis_twib.h"
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#include "np600.h"
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#include "3xtwin.h"
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// communication ports
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#include "lpt.h"
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@ -138,6 +139,7 @@ void pc_isa8_cards(device_slot_interface &device)
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device.option_add("epc_twib", ISA8_EIS_TWIB);
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device.option_add("babyblue2", ISA8_BABYBLUE2);
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device.option_add("acb2072", ACB2072);
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device.option_add("3xtwin", ISA8_3XTWIN);
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}
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void pc_isa16_cards(device_slot_interface &device)
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@ -183,6 +185,7 @@ void pc_isa16_cards(device_slot_interface &device)
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device.option_add("epc_twib", ISA8_EIS_TWIB);
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device.option_add("babyblue2", ISA8_BABYBLUE2);
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device.option_add("acb2072", ACB2072);
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device.option_add("3xtwin", ISA8_3XTWIN);
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// 16-bit
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device.option_add("ide", ISA16_IDE);
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device.option_add("ne2000", NE2000);
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src/devices/machine/com52c50.cpp
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165
src/devices/machine/com52c50.cpp
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// license:BSD-3-Clause
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// copyright-holders:AJR
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/***************************************************************************
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Standard Microsystems Corp. COM52C50 Twinax Interface Circuit (TIC)
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Skeleton device.
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***************************************************************************/
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#include "emu.h"
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#include "com52c50.h"
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// device type definition
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DEFINE_DEVICE_TYPE(COM52C50, com52c50_device, "com52c50", "SMC COM52C50 TIC")
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com52c50_device::com52c50_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: device_t(mconfig, COM52C50, tag, owner, clock)
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, m_int1_callback(*this)
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, m_int2_callback(*this)
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, m_rx_dma_callback(*this)
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, m_tx_dma_callback(*this)
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, m_int_mask(0)
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, m_int_status(0)
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, m_zero_fill(0)
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, m_present_address(0)
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, m_rx_status(0)
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, m_tx_status(0)
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, m_control(0)
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, m_mode(0)
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{
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}
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void com52c50_device::map(address_map &map)
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{
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map(0, 0).w(FUNC(com52c50_device::mode_w));
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map(1, 1).rw(FUNC(com52c50_device::int_status_r), FUNC(com52c50_device::int_mask_w));
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map(2, 2).rw(FUNC(com52c50_device::rx_status_r), FUNC(com52c50_device::address_select_w));
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map(3, 3).rw(FUNC(com52c50_device::rx_buffer_r), FUNC(com52c50_device::control_w));
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map(4, 4).w(FUNC(com52c50_device::zero_fill_w));
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map(5, 5).rw(FUNC(com52c50_device::present_address_r), FUNC(com52c50_device::present_address_w));
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map(6, 6).mirror(1).r(FUNC(com52c50_device::tx_status_r));
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map(6, 6).w(FUNC(com52c50_device::tx_buffer_w));
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map(7, 7).w(FUNC(com52c50_device::tx_buffer_eom_w));
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}
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void com52c50_device::device_resolve_objects()
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{
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m_int1_callback.resolve_safe();
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m_int2_callback.resolve_safe();
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m_rx_dma_callback.resolve_safe();
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m_tx_dma_callback.resolve_safe();
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}
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void com52c50_device::device_start()
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{
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save_item(NAME(m_int_mask));
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save_item(NAME(m_int_status));
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save_item(NAME(m_zero_fill));
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save_item(NAME(m_present_address));
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save_item(NAME(m_rx_status));
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save_item(NAME(m_tx_status));
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save_item(NAME(m_control));
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save_item(NAME(m_mode));
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}
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void com52c50_device::device_reset()
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{
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m_int_mask = 0;
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m_int_status = 0;
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m_zero_fill = 0;
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m_rx_status = 0;
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m_tx_status = 0;
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m_control = 0x01;
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m_mode = 0;
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m_int1_callback(CLEAR_LINE);
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m_int2_callback(CLEAR_LINE);
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}
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u8 com52c50_device::rx_buffer_r()
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{
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if (!machine().side_effects_disabled())
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logerror("%s: Reading data from RX buffer\n", machine().describe_context());
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return 0;
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}
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void com52c50_device::tx_buffer_w(u8 data)
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{
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logerror("%s: Writing %02X to TX buffer\n", machine().describe_context(), data);
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}
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void com52c50_device::tx_buffer_eom_w(u8 data)
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{
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logerror("%s: Writing %02X to TX buffer EOM\n", machine().describe_context(), data);
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}
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void com52c50_device::zero_fill_w(u8 data)
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{
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logerror("%s: Writing %02X to zero fill register\n", machine().describe_context(), data);
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m_zero_fill = data;
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}
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void com52c50_device::int_mask_w(u8 data)
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{
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logerror("%s: Writing %02X to interrupt mask register\n", machine().describe_context(), data);
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m_int_mask = data;
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}
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void com52c50_device::address_select_w(u8 data)
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{
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logerror("%s: Writing %02X to address select register\n", machine().describe_context(), data);
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}
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u8 com52c50_device::present_address_r()
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{
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return m_present_address;
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}
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void com52c50_device::present_address_w(u8 data)
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{
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logerror("%s: Writing %02X to present address register\n", machine().describe_context(), data);
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m_present_address = data & 0x07;
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}
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u8 com52c50_device::int_status_r()
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{
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return m_int_status;
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}
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u8 com52c50_device::rx_status_r()
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{
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return m_rx_status | (m_present_address << 1);
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}
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u8 com52c50_device::tx_status_r()
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{
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return m_tx_status;
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}
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void com52c50_device::control_w(u8 data)
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{
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if (!BIT(data, 0))
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{
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logerror("%s: Software reset\n", machine().describe_context());
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m_int_mask = 0;
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m_int_status = 0;
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m_zero_fill = 0;
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m_rx_status = 0;
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m_tx_status = 0;
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m_mode = 0;
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}
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logerror("%s: Writing %02X to control register\n", machine().describe_context(), data);
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m_control = data;
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}
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void com52c50_device::mode_w(u8 data)
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{
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logerror("%s: Writing %02X to mode register\n", machine().describe_context(), data);
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m_mode = data;
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}
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89
src/devices/machine/com52c50.h
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89
src/devices/machine/com52c50.h
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@ -0,0 +1,89 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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/***************************************************************************
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Standard Microsystems Corp. COM52C50 Twinax Interface Circuit (TIC)
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****************************************************************************
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_____ _____
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D2 1 |* \__/ | 28 Vcc
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D3 2 | | 27 D1
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/WR 3 | | 26 D0
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/TXEN 4 | | 25 /CS
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/DTX 5 | | 24 /RD
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TX 6 | | 23 A0
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TX DMA 7 | | 22 A1
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RX 8 | COM52C50 | 21 A2
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D4 9 | | 20 /INT1
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D5 10 | | 19 /INT2
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/RESET 11 | | 18 RX DMA
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XTAL2 12 | | 17 CLKOUT
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XTAL1 13 | | 16 D7
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GND 14 |______________| 15 D6
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***************************************************************************/
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#ifndef MAME_MACHINE_COM52C50_H
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#define MAME_MACHINE_COM52C50_H
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#pragma once
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// ======================> com52c50_device
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class com52c50_device : public device_t
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{
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public:
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// device type constructor
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com52c50_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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// callback configuration
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auto int1_callback() { return m_int1_callback.bind(); }
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auto int2_callback() { return m_int2_callback.bind(); }
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auto rx_dma_callback() { return m_rx_dma_callback.bind(); }
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auto tx_dma_callback() { return m_tx_dma_callback.bind(); }
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// bus interface
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u8 rx_buffer_r();
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void tx_buffer_w(u8 data);
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void tx_buffer_eom_w(u8 data);
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void zero_fill_w(u8 data);
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void int_mask_w(u8 data);
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void address_select_w(u8 data);
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u8 present_address_r();
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void present_address_w(u8 data);
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u8 int_status_r();
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u8 rx_status_r();
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u8 tx_status_r();
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void control_w(u8 data);
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void mode_w(u8 data);
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void map(address_map &map);
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protected:
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// device-level overrides
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virtual void device_resolve_objects() override;
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||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
private:
|
||||
// device callbacks
|
||||
devcb_write_line m_int1_callback;
|
||||
devcb_write_line m_int2_callback;
|
||||
devcb_write_line m_rx_dma_callback;
|
||||
devcb_write_line m_tx_dma_callback;
|
||||
|
||||
// internal state
|
||||
u8 m_int_mask;
|
||||
u8 m_int_status;
|
||||
u8 m_zero_fill;
|
||||
u8 m_present_address;
|
||||
u8 m_rx_status;
|
||||
u8 m_tx_status;
|
||||
u8 m_control;
|
||||
u8 m_mode;
|
||||
};
|
||||
|
||||
// device type declaration
|
||||
DECLARE_DEVICE_TYPE(COM52C50, com52c50_device)
|
||||
|
||||
#endif // MAME_MACHINE_COM52C50_H
|
Loading…
Reference in New Issue
Block a user