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https://github.com/holub/mame
synced 2025-05-23 14:19:01 +03:00
ASC: sync with MESS improvements (no whatsnew)
This commit is contained in:
R. Belmont
parent
1d4ea432e9
commit
0d8e40acb6
@ -18,8 +18,8 @@
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0x807: CLOCK RATE (0 = Mac 22257 Hz, 1 = undefined, 2 = 22050 Hz, 3 = 44100 Hz)
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0x80a: PLAY REC A
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0x80f: TEST (bits 6-7 = digital test, bits 4-5 = analog test)
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0x810: WAVETABLE 0 PHASE (big-endian 8.16 fixed-point, only 24 bits valid)
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0x814: WAVETABLE 0 INCREMENT (big-endian 8.16 fixed-point, only 24 bits valid)
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0x810: WAVETABLE 0 PHASE (big-endian 9.15 fixed-point, only 24 bits valid)
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0x814: WAVETABLE 0 INCREMENT (big-endian 9.15 fixed-point, only 24 bits valid)
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0x818: WAVETABLE 1 PHASE
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0x81C: WAVETABLE 1 INCREMENT
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0x820: WAVETABLE 2 PHASE
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@ -141,11 +141,10 @@ void asc_device::device_reset()
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memset(m_fifo_b, 0, sizeof(m_fifo_b));
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memset(m_phase, 0, sizeof(m_phase));
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memset(m_incr, 0, sizeof(m_incr));
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memset(m_fifo_a_wrhalf, 0, sizeof(m_fifo_a_wrhalf));
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memset(m_fifo_b_wrhalf, 0, sizeof(m_fifo_b_wrhalf));
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m_fifo_a_rdptr = m_fifo_b_rdptr = 0;
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m_fifo_a_wrptr = m_fifo_b_wrptr = 0;
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m_fifo_cap_a = m_fifo_cap_b = 0;
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}
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//-------------------------------------------------
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@ -161,7 +160,7 @@ STREAM_UPDATE( asc_device::static_stream_generate )
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void asc_device::stream_generate(stream_sample_t **inputs, stream_sample_t **outputs, int samples)
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{
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stream_sample_t *outL, *outR;
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int i, ch, halt = 0;
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int i, ch;
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static UINT32 wtoffs[2] = { 0, 0x200 };
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outL = outputs[0];
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@ -177,62 +176,70 @@ void asc_device::stream_generate(stream_sample_t **inputs, stream_sample_t **out
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break;
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case 1: // FIFO mode
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if ((m_fifo_a_rdptr == 0) && (!m_fifo_a_wrhalf[0]))
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{
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halt = 1;
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}
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else if ((m_fifo_a_rdptr == 0x200) && (!m_fifo_a_wrhalf[1]))
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{
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halt = 1;
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}
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for (i = 0; i < samples; i++)
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{
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INT8 smpll, smplr;
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if (m_fifo_a_rdptr < 0x200)
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smpll = (INT8)m_fifo_a[m_fifo_a_rdptr]^0x80;
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smplr = (INT8)m_fifo_b[m_fifo_b_rdptr]^0x80;
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// don't advance the sample pointer if there are no more samples
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if (m_fifo_cap_a)
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{
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m_fifo_a_wrhalf[0] = 0;
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m_fifo_b_wrhalf[0] = 0;
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}
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else
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{
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m_fifo_a_wrhalf[1] = 0;
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m_fifo_b_wrhalf[1] = 0;
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m_fifo_a_rdptr++;
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m_fifo_a_rdptr &= 0x3ff;
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m_fifo_cap_a--;
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}
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smpll = (INT8)m_fifo_a[m_fifo_a_rdptr++]^0x80;
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smplr = (INT8)m_fifo_b[m_fifo_b_rdptr++]^0x80;
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if ((m_fifo_a_rdptr == 0x200) || (m_fifo_a_rdptr == 0x400))
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if (m_fifo_cap_b)
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{
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m_regs[R_FIFOSTAT-0x800] |= 1; // fifo A half-empty
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if (m_irq_cb)
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m_fifo_b_rdptr++;
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m_fifo_b_rdptr &= 0x3ff;
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m_fifo_cap_b--;
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}
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if ((m_fifo_cap_a) || (m_fifo_cap_b))
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{
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switch (m_chip_type)
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{
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m_irq_cb(this, 1);
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case ASC_TYPE_SONORA:
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if (m_fifo_cap_a <= 0x200)
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{
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m_regs[R_FIFOSTAT-0x800] |= 0x4; // fifo less than half full
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m_regs[R_FIFOSTAT-0x800] |= 0x8; // just pass the damn test
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if (m_irq_cb)
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{
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m_irq_cb(this, 1);
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}
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}
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break;
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default:
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if (m_fifo_cap_a <= 0x200)
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{
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m_regs[R_FIFOSTAT-0x800] |= 1; // fifo A half-empty
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if (m_irq_cb)
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{
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m_irq_cb(this, 1);
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}
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}
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// don't update for non-(E)ASC
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if (m_fifo_cap_b <= 0x200)
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{
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m_regs[R_FIFOSTAT-0x800] |= 4; // fifo B half-empty
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if (m_irq_cb)
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{
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m_irq_cb(this, 1);
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}
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}
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break;
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}
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}
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if ((m_fifo_b_rdptr == 0x200) || (m_fifo_b_rdptr == 0x400))
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{
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m_regs[R_FIFOSTAT-0x800] |= 4; // fifo B half-empty
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if (m_irq_cb)
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{
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m_irq_cb(this, 1);
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}
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}
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m_fifo_a_rdptr &= 0x3ff;
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m_fifo_b_rdptr &= 0x3ff;
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outL[i] = smpll * 64;
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outR[i] = smplr * 64;
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}
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if (halt)
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{
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// m_regs[R_MODE-0x800] = 0;
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}
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break;
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case 2: // wavetable mode
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@ -250,11 +257,11 @@ void asc_device::stream_generate(stream_sample_t **inputs, stream_sample_t **out
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if (ch < 2)
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{
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smpl = (INT8)m_fifo_a[((m_phase[ch]>>16)&0x1ff) + wtoffs[ch&1]];
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smpl = (INT8)m_fifo_a[((m_phase[ch]>>15)&0x1ff) + wtoffs[ch&1]];
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}
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else
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{
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smpl = (INT8)m_fifo_b[((m_phase[ch]>>16)&0x1ff) + wtoffs[ch&1]];
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smpl = (INT8)m_fifo_b[((m_phase[ch]>>15)&0x1ff) + wtoffs[ch&1]];
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}
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smpl ^= 0x80;
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@ -277,7 +284,7 @@ UINT8 asc_device::read(UINT16 offset)
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{
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UINT8 rv;
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// printf("ASC: read at %x\n", offset);
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// printf("ASC: read at %x\n", offset);
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// not sure what actually happens when the CPU reads the FIFO...
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if (offset < 0x400)
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@ -409,30 +416,18 @@ UINT8 asc_device::read(UINT16 offset)
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void asc_device::write(UINT16 offset, UINT8 data)
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{
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// printf("ASC: write %02x to %x\n", data, offset);
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// printf("ASC: write %02x to %x\n", data, offset);
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if (offset < 0x400)
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{
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if (m_regs[R_MODE-0x800] == 1)
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{
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if (m_fifo_a_wrptr < 0x400)
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{
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m_fifo_a_wrhalf[0] = 1;
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}
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else
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{
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m_fifo_a_wrhalf[1] = 1;
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}
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m_fifo_a[m_fifo_a_wrptr++] = data;
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m_fifo_cap_a++;
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if ((m_fifo_a_wrptr == 0x200) || (m_fifo_a_wrptr == 0x400))
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if (m_fifo_cap_a == 0x800)
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{
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m_regs[R_FIFOSTAT-0x800] |= 2; // fifo A half-full
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if (m_irq_cb)
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{
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m_irq_cb(this, 1);
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}
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m_regs[R_FIFOSTAT-0x800] |= 2; // fifo A full
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}
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m_fifo_a_wrptr &= 0x3ff;
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@ -446,24 +441,12 @@ void asc_device::write(UINT16 offset, UINT8 data)
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{
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if (m_regs[R_MODE-0x800] == 1)
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{
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if (m_fifo_b_wrptr < 0x400)
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{
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m_fifo_b_wrhalf[0] = 1;
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}
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else
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{
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m_fifo_b_wrhalf[1] = 1;
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}
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m_fifo_b[m_fifo_b_wrptr++] = data;
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m_fifo_cap_b++;
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if ((m_fifo_a_wrptr == 0x200) || (m_fifo_a_wrptr == 0x400))
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if (m_fifo_cap_b == 0x800)
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{
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m_regs[R_FIFOSTAT-0x800] |= 8; // fifo B half-full
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if (m_irq_cb)
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{
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m_irq_cb(this, 1);
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}
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m_regs[R_FIFOSTAT-0x800] |= 8; // fifo B full
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}
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m_fifo_b_wrptr &= 0x3ff;
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@ -475,7 +458,7 @@ void asc_device::write(UINT16 offset, UINT8 data)
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}
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else
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{
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// printf("ASC: %02x to %x (was %x)\n", data, offset, m_regs[offset-0x800]);
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// printf("ASC: %02x to %x (was %x)\n", data, offset, m_regs[offset-0x800]);
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stream_update(m_stream);
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switch (offset)
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@ -483,15 +466,25 @@ void asc_device::write(UINT16 offset, UINT8 data)
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case R_MODE:
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data &= 3; // only bits 0 and 1 can be written
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memset(m_fifo_a_wrhalf, 0, sizeof(m_fifo_a_wrhalf));
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memset(m_fifo_b_wrhalf, 0, sizeof(m_fifo_b_wrhalf));
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if (data != m_regs[R_MODE-0x800])
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{
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m_fifo_a_rdptr = m_fifo_b_rdptr = 0;
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m_fifo_a_wrptr = m_fifo_b_wrptr = 0;
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m_fifo_cap_a = m_fifo_cap_b = 0;
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}
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break;
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m_fifo_a_rdptr = m_fifo_b_rdptr = 0;
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m_fifo_a_wrptr = m_fifo_b_wrptr = 0;
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case R_FIFOMODE:
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if (data & 0x80)
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{
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m_fifo_a_rdptr = m_fifo_b_rdptr = 0;
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m_fifo_a_wrptr = m_fifo_b_wrptr = 0;
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m_fifo_cap_a = m_fifo_cap_b = 0;
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}
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break;
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case R_WTCONTROL:
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// printf("One-shot wavetable %02x\n", data);
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// printf("One-shot wavetable %02x\n", data);
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break;
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case 0x811:
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@ -138,13 +138,13 @@ protected:
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UINT8 m_fifo_a[0x400];
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UINT8 m_fifo_b[0x400];
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UINT8 m_regs[0x100];
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UINT8 m_regs[0x800];
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UINT32 m_phase[4], m_incr[4];
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int m_fifo_a_rdptr, m_fifo_b_rdptr;
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int m_fifo_a_wrptr, m_fifo_b_wrptr;
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int m_fifo_a_wrhalf[2], m_fifo_b_wrhalf[2];
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int m_fifo_cap_a, m_fifo_cap_b;
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};
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