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intelfsh, i2cmem: Not a device_memory_interface either [O. Galibert]

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This commit is contained in:
Olivier Galibert 2016-06-16 16:50:07 +02:00 committed by Olivier Galibert
parent 6e962f2d95
commit 0dc5ed5585
10 changed files with 77 additions and 241 deletions
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2
src/devices/bus/z88/flash.cpp
View File

@ -72,7 +72,7 @@ machine_config_constructor z88_1024k_flash_device::device_mconfig_additions() co
UINT8* z88_1024k_flash_device::get_cart_base()
{
return (UINT8*)m_flash->space().get_read_ptr(0);
return m_flash->base();
}
/*-------------------------------------------------

1
src/devices/machine/eeprom.h
View File

@ -101,7 +101,6 @@ protected:
UINT32 m_cells;
UINT8 m_address_bits;
UINT8 m_data_bits;
address_space_config m_space_config;
generic_ptr m_default_data;
UINT32 m_default_data_size;
UINT32 m_default_value;

80
src/devices/machine/i2cmem.cpp
View File

@ -60,11 +60,6 @@ static inline void ATTR_PRINTF( 3, 4 ) verboselog( device_t *device, int n_level
// device type definition
const device_type I2CMEM = &device_creator<i2cmem_device>;
static ADDRESS_MAP_START( i2cmem_map8, AS_PROGRAM, 8, i2cmem_device )
AM_RANGE(0x0000, 0x0fff) AM_RAM
ADDRESS_MAP_END
//**************************************************************************
// LIVE DEVICE
@ -76,7 +71,6 @@ ADDRESS_MAP_END
i2cmem_device::i2cmem_device( const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock )
: device_t(mconfig, I2CMEM, "I2C Memory", tag, owner, clock, "i2cmem", __FILE__),
device_memory_interface(mconfig, *this),
device_nvram_interface(mconfig, *this),
m_region(*this, DEVICE_SELF),
m_slave_address( I2CMEM_SLAVE_ADDRESS ),
@ -96,25 +90,6 @@ i2cmem_device::i2cmem_device( const machine_config &mconfig, const char *tag, de
}
//-------------------------------------------------
// device_config_complete - perform any
// operations now that the configuration is
// complete
//-------------------------------------------------
void i2cmem_device::device_config_complete()
{
int address_bits = 0;
int i = m_data_size - 1;
while( i > 0 )
{
address_bits++;
i >>= 1;
}
m_space_config = address_space_config( "i2cmem", ENDIANNESS_BIG, 8, address_bits, 0, *ADDRESS_MAP_NAME( i2cmem_map8 ) );
}
//-------------------------------------------------
@ -123,6 +98,7 @@ void i2cmem_device::device_config_complete()
void i2cmem_device::device_start()
{
m_data = std::make_unique<UINT8 []>(m_data_size);
m_page.resize( m_page_size );
save_item( NAME(m_scl) );
@ -137,6 +113,7 @@ void i2cmem_device::device_start()
save_item( NAME(m_shift) );
save_item( NAME(m_devsel) );
save_item( NAME(m_byteaddr) );
save_pointer( &m_data[0], "m_data", m_data_size );
if ( m_page_size > 0 )
{
save_item( NAME(m_page) );
@ -153,17 +130,6 @@ void i2cmem_device::device_reset()
}
//-------------------------------------------------
// memory_space_config - return a description of
// any address spaces owned by this device
//-------------------------------------------------
const address_space_config *i2cmem_device::memory_space_config( address_spacenum spacenum ) const
{
return ( spacenum == 0 ) ? &m_space_config : nullptr;
}
//-------------------------------------------------
// nvram_default - called to initialize NVRAM to
// its default state
@ -171,20 +137,14 @@ const address_space_config *i2cmem_device::memory_space_config( address_spacenum
void i2cmem_device::nvram_default()
{
int i2cmem_bytes = m_data_size;
UINT16 default_value = 0xff;
for( offs_t offs = 0; offs < i2cmem_bytes; offs++ )
{
space(AS_PROGRAM).write_byte( offs, default_value );
}
memset(&m_data[0], 0xff, m_data_size);
/* populate from a memory region if present */
if (m_region.found())
{
if( m_region->bytes() != i2cmem_bytes )
if( m_region->bytes() != m_data_size )
{
fatalerror( "i2cmem region '%s' wrong size (expected size = 0x%X)\n", tag(), i2cmem_bytes );
fatalerror( "i2cmem region '%s' wrong size (expected size = 0x%X)\n", tag(), m_data_size );
}
if( m_region->bytewidth() != 1 )
@ -192,9 +152,7 @@ void i2cmem_device::nvram_default()
fatalerror( "i2cmem region '%s' needs to be an 8-bit region\n", tag() );
}
UINT8 *default_data = m_region->base();
for( offs_t offs = 0; offs < i2cmem_bytes; offs++ )
space(AS_PROGRAM).write_byte( offs, default_data[offs] );
memcpy(&m_data[0], m_region->base(), m_data_size);
}
}
@ -206,15 +164,7 @@ void i2cmem_device::nvram_default()
void i2cmem_device::nvram_read( emu_file &file )
{
int i2cmem_bytes = m_data_size;
dynamic_buffer buffer ( i2cmem_bytes );
file.read( &buffer[0], i2cmem_bytes );
for( offs_t offs = 0; offs < i2cmem_bytes; offs++ )
{
space(AS_PROGRAM).write_byte( offs, buffer[ offs ] );
}
file.read( &m_data[0], m_data_size );
}
//-------------------------------------------------
@ -224,15 +174,7 @@ void i2cmem_device::nvram_read( emu_file &file )
void i2cmem_device::nvram_write( emu_file &file )
{
int i2cmem_bytes = m_data_size;
dynamic_buffer buffer ( i2cmem_bytes );
for( offs_t offs = 0; offs < i2cmem_bytes; offs++ )
{
buffer[ offs ] = space(AS_PROGRAM).read_byte( offs );
}
file.write( &buffer[0], i2cmem_bytes );
file.write( &m_data[0], m_data_size );
}
@ -376,7 +318,7 @@ WRITE_LINE_MEMBER( i2cmem_device::write_scl )
for( int i = 0; i < m_page_size; i++ )
{
space(AS_PROGRAM).write_byte( offset + i, m_page[ i ] );
m_data[offset + i] = m_page[ i ];
}
m_page_offset = 0;
@ -387,7 +329,7 @@ WRITE_LINE_MEMBER( i2cmem_device::write_scl )
int offset = data_offset();
verboselog( this, 1, "data[ %04x ] <- %02x\n", offset, m_shift );
space(AS_PROGRAM).write_byte( offset, m_shift );
m_data[ offset ] = m_shift;
m_byteaddr++;
}
@ -420,7 +362,7 @@ WRITE_LINE_MEMBER( i2cmem_device::write_scl )
{
int offset = data_offset();
m_shift = space(AS_PROGRAM).read_byte( offset );
m_shift = m_data[offset];
verboselog( this, 1, "data[ %04x ] -> %02x\n", offset, m_shift );
m_byteaddr++;
}

9
src/devices/machine/i2cmem.h
View File

@ -85,7 +85,6 @@
class i2cmem_device :
public device_t,
public device_memory_interface,
public device_nvram_interface
{
public:
@ -111,13 +110,9 @@ public:
protected:
// device-level overrides
virtual void device_config_complete() override;
virtual void device_start() override;
virtual void device_reset() override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config( address_spacenum spacenum = AS_0 ) const override;
// device_nvram_interface overrides
virtual void nvram_default() override;
virtual void nvram_read( emu_file &file ) override;
@ -130,10 +125,8 @@ protected:
optional_memory_region m_region;
// device-specific configuration
address_space_config m_space_config;
// internal state
std::unique_ptr<UINT8[]> m_data;
int m_slave_address;
int m_page_size;
int m_data_size;

159
src/devices/machine/intelfsh.cpp
View File

@ -110,48 +110,6 @@ const device_type INTEL_28F320J5 = &device_creator<intel_28f320j5_device>;
const device_type SST_39VF400A = &device_creator<sst_39vf400a_device>;
static ADDRESS_MAP_START( memory_map8_512Kb, AS_PROGRAM, 8, intelfsh_device )
AM_RANGE(0x00000, 0x00ffff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( memory_map8_1Mb, AS_PROGRAM, 8, intelfsh_device )
AM_RANGE(0x00000, 0x01ffff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( memory_map8_2Mb, AS_PROGRAM, 8, intelfsh_device )
AM_RANGE(0x00000, 0x03ffff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( memory_map8_4Mb, AS_PROGRAM, 8, intelfsh_device )
AM_RANGE(0x00000, 0x07ffff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( memory_map8_8Mb, AS_PROGRAM, 8, intelfsh_device )
AM_RANGE(0x00000, 0x0fffff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( memory_map8_16Mb, AS_PROGRAM, 8, intelfsh_device )
AM_RANGE(0x00000, 0x1fffff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( memory_map16_4Mb, AS_PROGRAM, 16, intelfsh_device )
AM_RANGE(0x00000, 0x03ffff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( memory_map16_16Mb, AS_PROGRAM, 16, intelfsh_device )
AM_RANGE(0x00000, 0x0fffff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( memory_map16_32Mb, AS_PROGRAM, 16, intelfsh_device )
AM_RANGE(0x00000, 0x1fffff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( memory_map16_64Mb, AS_PROGRAM, 16, intelfsh_device )
AM_RANGE(0x00000, 0x3fffff) AM_RAM
ADDRESS_MAP_END
//**************************************************************************
// LIVE DEVICE
@ -163,7 +121,6 @@ ADDRESS_MAP_END
intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 variant, const char *shortname, const char *source)
: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
device_memory_interface(mconfig, *this),
device_nvram_interface(mconfig, *this),
m_region(*this, DEVICE_SELF),
m_type(variant),
@ -182,8 +139,6 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_timer(nullptr),
m_bank(0)
{
address_map_constructor map = nullptr;
switch( variant )
{
case FLASH_INTEL_28F016S5:
@ -192,7 +147,6 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_size = 0x200000;
m_maker_id = MFG_INTEL;
m_device_id = 0xaa;
map = ADDRESS_MAP_NAME( memory_map8_16Mb );
break;
case FLASH_ATMEL_29C010:
m_bits = 8;
@ -200,21 +154,18 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_page_size = 0x80;
m_maker_id = MFG_ATMEL;
m_device_id = 0xd5;
map = ADDRESS_MAP_NAME( memory_map8_1Mb );
break;
case FLASH_AMD_29F010:
m_bits = 8;
m_size = 0x20000;
m_maker_id = MFG_AMD;
m_device_id = 0x20;
map = ADDRESS_MAP_NAME( memory_map8_1Mb );
break;
case FLASH_AMD_29F040:
m_bits = 8;
m_size = 0x80000;
m_maker_id = MFG_AMD;
m_device_id = 0xa4;
map = ADDRESS_MAP_NAME( memory_map8_4Mb );
break;
case FLASH_AMD_29F080:
m_bits = 8;
@ -222,7 +173,6 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_addrmask = 0x7ff;
m_maker_id = MFG_AMD;
m_device_id = 0xd5;
map = ADDRESS_MAP_NAME( memory_map8_8Mb );
break;
case FLASH_AMD_29F400T:
m_bits = 8;
@ -230,7 +180,6 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_maker_id = MFG_AMD;
m_device_id = 0x23;
m_top_boot_sector = true;
map = ADDRESS_MAP_NAME( memory_map8_4Mb );
break;
case FLASH_AMD_29F800T:
m_bits = 8;
@ -238,14 +187,12 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_maker_id = MFG_AMD;
m_device_id = 0xda;
m_top_boot_sector = true;
map = ADDRESS_MAP_NAME( memory_map8_8Mb );
break;
case FLASH_AMD_29LV200T:
m_bits = 8;
m_size = 0x40000;
m_maker_id = MFG_AMD;
m_device_id = 0x3b;
map = ADDRESS_MAP_NAME( memory_map8_2Mb );
break;
case FLASH_INTEL_28F320J3D:
m_bits = 16;
@ -253,7 +200,6 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_maker_id = MFG_INTEL;
m_device_id = 0x16;
m_sector_is_4k = true;
map = ADDRESS_MAP_NAME( memory_map16_32Mb );
break;
case FLASH_INTEL_28F320J5: // funkball
m_bits = 16;
@ -261,7 +207,6 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_maker_id = MFG_INTEL;
m_device_id = 0x14;
// m_sector_is_4k = true; 128kb?
map = ADDRESS_MAP_NAME( memory_map16_32Mb );
break;
case FLASH_SST_39VF020:
m_bits = 8;
@ -269,7 +214,6 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_maker_id = MFG_SST;
m_device_id = 0xd6;
m_sector_is_4k = true;
map = ADDRESS_MAP_NAME( memory_map8_2Mb );
break;
case FLASH_SST_39VF400A:
m_bits = 16;
@ -277,21 +221,18 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_maker_id = MFG_SST;
m_device_id = 0xd6;
m_sector_is_4k = true;
map = ADDRESS_MAP_NAME( memory_map16_4Mb );
break;
case FLASH_SHARP_LH28F400:
m_bits = 16;
m_size = 0x80000;
m_maker_id = MFG_SHARP;
m_device_id = 0xed;
map = ADDRESS_MAP_NAME( memory_map16_4Mb );
break;
case FLASH_INTEL_E28F400B:
m_bits = 16;
m_size = 0x80000;
m_maker_id = MFG_INTEL;
m_device_id = 0x4471;
map = ADDRESS_MAP_NAME( memory_map16_4Mb );
break;
case FLASH_FUJITSU_29F160T:
m_bits = 8;
@ -299,56 +240,48 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_maker_id = MFG_FUJITSU;
m_device_id = 0xad;
m_top_boot_sector = true;
map = ADDRESS_MAP_NAME( memory_map8_16Mb );
break;
case FLASH_FUJITSU_29F016A:
m_bits = 8;
m_size = 0x200000;
m_maker_id = MFG_FUJITSU;
m_device_id = 0xad;
map = ADDRESS_MAP_NAME( memory_map8_16Mb );
break;
case FLASH_FUJITSU_29DL16X:
m_bits = 8;
m_size = 0x200000;
m_maker_id = MFG_FUJITSU;
m_device_id = 0x35;
map = ADDRESS_MAP_NAME( memory_map8_16Mb );
break;
case FLASH_INTEL_E28F008SA:
m_bits = 8;
m_size = 0x100000;
m_maker_id = MFG_INTEL;
m_device_id = 0xa2;
map = ADDRESS_MAP_NAME( memory_map8_8Mb );
break;
case FLASH_INTEL_TE28F160:
m_bits = 16;
m_size = 0x200000;
m_maker_id = MFG_SHARP;
m_device_id = 0xd0;
map = ADDRESS_MAP_NAME( memory_map16_16Mb );
break;
case FLASH_INTEL_TE28F320:
m_bits = 16;
m_size = 0x400000;
m_maker_id = MFG_INTEL;
m_device_id = 0x8896;
map = ADDRESS_MAP_NAME( memory_map16_32Mb );
break;
case FLASH_SHARP_UNK128MBIT:
m_bits = 16;
m_size = 0x800000;
m_maker_id = MFG_SHARP;
m_device_id = 0xb0;
map = ADDRESS_MAP_NAME( memory_map16_64Mb );
break;
case FLASH_MACRONIX_29L001MC:
m_bits = 8;
m_size = 0x20000;
m_maker_id = MFG_MACRONIX;
m_device_id = 0x51;
map = ADDRESS_MAP_NAME( memory_map8_1Mb );
break;
case FLASH_MACRONIX_29LV160TMC:
m_bits = 8;
@ -356,7 +289,6 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_maker_id = MFG_MACRONIX;
m_device_id = 0x49;
m_sector_is_16k = true;
map = ADDRESS_MAP_NAME( memory_map8_1Mb );
break;
case FLASH_PANASONIC_MN63F805MNP:
m_bits = 8;
@ -364,7 +296,6 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_maker_id = MFG_PANASONIC;
m_device_id = 0x1b;
m_sector_is_4k = true;
map = ADDRESS_MAP_NAME( memory_map8_512Kb );
break;
case FLASH_SANYO_LE26FV10N1TS:
m_bits = 8;
@ -372,14 +303,12 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_maker_id = MFG_SANYO;
m_device_id = 0x13;
m_sector_is_4k = true;
map = ADDRESS_MAP_NAME( memory_map8_1Mb );
break;
case FLASH_SST_28SF040:
m_bits = 8;
m_size = 0x80000;
m_maker_id = MFG_SST;
m_device_id = 0x04;
map = ADDRESS_MAP_NAME( memory_map8_4Mb );
break;
case FLASH_TMS_29F040:
m_bits = 8;
@ -387,7 +316,6 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_size = 0x80000;
m_maker_id = MFG_AMD;
m_device_id = 0xa4;
map = ADDRESS_MAP_NAME( memory_map8_4Mb );
break;
}
@ -395,8 +323,6 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
for (addrbits = 24; addrbits > 0; addrbits--)
if ((m_size & (1 << addrbits)) != 0)
break;
m_space_config = address_space_config("flash", ENDIANNESS_BIG, m_bits, addrbits, (m_bits == 8) ? 0 : -1, map);
}
intelfsh8_device::intelfsh8_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 variant, const char *shortname, const char *source)
@ -498,11 +424,13 @@ tms_29f040_device::tms_29f040_device(const machine_config &mconfig, const char *
void intelfsh_device::device_start()
{
m_data = std::make_unique<UINT8 []>(m_size);
m_timer = timer_alloc();
save_item( NAME(m_status) );
save_item( NAME(m_flash_mode) );
save_item( NAME(m_flash_master_lock) );
save_pointer( &m_data[0], "m_data", m_size);
}
@ -525,17 +453,6 @@ void intelfsh_device::device_timer(emu_timer &timer, device_timer_id id, int par
}
//-------------------------------------------------
// memory_space_config - return a description of
// any address spaces owned by this device
//-------------------------------------------------
const address_space_config *intelfsh_device::memory_space_config(address_spacenum spacenum) const
{
return (spacenum == 0) ? &m_space_config : nullptr;
}
//-------------------------------------------------
// nvram_default - called to initialize NVRAM to
// its default state
@ -553,19 +470,21 @@ void intelfsh_device::nvram_default()
if (m_bits == 8)
{
for (offs_t offs = 0; offs < bytes; offs++)
space(AS_PROGRAM).write_byte(offs, m_region->u8(offs));
m_data[offs] = m_region->u8(offs);
}
else
{
for (offs_t offs = 0; offs < bytes; offs += 2)
space(AS_PROGRAM).write_word(offs, m_region->u16(offs / 2));
for (offs_t offs = 0; offs < bytes; offs += 2) {
UINT16 v = m_region->u16(offs / 2);
m_data[offs] = v >> 8;
m_data[offs+1] = v;
}
}
return;
}
// otherwise, default to 0xff
for (offs_t offs = 0; offs < m_size; offs++)
space(AS_PROGRAM).write_byte(offs, 0xff);
memset(&m_data[0], 0xff, m_size);
}
@ -576,10 +495,7 @@ void intelfsh_device::nvram_default()
void intelfsh_device::nvram_read(emu_file &file)
{
dynamic_buffer buffer(m_size);
file.read(&buffer[0], m_size);
for (int byte = 0; byte < m_size; byte++)
space(AS_PROGRAM).write_byte(byte, buffer[byte]);
file.read(&m_data[0], m_size);
}
@ -590,10 +506,7 @@ void intelfsh_device::nvram_read(emu_file &file)
void intelfsh_device::nvram_write(emu_file &file)
{
dynamic_buffer buffer(m_size);
for (int byte = 0; byte < m_size; byte++)
buffer[byte] = space(AS_PROGRAM).read_byte(byte);
file.write(&buffer[0], m_size);
file.write(&m_data[0], m_size);
}
@ -614,12 +527,12 @@ UINT32 intelfsh_device::read_full(UINT32 address)
{
case 8:
{
data = space(AS_PROGRAM).read_byte(address);
data = m_data[address];
}
break;
case 16:
{
data = space(AS_PROGRAM).read_word(address * 2);
data = m_data[address*2+1] | (m_data[address*2] << 8);
}
break;
}
@ -693,12 +606,12 @@ UINT32 intelfsh_device::read_full(UINT32 address)
{
case 8:
{
data = space(AS_PROGRAM).read_byte(address);
data = m_data[address];
}
break;
case 16:
{
data = space(AS_PROGRAM).read_word(address * 2);
data = m_data[address*2+1] | (m_data[address*2] << 8);
}
break;
}
@ -921,8 +834,7 @@ void intelfsh_device::write_full(UINT32 address, UINT32 data)
(( address & 0xfff ) == 0xaaa && ( data & 0xff ) == 0x10 ) )
{
// chip erase
for (offs_t offs = 0; offs < m_size; offs++)
space(AS_PROGRAM).write_byte(offs, 0xff);
memset(&m_data[0], 0, m_size);
m_status = 1 << 3;
m_flash_mode = FM_ERASEAMD4;
@ -947,15 +859,13 @@ void intelfsh_device::write_full(UINT32 address, UINT32 data)
UINT32 base = address * ((m_bits == 16) ? 2 : 1);
if (m_sector_is_4k)
{
for (offs_t offs = 0; offs < 4 * 1024; offs++)
space(AS_PROGRAM).write_byte((base & ~0xfff) + offs, 0xff);
memset(&m_data[base & ~0xfff], 0xff, 4 * 1024);
m_erase_sector = address & ((m_bits == 16) ? ~0x7ff : ~0xfff);
m_timer->adjust( attotime::from_msec( 125 ) );
}
else if(m_sector_is_16k)
{
for (offs_t offs = 0; offs < 16 * 1024; offs++)
space(AS_PROGRAM).write_byte((base & ~0x3fff) + offs, 0xff);
memset(&m_data[base & ~0x3fff], 0xff, 16 * 1024);
m_erase_sector = address & ((m_bits == 16) ? ~0x1fff : ~0x3fff);
m_timer->adjust( attotime::from_msec( 500 ) );
}
@ -963,30 +873,26 @@ void intelfsh_device::write_full(UINT32 address, UINT32 data)
{
if (address >= (m_size - (16*1024)))
{
for (offs_t offs = 0; offs < 16 * 1024; offs++)
space(AS_PROGRAM).write_byte((base & ~0x3fff) + offs, 0xff);
memset(&m_data[base & ~0x3fff], 0xff, 16 * 1024);
m_erase_sector = address & ((m_bits == 16) ? ~0x1fff : ~0x3fff);
m_timer->adjust( attotime::from_msec( 500 ) );
}
else if (address >= (m_size - (32*1024)))
{
for (offs_t offs = 0; offs < 8 * 1024; offs++)
space(AS_PROGRAM).write_byte((base & ~0x1fff) + offs, 0xff);
memset(&m_data[base & ~0x1fff], 0xff, 8 * 1024);
m_erase_sector = address & ((m_bits == 16) ? ~0xfff : ~0x1fff);
m_timer->adjust( attotime::from_msec( 250 ) );
}
else
{
for (offs_t offs = 0; offs < 32 * 1024; offs++)
space(AS_PROGRAM).write_byte((base & ~0x7fff) + offs, 0xff);
memset(&m_data[base & ~0x7fff], 0xff, 32 * 1024);
m_erase_sector = address & ((m_bits == 16) ? ~0x3fff : ~0x7fff);
m_timer->adjust( attotime::from_msec( 500 ) );
}
}
else
{
for (offs_t offs = 0; offs < 64 * 1024; offs++)
space(AS_PROGRAM).write_byte((base & ~0xffff) + offs, 0xff);
memset(&m_data[base & ~0xffff], 0xff, 64 * 1024);
m_erase_sector = address & ((m_bits == 16) ? ~0x7fff : ~0xffff);
m_timer->adjust( attotime::from_seconds( 1 ) );
}
@ -1004,7 +910,7 @@ void intelfsh_device::write_full(UINT32 address, UINT32 data)
{
case 8:
{
space(AS_PROGRAM).write_byte(address, data);
m_data[address] = data;
}
break;
default:
@ -1017,10 +923,11 @@ void intelfsh_device::write_full(UINT32 address, UINT32 data)
switch( m_bits )
{
case 8:
space(AS_PROGRAM).write_byte(address, data);
m_data[address] = data;
break;
case 16:
space(AS_PROGRAM).write_word(address * 2, data);
m_data[address*2] = data >> 8;
m_data[address] = data;
break;
default:
logerror( "FM_WRITEPART1 not supported when m_bits == %d\n", m_bits );
@ -1036,10 +943,11 @@ void intelfsh_device::write_full(UINT32 address, UINT32 data)
switch( m_bits )
{
case 8:
space(AS_PROGRAM).write_byte(address, data);
m_data[address] = data;
break;
case 16:
space(AS_PROGRAM).write_word(address * 2, data);
m_data[address*2] = data >> 8;
m_data[address] = data;
break;
default:
logerror( "FM_WRITEPAGEATMEL not supported when m_bits == %d\n", m_bits );
@ -1060,8 +968,7 @@ void intelfsh_device::write_full(UINT32 address, UINT32 data)
{
// clear the 256 bytes block containing the current address to all 0xffs
UINT32 base = address * ((m_bits == 16) ? 2 : 1);
for (offs_t offs = 0; offs < 256; offs++)
space(AS_PROGRAM).write_byte((base & ~0xff) + offs, 0xff);
memset(&m_data[base & ~0xff], 0xff, 256);
m_timer->adjust( attotime::from_msec( 4 ) );
}
@ -1103,8 +1010,7 @@ void intelfsh_device::write_full(UINT32 address, UINT32 data)
}
// clear the block containing the current address to all 0xffffs
for (offs_t offs = 0; offs < size / 2; offs += 2)
space(AS_PROGRAM).write_word(base | offs, 0xffff);
memset(&m_data[2*base], 0xff, size);
m_timer->adjust( attotime::from_msec( duration ) );
}
@ -1112,8 +1018,7 @@ void intelfsh_device::write_full(UINT32 address, UINT32 data)
{
// clear the 64k block containing the current address to all 0xffs
UINT32 base = address * ((m_bits == 16) ? 2 : 1);
for (offs_t offs = 0; offs < 64 * 1024; offs++)
space(AS_PROGRAM).write_byte((base & ~0xffff) + offs, 0xff);
memset(&m_data[base & ~0xffff], 0xff, 64 * 1024);
m_timer->adjust( attotime::from_seconds( 1 ) );
}

16
src/devices/machine/intelfsh.h
View File

@ -106,7 +106,6 @@ class intelfsh_device;
// ======================> intelfsh_device
class intelfsh_device : public device_t,
public device_memory_interface,
public device_nvram_interface
{
public:
@ -145,6 +144,8 @@ public:
FLASH_SST_39VF400A
};
UINT8 *base() { return &m_data[0]; }
protected:
// construction/destruction
intelfsh_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 variant, const char *shortname, const char *source);
@ -154,9 +155,6 @@ protected:
virtual void device_start() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
// device_nvram_interface overrides
virtual void nvram_default() override;
virtual void nvram_read(emu_file &file) override;
@ -169,7 +167,6 @@ protected:
optional_memory_region m_region;
// configuration state
address_space_config m_space_config;
UINT32 m_type;
INT32 m_size;
UINT8 m_bits;
@ -182,6 +179,7 @@ protected:
UINT8 m_page_size;
// internal state
std::unique_ptr<UINT8[]> m_data;
UINT8 m_status;
INT32 m_erase_sector;
INT32 m_flash_mode;
@ -207,8 +205,8 @@ public:
DECLARE_READ8_MEMBER(read) { return read_full(offset); }
DECLARE_WRITE8_MEMBER(write) { write_full(offset, data); }
UINT8 read_raw(offs_t offset) { return space(AS_PROGRAM).read_byte(offset); }
void write_raw(offs_t offset, UINT8 data) { space(AS_PROGRAM).write_byte(offset, data); }
UINT8 read_raw(offs_t offset) { return m_data[offset]; }
void write_raw(offs_t offset, UINT8 data) { m_data[offset] = data; }
};
@ -227,8 +225,8 @@ public:
DECLARE_READ16_MEMBER(read) { return read_full(offset); }
DECLARE_WRITE16_MEMBER(write) { write_full(offset, data); }
UINT16 read_raw(offs_t offset) { return space(AS_PROGRAM).read_word(offset * 2); }
void write_raw(offs_t offset, UINT16 data) { space(AS_PROGRAM).write_word(offset * 2, data); }
UINT16 read_raw(offs_t offset) { return m_data[offset*2] | (m_data[offset*2+1] << 8); }
void write_raw(offs_t offset, UINT16 data) { m_data[offset*2] = data; m_data[offset*2+1] = data >> 8; }
};

7
src/mame/drivers/avigo.cpp
View File

@ -688,7 +688,6 @@ TIMER_DEVICE_CALLBACK_MEMBER(avigo_state::avigo_1hz_timer)
QUICKLOAD_LOAD_MEMBER( avigo_state,avigo)
{
address_space& flash1 = m_flash1->space(0);
const char *systemname = machine().system().name;
UINT32 first_app_page = (0x50000>>14);
int app_page;
@ -704,7 +703,7 @@ QUICKLOAD_LOAD_MEMBER( avigo_state,avigo)
for (int offset=0; offset<0x4000; offset++)
{
if (flash1.read_byte((app_page<<14) + offset) != 0xff)
if (m_flash1->read_raw((app_page<<14) + offset) != 0xff)
{
empty_page = false;
break;
@ -721,10 +720,10 @@ QUICKLOAD_LOAD_MEMBER( avigo_state,avigo)
logerror("Application loaded at 0x%05x-0x%05x\n", app_page<<14, (app_page<<14) + (UINT32)image.length());
// copy app file into flash memory
image.fread((UINT8*)flash1.get_read_ptr(app_page<<14), image.length());
image.fread(m_flash1->base() + (app_page<<14), image.length());
// update the application ID
flash1.write_byte((app_page<<14) + 0x1a5, 0x80 + (app_page - (first_app_page>>14)));
m_flash1->write_raw((app_page<<14) + 0x1a5, 0x80 + (app_page - (first_app_page>>14)));
// reset the CPU for allow at the Avigo OS to recognize the installed app
m_warm_start = 1;

3
src/mame/drivers/rex6000.cpp
View File

@ -702,7 +702,6 @@ PALETTE_INIT_MEMBER(rex6000_state, rex6000)
QUICKLOAD_LOAD_MEMBER( rex6000_state,rex6000)
{
static const char magic[] = "ApplicationName:Addin";
address_space& flash = m_flash0b->space(0);
UINT32 img_start = 0;
dynamic_buffer data(image.length());
@ -715,7 +714,7 @@ QUICKLOAD_LOAD_MEMBER( rex6000_state,rex6000)
img_start += 0xa0; //skip the icon (40x32 pixel)
for (UINT32 i=0; i<image.length() - img_start ;i++)
flash.write_byte(i, data[img_start + i]);
m_flash0b->write_raw(i, data[img_start + i]);
return IMAGE_INIT_PASS;
}

2
src/mame/drivers/svmu.cpp
View File

@ -198,7 +198,7 @@ inline void vmufat_write_word(UINT8* flash, UINT8 block, offs_t offset, UINT16 d
QUICKLOAD_LOAD_MEMBER( svmu_state, svmu )
{
UINT32 size = image.length();
UINT8 *flash = (UINT8*)m_flash->space().get_read_ptr(0);
UINT8 *flash = m_flash->base();
image.fread(flash, size);

3
src/mame/machine/bebox.cpp
View File

@ -770,7 +770,8 @@ void bebox_state::machine_reset()
m_ppc1->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
m_ppc2->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
memcpy(m_flash->space().get_read_ptr(0),memregion("user1")->base(),0x200000);
// Endianness? Bah!
memcpy(m_flash->base(),memregion("user1")->base(),0x200000);
}
void bebox_state::machine_start()