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https://github.com/holub/mame
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New systems marked not working
------------------------------ Sapphire (Novag) [hap, Berger]
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@ -35050,6 +35050,9 @@ supremo
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@source:novag/robotadv.cpp
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robotadv
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@source:novag/sapphire.cpp
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sapphire
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@source:novag/savant.cpp
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savant //
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savant2 //
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320
src/mame/novag/sapphire.cpp
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320
src/mame/novag/sapphire.cpp
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// license:BSD-3-Clause
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// copyright-holders:hap
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// thanks-to:Berger
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/*******************************************************************************
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Novag Sapphire
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TODO:
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- currently hardlocks MAME, suspect problem with h8_sci
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- everything else
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*******************************************************************************/
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#include "emu.h"
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#include "bus/rs232/rs232.h"
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#include "cpu/h8/h8325.h"
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#include "sound/dac.h"
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#include "video/pwm.h"
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#include "screen.h"
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#include "speaker.h"
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// internal artwork
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//#include "novag_sapphire.lh"
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namespace {
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class sapphire_state : public driver_device
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{
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public:
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sapphire_state(const machine_config &mconfig, device_type type, const char *tag) :
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driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_memory(*this, "memory"),
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m_banked_ram(*this, "banked_ram", 0x20000, ENDIANNESS_BIG),
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m_rambank(*this, "rambank"),
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m_dac(*this, "dac"),
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m_rs232(*this, "rs232"),
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m_inputs(*this, "IN.%u", 0)
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{ }
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void sapphire(machine_config &config);
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protected:
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virtual void machine_start() override;
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private:
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// devices/pointers
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required_device<h8325_device> m_maincpu;
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memory_view m_memory;
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memory_share_creator<u8> m_banked_ram;
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required_memory_bank m_rambank;
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required_device<dac_1bit_device> m_dac;
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required_device<rs232_port_device> m_rs232;
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required_ioport_array<2> m_inputs;
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u8 m_inp_mux = 0;
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void main_map(address_map &map);
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// I/O handlers
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u8 p1_r();
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void p1_w(u8 data);
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u8 p2_r();
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void p2_w(u8 data);
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u8 p3_r();
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void p3_w(u8 data);
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u8 p4_r();
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void p4_w(u8 data);
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u8 p5_r();
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void p5_w(u8 data);
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u8 p6_r();
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void p6_w(u8 data);
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u8 p7_r();
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void p7_w(u8 data);
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};
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void sapphire_state::machine_start()
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{
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m_rambank->configure_entries(0, 4, m_banked_ram, 0x8000);
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m_memory.select(0);
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// register for savestates
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save_item(NAME(m_inp_mux));
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}
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/*******************************************************************************
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I/O
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*******************************************************************************/
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/*
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[:maincpu:port1] ddr_w ff
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[:maincpu:port3] ddr_w ff
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[:maincpu:port2] ddr_w 7f
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[:maincpu:port4] ddr_w 3f
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[:maincpu:port6] ddr_w 3f
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*/
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u8 sapphire_state::p1_r()
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{
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//printf("r1 ");
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return 0xff;
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}
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void sapphire_state::p1_w(u8 data)
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{
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//printf("w1_%X ",data);
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}
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u8 sapphire_state::p2_r()
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{
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//printf("r2 ");
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return 0xff;
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}
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void sapphire_state::p2_w(u8 data)
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{
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//printf("w2_%X ",data);
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}
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u8 sapphire_state::p3_r()
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{
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//printf("r3 ");
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return 0xff;
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}
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void sapphire_state::p3_w(u8 data)
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{
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//printf("w3_%X ",data);
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}
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u8 sapphire_state::p4_r()
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{
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//printf("r4 ");
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return 0xff ^ 0xc0;
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}
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void sapphire_state::p4_w(u8 data)
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{
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//printf("w4_%X ",data);
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// P40: speaker out
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m_dac->write(data & 1);
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// P41,P42: RAM bank
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m_rambank->set_entry(data >> 1 & 3);
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}
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u8 sapphire_state::p5_r()
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{
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//printf("r5 ");
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return 0xff;
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}
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void sapphire_state::p5_w(u8 data)
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{
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//printf("w5_%X ",data);
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}
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u8 sapphire_state::p6_r()
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{
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//printf("r6 ");
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return 0xff ^ 0x40;
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}
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void sapphire_state::p6_w(u8 data)
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{
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//printf("w6_%X ",data);
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// P63: RAM/ROM CS
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m_memory.select(BIT(data, 3));
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}
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u8 sapphire_state::p7_r()
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{
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//printf("r7 ");
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return 0xff;
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}
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void sapphire_state::p7_w(u8 data)
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{
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//printf("w7_%X ",data);
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}
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/*******************************************************************************
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Address Maps
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*******************************************************************************/
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void sapphire_state::main_map(address_map &map)
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{
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map(0x8000, 0xffff).view(m_memory);
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m_memory[0](0x8000, 0xffff).rom().region("maincpu", 0x8000);
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m_memory[1](0x8000, 0xffff).bankrw(m_rambank);
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map(0xff90, 0xff9f).unmaprw(); // reserved for H8 registers
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map(0xffb0, 0xffff).unmaprw(); // "
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}
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/*******************************************************************************
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Input Ports
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*******************************************************************************/
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static INPUT_PORTS_START( sapphire )
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PORT_START("IN.0")
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PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_1)
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PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_2)
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PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_3)
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PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_4)
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PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_5)
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PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_6)
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PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_7)
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PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_8)
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PORT_START("IN.1")
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PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_Q)
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PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_W)
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PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_E)
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PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_R)
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PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_T)
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PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_Y)
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PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_U)
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PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_I)
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INPUT_PORTS_END
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/*******************************************************************************
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Machine Configs
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*******************************************************************************/
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void sapphire_state::sapphire(machine_config &config)
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{
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// basic machine hardware
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H8325(config, m_maincpu, 26.601712_MHz_XTAL);
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m_maincpu->set_mode(2);
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m_maincpu->set_addrmap(AS_PROGRAM, &sapphire_state::main_map);
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m_maincpu->write_sci_tx<0>().set(m_rs232, FUNC(rs232_port_device::write_txd));
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m_maincpu->read_port1().set(FUNC(sapphire_state::p1_r));
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m_maincpu->write_port1().set(FUNC(sapphire_state::p1_w));
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m_maincpu->read_port2().set(FUNC(sapphire_state::p2_r));
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m_maincpu->write_port2().set(FUNC(sapphire_state::p2_w));
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m_maincpu->read_port3().set(FUNC(sapphire_state::p3_r));
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m_maincpu->write_port3().set(FUNC(sapphire_state::p3_w));
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m_maincpu->read_port4().set(FUNC(sapphire_state::p4_r));
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m_maincpu->write_port4().set(FUNC(sapphire_state::p4_w));
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m_maincpu->read_port5().set(FUNC(sapphire_state::p5_r));
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m_maincpu->write_port5().set(FUNC(sapphire_state::p5_w));
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m_maincpu->read_port6().set(FUNC(sapphire_state::p6_r));
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m_maincpu->write_port6().set(FUNC(sapphire_state::p6_w));
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m_maincpu->read_port7().set(FUNC(sapphire_state::p7_r));
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m_maincpu->write_port7().set(FUNC(sapphire_state::p7_w));
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// video hardware
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//PWM_DISPLAY(config, m_lcd_pwm).set_size(4, 10);
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//m_lcd_pwm->output_x().set(FUNC(sapphire_state::lcd_pwm_w));
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//screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_SVG));
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//screen.set_refresh_hz(60);
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//screen.set_size(1920/2.5, 606/2.5);
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//screen.set_visarea_full();
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//config.set_default_layout(layout_novag_sapphire);
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// rs232 (configure after video)
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RS232_PORT(config, m_rs232, default_rs232_devices, nullptr);
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m_rs232->rxd_handler().set(m_maincpu, FUNC(h8325_device::sci_rx_w<0>));
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// sound hardware
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SPEAKER(config, "speaker").front_center();
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DAC_1BIT(config, m_dac).add_route(ALL_OUTPUTS, "speaker", 0.25);
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}
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/*******************************************************************************
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ROM Definitions
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*******************************************************************************/
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ROM_START( sapphire )
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ROM_REGION16_BE( 0x10000, "maincpu", 0 )
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ROM_LOAD("novag_9304-010053_6433258b46f.u1", 0x0000, 0x8000, CRC(bfc39f4b) SHA1(dc96440c070e903772f4485757443dd690e92120) )
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ROM_LOAD("bk301_26601.u2", 0x8000, 0x8000, CRC(648ebe8f) SHA1(2883f962a0bf17426fd809b9f2c01ce3dec0df1b) )
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ROM_REGION( 36256, "screen", 0 )
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ROM_LOAD("nvip.svg", 0, 36256, CRC(3373e0d5) SHA1(25bfbf0405017388c30f4529106baccb4723bc6b) )
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ROM_END
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} // anonymous namespace
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/*******************************************************************************
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Drivers
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*******************************************************************************/
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// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY, FULLNAME, FLAGS
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SYST( 1994, sapphire, 0, 0, sapphire, sapphire, sapphire_state, empty_init, "Novag Industries", "Sapphire (Novag)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING )
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