From 0e14d3f7a83e0e98f420d753c1684ccb0411e385 Mon Sep 17 00:00:00 2001 From: MooglyGuy Date: Thu, 26 Dec 2019 22:39:18 +0100 Subject: [PATCH] -v60: Fixed AND and OR instructions to also not change the carry flag. [Ryan Holtz] --- src/devices/cpu/v60/v60.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/devices/cpu/v60/v60.cpp b/src/devices/cpu/v60/v60.cpp index 21f83803e72..989e509ef2e 100644 --- a/src/devices/cpu/v60/v60.cpp +++ b/src/devices/cpu/v60/v60.cpp @@ -152,13 +152,13 @@ std::unique_ptr v60_device::create_disassembler() #define SetSZPF_Word(x) {_Z = ((uint16_t)(x) == 0); _S = ((x)&0x8000) ? 1 : 0; } #define SetSZPF_Long(x) {_Z = ((uint32_t)(x) == 0); _S = ((x)&0x80000000) ? 1 : 0; } -#define ORB(dst, src) { (dst) |= (src); _CY = _OV = 0; SetSZPF_Byte(dst); } -#define ORW(dst, src) { (dst) |= (src); _CY = _OV = 0; SetSZPF_Word(dst); } -#define ORL(dst, src) { (dst) |= (src); _CY = _OV = 0; SetSZPF_Long(dst); } +#define ORB(dst, src) { (dst) |= (src); _OV = 0; SetSZPF_Byte(dst); } +#define ORW(dst, src) { (dst) |= (src); _OV = 0; SetSZPF_Word(dst); } +#define ORL(dst, src) { (dst) |= (src); _OV = 0; SetSZPF_Long(dst); } -#define ANDB(dst, src) { (dst) &= (src); _CY = _OV = 0; SetSZPF_Byte(dst); } -#define ANDW(dst, src) { (dst) &= (src); _CY = _OV = 0; SetSZPF_Word(dst); } -#define ANDL(dst, src) { (dst) &= (src); _CY = _OV = 0; SetSZPF_Long(dst); } +#define ANDB(dst, src) { (dst) &= (src); _OV = 0; SetSZPF_Byte(dst); } +#define ANDW(dst, src) { (dst) &= (src); _OV = 0; SetSZPF_Word(dst); } +#define ANDL(dst, src) { (dst) &= (src); _OV = 0; SetSZPF_Long(dst); } #define XORB(dst, src) { (dst) ^= (src); _OV = 0; SetSZPF_Byte(dst); } #define XORW(dst, src) { (dst) ^= (src); _OV = 0; SetSZPF_Word(dst); }