mirror of
https://github.com/holub/mame
synced 2025-04-20 07:22:04 +03:00
heathzenith/h89.cpp: Convert SigmaSoft parallel port into an h89 left card. (#13024)
This commit is contained in:
Mark Garlanger
GitHub
parent
54af069e4e
commit
0e62ff6dcd
@ -5765,9 +5765,23 @@ if (BUSES["H89BUS"]~=null) then
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MAME_DIR .. "src/devices/bus/heathzenith/h89/mms77316_fdc.h",
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MAME_DIR .. "src/devices/bus/heathzenith/h89/sigmasoft_sound.cpp",
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MAME_DIR .. "src/devices/bus/heathzenith/h89/sigmasoft_sound.h",
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MAME_DIR .. "src/devices/bus/heathzenith/h89/sigmasoft_parallel_port.cpp",
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MAME_DIR .. "src/devices/bus/heathzenith/h89/sigmasoft_parallel_port.h",
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MAME_DIR .. "src/devices/bus/heathzenith/h89/we_pullup.cpp",
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MAME_DIR .. "src/devices/bus/heathzenith/h89/we_pullup.h",
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MAME_DIR .. "src/devices/bus/heathzenith/h89/z37_fdc.cpp",
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MAME_DIR .. "src/devices/bus/heathzenith/h89/z37_fdc.h",
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}
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end
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---------------------------------------------------
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--
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--@src/devices/bus/heathzenith/h19/tlb.h,BUSES["HEATH_TLB_CONNECTOR"] = true
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---------------------------------------------------
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if (BUSES["HEATH_TLB_CONNECTOR"]~=null) then
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files {
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MAME_DIR .. "src/devices/bus/heathzenith/h19/tlb.cpp",
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MAME_DIR .. "src/devices/bus/heathzenith/h19/tlb.h",
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}
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end
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@ -12,12 +12,14 @@
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#include "h_88_3.h"
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#include "h_88_5.h"
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#include "mms77316_fdc.h"
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#include "sigmasoft_parallel_port.h"
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#include "sigmasoft_sound.h"
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#include "we_pullup.h"
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#include "z37_fdc.h"
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void h89_left_cards(device_slot_interface &device)
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{
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device.option_add("ss_parallel", H89BUS_SIGMASOFT_PARALLEL);
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}
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void h89_right_cards(device_slot_interface &device)
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@ -1,5 +1,5 @@
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// license:BSD-3-Clause
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// copyright-holders:R. Belmont
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// copyright-holders:R. Belmont, Mark Garlanger
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/***************************************************************************
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h89bus.cpp - Heath/Zenith H-89/Z-90 bus
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@ -175,8 +175,7 @@ const tiny_rom_entry *h89bus_device::device_rom_region() const
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void h89bus_device::device_start()
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{
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// don't claim I/O below 0x10 for now
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m_io_space->install_readwrite_handler(0x0010, 0x00ff, emu::rw_delegate(*this, FUNC(h89bus_device::io_dispatch_r)), emu::rw_delegate(*this, FUNC(h89bus_device::io_dispatch_w)));
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m_io_space->install_readwrite_handler(0x0000, 0x00ff, emu::rw_delegate(*this, FUNC(h89bus_device::io_dispatch_r)), emu::rw_delegate(*this, FUNC(h89bus_device::io_dispatch_w)));
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}
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void h89bus_device::add_h89bus_left_card(device_h89bus_left_card_interface &card)
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@ -242,37 +241,33 @@ u8 h89bus_device::io_dispatch_r(offs_t offset)
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{
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u8 retval = 0;
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offset += 0x10;
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if (m_decode_prom[offset] != 0xff)
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{
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u16 decode = m_decode_prom[offset] ^ 0xff;
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u16 decode = m_decode_prom[offset] ^ 0xff;
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if (decode)
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{
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if ((decode & H89_GPP) && ((offset & 7) == 2)) return m_in_gpp_cb(offset);
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if (decode & H89_NMI) return m_in_nmi_cb(offset);
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if (decode & H89_TERM) return m_in_tlb_cb(offset & 7);
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if (decode)
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for (device_h89bus_right_card_interface &entry : m_right_device_list)
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{
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for (device_h89bus_right_card_interface &entry : m_right_device_list)
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if (entry.m_p506_signals)
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{
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if (entry.m_p506_signals)
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{
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// p506 does not have CASS or LP
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retval |= entry.read(decode & ~(H89_CASS | H89_LP), offset & 7);
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}
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else
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{
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// p504/p505 does not have FLPY
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retval |= entry.read(decode & ~H89_FLPY , offset & 7);
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}
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// p506 does not have CASS or LP
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retval |= entry.read(decode & ~(H89_CASS | H89_LP), offset & 7);
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}
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else
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{
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// p504/p505 does not have FLPY
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retval |= entry.read(decode & ~H89_FLPY , offset & 7);
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}
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}
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}
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// service left-slot cards that have a motherboard connection to snoop the I/O space
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for (device_h89bus_left_card_interface &entry : m_left_device_list)
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{
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retval |= entry.read(H89_IO, offset);
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}
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// service left-slot cards that have a motherboard connection to snoop the I/O space
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for (device_h89bus_left_card_interface &entry : m_left_device_list)
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{
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retval |= entry.read(H89_IO, offset & 0x1fff);
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}
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return retval;
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@ -280,37 +275,33 @@ u8 h89bus_device::io_dispatch_r(offs_t offset)
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void h89bus_device::io_dispatch_w(offs_t offset, u8 data)
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{
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offset += 0x10;
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if (m_decode_prom[offset] != 0xff)
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{
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u16 decode = m_decode_prom[offset] ^ 0xff;
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u16 decode = m_decode_prom[offset] ^ 0xff;
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if (decode)
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{
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if (decode & H89_GPP) m_out_gpp_cb(offset, data);
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if (decode & H89_NMI) { m_out_nmi_cb(offset, data); return; }
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if (decode & H89_TERM) { m_out_tlb_cb(offset & 7, data); return; }
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if (decode)
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for (device_h89bus_right_card_interface &entry : m_right_device_list)
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{
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for (device_h89bus_right_card_interface &entry : m_right_device_list)
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if (entry.m_p506_signals)
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{
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if (entry.m_p506_signals)
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{
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// p506 does not have CASS or LP
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entry.write(decode & ~(H89_CASS | H89_LP), offset & 7, data);
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}
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else
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{
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// p504/p505 does not have FLPY
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entry.write(decode & ~H89_FLPY, offset & 7, data);
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}
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// p506 does not have CASS or LP
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entry.write(decode & ~(H89_CASS | H89_LP), offset & 7, data);
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}
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else
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{
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// p504/p505 does not have FLPY
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entry.write(decode & ~H89_FLPY, offset & 7, data);
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}
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}
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}
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// service left-slot cards that have a motherboard connection to snoop the I/O space
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for (device_h89bus_left_card_interface &entry : m_left_device_list)
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{
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entry.write(H89_IO, offset, data);
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}
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// service left-slot cards that have a motherboard connection to snoop the I/O space
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for (device_h89bus_left_card_interface &entry : m_left_device_list)
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{
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entry.write(H89_IO, offset, data);
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}
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}
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245
src/devices/bus/heathzenith/h89/sigmasoft_parallel_port.cpp
Normal file
245
src/devices/bus/heathzenith/h89/sigmasoft_parallel_port.cpp
Normal file
@ -0,0 +1,245 @@
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// license:BSD-3-Clause
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// copyright-holders:Mark Garlanger
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/***************************************************************************
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SigmaSoft Universal Parallel Interface Board
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****************************************************************************/
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#include "emu.h"
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#include "bus/heathzenith/h19/tlb.h"
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#include "sigmasoft_parallel_port.h"
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//
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// Logging defines
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//
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#define LOG_REG (1U << 1) // Shows register setup
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#define LOG_FUNC (1U << 2) // Function calls
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#define VERBOSE (0)
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#include "logmacro.h"
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#define LOGREG(...) LOGMASKED(LOG_REG, __VA_ARGS__)
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#define LOGFUNC(...) LOGMASKED(LOG_FUNC, __VA_ARGS__)
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#ifdef _MSC_VER
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#define FUNCNAME __func__
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#else
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#define FUNCNAME __PRETTY_FUNCTION__
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#endif
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// TODO make this configurable with jumper config
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static constexpr u8 BASE_ADDR = 0x08;
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class sigmasoft_parallel_port : public device_t, public device_h89bus_left_card_interface
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{
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public:
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sigmasoft_parallel_port(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
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virtual u8 read(u8 select_lines, u16 offset) override;
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virtual void write(u8 select_lines, u16 offset, u8 data) override;
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auto ctrl_r_cb() { return m_ctrl_r.bind(); }
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auto video_mem_r_cb() { return m_video_mem_r.bind(); }
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auto video_mem_cb() { return m_video_mem_w.bind(); }
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auto io_lo_cb() { return m_io_lo_addr.bind(); }
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auto io_hi_cb() { return m_io_hi_addr.bind(); }
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auto window_lo_cb() { return m_window_lo_addr.bind(); }
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auto window_hi_cb() { return m_window_hi_addr.bind(); }
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auto ctrl_cb() { return m_ctrl_w.bind(); }
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protected:
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virtual void device_start() override ATTR_COLD;
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virtual void device_add_mconfig(machine_config& config) override ATTR_COLD;;
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u8 video_mem_r();
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void video_mem_w(u8 val);
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void io_lo_addr_w(u8 val);
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void io_hi_addr_w(u8 val);
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void window_lo_addr_w(u8 val);
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void window_hi_addr_w(u8 val);
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void ctrl_w(u8 val);
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u8 ctrl_r();
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private:
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// Reads
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devcb_read8 m_ctrl_r;
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devcb_read8 m_video_mem_r;
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// Writes
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devcb_write8 m_video_mem_w;
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devcb_write8 m_io_lo_addr;
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devcb_write8 m_io_hi_addr;
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devcb_write8 m_window_lo_addr;
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devcb_write8 m_window_hi_addr;
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devcb_write8 m_ctrl_w;
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};
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sigmasoft_parallel_port::sigmasoft_parallel_port(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock):
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device_t(mconfig, H89BUS_SIGMASOFT_PARALLEL, tag, owner, clock),
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device_h89bus_left_card_interface(mconfig, *this),
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m_ctrl_r(*this, 0x00),
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m_video_mem_r(*this, 0x00),
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m_video_mem_w(*this),
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m_io_lo_addr(*this),
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m_io_hi_addr(*this),
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m_window_lo_addr(*this),
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m_window_hi_addr(*this),
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m_ctrl_w(*this)
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{
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}
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void sigmasoft_parallel_port::video_mem_w(u8 val)
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{
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m_video_mem_w(val);
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}
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void sigmasoft_parallel_port::io_lo_addr_w(u8 val)
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{
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m_io_lo_addr(val);
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}
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void sigmasoft_parallel_port::io_hi_addr_w(u8 val)
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{
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m_io_hi_addr(val);
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}
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void sigmasoft_parallel_port::window_lo_addr_w(u8 val)
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{
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m_window_lo_addr(val);
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}
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void sigmasoft_parallel_port::window_hi_addr_w(u8 val)
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{
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m_window_hi_addr(val);
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}
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void sigmasoft_parallel_port::ctrl_w(u8 val)
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{
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m_ctrl_w(val);
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}
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void sigmasoft_parallel_port::write(u8 select_lines, u16 offset, u8 data)
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{
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offset -= BASE_ADDR;
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if (!(select_lines & h89bus_device::H89_IO) || offset >= 8)
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{
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return;
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}
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LOGFUNC("%s: reg: %d val: %d\n", FUNCNAME, offset, data);
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switch (offset)
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{
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case 0:
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video_mem_w(data);
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break;
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case 1:
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io_lo_addr_w(data);
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break;
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case 2:
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io_hi_addr_w(data);
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break;
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case 3:
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window_lo_addr_w(data);
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break;
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case 4:
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window_hi_addr_w(data);
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break;
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case 5:
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ctrl_w(data);
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break;
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case 6:
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// TODO - Centronics interface
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break;
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case 7:
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// TODO - Centronics interface
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break;
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}
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}
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u8 sigmasoft_parallel_port::video_mem_r()
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{
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// get video memory value from igc device
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return m_video_mem_r();
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}
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u8 sigmasoft_parallel_port::ctrl_r()
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{
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// get control register from igc device
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return m_ctrl_r();
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}
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u8 sigmasoft_parallel_port::read(u8 select_lines, u16 offset)
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{
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offset -= BASE_ADDR;
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u8 value = 0x00;
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if (!(select_lines & h89bus_device::H89_IO) || offset >= 8)
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{
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return value;
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}
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switch (offset)
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{
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case 0:
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value = video_mem_r();
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break;
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case 1:
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// TODO - Light Pen Low address
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break;
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case 2:
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// TODO - Light Pen High address
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break;
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case 3:
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// TODO - Left input device
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break;
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case 4:
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// TODO - Right input device
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break;
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case 5:
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// Control Register
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value = ctrl_r();
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break;
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case 6:
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// TODO - Centronics interface
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break;
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case 7:
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// TODO - Centronics interface
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break;
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}
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LOGFUNC("%s: reg: %d val: %d\n", FUNCNAME, offset, value);
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return value;
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}
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void sigmasoft_parallel_port::device_start()
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{
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}
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void sigmasoft_parallel_port::device_add_mconfig(machine_config &config)
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{
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// connect callbacks to TLB
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ctrl_r_cb().set("^^tlbc", FUNC(heath_tlb_connector::sigma_ctrl_r));
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video_mem_r_cb().set("^^tlbc", FUNC(heath_tlb_connector::sigma_video_mem_r));
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video_mem_cb().set("^^tlbc", FUNC(heath_tlb_connector::sigma_video_mem_w));
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io_lo_cb().set("^^tlbc", FUNC(heath_tlb_connector::sigma_io_lo_addr_w));
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io_hi_cb().set("^^tlbc", FUNC(heath_tlb_connector::sigma_io_hi_addr_w));
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window_lo_cb().set("^^tlbc", FUNC(heath_tlb_connector::sigma_window_lo_addr_w));
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window_hi_cb().set("^^tlbc", FUNC(heath_tlb_connector::sigma_window_hi_addr_w));
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ctrl_cb().set("^^tlbc", FUNC(heath_tlb_connector::sigma_ctrl_w));
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}
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DEFINE_DEVICE_TYPE_PRIVATE(H89BUS_SIGMASOFT_PARALLEL, device_h89bus_left_card_interface, sigmasoft_parallel_port, "sigmasoft_parallel_port", "SigmaSoft Universal Parallel Board");
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18
src/devices/bus/heathzenith/h89/sigmasoft_parallel_port.h
Normal file
18
src/devices/bus/heathzenith/h89/sigmasoft_parallel_port.h
Normal file
@ -0,0 +1,18 @@
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// license:BSD-3-Clause
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// copyright-holders:Mark Garlanger
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/***************************************************************************
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SigmaSoft Universal Parallel Interface Board
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****************************************************************************/
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#ifndef MAME_BUS_HEATHZENITH_H89_SIGMASOFT_PARALLEL_PORT_H
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#define MAME_BUS_HEATHZENITH_H89_SIGMASOFT_PARALLEL_PORT_H
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#pragma once
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#include "h89bus.h"
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DECLARE_DEVICE_TYPE(H89BUS_SIGMASOFT_PARALLEL, device_h89bus_left_card_interface)
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#endif // MAME_BUS_HEATHZENITH_H89_SIGMASOFT_PARALLEL_PORT_H
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@ -12,7 +12,7 @@
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#include "emu.h"
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#include "tlb.h"
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#include "bus/heathzenith/h19/tlb.h"
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#include "bus/rs232/rs232.h"
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#include "h19.lh"
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@ -44,9 +44,8 @@
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#include "emu.h"
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#include "intr_cntrl.h"
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#include "sigmasoft_parallel_port.h"
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#include "tlb.h"
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||||
|
||||
#include "bus/heathzenith/h19/tlb.h"
|
||||
#include "bus/heathzenith/h89/h89bus.h"
|
||||
#include "bus/heathzenith/h89/cards.h"
|
||||
#include "cpu/z80/z80.h"
|
||||
@ -198,17 +197,11 @@ class h89_sigmasoft_state : public h89_state
|
||||
{
|
||||
public:
|
||||
h89_sigmasoft_state(const machine_config &mconfig, device_type type, const char *tag):
|
||||
h89_state(mconfig, type, tag),
|
||||
m_sigma_parallel(*this, "sigma_parallel")
|
||||
h89_state(mconfig, type, tag)
|
||||
{
|
||||
}
|
||||
|
||||
void h89_sigmasoft(machine_config &config);
|
||||
|
||||
protected:
|
||||
required_device<sigmasoft_parallel_port> m_sigma_parallel;
|
||||
|
||||
void h89_sigmasoft_io(address_map &map);
|
||||
};
|
||||
|
||||
|
||||
@ -377,44 +370,6 @@ void h89_base_state::h89_base_io(address_map &map)
|
||||
map.global_mask(0xff);
|
||||
}
|
||||
|
||||
void h89_sigmasoft_state::h89_sigmasoft_io(address_map &map)
|
||||
{
|
||||
h89_base_io(map);
|
||||
|
||||
// Add SigmaSoft parallel port board, required for IGC graphics
|
||||
map(0x08,0x0f).rw(m_sigma_parallel, FUNC(sigmasoft_parallel_port::read), FUNC(sigmasoft_parallel_port::write));
|
||||
}
|
||||
|
||||
/*
|
||||
Memory Map for MMS 444-61C PROM
|
||||
|
||||
PORT
|
||||
Use | Hex |
|
||||
----------------------------+-------+
|
||||
Not specified, available | 0-37 |
|
||||
MMS 77316 | 38-3F |
|
||||
MMS Internal test fixtures | 40-47 |
|
||||
MMS 77317 ACT/XCOMP I/O | 48-4F |
|
||||
MMS 77315 CAMEO I/O | 50-56 |
|
||||
Unused | 57 |
|
||||
MMS 77314 Corvus I/O | 58-59 |
|
||||
MMS 77314 REMEX I/O | 5A-5B |
|
||||
MMS 77314,15,17 Conf Port | 5C |
|
||||
Unused | 5D-77 |
|
||||
Disk I/O #1 | 78-7B |
|
||||
Disk I/O #2 | 7C-7F |
|
||||
HDOS reserved | 80-CF |
|
||||
DCE Serial I/O | D0-D7 |
|
||||
DTE Serial I/O | D8-DF |
|
||||
DCE Serial I/O | EO-E7 |
|
||||
Console I/O | E8-EF |
|
||||
NMI | F0-F1 |
|
||||
General purpose port | F2 |
|
||||
Unused | F8-F9 |
|
||||
NMI | FA-FB |
|
||||
Unused | FC-FF |
|
||||
*/
|
||||
|
||||
// Input ports
|
||||
static INPUT_PORTS_START( h88 )
|
||||
|
||||
@ -1032,19 +987,10 @@ void h89_sigmasoft_state::h89_sigmasoft(machine_config &config)
|
||||
{
|
||||
h89(config);
|
||||
m_h89bus->set_default_bios_tag("444-61");
|
||||
m_maincpu->set_addrmap(AS_IO, &h89_sigmasoft_state::h89_sigmasoft_io);
|
||||
|
||||
sigma_tlb_options(m_tlbc);
|
||||
|
||||
SIGMASOFT_PARALLEL_PORT(config, m_sigma_parallel);
|
||||
m_sigma_parallel->ctrl_r_cb().set(m_tlbc, FUNC(heath_tlb_connector::sigma_ctrl_r));
|
||||
m_sigma_parallel->video_mem_r_cb().set(m_tlbc, FUNC(heath_tlb_connector::sigma_video_mem_r));
|
||||
m_sigma_parallel->video_mem_cb().set(m_tlbc, FUNC(heath_tlb_connector::sigma_video_mem_w));
|
||||
m_sigma_parallel->io_lo_cb().set(m_tlbc, FUNC(heath_tlb_connector::sigma_io_lo_addr_w));
|
||||
m_sigma_parallel->io_hi_cb().set(m_tlbc, FUNC(heath_tlb_connector::sigma_io_hi_addr_w));
|
||||
m_sigma_parallel->window_lo_cb().set(m_tlbc, FUNC(heath_tlb_connector::sigma_window_lo_addr_w));
|
||||
m_sigma_parallel->window_hi_cb().set(m_tlbc, FUNC(heath_tlb_connector::sigma_window_hi_addr_w));
|
||||
m_sigma_parallel->ctrl_cb().set(m_tlbc, FUNC(heath_tlb_connector::sigma_ctrl_w));
|
||||
H89BUS_LEFT_SLOT(config.replace(), "p501", "h89bus", h89_left_cards, "ss_parallel");
|
||||
}
|
||||
|
||||
void h89_mms_state::h89_mms(machine_config &config)
|
||||
|
||||
@ -1,165 +0,0 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Mark Garlanger
|
||||
/***************************************************************************
|
||||
|
||||
SigmaSoft Universal Parallel Interface Board
|
||||
|
||||
|
||||
****************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
|
||||
#include "sigmasoft_parallel_port.h"
|
||||
|
||||
//
|
||||
// Logging defines
|
||||
//
|
||||
#define LOG_REG (1U << 1) // Shows register setup
|
||||
#define LOG_FUNC (1U << 2) // Function calls
|
||||
|
||||
#define VERBOSE (0)
|
||||
|
||||
#include "logmacro.h"
|
||||
|
||||
#define LOGREG(...) LOGMASKED(LOG_REG, __VA_ARGS__)
|
||||
#define LOGFUNC(...) LOGMASKED(LOG_FUNC, __VA_ARGS__)
|
||||
|
||||
#ifdef _MSC_VER
|
||||
#define FUNCNAME __func__
|
||||
#else
|
||||
#define FUNCNAME __PRETTY_FUNCTION__
|
||||
#endif
|
||||
|
||||
|
||||
DEFINE_DEVICE_TYPE(SIGMASOFT_PARALLEL_PORT, sigmasoft_parallel_port, "sigmasoft_parallel_port", "SigmaSoft Universal Parallel Board");
|
||||
|
||||
sigmasoft_parallel_port::sigmasoft_parallel_port(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock):
|
||||
device_t(mconfig, SIGMASOFT_PARALLEL_PORT, tag, owner, clock),
|
||||
m_ctrl_r(*this, 0x00),
|
||||
m_video_mem_r(*this, 0x00),
|
||||
m_video_mem_w(*this),
|
||||
m_io_lo_addr(*this),
|
||||
m_io_hi_addr(*this),
|
||||
m_window_lo_addr(*this),
|
||||
m_window_hi_addr(*this),
|
||||
m_ctrl_w(*this)
|
||||
{
|
||||
}
|
||||
|
||||
void sigmasoft_parallel_port::video_mem_w(u8 val)
|
||||
{
|
||||
m_video_mem_w(val);
|
||||
}
|
||||
|
||||
void sigmasoft_parallel_port::io_lo_addr_w(u8 val)
|
||||
{
|
||||
m_io_lo_addr(val);
|
||||
}
|
||||
|
||||
void sigmasoft_parallel_port::io_hi_addr_w(u8 val)
|
||||
{
|
||||
m_io_hi_addr(val);
|
||||
}
|
||||
|
||||
void sigmasoft_parallel_port::window_lo_addr_w(u8 val)
|
||||
{
|
||||
m_window_lo_addr(val);
|
||||
}
|
||||
|
||||
void sigmasoft_parallel_port::window_hi_addr_w(u8 val)
|
||||
{
|
||||
m_window_hi_addr(val);
|
||||
}
|
||||
|
||||
void sigmasoft_parallel_port::ctrl_w(u8 val)
|
||||
{
|
||||
m_ctrl_w(val);
|
||||
}
|
||||
|
||||
void sigmasoft_parallel_port::write(offs_t reg, u8 val)
|
||||
{
|
||||
LOGFUNC("%s: reg: %d val: %d\n", FUNCNAME, reg, val);
|
||||
|
||||
switch (reg)
|
||||
{
|
||||
case 0:
|
||||
video_mem_w(val);
|
||||
break;
|
||||
case 1:
|
||||
io_lo_addr_w(val);
|
||||
break;
|
||||
case 2:
|
||||
io_hi_addr_w(val);
|
||||
break;
|
||||
case 3:
|
||||
window_lo_addr_w(val);
|
||||
break;
|
||||
case 4:
|
||||
window_hi_addr_w(val);
|
||||
break;
|
||||
case 5:
|
||||
ctrl_w(val);
|
||||
break;
|
||||
case 6:
|
||||
// TODO - Centronics interface
|
||||
break;
|
||||
case 7:
|
||||
// TODO - Centronics interface
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
u8 sigmasoft_parallel_port::video_mem_r()
|
||||
{
|
||||
// get video memory value from igc device
|
||||
return m_video_mem_r();
|
||||
}
|
||||
|
||||
u8 sigmasoft_parallel_port::ctrl_r()
|
||||
{
|
||||
// get control register from igc device
|
||||
return m_ctrl_r();
|
||||
}
|
||||
|
||||
u8 sigmasoft_parallel_port::read(offs_t reg)
|
||||
{
|
||||
// default return for the h89
|
||||
u8 value = 0xff;
|
||||
|
||||
switch (reg)
|
||||
{
|
||||
case 0:
|
||||
value = video_mem_r();
|
||||
break;
|
||||
case 1:
|
||||
// TODO - Light Pen Low address
|
||||
break;
|
||||
case 2:
|
||||
// TODO - Light Pen High address
|
||||
break;
|
||||
case 3:
|
||||
// TODO - Left input device
|
||||
break;
|
||||
case 4:
|
||||
// TODO - Right input device
|
||||
break;
|
||||
case 5:
|
||||
// Control Register
|
||||
value = ctrl_r();
|
||||
break;
|
||||
case 6:
|
||||
// TODO - Centronics interface
|
||||
break;
|
||||
case 7:
|
||||
// TODO - Centronics interface
|
||||
break;
|
||||
}
|
||||
|
||||
LOGFUNC("%s: reg: %d val: %d\n", FUNCNAME, reg, value);
|
||||
|
||||
return value;
|
||||
}
|
||||
|
||||
void sigmasoft_parallel_port::device_start()
|
||||
{
|
||||
}
|
||||
@ -1,67 +0,0 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Mark Garlanger
|
||||
/***************************************************************************
|
||||
|
||||
SigmaSoft Universal Parallel Interface Board
|
||||
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef MAME_HEATHZENITH_SIGMASOFT_PARALLEL_PORT_H
|
||||
#define MAME_HEATHZENITH_SIGMASOFT_PARALLEL_PORT_H
|
||||
|
||||
#pragma once
|
||||
|
||||
|
||||
class sigmasoft_parallel_port : public device_t
|
||||
{
|
||||
public:
|
||||
sigmasoft_parallel_port(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
|
||||
|
||||
void write(offs_t reg, u8 val);
|
||||
u8 read(offs_t reg);
|
||||
|
||||
auto ctrl_r_cb() { return m_ctrl_r.bind(); }
|
||||
auto video_mem_r_cb() { return m_video_mem_r.bind(); }
|
||||
|
||||
auto video_mem_cb() { return m_video_mem_w.bind(); }
|
||||
auto io_lo_cb() { return m_io_lo_addr.bind(); }
|
||||
auto io_hi_cb() { return m_io_hi_addr.bind(); }
|
||||
auto window_lo_cb() { return m_window_lo_addr.bind(); }
|
||||
auto window_hi_cb() { return m_window_hi_addr.bind(); }
|
||||
auto ctrl_cb() { return m_ctrl_w.bind(); }
|
||||
|
||||
protected:
|
||||
|
||||
virtual void device_start() override ATTR_COLD;
|
||||
|
||||
u8 video_mem_r();
|
||||
void video_mem_w(u8 val);
|
||||
|
||||
void io_lo_addr_w(u8 val);
|
||||
void io_hi_addr_w(u8 val);
|
||||
|
||||
void window_lo_addr_w(u8 val);
|
||||
void window_hi_addr_w(u8 val);
|
||||
|
||||
void ctrl_w(u8 val);
|
||||
u8 ctrl_r();
|
||||
|
||||
private:
|
||||
|
||||
// Reads
|
||||
devcb_read8 m_ctrl_r;
|
||||
devcb_read8 m_video_mem_r;
|
||||
|
||||
// Writes
|
||||
devcb_write8 m_video_mem_w;
|
||||
devcb_write8 m_io_lo_addr;
|
||||
devcb_write8 m_io_hi_addr;
|
||||
devcb_write8 m_window_lo_addr;
|
||||
devcb_write8 m_window_hi_addr;
|
||||
devcb_write8 m_ctrl_w;
|
||||
};
|
||||
|
||||
DECLARE_DEVICE_TYPE(SIGMASOFT_PARALLEL_PORT, sigmasoft_parallel_port)
|
||||
|
||||
|
||||
#endif // MAME_HEATHZENITH_SIGMASOFT_PARALLEL_PORT_H
|
||||
Loading…
Reference in New Issue
Block a user