applix: Derive clocks from main XTAL (nw)

This commit is contained in:
AJR 2017-12-07 19:29:08 -05:00
parent 6fbfd4f88a
commit 0e6b5e1919

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@ -835,7 +835,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(applix_state::cass_timer)
static MACHINE_CONFIG_START( applix )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", M68000, 7500000)
MCFG_CPU_ADD("maincpu", M68000, XTAL_30MHz / 4) // MC68000-P10 @ 7.5 MHz
MCFG_CPU_PROGRAM_MAP(applix_mem)
MCFG_CPU_ADD("subcpu", Z80, XTAL_16MHz / 2) // Z80H
MCFG_CPU_PROGRAM_MAP(subcpu_mem)
@ -866,13 +866,13 @@ static MACHINE_CONFIG_START( applix )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.50)
/* Devices */
MCFG_MC6845_ADD("crtc", MC6845, "screen", 1875000) // 6545
MCFG_MC6845_ADD("crtc", MC6845, "screen", XTAL_30MHz / 16) // MC6545 @ 1.875 MHz
MCFG_MC6845_SHOW_BORDER_AREA(false)
MCFG_MC6845_CHAR_WIDTH(8)
MCFG_MC6845_UPDATE_ROW_CB(applix_state, crtc_update_row)
MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(applix_state, vsync_w))
MCFG_DEVICE_ADD("via6522", VIA6522, 0)
MCFG_DEVICE_ADD("via6522", VIA6522, XTAL_30MHz / 4 / 10) // VIA uses 68000 E clock
MCFG_VIA6522_READPB_HANDLER(READ8(applix_state, applix_pb_r))
// in CB1 kbd clk
// in CA2 vsync