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i8085.c:

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* 8085 has an internal clock divider by 2. Changed i8085.c to reflect this for I8085. I8080 still at 1.
Games using I8085:
* Changed clock to reflect internal clock divider now in i8085.c
* Added some FIXME: comments where clocks for I8085 are outside specs
This commit is contained in:
Couriersud 2008-01-17 21:20:53 +00:00
parent 64b89c192c
commit 0e8b1735bc
10 changed files with 13 additions and 74 deletions
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3
src/emu/cpu/i8085/i8085.c
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@ -1631,7 +1631,7 @@ void i8085_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break;
case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break;
case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 3; break;
case CPUINFO_INT_MIN_CYCLES: info->i = 4; break;
@ -1739,6 +1739,7 @@ void i8080_get_info(UINT32 state, cpuinfo *info)
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
case CPUINFO_INT_INPUT_STATE + I8085_INTR_LINE: info->i = (I.IREQ & IM_INTR) ? ASSERT_LINE : CLEAR_LINE; break;
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = (I.IREQ & IM_TRAP) ? ASSERT_LINE : CLEAR_LINE; break;

3
src/mame/drivers/dwarfd.c
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@ -683,7 +683,8 @@ static const struct AY8910interface ay8910_interface =
static MACHINE_DRIVER_START( dwarfd )
/* basic machine hardware */
MDRV_CPU_ADD(8085A, 10595000/3) /* ? MHz */
/* FIXME: The 8085A had a max clock of 6MHz, internally divided by 2! */
MDRV_CPU_ADD(8085A, 10595000/3*2) /* ? MHz */
MDRV_CPU_PROGRAM_MAP(mem_map, 0)
MDRV_CPU_IO_MAP(io_map, 0)

2
src/mame/drivers/equites.c
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@ -142,7 +142,7 @@ SNK/Eastern 1985 (ACT) Gekisoh ????
// Common Hardware Start
#define EQUITES_ADD_SOUNDBOARD7 \
MDRV_CPU_ADD(8085A, XTAL_6_144MHz/2) /* verified on pcb */ \
MDRV_CPU_ADD(8085A, XTAL_6_144MHz) /* verified on pcb */ \
/* audio CPU */ \
MDRV_CPU_PROGRAM_MAP(equites_s_readmem, equites_s_writemem) \
MDRV_CPU_IO_MAP(0, equites_s_writeport) \

2
src/mame/drivers/paranoia.c
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@ -138,7 +138,7 @@ static MACHINE_DRIVER_START( paranoia )
MDRV_SCREEN_VBLANK_TIME(DEFAULT_REAL_60HZ_VBLANK_DURATION)
MDRV_INTERLEAVE(1)
MDRV_CPU_ADD(8085A, 18000000/6)
MDRV_CPU_ADD(8085A, 18000000/3)
MDRV_CPU_PROGRAM_MAP(paranoia_8085_map,0)
MDRV_CPU_IO_MAP(paranoia_8085_io_map,0)

2
src/mame/drivers/redalert.c
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@ -365,7 +365,7 @@ static MACHINE_DRIVER_START( redalert )
/* IRQ is hooked to a 555 timer, whose freq is 1150 Hz */
MDRV_CPU_PERIODIC_INT(irq0_line_hold,1150)
MDRV_CPU_ADD(8085A, 1000000)
MDRV_CPU_ADD(8085A, 2000000)
/* audio CPU */ /* 1 MHz? */
MDRV_CPU_PROGRAM_MAP(redalert_voice_readmem,redalert_voice_writemem)

2
src/mame/drivers/rotaryf.c
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@ -148,7 +148,7 @@ INPUT_PORTS_END
static MACHINE_DRIVER_START( rotaryf )
/* basic machine hardware */
MDRV_CPU_ADD_TAG("main",8085A,2000000) /* 8080? */ /* 2 MHz? */
MDRV_CPU_ADD_TAG("main",8085A,4000000) /* 8080? */ /* 2 MHz? */
MDRV_CPU_PROGRAM_MAP(rotaryf_map,0)
MDRV_CPU_IO_MAP(rotaryf_io_map,0)
MDRV_CPU_VBLANK_INT(rotaryf_interrupt,5)

2
src/mame/drivers/sbugger.c
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@ -226,7 +226,7 @@ INPUT_PORTS_END
/* machine driver */
static MACHINE_DRIVER_START( sbugger )
MDRV_CPU_ADD(8085A, 6000000/2) /* 3.00 MHz??? */
MDRV_CPU_ADD(8085A, 6000000) /* 3.00 MHz??? */
MDRV_CPU_PROGRAM_MAP(readmem,writemem)
MDRV_CPU_IO_MAP(readport,0)
MDRV_CPU_VBLANK_INT(irq3_line_hold,NUM_INTS_FRAME)

3
src/mame/drivers/spcforce.c
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@ -251,7 +251,8 @@ static PALETTE_INIT( spcforce )
static MACHINE_DRIVER_START( spcforce )
/* basic machine hardware */
MDRV_CPU_ADD(8085A, 4000000) /* 4.00 MHz??? */
/* FIXME: The 8085A had a max clock of 6MHz, internally divided by 2! */
MDRV_CPU_ADD(8085A, 8000000 * 2) /* 4.00 MHz??? */
MDRV_CPU_PROGRAM_MAP(readmem,writemem)
MDRV_CPU_VBLANK_INT(irq3_line_hold,1)

3
src/mame/drivers/statriv2.c
View File

@ -606,7 +606,8 @@ static INTERRUPT_GEN( statriv2_interrupt )
static MACHINE_DRIVER_START( statriv2 )
/* basic machine hardware */
MDRV_CPU_ADD_TAG("main",8085A,12400000) /* 12.4MHz / 4? */
/* FIXME: The 8085A had a max clock of 6MHz, internally divided by 2! */
MDRV_CPU_ADD_TAG("main",8085A,12400000*2) /* 12.4MHz / 4? */
MDRV_CPU_PROGRAM_MAP(statriv2_readmem,statriv2_writemem)
MDRV_CPU_IO_MAP(statriv2_readport,statriv2_writeport)
MDRV_CPU_VBLANK_INT(statriv2_interrupt,1)

65
src/mame/machine/equites.c
View File

@ -19,71 +19,6 @@ drivers by Acho A. Tang
#define MCU_RTNMSB 0x80
#if 0 // ** cut-and-pasted to driver module **
// Common Hardware Start
#define EQUITES_ADD_SOUNDBOARD7 \
MDRV_CPU_ADD(8085A, 5000000) \
/* audio CPU */ \
MDRV_CPU_PROGRAM_MAP(equites_s_readmem, equites_s_writemem) \
MDRV_CPU_IO_MAP(0, equites_s_writeport) \
MDRV_CPU_PERIODIC_INT(nmi_line_pulse, 4000) \
\
MDRV_SOUND_ADD(MSM5232, 2500000) \
MDRV_SOUND_CONFIG(equites_5232intf) \
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75) \
\
MDRV_SOUND_ADD(AY8910, 6144444/4) \
MDRV_SOUND_CONFIG(equites_8910intf) \
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50) \
\
MDRV_SOUND_ADD(DAC, 0) \
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75) \
\
MDRV_SOUND_ADD(DAC, 0) \
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75) \
extern void equites_8404init(void);
extern void equites_8404rule(unsigned pc, int offset, int data);
extern READ16_HANDLER(equites_8404_r);
extern WRITE8_HANDLER(equites_5232_w);
extern WRITE8_HANDLER(equites_8910control_w);
extern WRITE8_HANDLER(equites_8910data_w);
extern WRITE8_HANDLER(equites_dac0_w);
extern WRITE8_HANDLER(equites_dac1_w);
extern UINT16 *equites_8404ram;
extern struct const MSM5232interface equites_5232intf;
extern struct const AY8910interface equites_8910intf;
static ADDRESS_MAP_START( equites_s_readmem, ADDRESS_SPACE_PROGRAM, 8 )
{ 0x0000, 0xbfff, MRA8_ROM }, // sound program
{ 0xc000, 0xc000, soundlatch_r },
{ 0xe000, 0xe0ff, MRA8_RAM }, // stack and variables
ADDRESS_MAP_END
static ADDRESS_MAP_START( equites_s_writemem, ADDRESS_SPACE_PROGRAM, 8 )
{ 0x0000, 0xbfff, MWA8_ROM }, // sound program
{ 0xc080, 0xc08d, equites_5232_w },
{ 0xc0a0, 0xc0a0, equites_8910data_w },
{ 0xc0a1, 0xc0a1, equites_8910control_w },
{ 0xc0b0, 0xc0b0, MWA8_NOP }, // INTR: sync with main melody
{ 0xc0c0, 0xc0c0, MWA8_NOP }, // INTR: sync with specific beats
{ 0xc0d0, 0xc0d0, equites_dac0_w },
{ 0xc0e0, 0xc0e0, equites_dac1_w },
{ 0xc0f8, 0xc0fe, MWA8_NOP }, // soundboard I/O, ignored
{ 0xc0ff, 0xc0ff, soundlatch_clear_w },
{ 0xe000, 0xe0ff, MWA8_RAM }, // stack and variables
ADDRESS_MAP_END
static ADDRESS_MAP_START( equites_s_writeport, ADDRESS_SPACE_IO, 8 )
{ 0x00e0, 0x00e5, MWA8_NOP }, // soundboard I/O, ignored
ADDRESS_MAP_END
// Common Hardware End
#endif
/******************************************************************************/
// Imports