Converted hd44352_device to devcb2 (nw)

This commit is contained in:
Ivan Vangelista 2014-03-20 17:21:02 +00:00
parent 2393d5ddca
commit 0eee24baa1
3 changed files with 14 additions and 45 deletions

View File

@ -35,30 +35,11 @@ const device_type HD44352 = &device_creator<hd44352_device>;
//-------------------------------------------------
hd44352_device::hd44352_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock):
device_t(mconfig, HD44352, "hd44352", tag, owner, clock, "hd44352", __FILE__)
device_t(mconfig, HD44352, "hd44352", tag, owner, clock, "hd44352", __FILE__),
m_on_cb(*this)
{
}
//-------------------------------------------------
// device_config_complete - perform any
// operations now that the configuration is
// complete
//-------------------------------------------------
void hd44352_device::device_config_complete()
{
// inherit a copy of the static data
const hd44352_interface *intf = reinterpret_cast<const hd44352_interface *>(static_config());
if (intf != NULL)
*static_cast<hd44352_interface *>(this) = *intf;
// or initialize to defaults if none provided
else
{
memset(&m_on, 0, sizeof(m_on));
}
}
//-------------------------------------------------
// device_validity_check - perform validity checks
// on this device
@ -73,7 +54,7 @@ void hd44352_device::device_validity_check(validity_checker &valid) const
void hd44352_device::device_start()
{
m_on.resolve(m_on_cb, *this);
m_on_cb.resolve_safe();
m_on_timer = timer_alloc(ON_TIMER);
m_on_timer->adjust(attotime::from_hz(m_clock/16384), 0, attotime::from_hz(m_clock/16384));
@ -140,8 +121,8 @@ void hd44352_device::device_timer(emu_timer &timer, device_timer_id id, int para
case ON_TIMER:
if (m_control_lines & 0x40)
{
m_on(ASSERT_LINE);
m_on(CLEAR_LINE);
m_on_cb(ASSERT_LINE);
m_on_cb(CLEAR_LINE);
}
break;
}

View File

@ -12,32 +12,25 @@
#define __hd44352_H__
#define MCFG_HD44352_ADD( _tag, _clock, _config) \
MCFG_DEVICE_ADD( _tag, HD44352, _clock ) \
MCFG_DEVICE_CONFIG( _config )
#define MCFG_HD44352_ON_CB(_devcb) \
devcb = &hd44352_device::set_on_callback(*device, DEVCB2_##_devcb);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
// ======================> hd44352_interface
struct hd44352_interface
{
devcb_write_line m_on_cb; // ON line
};
// ======================> hd44352_device
class hd44352_device :
public device_t,
public hd44352_interface
public device_t
{
public:
// construction/destruction
hd44352_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
template<class _Object> static devcb2_base &set_on_callback(device_t &device, _Object object) { return downcast<hd44352_device &>(device).m_on_cb.set_callback(object); }
// device interface
UINT8 data_read();
void data_write(UINT8 data);
@ -50,7 +43,6 @@ protected:
virtual void device_start();
virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
virtual void device_config_complete();
virtual void device_validity_check(validity_checker &valid) const;
private:
@ -80,7 +72,7 @@ private:
UINT8 m_cursor_y;
UINT8 m_cursor_lcd;
devcb_resolved_write_line m_on; // ON line callback
devcb2_write_line m_on_cb; // ON line callback
};
// device type definition

View File

@ -500,11 +500,6 @@ void pb1000_state::machine_start()
m_kb_timer->adjust(attotime::from_hz(192), 0, attotime::from_hz(192));
}
static const hd44352_interface hd44352_pb1000_conf =
{
DEVCB_CPU_INPUT_LINE("maincpu", HD61700_ON_INT)
};
static MACHINE_CONFIG_START( pb1000, pb1000_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", HD61700, 910000)
@ -525,7 +520,8 @@ static MACHINE_CONFIG_START( pb1000, pb1000_state )
MCFG_PALETTE_INIT_OWNER(pb1000_state, pb1000)
MCFG_GFXDECODE_ADD("gfxdecode", "palette", pb1000 )
MCFG_HD44352_ADD("hd44352", 910000, hd44352_pb1000_conf)
MCFG_DEVICE_ADD("hd44352", HD44352, 910000)
MCFG_HD44352_ON_CB(INPUTLINE("maincpu", HD61700_ON_INT))
MCFG_NVRAM_ADD_0FILL("nvram1")
MCFG_NVRAM_ADD_0FILL("nvram2")