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Removed old CDP1802 CPU. (no whatsnew)
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Curt Coder
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353f612831
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@ -56,9 +56,6 @@ src/emu/cpu/avr8/avr8dasm.c svneol=native#text/plain
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src/emu/cpu/ccpu/ccpu.c svneol=native#text/plain
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src/emu/cpu/ccpu/ccpu.h svneol=native#text/plain
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src/emu/cpu/ccpu/ccpudasm.c svneol=native#text/plain
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src/emu/cpu/cdp1802/1802dasm.c svneol=native#text/plain
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src/emu/cpu/cdp1802/cdp1802.c svneol=native#text/plain
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src/emu/cpu/cdp1802/cdp1802.h svneol=native#text/plain
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src/emu/cpu/cop400/cop400.c svneol=native#text/plain
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src/emu/cpu/cop400/cop400.h svneol=native#text/plain
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src/emu/cpu/cop400/cop400op.c svneol=native#text/plain
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@ -1,174 +0,0 @@
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/*****************************************************************************
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*
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* disasm.c
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* portable cosmac cdp1802 emulator interface
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*
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* Copyright Peter Trauner, all rights reserved.
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*
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* - This source code is released as freeware for non-commercial purposes.
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* - You are free to use and redistribute this code in modified or
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* unmodified form, provided you list me in the credits.
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* - If you modify this source code, you must add a notice to each modified
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* source file that it has been changed. If you're a nice person, you
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* will clearly mark each change too. :)
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* - If you wish to use this for commercial purposes, please contact me at
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* peter.trauner@jk.uni-linz.ac.at
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* - The author of this copywritten work reserves the right to change the
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* terms of its usage and license at any time, including retroactively
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* - This entire notice must remain in the source code.
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*
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*****************************************************************************/
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#include "emu.h"
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#include "debugger.h"
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#include "cdp1802.h"
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typedef enum
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{
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Ill,
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Imm,
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Imp,
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Imp2, // lownibble contains register number
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Imp3, // bit 0,1,2 1..7 contains n0,n1,n2 level
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Low, // only low byte of address specified
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Abs
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} Adr;
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static const struct { const char *mnemonic; Adr adr; } table[]={
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{ "IDL", Imp }, { "LDN", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ "INC", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ "DEC", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ "BR", Low }, { "BQ", Low }, { "BZ", Low }, { "BDF", Low },
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{ "B1", Low }, { "B2", Low }, { "B3", Low }, { "B4", Low },
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{ "SKP", Low }, { "BNQ", Low }, { "BNZ", Low }, { "BNF", Low },
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{ "BN1", Low }, { "BN2", Low }, { "BN3", Low }, { "BN4", Low },
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{ "LDA", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ "STR", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ "IRX", Imp } ,{ "OUT", Imp3},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ 0 } ,{ "INP", Imp3},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ "RET", Imp }, { "DIS", Imp }, { "LDXA", Imp }, { "STXD", Imp },
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{ "ADC", Imp }, { "SDB", Imp }, { "SHRC", Imp }, { "SMB", Imp },
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{ "SAV", Imp }, { "MARK", Imp }, { "REQ", Imp }, { "SEQ", Imp },
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{ "ADCI", Imm }, { "SDBI", Imm }, { "SHLC", Imp }, { "SMBI", Imm },
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{ "GLO", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ "GHI", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ "PLO", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ "PHI", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ "LBR", Abs }, { "LBQ", Abs }, { "LBZ", Abs }, { "LBDF", Abs },
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{ "NOP", Imp }, { "LSNQ", Imp }, { "LSNZ", Imp }, { "LSNF", Imp },
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{ "LSKP", Imp }, { "LBNQ", Abs }, { "LBNZ", Abs }, { "LBNF", Abs },
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{ "LSIE", Imp }, { "LSQ", Imp }, { "LSZ", Imp }, { "LSDF", Imp },
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{ "SEP", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ "SEX", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
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{ "LDX", Imp }, { "OR", Imp }, { "AND", Imp }, { "XOR", Imp },
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{ "ADD", Imp }, { "SD", Imp }, { "SHR", Imp }, { "SM", Imp },
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{ "LDI", Imm }, { "ORI", Imm }, { "ANI", Imm }, { "XRI", Imm },
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{ "ADI", Imm }, { "SDI", Imm }, { "SHL", Imp }, { "SMI", Imm },
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};
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CPU_DISASSEMBLE( cdp1802 )
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{
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UINT32 flags = 0;
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int oldpc = pc;
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int oper;
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UINT16 absolut;
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oldpc&=0xffff;
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pc=oldpc;
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oper=oprom[pc++ - oldpc];
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switch(oper&0xf0) {
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case 0:
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if (oper==0) {
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sprintf(buffer,"%-5s",table[oper].mnemonic);
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} else {
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sprintf(buffer,"%-5sR%.1x",table[(oper&0xf0)|1].mnemonic, oper&0x0f);
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}
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break;
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case 0xd0:
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flags = DASMFLAG_STEP_OVER;
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/* fall through */
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case 0x10:
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case 0x20:
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case 0x40:
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case 0x50:
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case 0x80:
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case 0x90:
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case 0xa0:
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case 0xb0:
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case 0xe0:
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sprintf(buffer,"%-5sR%.1x",table[oper&0xf0].mnemonic, oper&0x0f);
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break;
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default:
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switch(oper&0xf8) {
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case 0x60:
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if (oper==0x60) {
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sprintf(buffer,"%-5s",table[oper].mnemonic);
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} else {
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sprintf(buffer,"%-5s%d",table[(oper&0xf8)|1].mnemonic, oper&0x7);
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}
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break;
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case 0x68:
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sprintf(buffer,"%-5s%d",table[(oper&0xf8)|1].mnemonic, oper&0x7);
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break;
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default:
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switch (table[oper].adr) {
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case Imp:
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sprintf(buffer,"%-5s",table[oper].mnemonic);
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if (oper == 0x70 || oper == 0x71)
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flags = DASMFLAG_STEP_OUT;
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break;
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case Imm:
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sprintf(buffer,"%-5s#%.2x",table[oper].mnemonic,oprom[pc++ - oldpc]);
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break;
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case Low:
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absolut=oprom[pc++ - oldpc];
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absolut|=pc&0xff00;
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sprintf(buffer,"%-5s%.4x",table[oper].mnemonic,absolut);
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break;
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case Abs:
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absolut=oprom[pc++ - oldpc]<<8;
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absolut|=oprom[pc++ - oldpc];
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sprintf(buffer,"%-5s%.4x",table[oper].mnemonic,absolut);
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break;
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default:
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sprintf(buffer,"%-5s%.2x","ill",oper);
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break;
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}
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break;
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}
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break;
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}
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return (pc-oldpc) | flags | DASMFLAG_SUPPORTED;
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}
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File diff suppressed because it is too large
Load Diff
@ -1,99 +0,0 @@
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#pragma once
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#ifndef __CDP1802_H__
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#define __CDP1802_H__
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/*
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RCA COSMAC Series Microprocessors
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Type Internal ROM Internal RAM Timer
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-----------------------------------------------------
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CDP1802 none none no
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CDP1803 ? ? ?
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CDP1804 2 KB 64 bytes yes
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CDP1805 none 64 bytes yes
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CDP1806 none none yes
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*/
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enum
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{
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CDP1802_INPUT_LINE_INT,
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CDP1802_INPUT_LINE_DMAIN,
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CDP1802_INPUT_LINE_DMAOUT
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};
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enum
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{
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EF1 = 0x01,
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EF2 = 0x02,
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EF3 = 0x04,
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EF4 = 0x08
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};
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enum _cdp1802_control_mode
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{
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CDP1802_MODE_LOAD,
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CDP1802_MODE_RESET,
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CDP1802_MODE_PAUSE,
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CDP1802_MODE_RUN
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};
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typedef enum _cdp1802_control_mode cdp1802_control_mode;
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enum _cdp1802_state_code
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{
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CDP1802_STATE_CODE_S0_FETCH = 0,
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CDP1802_STATE_CODE_S1_EXECUTE,
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CDP1802_STATE_CODE_S2_DMA,
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CDP1802_STATE_CODE_S3_INTERRUPT
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};
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typedef enum _cdp1802_state_code cdp1802_state_code;
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enum
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{
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CDP1802_P, CDP1802_X, CDP1802_D, CDP1802_B, CDP1802_T,
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CDP1802_R0, CDP1802_R1, CDP1802_R2, CDP1802_R3, CDP1802_R4, CDP1802_R5, CDP1802_R6, CDP1802_R7,
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CDP1802_R8, CDP1802_R9, CDP1802_Ra, CDP1802_Rb, CDP1802_Rc, CDP1802_Rd, CDP1802_Re, CDP1802_Rf,
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CDP1802_DF, CDP1802_IE, CDP1802_Q, CDP1802_N, CDP1802_I, CDP1802_SC,
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CDP1802_GENPC = STATE_GENPC
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};
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typedef cdp1802_control_mode (*cdp1802_mode_read_func)(running_device *device);
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#define CDP1802_MODE_READ(name) cdp1802_control_mode name(running_device *device)
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typedef UINT8 (*cdp1802_ef_read_func)(running_device *device);
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#define CDP1802_EF_READ(name) UINT8 name(running_device *device)
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typedef void (*cdp1802_sc_write_func)(running_device *device, cdp1802_state_code state, int sc0, int sc1);
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#define CDP1802_SC_WRITE(name) void name(running_device *device, cdp1802_state_code state, int sc0, int sc1)
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/* interface */
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typedef struct _cdp1802_interface cdp1802_interface;
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struct _cdp1802_interface
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{
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/* if specified, this gets called for every change of the mode pins (pins 2 and 3) */
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cdp1802_mode_read_func mode_r;
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/* if specified, this gets called for every change read of the external flags (pins 21 thru 24) */
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cdp1802_ef_read_func ef_r;
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/* if specified, this gets called for every change of the processor state (pins 5 and 6) */
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cdp1802_sc_write_func sc_w;
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/* if specified, this gets called for every change of the Q pin (pin 4) */
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devcb_write_line out_q_func;
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/* if specified, this gets called for every DMA read */
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devcb_read8 in_dma_func;
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/* if specified, this gets called for every DMA write */
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devcb_write8 out_dma_func;
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};
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#define CDP1802_INTERFACE(name) const cdp1802_interface (name) =
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DECLARE_LEGACY_CPU_DEVICE(CDP1802, cdp1802);
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extern CPU_DISASSEMBLE( cdp1802 );
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#endif /* __CDP1802_H__ */
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@ -275,21 +275,6 @@ $(CPUOBJ)/esrip/esrip.o: $(CPUSRC)/esrip/esrip.c \
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#-------------------------------------------------
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# RCA CDP1802
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#-------------------------------------------------
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ifneq ($(filter CDP1802,$(CPUS)),)
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OBJDIRS += $(CPUOBJ)/cdp1802
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CPUOBJS += $(CPUOBJ)/cdp1802/cdp1802.o
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DASMOBJS += $(CPUOBJ)/cdp1802/1802dasm.o
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endif
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$(CPUOBJ)/cdp1802/cdp1802.o: $(CPUSRC)/cdp1802/cdp1802.c \
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$(CPUSRC)/cdp1802/cdp1802.h
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#-------------------------------------------------
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# RCA COSMAC
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#-------------------------------------------------
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@ -95,7 +95,6 @@ CPUS += ADSP21062
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CPUS += DSP56156
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CPUS += RSP
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CPUS += ALPHA8201
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CPUS += CDP1802
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CPUS += COP400
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CPUS += TLCS90
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CPUS += TLCS900
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